Linux Kernel  3.7.1
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Macros | Functions | Variables
core.c File Reference
#include <linux/init.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/amba/pl022.h>
#include <linux/io.h>
#include <linux/gfp.h>
#include <linux/clkdev.h>
#include <linux/mtd/physmap.h>
#include <asm/irq.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/icst.h>
#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <mach/platform.h>
#include <asm/hardware/timer-sp.h>
#include <plat/clcd.h>
#include <plat/fpga-irq.h>
#include <plat/sched_clock.h>
#include "core.h"

Go to the source code of this file.

Macros

#define VA_VIC_BASE   __io_address(VERSATILE_VIC_BASE)
 
#define VA_SIC_BASE   __io_address(VERSATILE_SIC_BASE)
 
#define IRQ_MMCI0A   IRQ_VICSOURCE22
 
#define IRQ_AACI   IRQ_VICSOURCE24
 
#define IRQ_ETH   IRQ_VICSOURCE25
 
#define PIC_MASK   0xFFD00000
 
#define VERSATILE_FLASHCTRL   (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET)
 
#define VERSATILE_SYSMCI   (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET)
 
#define SYS_CLCD_MODE_MASK   (3 << 0)
 
#define SYS_CLCD_MODE_888   (0 << 0)
 
#define SYS_CLCD_MODE_5551   (1 << 0)
 
#define SYS_CLCD_MODE_565_RLSB   (2 << 0)
 
#define SYS_CLCD_MODE_565_BLSB   (3 << 0)
 
#define SYS_CLCD_NLCDIOON   (1 << 2)
 
#define SYS_CLCD_VDDPOSSWITCH   (1 << 3)
 
#define SYS_CLCD_PWR3V5SWITCH   (1 << 4)
 
#define SYS_CLCD_ID_MASK   (0x1f << 8)
 
#define SYS_CLCD_ID_SANYO_3_8   (0x00 << 8)
 
#define SYS_CLCD_ID_UNKNOWN_8_4   (0x01 << 8)
 
#define SYS_CLCD_ID_EPSON_2_2   (0x02 << 8)
 
#define SYS_CLCD_ID_SANYO_2_5   (0x07 << 8)
 
#define SYS_CLCD_ID_VGA   (0x1f << 8)
 
#define AACI_IRQ   { IRQ_AACI }
 
#define MMCI0_IRQ   { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
 
#define KMI0_IRQ   { IRQ_SIC_KMI0 }
 
#define KMI1_IRQ   { IRQ_SIC_KMI1 }
 
#define SMC_IRQ   { }
 
#define MPMC_IRQ   { }
 
#define CLCD_IRQ   { IRQ_CLCDINT }
 
#define DMAC_IRQ   { IRQ_DMAINT }
 
#define SCTL_IRQ   { }
 
#define WATCHDOG_IRQ   { IRQ_WDOGINT }
 
#define GPIO0_IRQ   { IRQ_GPIOINT0 }
 
#define GPIO1_IRQ   { IRQ_GPIOINT1 }
 
#define RTC_IRQ   { IRQ_RTCINT }
 
#define SCI_IRQ   { IRQ_SCIINT }
 
#define UART0_IRQ   { IRQ_UARTINT0 }
 
#define UART1_IRQ   { IRQ_UARTINT1 }
 
#define UART2_IRQ   { IRQ_UARTINT2 }
 
#define SSP_IRQ   { IRQ_SSPINT }
 
#define TIMER0_VA_BASE   __io_address(VERSATILE_TIMER0_1_BASE)
 
#define TIMER1_VA_BASE   (__io_address(VERSATILE_TIMER0_1_BASE) + 0x20)
 
#define TIMER2_VA_BASE   __io_address(VERSATILE_TIMER2_3_BASE)
 
#define TIMER3_VA_BASE   (__io_address(VERSATILE_TIMER2_3_BASE) + 0x20)
 

Functions

void __init versatile_init_irq (void)
 
void __init versatile_map_io (void)
 
 arch_initcall (versatile_i2c_init)
 
unsigned int mmc_status (struct device *dev)
 
 APB_DEVICE (aaci,"fpga:04", AACI, NULL)
 
 APB_DEVICE (mmc0,"fpga:05", MMCI0,&mmc0_plat_data)
 
 APB_DEVICE (kmi0,"fpga:06", KMI0, NULL)
 
 APB_DEVICE (kmi1,"fpga:07", KMI1, NULL)
 
 AHB_DEVICE (smc,"dev:00", SMC, NULL)
 
 AHB_DEVICE (mpmc,"dev:10", MPMC, NULL)
 
 AHB_DEVICE (clcd,"dev:20", CLCD,&clcd_plat_data)
 
 AHB_DEVICE (dmac,"dev:30", DMAC, NULL)
 
 APB_DEVICE (sctl,"dev:e0", SCTL, NULL)
 
 APB_DEVICE (wdog,"dev:e1", WATCHDOG, NULL)
 
 APB_DEVICE (gpio0,"dev:e4", GPIO0,&gpio0_plat_data)
 
 APB_DEVICE (gpio1,"dev:e5", GPIO1,&gpio1_plat_data)
 
 APB_DEVICE (rtc,"dev:e8", RTC, NULL)
 
 APB_DEVICE (sci0,"dev:f0", SCI, NULL)
 
 APB_DEVICE (uart0,"dev:f1", UART0, NULL)
 
 APB_DEVICE (uart1,"dev:f2", UART1, NULL)
 
 APB_DEVICE (uart2,"dev:f3", UART2, NULL)
 
 APB_DEVICE (ssp0,"dev:f4", SSP,&ssp0_plat_data)
 
void versatile_restart (char mode, const char *cmd)
 
void __init versatile_init_early (void)
 
void __init versatile_init (void)
 

Variables

struct sys_timer versatile_timer
 

Macro Definition Documentation

#define AACI_IRQ   { IRQ_AACI }

Definition at line 565 of file core.c.

#define CLCD_IRQ   { IRQ_CLCDINT }

Definition at line 575 of file core.c.

#define DMAC_IRQ   { IRQ_DMAINT }

Definition at line 576 of file core.c.

#define GPIO0_IRQ   { IRQ_GPIOINT0 }

Definition at line 583 of file core.c.

#define GPIO1_IRQ   { IRQ_GPIOINT1 }

Definition at line 584 of file core.c.

#define IRQ_AACI   IRQ_VICSOURCE24

Definition at line 70 of file core.c.

#define IRQ_ETH   IRQ_VICSOURCE25

Definition at line 71 of file core.c.

#define IRQ_MMCI0A   IRQ_VICSOURCE22

Definition at line 69 of file core.c.

#define KMI0_IRQ   { IRQ_SIC_KMI0 }

Definition at line 567 of file core.c.

#define KMI1_IRQ   { IRQ_SIC_KMI1 }

Definition at line 568 of file core.c.

#define MMCI0_IRQ   { IRQ_MMCI0A,IRQ_SIC_MMCI0B }

Definition at line 566 of file core.c.

#define MPMC_IRQ   { }

Definition at line 574 of file core.c.

#define PIC_MASK   0xFFD00000

Definition at line 72 of file core.c.

#define RTC_IRQ   { IRQ_RTCINT }

Definition at line 585 of file core.c.

#define SCI_IRQ   { IRQ_SCIINT }

Definition at line 590 of file core.c.

#define SCTL_IRQ   { }

Definition at line 581 of file core.c.

#define SMC_IRQ   { }

Definition at line 573 of file core.c.

#define SSP_IRQ   { IRQ_SSPINT }

Definition at line 594 of file core.c.

#define SYS_CLCD_ID_EPSON_2_2   (0x02 << 8)

Definition at line 405 of file core.c.

#define SYS_CLCD_ID_MASK   (0x1f << 8)

Definition at line 402 of file core.c.

#define SYS_CLCD_ID_SANYO_2_5   (0x07 << 8)

Definition at line 406 of file core.c.

#define SYS_CLCD_ID_SANYO_3_8   (0x00 << 8)

Definition at line 403 of file core.c.

#define SYS_CLCD_ID_UNKNOWN_8_4   (0x01 << 8)

Definition at line 404 of file core.c.

#define SYS_CLCD_ID_VGA   (0x1f << 8)

Definition at line 407 of file core.c.

#define SYS_CLCD_MODE_5551   (1 << 0)

Definition at line 396 of file core.c.

#define SYS_CLCD_MODE_565_BLSB   (3 << 0)

Definition at line 398 of file core.c.

#define SYS_CLCD_MODE_565_RLSB   (2 << 0)

Definition at line 397 of file core.c.

#define SYS_CLCD_MODE_888   (0 << 0)

Definition at line 395 of file core.c.

#define SYS_CLCD_MODE_MASK   (3 << 0)

Definition at line 394 of file core.c.

#define SYS_CLCD_NLCDIOON   (1 << 2)

Definition at line 399 of file core.c.

#define SYS_CLCD_PWR3V5SWITCH   (1 << 4)

Definition at line 401 of file core.c.

#define SYS_CLCD_VDDPOSSWITCH   (1 << 3)

Definition at line 400 of file core.c.

#define TIMER0_VA_BASE   __io_address(VERSATILE_TIMER0_1_BASE)

Definition at line 765 of file core.c.

#define TIMER1_VA_BASE   (__io_address(VERSATILE_TIMER0_1_BASE) + 0x20)

Definition at line 766 of file core.c.

#define TIMER2_VA_BASE   __io_address(VERSATILE_TIMER2_3_BASE)

Definition at line 767 of file core.c.

#define TIMER3_VA_BASE   (__io_address(VERSATILE_TIMER2_3_BASE) + 0x20)

Definition at line 768 of file core.c.

#define UART0_IRQ   { IRQ_UARTINT0 }

Definition at line 591 of file core.c.

#define UART1_IRQ   { IRQ_UARTINT1 }

Definition at line 592 of file core.c.

#define UART2_IRQ   { IRQ_UARTINT2 }

Definition at line 593 of file core.c.

#define VA_SIC_BASE   __io_address(VERSATILE_SIC_BASE)

Definition at line 66 of file core.c.

#define VA_VIC_BASE   __io_address(VERSATILE_VIC_BASE)

Definition at line 65 of file core.c.

#define VERSATILE_FLASHCTRL   (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET)

Definition at line 181 of file core.c.

#define VERSATILE_SYSMCI   (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET)

Definition at line 262 of file core.c.

#define WATCHDOG_IRQ   { IRQ_WDOGINT }

Definition at line 582 of file core.c.

Function Documentation

AHB_DEVICE ( smc  ,
"dev:00"  ,
SMC  ,
NULL   
)
AHB_DEVICE ( mpmc  ,
"dev:10"  ,
MPMC  ,
NULL   
)
AHB_DEVICE ( clcd  ,
"dev:20"  ,
CLCD  ,
clcd_plat_data 
)
AHB_DEVICE ( dmac  ,
"dev:30"  ,
DMAC  ,
NULL   
)
APB_DEVICE ( aaci  ,
"fpga:04"  ,
AACI  ,
NULL   
)
APB_DEVICE ( mmc0  ,
"fpga:05"  ,
MMCI0  ,
mmc0_plat_data 
)
APB_DEVICE ( kmi0  ,
"fpga:06"  ,
KMI0  ,
NULL   
)
APB_DEVICE ( kmi1  ,
"fpga:07"  ,
KMI1  ,
NULL   
)
APB_DEVICE ( sctl  ,
"dev:e0"  ,
SCTL  ,
NULL   
)
APB_DEVICE ( wdog  ,
"dev:e1"  ,
WATCHDOG  ,
NULL   
)
APB_DEVICE ( gpio0  ,
"dev:e4"  ,
GPIO0  ,
gpio0_plat_data 
)
APB_DEVICE ( gpio1  ,
"dev:e5"  ,
GPIO1  ,
gpio1_plat_data 
)
APB_DEVICE ( rtc  ,
"dev:e8"  ,
RTC  ,
NULL   
)
APB_DEVICE ( sci0  ,
"dev:f0"  ,
SCI  ,
NULL   
)
APB_DEVICE ( uart0  ,
"dev:f1"  ,
UART0  ,
NULL   
)
APB_DEVICE ( uart1  ,
"dev:f2"  ,
UART1  ,
NULL   
)
APB_DEVICE ( uart2  ,
"dev:f3"  ,
UART2  ,
NULL   
)
APB_DEVICE ( ssp0  ,
"dev:f4"  ,
SSP  ,
ssp0_plat_data 
)
arch_initcall ( versatile_i2c_init  )
unsigned int mmc_status ( struct device dev)

Definition at line 264 of file core.c.

void __init versatile_init ( void  )

Definition at line 747 of file core.c.

void __init versatile_init_early ( void  )

Definition at line 737 of file core.c.

void __init versatile_init_irq ( void  )

Definition at line 91 of file core.c.

void __init versatile_map_io ( void  )

Definition at line 175 of file core.c.

void versatile_restart ( char  mode,
const char cmd 
)

Definition at line 723 of file core.c.

Variable Documentation

struct sys_timer versatile_timer
Initial value:
= {
.init = versatile_timer_init,
}

Definition at line 801 of file core.c.