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Data Structures | Macros
bnx2.h File Reference

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Data Structures

struct  tx_bd
 
struct  rx_bd
 
struct  status_block
 
struct  status_block_msix
 
struct  statistics_block
 
struct  l2_fhdr
 
struct  sw_bd
 
struct  sw_pg
 
struct  sw_tx_bd
 
struct  flash_spec
 
struct  bnx2_irq
 
struct  bnx2_tx_ring_info
 
struct  bnx2_rx_ring_info
 
struct  bnx2_napi
 
struct  bnx2
 
struct  cpu_reg
 
struct  bnx2_fw_file_section
 
struct  bnx2_mips_fw_file_entry
 
struct  bnx2_rv2p_fw_file_entry
 
struct  bnx2_mips_fw_file
 
struct  bnx2_rv2p_fw_file
 

Macros

#define TX_BD_TCP6_OFF2_SHL   (14)
 
#define TX_BD_FLAGS_CONN_FAULT   (1<<0)
 
#define TX_BD_FLAGS_TCP6_OFF0_MSK   (3<<1)
 
#define TX_BD_FLAGS_TCP6_OFF0_SHL   (1)
 
#define TX_BD_FLAGS_TCP_UDP_CKSUM   (1<<1)
 
#define TX_BD_FLAGS_IP_CKSUM   (1<<2)
 
#define TX_BD_FLAGS_VLAN_TAG   (1<<3)
 
#define TX_BD_FLAGS_COAL_NOW   (1<<4)
 
#define TX_BD_FLAGS_DONT_GEN_CRC   (1<<5)
 
#define TX_BD_FLAGS_END   (1<<6)
 
#define TX_BD_FLAGS_START   (1<<7)
 
#define TX_BD_FLAGS_SW_OPTION_WORD   (0x1f<<8)
 
#define TX_BD_FLAGS_TCP6_OFF4_SHL   (12)
 
#define TX_BD_FLAGS_SW_FLAGS   (1<<13)
 
#define TX_BD_FLAGS_SW_SNAP   (1<<14)
 
#define TX_BD_FLAGS_SW_LSO   (1<<15)
 
#define RX_BD_FLAGS_NOPUSH   (1<<0)
 
#define RX_BD_FLAGS_DUMMY   (1<<1)
 
#define RX_BD_FLAGS_END   (1<<2)
 
#define RX_BD_FLAGS_START   (1<<3)
 
#define BNX2_RX_ALIGN   16
 
#define STATUS_ATTN_BITS_LINK_STATE   (1L<<0)
 
#define STATUS_ATTN_BITS_TX_SCHEDULER_ABORT   (1L<<1)
 
#define STATUS_ATTN_BITS_TX_BD_READ_ABORT   (1L<<2)
 
#define STATUS_ATTN_BITS_TX_BD_CACHE_ABORT   (1L<<3)
 
#define STATUS_ATTN_BITS_TX_PROCESSOR_ABORT   (1L<<4)
 
#define STATUS_ATTN_BITS_TX_DMA_ABORT   (1L<<5)
 
#define STATUS_ATTN_BITS_TX_PATCHUP_ABORT   (1L<<6)
 
#define STATUS_ATTN_BITS_TX_ASSEMBLER_ABORT   (1L<<7)
 
#define STATUS_ATTN_BITS_RX_PARSER_MAC_ABORT   (1L<<8)
 
#define STATUS_ATTN_BITS_RX_PARSER_CATCHUP_ABORT   (1L<<9)
 
#define STATUS_ATTN_BITS_RX_MBUF_ABORT   (1L<<10)
 
#define STATUS_ATTN_BITS_RX_LOOKUP_ABORT   (1L<<11)
 
#define STATUS_ATTN_BITS_RX_PROCESSOR_ABORT   (1L<<12)
 
#define STATUS_ATTN_BITS_RX_V2P_ABORT   (1L<<13)
 
#define STATUS_ATTN_BITS_RX_BD_CACHE_ABORT   (1L<<14)
 
#define STATUS_ATTN_BITS_RX_DMA_ABORT   (1L<<15)
 
#define STATUS_ATTN_BITS_COMPLETION_ABORT   (1L<<16)
 
#define STATUS_ATTN_BITS_HOST_COALESCE_ABORT   (1L<<17)
 
#define STATUS_ATTN_BITS_MAILBOX_QUEUE_ABORT   (1L<<18)
 
#define STATUS_ATTN_BITS_CONTEXT_ABORT   (1L<<19)
 
#define STATUS_ATTN_BITS_CMD_SCHEDULER_ABORT   (1L<<20)
 
#define STATUS_ATTN_BITS_CMD_PROCESSOR_ABORT   (1L<<21)
 
#define STATUS_ATTN_BITS_MGMT_PROCESSOR_ABORT   (1L<<22)
 
#define STATUS_ATTN_BITS_MAC_ABORT   (1L<<23)
 
#define STATUS_ATTN_BITS_TIMER_ABORT   (1L<<24)
 
#define STATUS_ATTN_BITS_DMAE_ABORT   (1L<<25)
 
#define STATUS_ATTN_BITS_FLSH_ABORT   (1L<<26)
 
#define STATUS_ATTN_BITS_GRC_ABORT   (1L<<27)
 
#define STATUS_ATTN_BITS_EPB_ERROR   (1L<<30)
 
#define STATUS_ATTN_BITS_PARITY_ERROR   (1L<<31)
 
#define BNX2_SBLK_MSIX_ALIGN_SIZE   128
 
#define L2_FHDR_STATUS_RULE_CLASS   (0x7<<0)
 
#define L2_FHDR_STATUS_RULE_P2   (1<<3)
 
#define L2_FHDR_STATUS_RULE_P3   (1<<4)
 
#define L2_FHDR_STATUS_RULE_P4   (1<<5)
 
#define L2_FHDR_STATUS_L2_VLAN_TAG   (1<<6)
 
#define L2_FHDR_STATUS_L2_LLC_SNAP   (1<<7)
 
#define L2_FHDR_STATUS_RSS_HASH   (1<<8)
 
#define L2_FHDR_STATUS_IP_DATAGRAM   (1<<13)
 
#define L2_FHDR_STATUS_TCP_SEGMENT   (1<<14)
 
#define L2_FHDR_STATUS_UDP_DATAGRAM   (1<<15)
 
#define L2_FHDR_STATUS_SPLIT   (1<<16)
 
#define L2_FHDR_ERRORS_BAD_CRC   (1<<17)
 
#define L2_FHDR_ERRORS_PHY_DECODE   (1<<18)
 
#define L2_FHDR_ERRORS_ALIGNMENT   (1<<19)
 
#define L2_FHDR_ERRORS_TOO_SHORT   (1<<20)
 
#define L2_FHDR_ERRORS_GIANT_FRAME   (1<<21)
 
#define L2_FHDR_ERRORS_TCP_XSUM   (1<<28)
 
#define L2_FHDR_ERRORS_UDP_XSUM   (1<<31)
 
#define L2_FHDR_STATUS_USE_RXHASH   (L2_FHDR_STATUS_TCP_SEGMENT | L2_FHDR_STATUS_RSS_HASH)
 
#define BNX2_RX_OFFSET   (sizeof(struct l2_fhdr) + 2)
 
#define BNX2_L2CTX_TYPE   0x00000000
 
#define BNX2_L2CTX_TYPE_SIZE_L2   ((0xc0/0x20)<<16)
 
#define BNX2_L2CTX_TYPE_TYPE   (0xf<<28)
 
#define BNX2_L2CTX_TYPE_TYPE_EMPTY   (0<<28)
 
#define BNX2_L2CTX_TYPE_TYPE_L2   (1<<28)
 
#define BNX2_L2CTX_TX_HOST_BIDX   0x00000088
 
#define BNX2_L2CTX_EST_NBD   0x00000088
 
#define BNX2_L2CTX_CMD_TYPE   0x00000088
 
#define BNX2_L2CTX_CMD_TYPE_TYPE   (0xf<<24)
 
#define BNX2_L2CTX_CMD_TYPE_TYPE_L2   (0<<24)
 
#define BNX2_L2CTX_CMD_TYPE_TYPE_TCP   (1<<24)
 
#define BNX2_L2CTX_TX_HOST_BSEQ   0x00000090
 
#define BNX2_L2CTX_TSCH_BSEQ   0x00000094
 
#define BNX2_L2CTX_TBDR_BSEQ   0x00000098
 
#define BNX2_L2CTX_TBDR_BOFF   0x0000009c
 
#define BNX2_L2CTX_TBDR_BIDX   0x0000009c
 
#define BNX2_L2CTX_TBDR_BHADDR_HI   0x000000a0
 
#define BNX2_L2CTX_TBDR_BHADDR_LO   0x000000a4
 
#define BNX2_L2CTX_TXP_BOFF   0x000000a8
 
#define BNX2_L2CTX_TXP_BIDX   0x000000a8
 
#define BNX2_L2CTX_TXP_BSEQ   0x000000ac
 
#define BNX2_L2CTX_TYPE_XI   0x00000080
 
#define BNX2_L2CTX_CMD_TYPE_XI   0x00000240
 
#define BNX2_L2CTX_TBDR_BHADDR_HI_XI   0x00000258
 
#define BNX2_L2CTX_TBDR_BHADDR_LO_XI   0x0000025c
 
#define BNX2_L2CTX_BD_PRE_READ   0x00000000
 
#define BNX2_L2CTX_CTX_SIZE   0x00000000
 
#define BNX2_L2CTX_CTX_TYPE   0x00000000
 
#define BNX2_L2CTX_FLOW_CTRL_ENABLE   0x000000ff
 
#define BNX2_L2CTX_CTX_TYPE_SIZE_L2   ((0x20/20)<<16)
 
#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE   (0xf<<28)
 
#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED   (0<<28)
 
#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE   (1<<28)
 
#define BNX2_L2CTX_HOST_BDIDX   0x00000004
 
#define BNX2_L2CTX_L5_STATUSB_NUM_SHIFT   16
 
#define BNX2_L2CTX_L2_STATUSB_NUM_SHIFT   24
 
#define BNX2_L2CTX_L5_STATUSB_NUM(sb_id)   (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L5_STATUSB_NUM_SHIFT) : 0)
 
#define BNX2_L2CTX_L2_STATUSB_NUM(sb_id)   (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT) : 0)
 
#define BNX2_L2CTX_HOST_BSEQ   0x00000008
 
#define BNX2_L2CTX_NX_BSEQ   0x0000000c
 
#define BNX2_L2CTX_NX_BDHADDR_HI   0x00000010
 
#define BNX2_L2CTX_NX_BDHADDR_LO   0x00000014
 
#define BNX2_L2CTX_NX_BDIDX   0x00000018
 
#define BNX2_L2CTX_HOST_PG_BDIDX   0x00000044
 
#define BNX2_L2CTX_PG_BUF_SIZE   0x00000048
 
#define BNX2_L2CTX_RBDC_KEY   0x0000004c
 
#define BNX2_L2CTX_RBDC_JUMBO_KEY   0x3ffe
 
#define BNX2_L2CTX_NX_PG_BDHADDR_HI   0x00000050
 
#define BNX2_L2CTX_NX_PG_BDHADDR_LO   0x00000054
 
#define BNX2_PCICFG_MSI_CONTROL   0x00000058
 
#define BNX2_PCICFG_MSI_CONTROL_ENABLE   (1L<<16)
 
#define BNX2_PCICFG_MISC_CONFIG   0x00000068
 
#define BNX2_PCICFG_MISC_CONFIG_TARGET_BYTE_SWAP   (1L<<2)
 
#define BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP   (1L<<3)
 
#define BNX2_PCICFG_MISC_CONFIG_RESERVED1   (1L<<4)
 
#define BNX2_PCICFG_MISC_CONFIG_CLOCK_CTL_ENA   (1L<<5)
 
#define BNX2_PCICFG_MISC_CONFIG_TARGET_GRC_WORD_SWAP   (1L<<6)
 
#define BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA   (1L<<7)
 
#define BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ   (1L<<8)
 
#define BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY   (1L<<9)
 
#define BNX2_PCICFG_MISC_CONFIG_GRC_WIN1_SWAP_EN   (1L<<10)
 
#define BNX2_PCICFG_MISC_CONFIG_GRC_WIN2_SWAP_EN   (1L<<11)
 
#define BNX2_PCICFG_MISC_CONFIG_GRC_WIN3_SWAP_EN   (1L<<12)
 
#define BNX2_PCICFG_MISC_CONFIG_ASIC_METAL_REV   (0xffL<<16)
 
#define BNX2_PCICFG_MISC_CONFIG_ASIC_BASE_REV   (0xfL<<24)
 
#define BNX2_PCICFG_MISC_CONFIG_ASIC_ID   (0xfL<<28)
 
#define BNX2_PCICFG_MISC_STATUS   0x0000006c
 
#define BNX2_PCICFG_MISC_STATUS_INTA_VALUE   (1L<<0)
 
#define BNX2_PCICFG_MISC_STATUS_32BIT_DET   (1L<<1)
 
#define BNX2_PCICFG_MISC_STATUS_M66EN   (1L<<2)
 
#define BNX2_PCICFG_MISC_STATUS_PCIX_DET   (1L<<3)
 
#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED   (0x3L<<4)
 
#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_66   (0L<<4)
 
#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_100   (1L<<4)
 
#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_133   (2L<<4)
 
#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_PCI_MODE   (3L<<4)
 
#define BNX2_PCICFG_MISC_STATUS_BAD_MEM_WRITE_BE   (1L<<8)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS   0x00000070
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET   (0xfL<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ   (0L<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ   (1L<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ   (2L<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ   (3L<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ   (4L<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ   (5L<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ   (6L<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ   (7L<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW   (0xfL<<0)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE   (1L<<6)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT   (1L<<7)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC   (0x7L<<8)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF   (0L<<8)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12   (1L<<8)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6   (2L<<8)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62   (4L<<8)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_MIN_POWER   (1L<<11)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED   (0xfL<<12)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100   (0L<<12)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80   (1L<<12)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50   (2L<<12)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40   (4L<<12)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25   (8L<<12)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP   (1L<<16)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_17   (1L<<17)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_18   (1L<<18)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_19   (1L<<19)
 
#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED   (0xfffL<<20)
 
#define BNX2_PCICFG_REG_WINDOW_ADDRESS   0x00000078
 
#define BNX2_PCICFG_REG_WINDOW_ADDRESS_VAL   (0xfffffL<<2)
 
#define BNX2_PCICFG_REG_WINDOW   0x00000080
 
#define BNX2_PCICFG_INT_ACK_CMD   0x00000084
 
#define BNX2_PCICFG_INT_ACK_CMD_INDEX   (0xffffL<<0)
 
#define BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID   (1L<<16)
 
#define BNX2_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM   (1L<<17)
 
#define BNX2_PCICFG_INT_ACK_CMD_MASK_INT   (1L<<18)
 
#define BNX2_PCICFG_INT_ACK_CMD_INTERRUPT_NUM   (0xfL<<24)
 
#define BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT   24
 
#define BNX2_PCICFG_STATUS_BIT_SET_CMD   0x00000088
 
#define BNX2_PCICFG_STATUS_BIT_CLEAR_CMD   0x0000008c
 
#define BNX2_PCICFG_MAILBOX_QUEUE_ADDR   0x00000090
 
#define BNX2_PCICFG_MAILBOX_QUEUE_DATA   0x00000094
 
#define BNX2_PCICFG_DEVICE_CONTROL   0x000000b4
 
#define BNX2_PCICFG_DEVICE_STATUS_NO_PEND   ((1L<<5)<<16)
 
#define BNX2_PCI_GRC_WINDOW_ADDR   0x00000400
 
#define BNX2_PCI_GRC_WINDOW_ADDR_VALUE   (0x1ffL<<13)
 
#define BNX2_PCI_GRC_WINDOW_ADDR_SEP_WIN   (1L<<31)
 
#define BNX2_PCI_GRC_WINDOW2_BASE   0xc000
 
#define BNX2_PCI_GRC_WINDOW3_BASE   0xe000
 
#define BNX2_PCI_CONFIG_1   0x00000404
 
#define BNX2_PCI_CONFIG_1_RESERVED0   (0xffL<<0)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY   (0x7L<<8)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_OFF   (0L<<8)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_16   (1L<<8)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_32   (2L<<8)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_64   (3L<<8)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_128   (4L<<8)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_256   (5L<<8)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_512   (6L<<8)
 
#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_1024   (7L<<8)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY   (0x7L<<11)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_OFF   (0L<<11)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_16   (1L<<11)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_32   (2L<<11)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_64   (3L<<11)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_128   (4L<<11)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_256   (5L<<11)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_512   (6L<<11)
 
#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_1024   (7L<<11)
 
#define BNX2_PCI_CONFIG_1_RESERVED1   (0x3ffffL<<14)
 
#define BNX2_PCI_CONFIG_2   0x00000408
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE   (0xfL<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_DISABLED   (0L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_64K   (1L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_128K   (2L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_256K   (3L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_512K   (4L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_1M   (5L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_2M   (6L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_4M   (7L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_8M   (8L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_16M   (9L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_32M   (10L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_64M   (11L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_128M   (12L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_256M   (13L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_512M   (14L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_SIZE_1G   (15L<<0)
 
#define BNX2_PCI_CONFIG_2_BAR1_64ENA   (1L<<4)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_RETRY   (1L<<5)
 
#define BNX2_PCI_CONFIG_2_CFG_CYCLE_RETRY   (1L<<6)
 
#define BNX2_PCI_CONFIG_2_FIRST_CFG_DONE   (1L<<7)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE   (0xffL<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_DISABLED   (0L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_1K   (1L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_2K   (2L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_4K   (3L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_8K   (4L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_16K   (5L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_32K   (6L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_64K   (7L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_128K   (8L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_256K   (9L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_512K   (10L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_1M   (11L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_2M   (12L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_4M   (13L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_8M   (14L<<8)
 
#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_16M   (15L<<8)
 
#define BNX2_PCI_CONFIG_2_MAX_SPLIT_LIMIT   (0x1fL<<16)
 
#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT   (0x3L<<21)
 
#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_512   (0L<<21)
 
#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_1K   (1L<<21)
 
#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_2K   (2L<<21)
 
#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_4K   (3L<<21)
 
#define BNX2_PCI_CONFIG_2_FORCE_32_BIT_MSTR   (1L<<23)
 
#define BNX2_PCI_CONFIG_2_FORCE_32_BIT_TGT   (1L<<24)
 
#define BNX2_PCI_CONFIG_2_KEEP_REQ_ASSERT   (1L<<25)
 
#define BNX2_PCI_CONFIG_2_RESERVED0   (0x3fL<<26)
 
#define BNX2_PCI_CONFIG_2_BAR_PREFETCH_XI   (1L<<16)
 
#define BNX2_PCI_CONFIG_2_RESERVED0_XI   (0x7fffL<<17)
 
#define BNX2_PCI_CONFIG_3   0x0000040c
 
#define BNX2_PCI_CONFIG_3_STICKY_BYTE   (0xffL<<0)
 
#define BNX2_PCI_CONFIG_3_REG_STICKY_BYTE   (0xffL<<8)
 
#define BNX2_PCI_CONFIG_3_FORCE_PME   (1L<<24)
 
#define BNX2_PCI_CONFIG_3_PME_STATUS   (1L<<25)
 
#define BNX2_PCI_CONFIG_3_PME_ENABLE   (1L<<26)
 
#define BNX2_PCI_CONFIG_3_PM_STATE   (0x3L<<27)
 
#define BNX2_PCI_CONFIG_3_VAUX_PRESET   (1L<<30)
 
#define BNX2_PCI_CONFIG_3_PCI_POWER   (1L<<31)
 
#define BNX2_PCI_PM_DATA_A   0x00000410
 
#define BNX2_PCI_PM_DATA_A_PM_DATA_0_PRG   (0xffL<<0)
 
#define BNX2_PCI_PM_DATA_A_PM_DATA_1_PRG   (0xffL<<8)
 
#define BNX2_PCI_PM_DATA_A_PM_DATA_2_PRG   (0xffL<<16)
 
#define BNX2_PCI_PM_DATA_A_PM_DATA_3_PRG   (0xffL<<24)
 
#define BNX2_PCI_PM_DATA_B   0x00000414
 
#define BNX2_PCI_PM_DATA_B_PM_DATA_4_PRG   (0xffL<<0)
 
#define BNX2_PCI_PM_DATA_B_PM_DATA_5_PRG   (0xffL<<8)
 
#define BNX2_PCI_PM_DATA_B_PM_DATA_6_PRG   (0xffL<<16)
 
#define BNX2_PCI_PM_DATA_B_PM_DATA_7_PRG   (0xffL<<24)
 
#define BNX2_PCI_SWAP_DIAG0   0x00000418
 
#define BNX2_PCI_SWAP_DIAG1   0x0000041c
 
#define BNX2_PCI_EXP_ROM_ADDR   0x00000420
 
#define BNX2_PCI_EXP_ROM_ADDR_ADDRESS   (0x3fffffL<<2)
 
#define BNX2_PCI_EXP_ROM_ADDR_REQ   (1L<<31)
 
#define BNX2_PCI_EXP_ROM_DATA   0x00000424
 
#define BNX2_PCI_VPD_INTF   0x00000428
 
#define BNX2_PCI_VPD_INTF_INTF_REQ   (1L<<0)
 
#define BNX2_PCI_VPD_ADDR_FLAG   0x0000042c
 
#define BNX2_PCI_VPD_ADDR_FLAG_MSK   0x0000ffff
 
#define BNX2_PCI_VPD_ADDR_FLAG_SL   0L
 
#define BNX2_PCI_VPD_ADDR_FLAG_ADDRESS   (0x1fffL<<2)
 
#define BNX2_PCI_VPD_ADDR_FLAG_WR   (1L<<15)
 
#define BNX2_PCI_VPD_DATA   0x00000430
 
#define BNX2_PCI_ID_VAL1   0x00000434
 
#define BNX2_PCI_ID_VAL1_DEVICE_ID   (0xffffL<<0)
 
#define BNX2_PCI_ID_VAL1_VENDOR_ID   (0xffffL<<16)
 
#define BNX2_PCI_ID_VAL2   0x00000438
 
#define BNX2_PCI_ID_VAL2_SUBSYSTEM_VENDOR_ID   (0xffffL<<0)
 
#define BNX2_PCI_ID_VAL2_SUBSYSTEM_ID   (0xffffL<<16)
 
#define BNX2_PCI_ID_VAL3   0x0000043c
 
#define BNX2_PCI_ID_VAL3_CLASS_CODE   (0xffffffL<<0)
 
#define BNX2_PCI_ID_VAL3_REVISION_ID   (0xffL<<24)
 
#define BNX2_PCI_ID_VAL4   0x00000440
 
#define BNX2_PCI_ID_VAL4_CAP_ENA   (0xfL<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_0   (0L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_1   (1L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_2   (2L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_3   (3L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_4   (4L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_5   (5L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_6   (6L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_7   (7L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_8   (8L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_9   (9L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_10   (10L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_11   (11L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_12   (12L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_13   (13L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_14   (14L<<0)
 
#define BNX2_PCI_ID_VAL4_CAP_ENA_15   (15L<<0)
 
#define BNX2_PCI_ID_VAL4_RESERVED0   (0x3L<<4)
 
#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG   (0x3L<<6)
 
#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0   (0L<<6)
 
#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1   (1L<<6)
 
#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2   (2L<<6)
 
#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3   (3L<<6)
 
#define BNX2_PCI_ID_VAL4_MSI_PV_MASK_CAP   (1L<<8)
 
#define BNX2_PCI_ID_VAL4_MSI_LIMIT   (0x7L<<9)
 
#define BNX2_PCI_ID_VAL4_MULTI_MSG_CAP   (0x7L<<12)
 
#define BNX2_PCI_ID_VAL4_MSI_ENABLE   (1L<<15)
 
#define BNX2_PCI_ID_VAL4_MAX_64_ADVERTIZE   (1L<<16)
 
#define BNX2_PCI_ID_VAL4_MAX_133_ADVERTIZE   (1L<<17)
 
#define BNX2_PCI_ID_VAL4_RESERVED2   (0x7L<<18)
 
#define BNX2_PCI_ID_VAL4_MAX_CUMULATIVE_SIZE_B21   (0x3L<<21)
 
#define BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE_B21   (0x3L<<23)
 
#define BNX2_PCI_ID_VAL4_MAX_CUMULATIVE_SIZE_B0   (1L<<25)
 
#define BNX2_PCI_ID_VAL4_MAX_MEM_READ_SIZE_B10   (0x3L<<26)
 
#define BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE_B0   (1L<<28)
 
#define BNX2_PCI_ID_VAL4_RESERVED3   (0x7L<<29)
 
#define BNX2_PCI_ID_VAL4_RESERVED3_XI   (0xffffL<<16)
 
#define BNX2_PCI_ID_VAL5   0x00000444
 
#define BNX2_PCI_ID_VAL5_D1_SUPPORT   (1L<<0)
 
#define BNX2_PCI_ID_VAL5_D2_SUPPORT   (1L<<1)
 
#define BNX2_PCI_ID_VAL5_PME_IN_D0   (1L<<2)
 
#define BNX2_PCI_ID_VAL5_PME_IN_D1   (1L<<3)
 
#define BNX2_PCI_ID_VAL5_PME_IN_D2   (1L<<4)
 
#define BNX2_PCI_ID_VAL5_PME_IN_D3_HOT   (1L<<5)
 
#define BNX2_PCI_ID_VAL5_RESERVED0_TE   (0x3ffffffL<<6)
 
#define BNX2_PCI_ID_VAL5_PM_VERSION_XI   (0x7L<<6)
 
#define BNX2_PCI_ID_VAL5_NO_SOFT_RESET_XI   (1L<<9)
 
#define BNX2_PCI_ID_VAL5_RESERVED0_XI   (0x3fffffL<<10)
 
#define BNX2_PCI_PCIX_EXTENDED_STATUS   0x00000448
 
#define BNX2_PCI_PCIX_EXTENDED_STATUS_NO_SNOOP   (1L<<8)
 
#define BNX2_PCI_PCIX_EXTENDED_STATUS_LONG_BURST   (1L<<9)
 
#define BNX2_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_CLASS   (0xfL<<16)
 
#define BNX2_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_IDX   (0xffL<<24)
 
#define BNX2_PCI_ID_VAL6   0x0000044c
 
#define BNX2_PCI_ID_VAL6_MAX_LAT   (0xffL<<0)
 
#define BNX2_PCI_ID_VAL6_MIN_GNT   (0xffL<<8)
 
#define BNX2_PCI_ID_VAL6_BIST   (0xffL<<16)
 
#define BNX2_PCI_ID_VAL6_RESERVED0   (0xffL<<24)
 
#define BNX2_PCI_MSI_DATA   0x00000450
 
#define BNX2_PCI_MSI_DATA_MSI_DATA   (0xffffL<<0)
 
#define BNX2_PCI_MSI_ADDR_H   0x00000454
 
#define BNX2_PCI_MSI_ADDR_L   0x00000458
 
#define BNX2_PCI_MSI_ADDR_L_VAL   (0x3fffffffL<<2)
 
#define BNX2_PCI_CFG_ACCESS_CMD   0x0000045c
 
#define BNX2_PCI_CFG_ACCESS_CMD_ADR   (0x3fL<<2)
 
#define BNX2_PCI_CFG_ACCESS_CMD_RD_REQ   (1L<<27)
 
#define BNX2_PCI_CFG_ACCESS_CMD_WR_REQ   (0xfL<<28)
 
#define BNX2_PCI_CFG_ACCESS_DATA   0x00000460
 
#define BNX2_PCI_MSI_MASK   0x00000464
 
#define BNX2_PCI_MSI_MASK_MSI_MASK   (0xffffffffL<<0)
 
#define BNX2_PCI_MSI_PEND   0x00000468
 
#define BNX2_PCI_MSI_PEND_MSI_PEND   (0xffffffffL<<0)
 
#define BNX2_PCI_PM_DATA_C   0x0000046c
 
#define BNX2_PCI_PM_DATA_C_PM_DATA_8_PRG   (0xffL<<0)
 
#define BNX2_PCI_PM_DATA_C_RESERVED0   (0xffffffL<<8)
 
#define BNX2_PCI_MSIX_CONTROL   0x000004c0
 
#define BNX2_PCI_MSIX_CONTROL_MSIX_TBL_SIZ   (0x7ffL<<0)
 
#define BNX2_PCI_MSIX_CONTROL_RESERVED0   (0x1fffffL<<11)
 
#define BNX2_PCI_MSIX_TBL_OFF_BIR   0x000004c4
 
#define BNX2_PCI_MSIX_TBL_OFF_BIR_MSIX_TBL_BIR   (0x7L<<0)
 
#define BNX2_PCI_MSIX_TBL_OFF_BIR_MSIX_TBL_OFF   (0x1fffffffL<<3)
 
#define BNX2_PCI_MSIX_PBA_OFF_BIT   0x000004c8
 
#define BNX2_PCI_MSIX_PBA_OFF_BIT_MSIX_PBA_BIR   (0x7L<<0)
 
#define BNX2_PCI_MSIX_PBA_OFF_BIT_MSIX_PBA_OFF   (0x1fffffffL<<3)
 
#define BNX2_PCI_PCIE_CAPABILITY   0x000004d0
 
#define BNX2_PCI_PCIE_CAPABILITY_INTERRUPT_MSG_NUM   (0x1fL<<0)
 
#define BNX2_PCI_PCIE_CAPABILITY_COMPLY_PCIE_1_1   (1L<<5)
 
#define BNX2_PCI_DEVICE_CAPABILITY   0x000004d4
 
#define BNX2_PCI_DEVICE_CAPABILITY_MAX_PL_SIZ_SUPPORTED   (0x7L<<0)
 
#define BNX2_PCI_DEVICE_CAPABILITY_EXTENDED_TAG_SUPPORT   (1L<<5)
 
#define BNX2_PCI_DEVICE_CAPABILITY_L0S_ACCEPTABLE_LATENCY   (0x7L<<6)
 
#define BNX2_PCI_DEVICE_CAPABILITY_L1_ACCEPTABLE_LATENCY   (0x7L<<9)
 
#define BNX2_PCI_DEVICE_CAPABILITY_ROLE_BASED_ERR_RPT   (1L<<15)
 
#define BNX2_PCI_LINK_CAPABILITY   0x000004dc
 
#define BNX2_PCI_LINK_CAPABILITY_MAX_LINK_SPEED   (0xfL<<0)
 
#define BNX2_PCI_LINK_CAPABILITY_MAX_LINK_SPEED_0001   (1L<<0)
 
#define BNX2_PCI_LINK_CAPABILITY_MAX_LINK_SPEED_0010   (1L<<0)
 
#define BNX2_PCI_LINK_CAPABILITY_MAX_LINK_WIDTH   (0x1fL<<4)
 
#define BNX2_PCI_LINK_CAPABILITY_CLK_POWER_MGMT   (1L<<9)
 
#define BNX2_PCI_LINK_CAPABILITY_ASPM_SUPPORT   (0x3L<<10)
 
#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_LAT   (0x7L<<12)
 
#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_LAT_101   (5L<<12)
 
#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_LAT_110   (6L<<12)
 
#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_LAT   (0x7L<<15)
 
#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_LAT_001   (1L<<15)
 
#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_LAT_010   (2L<<15)
 
#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_COMM_LAT   (0x7L<<18)
 
#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_COMM_LAT_101   (5L<<18)
 
#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_COMM_LAT_110   (6L<<18)
 
#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_COMM_LAT   (0x7L<<21)
 
#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_COMM_LAT_001   (1L<<21)
 
#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_COMM_LAT_010   (2L<<21)
 
#define BNX2_PCI_LINK_CAPABILITY_PORT_NUM   (0xffL<<24)
 
#define BNX2_PCI_PCIE_DEVICE_CAPABILITY_2   0x000004e4
 
#define BNX2_PCI_PCIE_DEVICE_CAPABILITY_2_CMPL_TO_RANGE_SUPP   (0xfL<<0)
 
#define BNX2_PCI_PCIE_DEVICE_CAPABILITY_2_CMPL_TO_DISABL_SUPP   (1L<<4)
 
#define BNX2_PCI_PCIE_DEVICE_CAPABILITY_2_RESERVED   (0x7ffffffL<<5)
 
#define BNX2_PCI_PCIE_LINK_CAPABILITY_2   0x000004e8
 
#define BNX2_PCI_PCIE_LINK_CAPABILITY_2_RESERVED   (0xffffffffL<<0)
 
#define BNX2_PCI_GRC_WINDOW1_ADDR   0x00000610
 
#define BNX2_PCI_GRC_WINDOW1_ADDR_VALUE   (0x1ffL<<13)
 
#define BNX2_PCI_GRC_WINDOW2_ADDR   0x00000614
 
#define BNX2_PCI_GRC_WINDOW2_ADDR_VALUE   (0x1ffL<<13)
 
#define BNX2_PCI_GRC_WINDOW3_ADDR   0x00000618
 
#define BNX2_PCI_GRC_WINDOW3_ADDR_VALUE   (0x1ffL<<13)
 
#define BNX2_MSIX_TABLE_ADDR   0x318000
 
#define BNX2_MSIX_PBA_ADDR   0x31c000
 
#define BNX2_MISC_COMMAND   0x00000800
 
#define BNX2_MISC_COMMAND_ENABLE_ALL   (1L<<0)
 
#define BNX2_MISC_COMMAND_DISABLE_ALL   (1L<<1)
 
#define BNX2_MISC_COMMAND_SW_RESET   (1L<<4)
 
#define BNX2_MISC_COMMAND_POR_RESET   (1L<<5)
 
#define BNX2_MISC_COMMAND_HD_RESET   (1L<<6)
 
#define BNX2_MISC_COMMAND_CMN_SW_RESET   (1L<<7)
 
#define BNX2_MISC_COMMAND_PAR_ERROR   (1L<<8)
 
#define BNX2_MISC_COMMAND_CS16_ERR   (1L<<9)
 
#define BNX2_MISC_COMMAND_CS16_ERR_LOC   (0xfL<<12)
 
#define BNX2_MISC_COMMAND_PAR_ERR_RAM   (0x7fL<<16)
 
#define BNX2_MISC_COMMAND_POWERDOWN_EVENT   (1L<<23)
 
#define BNX2_MISC_COMMAND_SW_SHUTDOWN   (1L<<24)
 
#define BNX2_MISC_COMMAND_SHUTDOWN_EN   (1L<<25)
 
#define BNX2_MISC_COMMAND_DINTEG_ATTN_EN   (1L<<26)
 
#define BNX2_MISC_COMMAND_PCIE_LINK_IN_L23   (1L<<27)
 
#define BNX2_MISC_COMMAND_PCIE_DIS   (1L<<28)
 
#define BNX2_MISC_CFG   0x00000804
 
#define BNX2_MISC_CFG_GRC_TMOUT   (1L<<0)
 
#define BNX2_MISC_CFG_NVM_WR_EN   (0x3L<<1)
 
#define BNX2_MISC_CFG_NVM_WR_EN_PROTECT   (0L<<1)
 
#define BNX2_MISC_CFG_NVM_WR_EN_PCI   (1L<<1)
 
#define BNX2_MISC_CFG_NVM_WR_EN_ALLOW   (2L<<1)
 
#define BNX2_MISC_CFG_NVM_WR_EN_ALLOW2   (3L<<1)
 
#define BNX2_MISC_CFG_BIST_EN   (1L<<3)
 
#define BNX2_MISC_CFG_CK25_OUT_ALT_SRC   (1L<<4)
 
#define BNX2_MISC_CFG_RESERVED5_TE   (1L<<5)
 
#define BNX2_MISC_CFG_RESERVED6_TE   (1L<<6)
 
#define BNX2_MISC_CFG_CLK_CTL_OVERRIDE   (1L<<7)
 
#define BNX2_MISC_CFG_LEDMODE   (0x7L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_MAC   (0L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY1_TE   (1L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY2_TE   (2L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY3_TE   (3L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY4_TE   (4L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY5_TE   (5L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY6_TE   (6L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY7_TE   (7L<<8)
 
#define BNX2_MISC_CFG_MCP_GRC_TMOUT_TE   (1L<<11)
 
#define BNX2_MISC_CFG_DBU_GRC_TMOUT_TE   (1L<<12)
 
#define BNX2_MISC_CFG_LEDMODE_XI   (0xfL<<8)
 
#define BNX2_MISC_CFG_LEDMODE_MAC_XI   (0L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY1_XI   (1L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY2_XI   (2L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY3_XI   (3L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_MAC2_XI   (4L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY4_XI   (5L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY5_XI   (6L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY6_XI   (7L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_MAC3_XI   (8L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY7_XI   (9L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY8_XI   (10L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY9_XI   (11L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_MAC4_XI   (12L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY10_XI   (13L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_PHY11_XI   (14L<<8)
 
#define BNX2_MISC_CFG_LEDMODE_UNUSED_XI   (15L<<8)
 
#define BNX2_MISC_CFG_PORT_SELECT_XI   (1L<<13)
 
#define BNX2_MISC_CFG_PARITY_MODE_XI   (1L<<14)
 
#define BNX2_MISC_ID   0x00000808
 
#define BNX2_MISC_ID_BOND_ID   (0xfL<<0)
 
#define BNX2_MISC_ID_BOND_ID_X   (0L<<0)
 
#define BNX2_MISC_ID_BOND_ID_C   (3L<<0)
 
#define BNX2_MISC_ID_BOND_ID_S   (12L<<0)
 
#define BNX2_MISC_ID_CHIP_METAL   (0xffL<<4)
 
#define BNX2_MISC_ID_CHIP_REV   (0xfL<<12)
 
#define BNX2_MISC_ID_CHIP_NUM   (0xffffL<<16)
 
#define BNX2_MISC_ENABLE_STATUS_BITS   0x0000080c
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_SCHEDULER_ENABLE   (1L<<0)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_BD_READ_ENABLE   (1L<<1)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_BD_CACHE_ENABLE   (1L<<2)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PROCESSOR_ENABLE   (1L<<3)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_DMA_ENABLE   (1L<<4)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PATCHUP_ENABLE   (1L<<5)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PAYLOAD_Q_ENABLE   (1L<<6)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_HEADER_Q_ENABLE   (1L<<7)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TX_ASSEMBLER_ENABLE   (1L<<8)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_EMAC_ENABLE   (1L<<9)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PARSER_CATCHUP_ENABLE   (1L<<11)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RX_MBUF_ENABLE   (1L<<12)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RX_LOOKUP_ENABLE   (1L<<13)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PROCESSOR_ENABLE   (1L<<14)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE   (1L<<15)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RX_BD_CACHE_ENABLE   (1L<<16)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RX_DMA_ENABLE   (1L<<17)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_COMPLETION_ENABLE   (1L<<18)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_HOST_COALESCE_ENABLE   (1L<<19)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE   (1L<<21)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_TIMER_ENABLE   (1L<<25)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_DMA_ENGINE_ENABLE   (1L<<26)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_UMP_ENABLE   (1L<<27)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RV2P_CMD_SCHEDULER_ENABLE   (1L<<28)
 
#define BNX2_MISC_ENABLE_STATUS_BITS_RSVD_FUTURE_ENABLE   (0x7L<<29)
 
#define BNX2_MISC_ENABLE_SET_BITS   0x00000810
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_SCHEDULER_ENABLE   (1L<<0)
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_BD_READ_ENABLE   (1L<<1)
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_BD_CACHE_ENABLE   (1L<<2)
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_PROCESSOR_ENABLE   (1L<<3)
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_DMA_ENABLE   (1L<<4)
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_PATCHUP_ENABLE   (1L<<5)
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_PAYLOAD_Q_ENABLE   (1L<<6)
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_HEADER_Q_ENABLE   (1L<<7)
 
#define BNX2_MISC_ENABLE_SET_BITS_TX_ASSEMBLER_ENABLE   (1L<<8)
 
#define BNX2_MISC_ENABLE_SET_BITS_EMAC_ENABLE   (1L<<9)
 
#define BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)
 
#define BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_CATCHUP_ENABLE   (1L<<11)
 
#define BNX2_MISC_ENABLE_SET_BITS_RX_MBUF_ENABLE   (1L<<12)
 
#define BNX2_MISC_ENABLE_SET_BITS_RX_LOOKUP_ENABLE   (1L<<13)
 
#define BNX2_MISC_ENABLE_SET_BITS_RX_PROCESSOR_ENABLE   (1L<<14)
 
#define BNX2_MISC_ENABLE_SET_BITS_RX_V2P_ENABLE   (1L<<15)
 
#define BNX2_MISC_ENABLE_SET_BITS_RX_BD_CACHE_ENABLE   (1L<<16)
 
#define BNX2_MISC_ENABLE_SET_BITS_RX_DMA_ENABLE   (1L<<17)
 
#define BNX2_MISC_ENABLE_SET_BITS_COMPLETION_ENABLE   (1L<<18)
 
#define BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE   (1L<<19)
 
#define BNX2_MISC_ENABLE_SET_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)
 
#define BNX2_MISC_ENABLE_SET_BITS_CONTEXT_ENABLE   (1L<<21)
 
#define BNX2_MISC_ENABLE_SET_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)
 
#define BNX2_MISC_ENABLE_SET_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)
 
#define BNX2_MISC_ENABLE_SET_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)
 
#define BNX2_MISC_ENABLE_SET_BITS_TIMER_ENABLE   (1L<<25)
 
#define BNX2_MISC_ENABLE_SET_BITS_DMA_ENGINE_ENABLE   (1L<<26)
 
#define BNX2_MISC_ENABLE_SET_BITS_UMP_ENABLE   (1L<<27)
 
#define BNX2_MISC_ENABLE_SET_BITS_RV2P_CMD_SCHEDULER_ENABLE   (1L<<28)
 
#define BNX2_MISC_ENABLE_SET_BITS_RSVD_FUTURE_ENABLE   (0x7L<<29)
 
#define BNX2_MISC_ENABLE_CLR_BITS   0x00000814
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_SCHEDULER_ENABLE   (1L<<0)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_BD_READ_ENABLE   (1L<<1)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_BD_CACHE_ENABLE   (1L<<2)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_PROCESSOR_ENABLE   (1L<<3)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_DMA_ENABLE   (1L<<4)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_PATCHUP_ENABLE   (1L<<5)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_PAYLOAD_Q_ENABLE   (1L<<6)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_HEADER_Q_ENABLE   (1L<<7)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TX_ASSEMBLER_ENABLE   (1L<<8)
 
#define BNX2_MISC_ENABLE_CLR_BITS_EMAC_ENABLE   (1L<<9)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RX_PARSER_CATCHUP_ENABLE   (1L<<11)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RX_MBUF_ENABLE   (1L<<12)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RX_LOOKUP_ENABLE   (1L<<13)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RX_PROCESSOR_ENABLE   (1L<<14)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RX_V2P_ENABLE   (1L<<15)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RX_BD_CACHE_ENABLE   (1L<<16)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RX_DMA_ENABLE   (1L<<17)
 
#define BNX2_MISC_ENABLE_CLR_BITS_COMPLETION_ENABLE   (1L<<18)
 
#define BNX2_MISC_ENABLE_CLR_BITS_HOST_COALESCE_ENABLE   (1L<<19)
 
#define BNX2_MISC_ENABLE_CLR_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)
 
#define BNX2_MISC_ENABLE_CLR_BITS_CONTEXT_ENABLE   (1L<<21)
 
#define BNX2_MISC_ENABLE_CLR_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)
 
#define BNX2_MISC_ENABLE_CLR_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)
 
#define BNX2_MISC_ENABLE_CLR_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)
 
#define BNX2_MISC_ENABLE_CLR_BITS_TIMER_ENABLE   (1L<<25)
 
#define BNX2_MISC_ENABLE_CLR_BITS_DMA_ENGINE_ENABLE   (1L<<26)
 
#define BNX2_MISC_ENABLE_CLR_BITS_UMP_ENABLE   (1L<<27)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RV2P_CMD_SCHEDULER_ENABLE   (1L<<28)
 
#define BNX2_MISC_ENABLE_CLR_BITS_RSVD_FUTURE_ENABLE   (0x7L<<29)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS   0x00000818
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET   (0xfL<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ   (0L<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ   (1L<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ   (2L<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ   (3L<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ   (4L<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ   (5L<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ   (6L<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ   (7L<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW   (0xfL<<0)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE   (1L<<6)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT   (1L<<7)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC   (0x7L<<8)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF   (0L<<8)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12   (1L<<8)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6   (2L<<8)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62   (4L<<8)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED0_XI   (0x7L<<8)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_MIN_POWER   (1L<<11)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED   (0xfL<<12)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100   (0L<<12)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80   (1L<<12)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50   (2L<<12)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40   (4L<<12)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25   (8L<<12)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED1_XI   (0xfL<<12)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP   (1L<<16)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_17_TE   (1L<<17)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_18_TE   (1L<<18)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_19_TE   (1L<<19)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_TE   (0xfffL<<20)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_MGMT_XI   (1L<<17)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED2_XI   (0x3fL<<18)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_VCO_XI   (0x7L<<24)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED3_XI   (1L<<27)
 
#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_XI   (0xfL<<28)
 
#define BNX2_MISC_SPIO   0x0000081c
 
#define BNX2_MISC_SPIO_VALUE   (0xffL<<0)
 
#define BNX2_MISC_SPIO_SET   (0xffL<<8)
 
#define BNX2_MISC_SPIO_CLR   (0xffL<<16)
 
#define BNX2_MISC_SPIO_FLOAT   (0xffL<<24)
 
#define BNX2_MISC_SPIO_INT   0x00000820
 
#define BNX2_MISC_SPIO_INT_INT_STATE_TE   (0xfL<<0)
 
#define BNX2_MISC_SPIO_INT_OLD_VALUE_TE   (0xfL<<8)
 
#define BNX2_MISC_SPIO_INT_OLD_SET_TE   (0xfL<<16)
 
#define BNX2_MISC_SPIO_INT_OLD_CLR_TE   (0xfL<<24)
 
#define BNX2_MISC_SPIO_INT_INT_STATE_XI   (0xffL<<0)
 
#define BNX2_MISC_SPIO_INT_OLD_VALUE_XI   (0xffL<<8)
 
#define BNX2_MISC_SPIO_INT_OLD_SET_XI   (0xffL<<16)
 
#define BNX2_MISC_SPIO_INT_OLD_CLR_XI   (0xffL<<24)
 
#define BNX2_MISC_CONFIG_LFSR   0x00000824
 
#define BNX2_MISC_CONFIG_LFSR_DIV   (0xffffL<<0)
 
#define BNX2_MISC_LFSR_MASK_BITS   0x00000828
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_SCHEDULER_ENABLE   (1L<<0)
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_BD_READ_ENABLE   (1L<<1)
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_BD_CACHE_ENABLE   (1L<<2)
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_PROCESSOR_ENABLE   (1L<<3)
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_DMA_ENABLE   (1L<<4)
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_PATCHUP_ENABLE   (1L<<5)
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_PAYLOAD_Q_ENABLE   (1L<<6)
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_HEADER_Q_ENABLE   (1L<<7)
 
#define BNX2_MISC_LFSR_MASK_BITS_TX_ASSEMBLER_ENABLE   (1L<<8)
 
#define BNX2_MISC_LFSR_MASK_BITS_EMAC_ENABLE   (1L<<9)
 
#define BNX2_MISC_LFSR_MASK_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)
 
#define BNX2_MISC_LFSR_MASK_BITS_RX_PARSER_CATCHUP_ENABLE   (1L<<11)
 
#define BNX2_MISC_LFSR_MASK_BITS_RX_MBUF_ENABLE   (1L<<12)
 
#define BNX2_MISC_LFSR_MASK_BITS_RX_LOOKUP_ENABLE   (1L<<13)
 
#define BNX2_MISC_LFSR_MASK_BITS_RX_PROCESSOR_ENABLE   (1L<<14)
 
#define BNX2_MISC_LFSR_MASK_BITS_RX_V2P_ENABLE   (1L<<15)
 
#define BNX2_MISC_LFSR_MASK_BITS_RX_BD_CACHE_ENABLE   (1L<<16)
 
#define BNX2_MISC_LFSR_MASK_BITS_RX_DMA_ENABLE   (1L<<17)
 
#define BNX2_MISC_LFSR_MASK_BITS_COMPLETION_ENABLE   (1L<<18)
 
#define BNX2_MISC_LFSR_MASK_BITS_HOST_COALESCE_ENABLE   (1L<<19)
 
#define BNX2_MISC_LFSR_MASK_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)
 
#define BNX2_MISC_LFSR_MASK_BITS_CONTEXT_ENABLE   (1L<<21)
 
#define BNX2_MISC_LFSR_MASK_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)
 
#define BNX2_MISC_LFSR_MASK_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)
 
#define BNX2_MISC_LFSR_MASK_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)
 
#define BNX2_MISC_LFSR_MASK_BITS_TIMER_ENABLE   (1L<<25)
 
#define BNX2_MISC_LFSR_MASK_BITS_DMA_ENGINE_ENABLE   (1L<<26)
 
#define BNX2_MISC_LFSR_MASK_BITS_UMP_ENABLE   (1L<<27)
 
#define BNX2_MISC_LFSR_MASK_BITS_RV2P_CMD_SCHEDULER_ENABLE   (1L<<28)
 
#define BNX2_MISC_LFSR_MASK_BITS_RSVD_FUTURE_ENABLE   (0x7L<<29)
 
#define BNX2_MISC_ARB_REQ0   0x0000082c
 
#define BNX2_MISC_ARB_REQ1   0x00000830
 
#define BNX2_MISC_ARB_REQ2   0x00000834
 
#define BNX2_MISC_ARB_REQ3   0x00000838
 
#define BNX2_MISC_ARB_REQ4   0x0000083c
 
#define BNX2_MISC_ARB_FREE0   0x00000840
 
#define BNX2_MISC_ARB_FREE1   0x00000844
 
#define BNX2_MISC_ARB_FREE2   0x00000848
 
#define BNX2_MISC_ARB_FREE3   0x0000084c
 
#define BNX2_MISC_ARB_FREE4   0x00000850
 
#define BNX2_MISC_ARB_REQ_STATUS0   0x00000854
 
#define BNX2_MISC_ARB_REQ_STATUS1   0x00000858
 
#define BNX2_MISC_ARB_REQ_STATUS2   0x0000085c
 
#define BNX2_MISC_ARB_REQ_STATUS3   0x00000860
 
#define BNX2_MISC_ARB_REQ_STATUS4   0x00000864
 
#define BNX2_MISC_ARB_GNT0   0x00000868
 
#define BNX2_MISC_ARB_GNT0_0   (0x7L<<0)
 
#define BNX2_MISC_ARB_GNT0_1   (0x7L<<4)
 
#define BNX2_MISC_ARB_GNT0_2   (0x7L<<8)
 
#define BNX2_MISC_ARB_GNT0_3   (0x7L<<12)
 
#define BNX2_MISC_ARB_GNT0_4   (0x7L<<16)
 
#define BNX2_MISC_ARB_GNT0_5   (0x7L<<20)
 
#define BNX2_MISC_ARB_GNT0_6   (0x7L<<24)
 
#define BNX2_MISC_ARB_GNT0_7   (0x7L<<28)
 
#define BNX2_MISC_ARB_GNT1   0x0000086c
 
#define BNX2_MISC_ARB_GNT1_8   (0x7L<<0)
 
#define BNX2_MISC_ARB_GNT1_9   (0x7L<<4)
 
#define BNX2_MISC_ARB_GNT1_10   (0x7L<<8)
 
#define BNX2_MISC_ARB_GNT1_11   (0x7L<<12)
 
#define BNX2_MISC_ARB_GNT1_12   (0x7L<<16)
 
#define BNX2_MISC_ARB_GNT1_13   (0x7L<<20)
 
#define BNX2_MISC_ARB_GNT1_14   (0x7L<<24)
 
#define BNX2_MISC_ARB_GNT1_15   (0x7L<<28)
 
#define BNX2_MISC_ARB_GNT2   0x00000870
 
#define BNX2_MISC_ARB_GNT2_16   (0x7L<<0)
 
#define BNX2_MISC_ARB_GNT2_17   (0x7L<<4)
 
#define BNX2_MISC_ARB_GNT2_18   (0x7L<<8)
 
#define BNX2_MISC_ARB_GNT2_19   (0x7L<<12)
 
#define BNX2_MISC_ARB_GNT2_20   (0x7L<<16)
 
#define BNX2_MISC_ARB_GNT2_21   (0x7L<<20)
 
#define BNX2_MISC_ARB_GNT2_22   (0x7L<<24)
 
#define BNX2_MISC_ARB_GNT2_23   (0x7L<<28)
 
#define BNX2_MISC_ARB_GNT3   0x00000874
 
#define BNX2_MISC_ARB_GNT3_24   (0x7L<<0)
 
#define BNX2_MISC_ARB_GNT3_25   (0x7L<<4)
 
#define BNX2_MISC_ARB_GNT3_26   (0x7L<<8)
 
#define BNX2_MISC_ARB_GNT3_27   (0x7L<<12)
 
#define BNX2_MISC_ARB_GNT3_28   (0x7L<<16)
 
#define BNX2_MISC_ARB_GNT3_29   (0x7L<<20)
 
#define BNX2_MISC_ARB_GNT3_30   (0x7L<<24)
 
#define BNX2_MISC_ARB_GNT3_31   (0x7L<<28)
 
#define BNX2_MISC_RESERVED1   0x00000878
 
#define BNX2_MISC_RESERVED1_MISC_RESERVED1_VALUE   (0x3fL<<0)
 
#define BNX2_MISC_RESERVED2   0x0000087c
 
#define BNX2_MISC_RESERVED2_PCIE_DIS   (1L<<0)
 
#define BNX2_MISC_RESERVED2_LINK_IN_L23   (1L<<1)
 
#define BNX2_MISC_SM_ASF_CONTROL   0x00000880
 
#define BNX2_MISC_SM_ASF_CONTROL_ASF_RST   (1L<<0)
 
#define BNX2_MISC_SM_ASF_CONTROL_TSC_EN   (1L<<1)
 
#define BNX2_MISC_SM_ASF_CONTROL_WG_TO   (1L<<2)
 
#define BNX2_MISC_SM_ASF_CONTROL_HB_TO   (1L<<3)
 
#define BNX2_MISC_SM_ASF_CONTROL_PA_TO   (1L<<4)
 
#define BNX2_MISC_SM_ASF_CONTROL_PL_TO   (1L<<5)
 
#define BNX2_MISC_SM_ASF_CONTROL_RT_TO   (1L<<6)
 
#define BNX2_MISC_SM_ASF_CONTROL_SMB_EVENT   (1L<<7)
 
#define BNX2_MISC_SM_ASF_CONTROL_STRETCH_EN   (1L<<8)
 
#define BNX2_MISC_SM_ASF_CONTROL_STRETCH_PULSE   (1L<<9)
 
#define BNX2_MISC_SM_ASF_CONTROL_RES   (0x3L<<10)
 
#define BNX2_MISC_SM_ASF_CONTROL_SMB_EN   (1L<<12)
 
#define BNX2_MISC_SM_ASF_CONTROL_SMB_BB_EN   (1L<<13)
 
#define BNX2_MISC_SM_ASF_CONTROL_SMB_NO_ADDR_FILT   (1L<<14)
 
#define BNX2_MISC_SM_ASF_CONTROL_SMB_AUTOREAD   (1L<<15)
 
#define BNX2_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR1   (0x7fL<<16)
 
#define BNX2_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR2   (0x7fL<<23)
 
#define BNX2_MISC_SM_ASF_CONTROL_EN_NIC_SMB_ADDR_0   (1L<<30)
 
#define BNX2_MISC_SM_ASF_CONTROL_SMB_EARLY_ATTN   (1L<<31)
 
#define BNX2_MISC_SMB_IN   0x00000884
 
#define BNX2_MISC_SMB_IN_DAT_IN   (0xffL<<0)
 
#define BNX2_MISC_SMB_IN_RDY   (1L<<8)
 
#define BNX2_MISC_SMB_IN_DONE   (1L<<9)
 
#define BNX2_MISC_SMB_IN_FIRSTBYTE   (1L<<10)
 
#define BNX2_MISC_SMB_IN_STATUS   (0x7L<<11)
 
#define BNX2_MISC_SMB_IN_STATUS_OK   (0x0L<<11)
 
#define BNX2_MISC_SMB_IN_STATUS_PEC   (0x1L<<11)
 
#define BNX2_MISC_SMB_IN_STATUS_OFLOW   (0x2L<<11)
 
#define BNX2_MISC_SMB_IN_STATUS_STOP   (0x3L<<11)
 
#define BNX2_MISC_SMB_IN_STATUS_TIMEOUT   (0x4L<<11)
 
#define BNX2_MISC_SMB_OUT   0x00000888
 
#define BNX2_MISC_SMB_OUT_DAT_OUT   (0xffL<<0)
 
#define BNX2_MISC_SMB_OUT_RDY   (1L<<8)
 
#define BNX2_MISC_SMB_OUT_START   (1L<<9)
 
#define BNX2_MISC_SMB_OUT_LAST   (1L<<10)
 
#define BNX2_MISC_SMB_OUT_ACC_TYPE   (1L<<11)
 
#define BNX2_MISC_SMB_OUT_ENB_PEC   (1L<<12)
 
#define BNX2_MISC_SMB_OUT_GET_RX_LEN   (1L<<13)
 
#define BNX2_MISC_SMB_OUT_SMB_READ_LEN   (0x3fL<<14)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS   (0xfL<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_OK   (0L<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_NACK   (1L<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_UFLOW   (2L<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_STOP   (3L<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_TIMEOUT   (4L<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_LOST   (5L<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_BADACK   (6L<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_NACK   (9L<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_LOST   (0xdL<<20)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_SLAVEMODE   (1L<<24)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_DAT_EN   (1L<<25)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_DAT_IN   (1L<<26)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_CLK_EN   (1L<<27)
 
#define BNX2_MISC_SMB_OUT_SMB_OUT_CLK_IN   (1L<<28)
 
#define BNX2_MISC_SMB_WATCHDOG   0x0000088c
 
#define BNX2_MISC_SMB_WATCHDOG_WATCHDOG   (0xffffL<<0)
 
#define BNX2_MISC_SMB_HEARTBEAT   0x00000890
 
#define BNX2_MISC_SMB_HEARTBEAT_HEARTBEAT   (0xffffL<<0)
 
#define BNX2_MISC_SMB_POLL_ASF   0x00000894
 
#define BNX2_MISC_SMB_POLL_ASF_POLL_ASF   (0xffffL<<0)
 
#define BNX2_MISC_SMB_POLL_LEGACY   0x00000898
 
#define BNX2_MISC_SMB_POLL_LEGACY_POLL_LEGACY   (0xffffL<<0)
 
#define BNX2_MISC_SMB_RETRAN   0x0000089c
 
#define BNX2_MISC_SMB_RETRAN_RETRAN   (0xffL<<0)
 
#define BNX2_MISC_SMB_TIMESTAMP   0x000008a0
 
#define BNX2_MISC_SMB_TIMESTAMP_TIMESTAMP   (0xffffffffL<<0)
 
#define BNX2_MISC_PERR_ENA0   0x000008a4
 
#define BNX2_MISC_PERR_ENA0_COM_MISC_CTXC   (1L<<0)
 
#define BNX2_MISC_PERR_ENA0_COM_MISC_REGF   (1L<<1)
 
#define BNX2_MISC_PERR_ENA0_COM_MISC_SCPAD   (1L<<2)
 
#define BNX2_MISC_PERR_ENA0_CP_MISC_CTXC   (1L<<3)
 
#define BNX2_MISC_PERR_ENA0_CP_MISC_REGF   (1L<<4)
 
#define BNX2_MISC_PERR_ENA0_CP_MISC_SCPAD   (1L<<5)
 
#define BNX2_MISC_PERR_ENA0_CS_MISC_TMEM   (1L<<6)
 
#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM0   (1L<<7)
 
#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM1   (1L<<8)
 
#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM2   (1L<<9)
 
#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM3   (1L<<10)
 
#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM4   (1L<<11)
 
#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM5   (1L<<12)
 
#define BNX2_MISC_PERR_ENA0_CTX_MISC_PGTBL   (1L<<13)
 
#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR0   (1L<<14)
 
#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR1   (1L<<15)
 
#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR2   (1L<<16)
 
#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR3   (1L<<17)
 
#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR4   (1L<<18)
 
#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW0   (1L<<19)
 
#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW1   (1L<<20)
 
#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW2   (1L<<21)
 
#define BNX2_MISC_PERR_ENA0_HC_MISC_DMA   (1L<<22)
 
#define BNX2_MISC_PERR_ENA0_MCP_MISC_REGF   (1L<<23)
 
#define BNX2_MISC_PERR_ENA0_MCP_MISC_SCPAD   (1L<<24)
 
#define BNX2_MISC_PERR_ENA0_MQ_MISC_CTX   (1L<<25)
 
#define BNX2_MISC_PERR_ENA0_RBDC_MISC   (1L<<26)
 
#define BNX2_MISC_PERR_ENA0_RBUF_MISC_MB   (1L<<27)
 
#define BNX2_MISC_PERR_ENA0_RBUF_MISC_PTR   (1L<<28)
 
#define BNX2_MISC_PERR_ENA0_RDE_MISC_RPC   (1L<<29)
 
#define BNX2_MISC_PERR_ENA0_RDE_MISC_RPM   (1L<<30)
 
#define BNX2_MISC_PERR_ENA0_RV2P_MISC_CB0REGS   (1L<<31)
 
#define BNX2_MISC_PERR_ENA0_COM_DMAE_PERR_EN_XI   (1L<<0)
 
#define BNX2_MISC_PERR_ENA0_CP_DMAE_PERR_EN_XI   (1L<<1)
 
#define BNX2_MISC_PERR_ENA0_RPM_ACPIBEMEM_PERR_EN_XI   (1L<<2)
 
#define BNX2_MISC_PERR_ENA0_CTX_USAGE_CNT_PERR_EN_XI   (1L<<3)
 
#define BNX2_MISC_PERR_ENA0_CTX_PGTBL_PERR_EN_XI   (1L<<4)
 
#define BNX2_MISC_PERR_ENA0_CTX_CACHE_PERR_EN_XI   (1L<<5)
 
#define BNX2_MISC_PERR_ENA0_CTX_MIRROR_PERR_EN_XI   (1L<<6)
 
#define BNX2_MISC_PERR_ENA0_COM_CTXC_PERR_EN_XI   (1L<<7)
 
#define BNX2_MISC_PERR_ENA0_COM_SCPAD_PERR_EN_XI   (1L<<8)
 
#define BNX2_MISC_PERR_ENA0_CP_CTXC_PERR_EN_XI   (1L<<9)
 
#define BNX2_MISC_PERR_ENA0_CP_SCPAD_PERR_EN_XI   (1L<<10)
 
#define BNX2_MISC_PERR_ENA0_RXP_RBUFC_PERR_EN_XI   (1L<<11)
 
#define BNX2_MISC_PERR_ENA0_RXP_CTXC_PERR_EN_XI   (1L<<12)
 
#define BNX2_MISC_PERR_ENA0_RXP_SCPAD_PERR_EN_XI   (1L<<13)
 
#define BNX2_MISC_PERR_ENA0_TPAT_SCPAD_PERR_EN_XI   (1L<<14)
 
#define BNX2_MISC_PERR_ENA0_TXP_CTXC_PERR_EN_XI   (1L<<15)
 
#define BNX2_MISC_PERR_ENA0_TXP_SCPAD_PERR_EN_XI   (1L<<16)
 
#define BNX2_MISC_PERR_ENA0_CS_TMEM_PERR_EN_XI   (1L<<17)
 
#define BNX2_MISC_PERR_ENA0_MQ_CTX_PERR_EN_XI   (1L<<18)
 
#define BNX2_MISC_PERR_ENA0_RPM_DFIFOMEM_PERR_EN_XI   (1L<<19)
 
#define BNX2_MISC_PERR_ENA0_RPC_DFIFOMEM_PERR_EN_XI   (1L<<20)
 
#define BNX2_MISC_PERR_ENA0_RBUF_PTRMEM_PERR_EN_XI   (1L<<21)
 
#define BNX2_MISC_PERR_ENA0_RBUF_DATAMEM_PERR_EN_XI   (1L<<22)
 
#define BNX2_MISC_PERR_ENA0_RV2P_P2IRAM_PERR_EN_XI   (1L<<23)
 
#define BNX2_MISC_PERR_ENA0_RV2P_P1IRAM_PERR_EN_XI   (1L<<24)
 
#define BNX2_MISC_PERR_ENA0_RV2P_CB1REGS_PERR_EN_XI   (1L<<25)
 
#define BNX2_MISC_PERR_ENA0_RV2P_CB0REGS_PERR_EN_XI   (1L<<26)
 
#define BNX2_MISC_PERR_ENA0_TPBUF_PERR_EN_XI   (1L<<27)
 
#define BNX2_MISC_PERR_ENA0_THBUF_PERR_EN_XI   (1L<<28)
 
#define BNX2_MISC_PERR_ENA0_TDMA_PERR_EN_XI   (1L<<29)
 
#define BNX2_MISC_PERR_ENA0_TBDC_PERR_EN_XI   (1L<<30)
 
#define BNX2_MISC_PERR_ENA0_TSCH_LR_PERR_EN_XI   (1L<<31)
 
#define BNX2_MISC_PERR_ENA1   0x000008a8
 
#define BNX2_MISC_PERR_ENA1_RV2P_MISC_CB1REGS   (1L<<0)
 
#define BNX2_MISC_PERR_ENA1_RV2P_MISC_P1IRAM   (1L<<1)
 
#define BNX2_MISC_PERR_ENA1_RV2P_MISC_P2IRAM   (1L<<2)
 
#define BNX2_MISC_PERR_ENA1_RXP_MISC_CTXC   (1L<<3)
 
#define BNX2_MISC_PERR_ENA1_RXP_MISC_REGF   (1L<<4)
 
#define BNX2_MISC_PERR_ENA1_RXP_MISC_SCPAD   (1L<<5)
 
#define BNX2_MISC_PERR_ENA1_RXP_MISC_RBUFC   (1L<<6)
 
#define BNX2_MISC_PERR_ENA1_TBDC_MISC   (1L<<7)
 
#define BNX2_MISC_PERR_ENA1_TDMA_MISC   (1L<<8)
 
#define BNX2_MISC_PERR_ENA1_THBUF_MISC_MB0   (1L<<9)
 
#define BNX2_MISC_PERR_ENA1_THBUF_MISC_MB1   (1L<<10)
 
#define BNX2_MISC_PERR_ENA1_TPAT_MISC_REGF   (1L<<11)
 
#define BNX2_MISC_PERR_ENA1_TPAT_MISC_SCPAD   (1L<<12)
 
#define BNX2_MISC_PERR_ENA1_TPBUF_MISC_MB   (1L<<13)
 
#define BNX2_MISC_PERR_ENA1_TSCH_MISC_LR   (1L<<14)
 
#define BNX2_MISC_PERR_ENA1_TXP_MISC_CTXC   (1L<<15)
 
#define BNX2_MISC_PERR_ENA1_TXP_MISC_REGF   (1L<<16)
 
#define BNX2_MISC_PERR_ENA1_TXP_MISC_SCPAD   (1L<<17)
 
#define BNX2_MISC_PERR_ENA1_UMP_MISC_FIORX   (1L<<18)
 
#define BNX2_MISC_PERR_ENA1_UMP_MISC_FIOTX   (1L<<19)
 
#define BNX2_MISC_PERR_ENA1_UMP_MISC_RX   (1L<<20)
 
#define BNX2_MISC_PERR_ENA1_UMP_MISC_TX   (1L<<21)
 
#define BNX2_MISC_PERR_ENA1_RDMAQ_MISC   (1L<<22)
 
#define BNX2_MISC_PERR_ENA1_CSQ_MISC   (1L<<23)
 
#define BNX2_MISC_PERR_ENA1_CPQ_MISC   (1L<<24)
 
#define BNX2_MISC_PERR_ENA1_MCPQ_MISC   (1L<<25)
 
#define BNX2_MISC_PERR_ENA1_RV2PMQ_MISC   (1L<<26)
 
#define BNX2_MISC_PERR_ENA1_RV2PPQ_MISC   (1L<<27)
 
#define BNX2_MISC_PERR_ENA1_RV2PTQ_MISC   (1L<<28)
 
#define BNX2_MISC_PERR_ENA1_RXPQ_MISC   (1L<<29)
 
#define BNX2_MISC_PERR_ENA1_RXPCQ_MISC   (1L<<30)
 
#define BNX2_MISC_PERR_ENA1_RLUPQ_MISC   (1L<<31)
 
#define BNX2_MISC_PERR_ENA1_RBDC_PERR_EN_XI   (1L<<0)
 
#define BNX2_MISC_PERR_ENA1_RDMA_DFIFO_PERR_EN_XI   (1L<<2)
 
#define BNX2_MISC_PERR_ENA1_HC_STATS_PERR_EN_XI   (1L<<3)
 
#define BNX2_MISC_PERR_ENA1_HC_MSIX_PERR_EN_XI   (1L<<4)
 
#define BNX2_MISC_PERR_ENA1_HC_PRODUCSTB_PERR_EN_XI   (1L<<5)
 
#define BNX2_MISC_PERR_ENA1_HC_CONSUMSTB_PERR_EN_XI   (1L<<6)
 
#define BNX2_MISC_PERR_ENA1_TPATQ_PERR_EN_XI   (1L<<7)
 
#define BNX2_MISC_PERR_ENA1_MCPQ_PERR_EN_XI   (1L<<8)
 
#define BNX2_MISC_PERR_ENA1_TDMAQ_PERR_EN_XI   (1L<<9)
 
#define BNX2_MISC_PERR_ENA1_TXPQ_PERR_EN_XI   (1L<<10)
 
#define BNX2_MISC_PERR_ENA1_COMTQ_PERR_EN_XI   (1L<<11)
 
#define BNX2_MISC_PERR_ENA1_COMQ_PERR_EN_XI   (1L<<12)
 
#define BNX2_MISC_PERR_ENA1_RLUPQ_PERR_EN_XI   (1L<<13)
 
#define BNX2_MISC_PERR_ENA1_RXPQ_PERR_EN_XI   (1L<<14)
 
#define BNX2_MISC_PERR_ENA1_RV2PPQ_PERR_EN_XI   (1L<<15)
 
#define BNX2_MISC_PERR_ENA1_RDMAQ_PERR_EN_XI   (1L<<16)
 
#define BNX2_MISC_PERR_ENA1_TASQ_PERR_EN_XI   (1L<<17)
 
#define BNX2_MISC_PERR_ENA1_TBDRQ_PERR_EN_XI   (1L<<18)
 
#define BNX2_MISC_PERR_ENA1_TSCHQ_PERR_EN_XI   (1L<<19)
 
#define BNX2_MISC_PERR_ENA1_COMXQ_PERR_EN_XI   (1L<<20)
 
#define BNX2_MISC_PERR_ENA1_RXPCQ_PERR_EN_XI   (1L<<21)
 
#define BNX2_MISC_PERR_ENA1_RV2PTQ_PERR_EN_XI   (1L<<22)
 
#define BNX2_MISC_PERR_ENA1_RV2PMQ_PERR_EN_XI   (1L<<23)
 
#define BNX2_MISC_PERR_ENA1_CPQ_PERR_EN_XI   (1L<<24)
 
#define BNX2_MISC_PERR_ENA1_CSQ_PERR_EN_XI   (1L<<25)
 
#define BNX2_MISC_PERR_ENA1_RLUP_CID_PERR_EN_XI   (1L<<26)
 
#define BNX2_MISC_PERR_ENA1_RV2PCS_TMEM_PERR_EN_XI   (1L<<27)
 
#define BNX2_MISC_PERR_ENA1_RV2PCSQ_PERR_EN_XI   (1L<<28)
 
#define BNX2_MISC_PERR_ENA1_MQ_IDX_PERR_EN_XI   (1L<<29)
 
#define BNX2_MISC_PERR_ENA2   0x000008ac
 
#define BNX2_MISC_PERR_ENA2_COMQ_MISC   (1L<<0)
 
#define BNX2_MISC_PERR_ENA2_COMXQ_MISC   (1L<<1)
 
#define BNX2_MISC_PERR_ENA2_COMTQ_MISC   (1L<<2)
 
#define BNX2_MISC_PERR_ENA2_TSCHQ_MISC   (1L<<3)
 
#define BNX2_MISC_PERR_ENA2_TBDRQ_MISC   (1L<<4)
 
#define BNX2_MISC_PERR_ENA2_TXPQ_MISC   (1L<<5)
 
#define BNX2_MISC_PERR_ENA2_TDMAQ_MISC   (1L<<6)
 
#define BNX2_MISC_PERR_ENA2_TPATQ_MISC   (1L<<7)
 
#define BNX2_MISC_PERR_ENA2_TASQ_MISC   (1L<<8)
 
#define BNX2_MISC_PERR_ENA2_TGT_FIFO_PERR_EN_XI   (1L<<0)
 
#define BNX2_MISC_PERR_ENA2_UMP_TX_PERR_EN_XI   (1L<<1)
 
#define BNX2_MISC_PERR_ENA2_UMP_RX_PERR_EN_XI   (1L<<2)
 
#define BNX2_MISC_PERR_ENA2_MCP_ROM_PERR_EN_XI   (1L<<3)
 
#define BNX2_MISC_PERR_ENA2_MCP_SCPAD_PERR_EN_XI   (1L<<4)
 
#define BNX2_MISC_PERR_ENA2_HB_MEM_PERR_EN_XI   (1L<<5)
 
#define BNX2_MISC_PERR_ENA2_PCIE_REPLAY_PERR_EN_XI   (1L<<6)
 
#define BNX2_MISC_DEBUG_VECTOR_SEL   0x000008b0
 
#define BNX2_MISC_DEBUG_VECTOR_SEL_0   (0xfffL<<0)
 
#define BNX2_MISC_DEBUG_VECTOR_SEL_1   (0xfffL<<12)
 
#define BNX2_MISC_DEBUG_VECTOR_SEL_1_XI   (0xfffL<<15)
 
#define BNX2_MISC_VREG_CONTROL   0x000008b4
 
#define BNX2_MISC_VREG_CONTROL_1_2   (0xfL<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_XI   (0xfL<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS14_XI   (0L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS12_XI   (1L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS10_XI   (2L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS8_XI   (3L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS6_XI   (4L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS4_XI   (5L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS2_XI   (6L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_NOM_XI   (7L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS2_XI   (8L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS4_XI   (9L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS6_XI   (10L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS8_XI   (11L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS10_XI   (12L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS12_XI   (13L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS14_XI   (14L<<0)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS16_XI   (15L<<0)
 
#define BNX2_MISC_VREG_CONTROL_2_5   (0xfL<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_PLUS14   (0L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_PLUS12   (1L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_PLUS10   (2L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_PLUS8   (3L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_PLUS6   (4L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_PLUS4   (5L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_PLUS2   (6L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_NOM   (7L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_MINUS2   (8L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_MINUS4   (9L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_MINUS6   (10L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_MINUS8   (11L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_MINUS10   (12L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_MINUS12   (13L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_MINUS14   (14L<<4)
 
#define BNX2_MISC_VREG_CONTROL_2_5_MINUS16   (15L<<4)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT   (0xfL<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS14   (0L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS12   (1L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS10   (2L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS8   (3L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS6   (4L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS4   (5L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS2   (6L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_NOM   (7L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS2   (8L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS4   (9L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS6   (10L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS8   (11L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS10   (12L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS12   (13L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS14   (14L<<8)
 
#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS16   (15L<<8)
 
#define BNX2_MISC_FINAL_CLK_CTL_VAL   0x000008b8
 
#define BNX2_MISC_FINAL_CLK_CTL_VAL_MISC_FINAL_CLK_CTL_VAL   (0x3ffffffL<<6)
 
#define BNX2_MISC_GP_HW_CTL0   0x000008bc
 
#define BNX2_MISC_GP_HW_CTL0_TX_DRIVE   (1L<<0)
 
#define BNX2_MISC_GP_HW_CTL0_RMII_MODE   (1L<<1)
 
#define BNX2_MISC_GP_HW_CTL0_RMII_CRSDV_SEL   (1L<<2)
 
#define BNX2_MISC_GP_HW_CTL0_RVMII_MODE   (1L<<3)
 
#define BNX2_MISC_GP_HW_CTL0_FLASH_SAMP_SCLK_NEGEDGE_TE   (1L<<4)
 
#define BNX2_MISC_GP_HW_CTL0_HIDDEN_REVISION_ID_TE   (1L<<5)
 
#define BNX2_MISC_GP_HW_CTL0_HC_CNTL_TMOUT_CTR_RST_TE   (1L<<6)
 
#define BNX2_MISC_GP_HW_CTL0_RESERVED1_XI   (0x7L<<4)
 
#define BNX2_MISC_GP_HW_CTL0_ENA_CORE_RST_ON_MAIN_PWR_GOING_AWAY   (1L<<7)
 
#define BNX2_MISC_GP_HW_CTL0_ENA_SEL_VAUX_B_IN_L2_TE   (1L<<8)
 
#define BNX2_MISC_GP_HW_CTL0_GRC_BNK_FREE_FIX_TE   (1L<<9)
 
#define BNX2_MISC_GP_HW_CTL0_LED_ACT_SEL_TE   (1L<<10)
 
#define BNX2_MISC_GP_HW_CTL0_RESERVED2_XI   (0x7L<<8)
 
#define BNX2_MISC_GP_HW_CTL0_UP1_DEF0   (1L<<11)
 
#define BNX2_MISC_GP_HW_CTL0_FIBER_MODE_DIS_DEF   (1L<<12)
 
#define BNX2_MISC_GP_HW_CTL0_FORCE2500_DEF   (1L<<13)
 
#define BNX2_MISC_GP_HW_CTL0_AUTODETECT_DIS_DEF   (1L<<14)
 
#define BNX2_MISC_GP_HW_CTL0_PARALLEL_DETECT_DEF   (1L<<15)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI   (0xfL<<16)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_3MA   (0L<<16)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_2P5MA   (1L<<16)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_2P0MA   (3L<<16)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_1P5MA   (5L<<16)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_1P0MA   (7L<<16)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_PWRDN   (15L<<16)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PRE2DIS   (1L<<20)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PRE1DIS   (1L<<21)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT   (0x3L<<22)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT_M6P   (0L<<22)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT_M0P   (1L<<22)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT_P0P   (2L<<22)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT_P6P   (3L<<22)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT   (0x3L<<24)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT_M6P   (0L<<24)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT_M0P   (1L<<24)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT_P0P   (2L<<24)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT_P6P   (3L<<24)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ   (0x3L<<26)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ_240UA   (0L<<26)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ_160UA   (1L<<26)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ_400UA   (2L<<26)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ_320UA   (3L<<26)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ   (0x3L<<28)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ_240UA   (0L<<28)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ_160UA   (1L<<28)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ_400UA   (2L<<28)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ_320UA   (3L<<28)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ   (0x3L<<30)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ_1P57   (0L<<30)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ_1P45   (1L<<30)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ_1P62   (2L<<30)
 
#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ_1P66   (3L<<30)
 
#define BNX2_MISC_GP_HW_CTL1   0x000008c0
 
#define BNX2_MISC_GP_HW_CTL1_1_ATTN_BTN_PRSNT_TE   (1L<<0)
 
#define BNX2_MISC_GP_HW_CTL1_1_ATTN_IND_PRSNT_TE   (1L<<1)
 
#define BNX2_MISC_GP_HW_CTL1_1_PWR_IND_PRSNT_TE   (1L<<2)
 
#define BNX2_MISC_GP_HW_CTL1_0_PCIE_LOOPBACK_TE   (1L<<3)
 
#define BNX2_MISC_GP_HW_CTL1_RESERVED_SOFT_XI   (0xffffL<<0)
 
#define BNX2_MISC_GP_HW_CTL1_RESERVED_HARD_XI   (0xffffL<<16)
 
#define BNX2_MISC_NEW_HW_CTL   0x000008c4
 
#define BNX2_MISC_NEW_HW_CTL_MAIN_POR_BYPASS   (1L<<0)
 
#define BNX2_MISC_NEW_HW_CTL_RINGOSC_ENABLE   (1L<<1)
 
#define BNX2_MISC_NEW_HW_CTL_RINGOSC_SEL0   (1L<<2)
 
#define BNX2_MISC_NEW_HW_CTL_RINGOSC_SEL1   (1L<<3)
 
#define BNX2_MISC_NEW_HW_CTL_RESERVED_SHARED   (0xfffL<<4)
 
#define BNX2_MISC_NEW_HW_CTL_RESERVED_SPLIT   (0xffffL<<16)
 
#define BNX2_MISC_NEW_CORE_CTL   0x000008c8
 
#define BNX2_MISC_NEW_CORE_CTL_LINK_HOLDOFF_SUCCESS   (1L<<0)
 
#define BNX2_MISC_NEW_CORE_CTL_LINK_HOLDOFF_REQ   (1L<<1)
 
#define BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE   (1L<<16)
 
#define BNX2_MISC_NEW_CORE_CTL_RESERVED_CMN   (0x3fffL<<2)
 
#define BNX2_MISC_NEW_CORE_CTL_RESERVED_TC   (0xffffL<<16)
 
#define BNX2_MISC_ECO_HW_CTL   0x000008cc
 
#define BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN   (1L<<0)
 
#define BNX2_MISC_ECO_HW_CTL_RESERVED_SOFT   (0x7fffL<<1)
 
#define BNX2_MISC_ECO_HW_CTL_RESERVED_HARD   (0xffffL<<16)
 
#define BNX2_MISC_ECO_CORE_CTL   0x000008d0
 
#define BNX2_MISC_ECO_CORE_CTL_RESERVED_SOFT   (0xffffL<<0)
 
#define BNX2_MISC_ECO_CORE_CTL_RESERVED_HARD   (0xffffL<<16)
 
#define BNX2_MISC_PPIO   0x000008d4
 
#define BNX2_MISC_PPIO_VALUE   (0xfL<<0)
 
#define BNX2_MISC_PPIO_SET   (0xfL<<8)
 
#define BNX2_MISC_PPIO_CLR   (0xfL<<16)
 
#define BNX2_MISC_PPIO_FLOAT   (0xfL<<24)
 
#define BNX2_MISC_PPIO_INT   0x000008d8
 
#define BNX2_MISC_PPIO_INT_INT_STATE   (0xfL<<0)
 
#define BNX2_MISC_PPIO_INT_OLD_VALUE   (0xfL<<8)
 
#define BNX2_MISC_PPIO_INT_OLD_SET   (0xfL<<16)
 
#define BNX2_MISC_PPIO_INT_OLD_CLR   (0xfL<<24)
 
#define BNX2_MISC_RESET_NUMS   0x000008dc
 
#define BNX2_MISC_RESET_NUMS_NUM_HARD_RESETS   (0x7L<<0)
 
#define BNX2_MISC_RESET_NUMS_NUM_PCIE_RESETS   (0x7L<<4)
 
#define BNX2_MISC_RESET_NUMS_NUM_PERSTB_RESETS   (0x7L<<8)
 
#define BNX2_MISC_RESET_NUMS_NUM_CMN_RESETS   (0x7L<<12)
 
#define BNX2_MISC_RESET_NUMS_NUM_PORT_RESETS   (0x7L<<16)
 
#define BNX2_MISC_CS16_ERR   0x000008e0
 
#define BNX2_MISC_CS16_ERR_ENA_PCI   (1L<<0)
 
#define BNX2_MISC_CS16_ERR_ENA_RDMA   (1L<<1)
 
#define BNX2_MISC_CS16_ERR_ENA_TDMA   (1L<<2)
 
#define BNX2_MISC_CS16_ERR_ENA_EMAC   (1L<<3)
 
#define BNX2_MISC_CS16_ERR_ENA_CTX   (1L<<4)
 
#define BNX2_MISC_CS16_ERR_ENA_TBDR   (1L<<5)
 
#define BNX2_MISC_CS16_ERR_ENA_RBDC   (1L<<6)
 
#define BNX2_MISC_CS16_ERR_ENA_COM   (1L<<7)
 
#define BNX2_MISC_CS16_ERR_ENA_CP   (1L<<8)
 
#define BNX2_MISC_CS16_ERR_STA_PCI   (1L<<16)
 
#define BNX2_MISC_CS16_ERR_STA_RDMA   (1L<<17)
 
#define BNX2_MISC_CS16_ERR_STA_TDMA   (1L<<18)
 
#define BNX2_MISC_CS16_ERR_STA_EMAC   (1L<<19)
 
#define BNX2_MISC_CS16_ERR_STA_CTX   (1L<<20)
 
#define BNX2_MISC_CS16_ERR_STA_TBDR   (1L<<21)
 
#define BNX2_MISC_CS16_ERR_STA_RBDC   (1L<<22)
 
#define BNX2_MISC_CS16_ERR_STA_COM   (1L<<23)
 
#define BNX2_MISC_CS16_ERR_STA_CP   (1L<<24)
 
#define BNX2_MISC_SPIO_EVENT   0x000008e4
 
#define BNX2_MISC_SPIO_EVENT_ENABLE   (0xffL<<0)
 
#define BNX2_MISC_PPIO_EVENT   0x000008e8
 
#define BNX2_MISC_PPIO_EVENT_ENABLE   (0xfL<<0)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL   0x000008ec
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID   (0xffL<<0)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_X   (0L<<0)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_C   (3L<<0)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_S   (12L<<0)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_CTRL_STRAP   (0x7L<<8)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PORT_SWAP_PIN   (1L<<11)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_SERDES1_SIGDET   (1L<<12)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_SERDES0_SIGDET   (1L<<13)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY1_SIGDET   (1L<<14)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY0_SIGDET   (1L<<15)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_LCPLL_RST   (1L<<16)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_SERDES1_RST   (1L<<17)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_SERDES0_RST   (1L<<18)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY1_RST   (1L<<19)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY0_RST   (1L<<20)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_CTRL   (0x7L<<21)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PORT_SWAP   (1L<<24)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_STRAP_OVERRIDE   (1L<<25)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ   (0xfL<<26)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ_SER1_IDDQ   (1L<<26)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ_SER0_IDDQ   (2L<<26)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ_PHY1_IDDQ   (4L<<26)
 
#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ_PHY0_IDDQ   (8L<<26)
 
#define BNX2_MISC_OTP_CMD1   0x000008f0
 
#define BNX2_MISC_OTP_CMD1_FMODE   (0x7L<<0)
 
#define BNX2_MISC_OTP_CMD1_FMODE_IDLE   (0L<<0)
 
#define BNX2_MISC_OTP_CMD1_FMODE_WRITE   (1L<<0)
 
#define BNX2_MISC_OTP_CMD1_FMODE_INIT   (2L<<0)
 
#define BNX2_MISC_OTP_CMD1_FMODE_SET   (3L<<0)
 
#define BNX2_MISC_OTP_CMD1_FMODE_RST   (4L<<0)
 
#define BNX2_MISC_OTP_CMD1_FMODE_VERIFY   (5L<<0)
 
#define BNX2_MISC_OTP_CMD1_FMODE_RESERVED0   (6L<<0)
 
#define BNX2_MISC_OTP_CMD1_FMODE_RESERVED1   (7L<<0)
 
#define BNX2_MISC_OTP_CMD1_USEPINS   (1L<<8)
 
#define BNX2_MISC_OTP_CMD1_PROGSEL   (1L<<9)
 
#define BNX2_MISC_OTP_CMD1_PROGSTART   (1L<<10)
 
#define BNX2_MISC_OTP_CMD1_PCOUNT   (0x7L<<16)
 
#define BNX2_MISC_OTP_CMD1_PBYP   (1L<<19)
 
#define BNX2_MISC_OTP_CMD1_VSEL   (0xfL<<20)
 
#define BNX2_MISC_OTP_CMD1_TM   (0x7L<<27)
 
#define BNX2_MISC_OTP_CMD1_SADBYP   (1L<<30)
 
#define BNX2_MISC_OTP_CMD1_DEBUG   (1L<<31)
 
#define BNX2_MISC_OTP_CMD2   0x000008f4
 
#define BNX2_MISC_OTP_CMD2_OTP_ROM_ADDR   (0x3ffL<<0)
 
#define BNX2_MISC_OTP_CMD2_DOSEL   (0x7fL<<16)
 
#define BNX2_MISC_OTP_CMD2_DOSEL_0   (0L<<16)
 
#define BNX2_MISC_OTP_CMD2_DOSEL_1   (1L<<16)
 
#define BNX2_MISC_OTP_CMD2_DOSEL_127   (127L<<16)
 
#define BNX2_MISC_OTP_STATUS   0x000008f8
 
#define BNX2_MISC_OTP_STATUS_DATA   (0xffL<<0)
 
#define BNX2_MISC_OTP_STATUS_VALID   (1L<<8)
 
#define BNX2_MISC_OTP_STATUS_BUSY   (1L<<9)
 
#define BNX2_MISC_OTP_STATUS_BUSYSM   (1L<<10)
 
#define BNX2_MISC_OTP_STATUS_DONE   (1L<<11)
 
#define BNX2_MISC_OTP_SHIFT1_CMD   0x000008fc
 
#define BNX2_MISC_OTP_SHIFT1_CMD_RESET_MODE_N   (1L<<0)
 
#define BNX2_MISC_OTP_SHIFT1_CMD_SHIFT_DONE   (1L<<1)
 
#define BNX2_MISC_OTP_SHIFT1_CMD_SHIFT_START   (1L<<2)
 
#define BNX2_MISC_OTP_SHIFT1_CMD_LOAD_DATA   (1L<<3)
 
#define BNX2_MISC_OTP_SHIFT1_CMD_SHIFT_SELECT   (0x1fL<<8)
 
#define BNX2_MISC_OTP_SHIFT1_DATA   0x00000900
 
#define BNX2_MISC_OTP_SHIFT2_CMD   0x00000904
 
#define BNX2_MISC_OTP_SHIFT2_CMD_RESET_MODE_N   (1L<<0)
 
#define BNX2_MISC_OTP_SHIFT2_CMD_SHIFT_DONE   (1L<<1)
 
#define BNX2_MISC_OTP_SHIFT2_CMD_SHIFT_START   (1L<<2)
 
#define BNX2_MISC_OTP_SHIFT2_CMD_LOAD_DATA   (1L<<3)
 
#define BNX2_MISC_OTP_SHIFT2_CMD_SHIFT_SELECT   (0x1fL<<8)
 
#define BNX2_MISC_OTP_SHIFT2_DATA   0x00000908
 
#define BNX2_MISC_BIST_CS0   0x0000090c
 
#define BNX2_MISC_BIST_CS0_MBIST_EN   (1L<<0)
 
#define BNX2_MISC_BIST_CS0_BIST_SETUP   (0x3L<<1)
 
#define BNX2_MISC_BIST_CS0_MBIST_ASYNC_RESET   (1L<<3)
 
#define BNX2_MISC_BIST_CS0_MBIST_DONE   (1L<<8)
 
#define BNX2_MISC_BIST_CS0_MBIST_GO   (1L<<9)
 
#define BNX2_MISC_BIST_CS0_BIST_OVERRIDE   (1L<<31)
 
#define BNX2_MISC_BIST_MEMSTATUS0   0x00000910
 
#define BNX2_MISC_BIST_CS1   0x00000914
 
#define BNX2_MISC_BIST_CS1_MBIST_EN   (1L<<0)
 
#define BNX2_MISC_BIST_CS1_BIST_SETUP   (0x3L<<1)
 
#define BNX2_MISC_BIST_CS1_MBIST_ASYNC_RESET   (1L<<3)
 
#define BNX2_MISC_BIST_CS1_MBIST_DONE   (1L<<8)
 
#define BNX2_MISC_BIST_CS1_MBIST_GO   (1L<<9)
 
#define BNX2_MISC_BIST_MEMSTATUS1   0x00000918
 
#define BNX2_MISC_BIST_CS2   0x0000091c
 
#define BNX2_MISC_BIST_CS2_MBIST_EN   (1L<<0)
 
#define BNX2_MISC_BIST_CS2_BIST_SETUP   (0x3L<<1)
 
#define BNX2_MISC_BIST_CS2_MBIST_ASYNC_RESET   (1L<<3)
 
#define BNX2_MISC_BIST_CS2_MBIST_DONE   (1L<<8)
 
#define BNX2_MISC_BIST_CS2_MBIST_GO   (1L<<9)
 
#define BNX2_MISC_BIST_MEMSTATUS2   0x00000920
 
#define BNX2_MISC_BIST_CS3   0x00000924
 
#define BNX2_MISC_BIST_CS3_MBIST_EN   (1L<<0)
 
#define BNX2_MISC_BIST_CS3_BIST_SETUP   (0x3L<<1)
 
#define BNX2_MISC_BIST_CS3_MBIST_ASYNC_RESET   (1L<<3)
 
#define BNX2_MISC_BIST_CS3_MBIST_DONE   (1L<<8)
 
#define BNX2_MISC_BIST_CS3_MBIST_GO   (1L<<9)
 
#define BNX2_MISC_BIST_MEMSTATUS3   0x00000928
 
#define BNX2_MISC_BIST_CS4   0x0000092c
 
#define BNX2_MISC_BIST_CS4_MBIST_EN   (1L<<0)
 
#define BNX2_MISC_BIST_CS4_BIST_SETUP   (0x3L<<1)
 
#define BNX2_MISC_BIST_CS4_MBIST_ASYNC_RESET   (1L<<3)
 
#define BNX2_MISC_BIST_CS4_MBIST_DONE   (1L<<8)
 
#define BNX2_MISC_BIST_CS4_MBIST_GO   (1L<<9)
 
#define BNX2_MISC_BIST_MEMSTATUS4   0x00000930
 
#define BNX2_MISC_BIST_CS5   0x00000934
 
#define BNX2_MISC_BIST_CS5_MBIST_EN   (1L<<0)
 
#define BNX2_MISC_BIST_CS5_BIST_SETUP   (0x3L<<1)
 
#define BNX2_MISC_BIST_CS5_MBIST_ASYNC_RESET   (1L<<3)
 
#define BNX2_MISC_BIST_CS5_MBIST_DONE   (1L<<8)
 
#define BNX2_MISC_BIST_CS5_MBIST_GO   (1L<<9)
 
#define BNX2_MISC_BIST_MEMSTATUS5   0x00000938
 
#define BNX2_MISC_MEM_TM0   0x0000093c
 
#define BNX2_MISC_MEM_TM0_PCIE_REPLAY_TM   (0xfL<<0)
 
#define BNX2_MISC_MEM_TM0_MCP_SCPAD   (0xfL<<8)
 
#define BNX2_MISC_MEM_TM0_UMP_TM   (0xffL<<16)
 
#define BNX2_MISC_MEM_TM0_HB_MEM_TM   (0xfL<<24)
 
#define BNX2_MISC_USPLL_CTRL   0x00000940
 
#define BNX2_MISC_USPLL_CTRL_PH_DET_DIS   (1L<<0)
 
#define BNX2_MISC_USPLL_CTRL_FREQ_DET_DIS   (1L<<1)
 
#define BNX2_MISC_USPLL_CTRL_LCPX   (0x3fL<<2)
 
#define BNX2_MISC_USPLL_CTRL_RX   (0x3L<<8)
 
#define BNX2_MISC_USPLL_CTRL_VC_EN   (1L<<10)
 
#define BNX2_MISC_USPLL_CTRL_VCO_MG   (0x3L<<11)
 
#define BNX2_MISC_USPLL_CTRL_KVCO_XF   (0x7L<<13)
 
#define BNX2_MISC_USPLL_CTRL_KVCO_XS   (0x7L<<16)
 
#define BNX2_MISC_USPLL_CTRL_TESTD_EN   (1L<<19)
 
#define BNX2_MISC_USPLL_CTRL_TESTD_SEL   (0x7L<<20)
 
#define BNX2_MISC_USPLL_CTRL_TESTA_EN   (1L<<23)
 
#define BNX2_MISC_USPLL_CTRL_TESTA_SEL   (0x3L<<24)
 
#define BNX2_MISC_USPLL_CTRL_ATTEN_FREF   (1L<<26)
 
#define BNX2_MISC_USPLL_CTRL_DIGITAL_RST   (1L<<27)
 
#define BNX2_MISC_USPLL_CTRL_ANALOG_RST   (1L<<28)
 
#define BNX2_MISC_USPLL_CTRL_LOCK   (1L<<29)
 
#define BNX2_MISC_PERR_STATUS0   0x00000944
 
#define BNX2_MISC_PERR_STATUS0_COM_DMAE_PERR   (1L<<0)
 
#define BNX2_MISC_PERR_STATUS0_CP_DMAE_PERR   (1L<<1)
 
#define BNX2_MISC_PERR_STATUS0_RPM_ACPIBEMEM_PERR   (1L<<2)
 
#define BNX2_MISC_PERR_STATUS0_CTX_USAGE_CNT_PERR   (1L<<3)
 
#define BNX2_MISC_PERR_STATUS0_CTX_PGTBL_PERR   (1L<<4)
 
#define BNX2_MISC_PERR_STATUS0_CTX_CACHE_PERR   (1L<<5)
 
#define BNX2_MISC_PERR_STATUS0_CTX_MIRROR_PERR   (1L<<6)
 
#define BNX2_MISC_PERR_STATUS0_COM_CTXC_PERR   (1L<<7)
 
#define BNX2_MISC_PERR_STATUS0_COM_SCPAD_PERR   (1L<<8)
 
#define BNX2_MISC_PERR_STATUS0_CP_CTXC_PERR   (1L<<9)
 
#define BNX2_MISC_PERR_STATUS0_CP_SCPAD_PERR   (1L<<10)
 
#define BNX2_MISC_PERR_STATUS0_RXP_RBUFC_PERR   (1L<<11)
 
#define BNX2_MISC_PERR_STATUS0_RXP_CTXC_PERR   (1L<<12)
 
#define BNX2_MISC_PERR_STATUS0_RXP_SCPAD_PERR   (1L<<13)
 
#define BNX2_MISC_PERR_STATUS0_TPAT_SCPAD_PERR   (1L<<14)
 
#define BNX2_MISC_PERR_STATUS0_TXP_CTXC_PERR   (1L<<15)
 
#define BNX2_MISC_PERR_STATUS0_TXP_SCPAD_PERR   (1L<<16)
 
#define BNX2_MISC_PERR_STATUS0_CS_TMEM_PERR   (1L<<17)
 
#define BNX2_MISC_PERR_STATUS0_MQ_CTX_PERR   (1L<<18)
 
#define BNX2_MISC_PERR_STATUS0_RPM_DFIFOMEM_PERR   (1L<<19)
 
#define BNX2_MISC_PERR_STATUS0_RPC_DFIFOMEM_PERR   (1L<<20)
 
#define BNX2_MISC_PERR_STATUS0_RBUF_PTRMEM_PERR   (1L<<21)
 
#define BNX2_MISC_PERR_STATUS0_RBUF_DATAMEM_PERR   (1L<<22)
 
#define BNX2_MISC_PERR_STATUS0_RV2P_P2IRAM_PERR   (1L<<23)
 
#define BNX2_MISC_PERR_STATUS0_RV2P_P1IRAM_PERR   (1L<<24)
 
#define BNX2_MISC_PERR_STATUS0_RV2P_CB1REGS_PERR   (1L<<25)
 
#define BNX2_MISC_PERR_STATUS0_RV2P_CB0REGS_PERR   (1L<<26)
 
#define BNX2_MISC_PERR_STATUS0_TPBUF_PERR   (1L<<27)
 
#define BNX2_MISC_PERR_STATUS0_THBUF_PERR   (1L<<28)
 
#define BNX2_MISC_PERR_STATUS0_TDMA_PERR   (1L<<29)
 
#define BNX2_MISC_PERR_STATUS0_TBDC_PERR   (1L<<30)
 
#define BNX2_MISC_PERR_STATUS0_TSCH_LR_PERR   (1L<<31)
 
#define BNX2_MISC_PERR_STATUS1   0x00000948
 
#define BNX2_MISC_PERR_STATUS1_RBDC_PERR   (1L<<0)
 
#define BNX2_MISC_PERR_STATUS1_RDMA_DFIFO_PERR   (1L<<2)
 
#define BNX2_MISC_PERR_STATUS1_HC_STATS_PERR   (1L<<3)
 
#define BNX2_MISC_PERR_STATUS1_HC_MSIX_PERR   (1L<<4)
 
#define BNX2_MISC_PERR_STATUS1_HC_PRODUCSTB_PERR   (1L<<5)
 
#define BNX2_MISC_PERR_STATUS1_HC_CONSUMSTB_PERR   (1L<<6)
 
#define BNX2_MISC_PERR_STATUS1_TPATQ_PERR   (1L<<7)
 
#define BNX2_MISC_PERR_STATUS1_MCPQ_PERR   (1L<<8)
 
#define BNX2_MISC_PERR_STATUS1_TDMAQ_PERR   (1L<<9)
 
#define BNX2_MISC_PERR_STATUS1_TXPQ_PERR   (1L<<10)
 
#define BNX2_MISC_PERR_STATUS1_COMTQ_PERR   (1L<<11)
 
#define BNX2_MISC_PERR_STATUS1_COMQ_PERR   (1L<<12)
 
#define BNX2_MISC_PERR_STATUS1_RLUPQ_PERR   (1L<<13)
 
#define BNX2_MISC_PERR_STATUS1_RXPQ_PERR   (1L<<14)
 
#define BNX2_MISC_PERR_STATUS1_RV2PPQ_PERR   (1L<<15)
 
#define BNX2_MISC_PERR_STATUS1_RDMAQ_PERR   (1L<<16)
 
#define BNX2_MISC_PERR_STATUS1_TASQ_PERR   (1L<<17)
 
#define BNX2_MISC_PERR_STATUS1_TBDRQ_PERR   (1L<<18)
 
#define BNX2_MISC_PERR_STATUS1_TSCHQ_PERR   (1L<<19)
 
#define BNX2_MISC_PERR_STATUS1_COMXQ_PERR   (1L<<20)
 
#define BNX2_MISC_PERR_STATUS1_RXPCQ_PERR   (1L<<21)
 
#define BNX2_MISC_PERR_STATUS1_RV2PTQ_PERR   (1L<<22)
 
#define BNX2_MISC_PERR_STATUS1_RV2PMQ_PERR   (1L<<23)
 
#define BNX2_MISC_PERR_STATUS1_CPQ_PERR   (1L<<24)
 
#define BNX2_MISC_PERR_STATUS1_CSQ_PERR   (1L<<25)
 
#define BNX2_MISC_PERR_STATUS1_RLUP_CID_PERR   (1L<<26)
 
#define BNX2_MISC_PERR_STATUS1_RV2PCS_TMEM_PERR   (1L<<27)
 
#define BNX2_MISC_PERR_STATUS1_RV2PCSQ_PERR   (1L<<28)
 
#define BNX2_MISC_PERR_STATUS1_MQ_IDX_PERR   (1L<<29)
 
#define BNX2_MISC_PERR_STATUS2   0x0000094c
 
#define BNX2_MISC_PERR_STATUS2_TGT_FIFO_PERR   (1L<<0)
 
#define BNX2_MISC_PERR_STATUS2_UMP_TX_PERR   (1L<<1)
 
#define BNX2_MISC_PERR_STATUS2_UMP_RX_PERR   (1L<<2)
 
#define BNX2_MISC_PERR_STATUS2_MCP_ROM_PERR   (1L<<3)
 
#define BNX2_MISC_PERR_STATUS2_MCP_SCPAD_PERR   (1L<<4)
 
#define BNX2_MISC_PERR_STATUS2_HB_MEM_PERR   (1L<<5)
 
#define BNX2_MISC_PERR_STATUS2_PCIE_REPLAY_PERR   (1L<<6)
 
#define BNX2_MISC_LCPLL_CTRL0   0x00000950
 
#define BNX2_MISC_LCPLL_CTRL0_OAC   (0x7L<<0)
 
#define BNX2_MISC_LCPLL_CTRL0_OAC_NEGTWENTY   (0L<<0)
 
#define BNX2_MISC_LCPLL_CTRL0_OAC_ZERO   (1L<<0)
 
#define BNX2_MISC_LCPLL_CTRL0_OAC_TWENTY   (3L<<0)
 
#define BNX2_MISC_LCPLL_CTRL0_OAC_FORTY   (7L<<0)
 
#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL   (0x7L<<3)
 
#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL_360   (0L<<3)
 
#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL_480   (1L<<3)
 
#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL_600   (3L<<3)
 
#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL_720   (7L<<3)
 
#define BNX2_MISC_LCPLL_CTRL0_BIAS_CTRL   (0x3L<<6)
 
#define BNX2_MISC_LCPLL_CTRL0_PLL_OBSERVE   (0x7L<<8)
 
#define BNX2_MISC_LCPLL_CTRL0_VTH_CTRL   (0x3L<<11)
 
#define BNX2_MISC_LCPLL_CTRL0_VTH_CTRL_0   (0L<<11)
 
#define BNX2_MISC_LCPLL_CTRL0_VTH_CTRL_1   (1L<<11)
 
#define BNX2_MISC_LCPLL_CTRL0_VTH_CTRL_2   (2L<<11)
 
#define BNX2_MISC_LCPLL_CTRL0_PLLSEQSTART   (1L<<13)
 
#define BNX2_MISC_LCPLL_CTRL0_RESERVED   (1L<<14)
 
#define BNX2_MISC_LCPLL_CTRL0_CAPRETRY_EN   (1L<<15)
 
#define BNX2_MISC_LCPLL_CTRL0_FREQMONITOR_EN   (1L<<16)
 
#define BNX2_MISC_LCPLL_CTRL0_FREQDETRESTART_EN   (1L<<17)
 
#define BNX2_MISC_LCPLL_CTRL0_FREQDETRETRY_EN   (1L<<18)
 
#define BNX2_MISC_LCPLL_CTRL0_PLLFORCEFDONE_EN   (1L<<19)
 
#define BNX2_MISC_LCPLL_CTRL0_PLLFORCEFDONE   (1L<<20)
 
#define BNX2_MISC_LCPLL_CTRL0_PLLFORCEFPASS   (1L<<21)
 
#define BNX2_MISC_LCPLL_CTRL0_PLLFORCECAPDONE_EN   (1L<<22)
 
#define BNX2_MISC_LCPLL_CTRL0_PLLFORCECAPDONE   (1L<<23)
 
#define BNX2_MISC_LCPLL_CTRL0_PLLFORCECAPPASS_EN   (1L<<24)
 
#define BNX2_MISC_LCPLL_CTRL0_PLLFORCECAPPASS   (1L<<25)
 
#define BNX2_MISC_LCPLL_CTRL0_CAPRESTART   (1L<<26)
 
#define BNX2_MISC_LCPLL_CTRL0_CAPSELECTM_EN   (1L<<27)
 
#define BNX2_MISC_LCPLL_CTRL1   0x00000954
 
#define BNX2_MISC_LCPLL_CTRL1_CAPSELECTM   (0x1fL<<0)
 
#define BNX2_MISC_LCPLL_CTRL1_CAPFORCESLOWDOWN_EN   (1L<<5)
 
#define BNX2_MISC_LCPLL_CTRL1_CAPFORCESLOWDOWN   (1L<<6)
 
#define BNX2_MISC_LCPLL_CTRL1_SLOWDN_XOR   (1L<<7)
 
#define BNX2_MISC_LCPLL_STATUS   0x00000958
 
#define BNX2_MISC_LCPLL_STATUS_FREQDONE_SM   (1L<<0)
 
#define BNX2_MISC_LCPLL_STATUS_FREQPASS_SM   (1L<<1)
 
#define BNX2_MISC_LCPLL_STATUS_PLLSEQDONE   (1L<<2)
 
#define BNX2_MISC_LCPLL_STATUS_PLLSEQPASS   (1L<<3)
 
#define BNX2_MISC_LCPLL_STATUS_PLLSTATE   (0x7L<<4)
 
#define BNX2_MISC_LCPLL_STATUS_CAPSTATE   (0x7L<<7)
 
#define BNX2_MISC_LCPLL_STATUS_CAPSELECT   (0x1fL<<10)
 
#define BNX2_MISC_LCPLL_STATUS_SLOWDN_INDICATOR   (1L<<15)
 
#define BNX2_MISC_LCPLL_STATUS_SLOWDN_INDICATOR_0   (0L<<15)
 
#define BNX2_MISC_LCPLL_STATUS_SLOWDN_INDICATOR_1   (1L<<15)
 
#define BNX2_MISC_OSCFUNDS_CTRL   0x0000095c
 
#define BNX2_MISC_OSCFUNDS_CTRL_FREQ_MON   (1L<<5)
 
#define BNX2_MISC_OSCFUNDS_CTRL_FREQ_MON_OFF   (0L<<5)
 
#define BNX2_MISC_OSCFUNDS_CTRL_FREQ_MON_ON   (1L<<5)
 
#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM   (0x3L<<6)
 
#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM_0   (0L<<6)
 
#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM_1   (1L<<6)
 
#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM_2   (2L<<6)
 
#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM_3   (3L<<6)
 
#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ   (0x3L<<8)
 
#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ_0   (0L<<8)
 
#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ_1   (1L<<8)
 
#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ_2   (2L<<8)
 
#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ_3   (3L<<8)
 
#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ   (0x3L<<10)
 
#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ_0   (0L<<10)
 
#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ_1   (1L<<10)
 
#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ_2   (2L<<10)
 
#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ_3   (3L<<10)
 
#define BNX2_NVM_COMMAND   0x00006400
 
#define BNX2_NVM_COMMAND_RST   (1L<<0)
 
#define BNX2_NVM_COMMAND_DONE   (1L<<3)
 
#define BNX2_NVM_COMMAND_DOIT   (1L<<4)
 
#define BNX2_NVM_COMMAND_WR   (1L<<5)
 
#define BNX2_NVM_COMMAND_ERASE   (1L<<6)
 
#define BNX2_NVM_COMMAND_FIRST   (1L<<7)
 
#define BNX2_NVM_COMMAND_LAST   (1L<<8)
 
#define BNX2_NVM_COMMAND_WREN   (1L<<16)
 
#define BNX2_NVM_COMMAND_WRDI   (1L<<17)
 
#define BNX2_NVM_COMMAND_EWSR   (1L<<18)
 
#define BNX2_NVM_COMMAND_WRSR   (1L<<19)
 
#define BNX2_NVM_COMMAND_RD_ID   (1L<<20)
 
#define BNX2_NVM_COMMAND_RD_STATUS   (1L<<21)
 
#define BNX2_NVM_COMMAND_MODE_256   (1L<<22)
 
#define BNX2_NVM_STATUS   0x00006404
 
#define BNX2_NVM_STATUS_PI_FSM_STATE   (0xfL<<0)
 
#define BNX2_NVM_STATUS_EE_FSM_STATE   (0xfL<<4)
 
#define BNX2_NVM_STATUS_EQ_FSM_STATE   (0xfL<<8)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_XI   (0x1fL<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_IDLE_XI   (0L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CMD0_XI   (1L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CMD1_XI   (2L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CMD_FINISH0_XI   (3L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CMD_FINISH1_XI   (4L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_ADDR0_XI   (5L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA0_XI   (6L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA1_XI   (7L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA2_XI   (8L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA0_XI   (9L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA1_XI   (10L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA2_XI   (11L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID0_XI   (12L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID1_XI   (13L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID2_XI   (14L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID3_XI   (15L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID4_XI   (16L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CHECK_BUSY0_XI   (17L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_ST_WREN_XI   (18L<<0)
 
#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_WAIT_XI   (19L<<0)
 
#define BNX2_NVM_WRITE   0x00006408
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE   (0xffffffffL<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_BIT_BANG   (0L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_EECLK   (1L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_EEDATA   (2L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SCLK   (4L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_CS_B   (8L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SO   (16L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SI   (32L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SI_XI   (1L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SO_XI   (2L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_CS_B_XI   (4L<<0)
 
#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SCLK_XI   (8L<<0)
 
#define BNX2_NVM_ADDR   0x0000640c
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE   (0xffffffL<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_BIT_BANG   (0L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_EECLK   (1L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_EEDATA   (2L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SCLK   (4L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS_B   (8L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO   (16L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI   (32L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI_XI   (1L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO_XI   (2L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS_B_XI   (4L<<0)
 
#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SCLK_XI   (8L<<0)
 
#define BNX2_NVM_READ   0x00006410
 
#define BNX2_NVM_READ_NVM_READ_VALUE   (0xffffffffL<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_BIT_BANG   (0L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_EECLK   (1L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_EEDATA   (2L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_SCLK   (4L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_CS_B   (8L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_SO   (16L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_SI   (32L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_SI_XI   (1L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_SO_XI   (2L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_CS_B_XI   (4L<<0)
 
#define BNX2_NVM_READ_NVM_READ_VALUE_SCLK_XI   (8L<<0)
 
#define BNX2_NVM_CFG1   0x00006414
 
#define BNX2_NVM_CFG1_FLASH_MODE   (1L<<0)
 
#define BNX2_NVM_CFG1_BUFFER_MODE   (1L<<1)
 
#define BNX2_NVM_CFG1_PASS_MODE   (1L<<2)
 
#define BNX2_NVM_CFG1_BITBANG_MODE   (1L<<3)
 
#define BNX2_NVM_CFG1_STATUS_BIT   (0x7L<<4)
 
#define BNX2_NVM_CFG1_STATUS_BIT_FLASH_RDY   (0L<<4)
 
#define BNX2_NVM_CFG1_STATUS_BIT_BUFFER_RDY   (7L<<4)
 
#define BNX2_NVM_CFG1_SPI_CLK_DIV   (0xfL<<7)
 
#define BNX2_NVM_CFG1_SEE_CLK_DIV   (0x7ffL<<11)
 
#define BNX2_NVM_CFG1_STRAP_CONTROL_0   (1L<<23)
 
#define BNX2_NVM_CFG1_PROTECT_MODE   (1L<<24)
 
#define BNX2_NVM_CFG1_FLASH_SIZE   (1L<<25)
 
#define BNX2_NVM_CFG1_FW_USTRAP_1   (1L<<26)
 
#define BNX2_NVM_CFG1_FW_USTRAP_0   (1L<<27)
 
#define BNX2_NVM_CFG1_FW_USTRAP_2   (1L<<28)
 
#define BNX2_NVM_CFG1_FW_USTRAP_3   (1L<<29)
 
#define BNX2_NVM_CFG1_FW_FLASH_TYPE_EN   (1L<<30)
 
#define BNX2_NVM_CFG1_COMPAT_BYPASSS   (1L<<31)
 
#define BNX2_NVM_CFG2   0x00006418
 
#define BNX2_NVM_CFG2_ERASE_CMD   (0xffL<<0)
 
#define BNX2_NVM_CFG2_DUMMY   (0xffL<<8)
 
#define BNX2_NVM_CFG2_STATUS_CMD   (0xffL<<16)
 
#define BNX2_NVM_CFG2_READ_ID   (0xffL<<24)
 
#define BNX2_NVM_CFG3   0x0000641c
 
#define BNX2_NVM_CFG3_BUFFER_RD_CMD   (0xffL<<0)
 
#define BNX2_NVM_CFG3_WRITE_CMD   (0xffL<<8)
 
#define BNX2_NVM_CFG3_BUFFER_WRITE_CMD   (0xffL<<16)
 
#define BNX2_NVM_CFG3_READ_CMD   (0xffL<<24)
 
#define BNX2_NVM_SW_ARB   0x00006420
 
#define BNX2_NVM_SW_ARB_ARB_REQ_SET0   (1L<<0)
 
#define BNX2_NVM_SW_ARB_ARB_REQ_SET1   (1L<<1)
 
#define BNX2_NVM_SW_ARB_ARB_REQ_SET2   (1L<<2)
 
#define BNX2_NVM_SW_ARB_ARB_REQ_SET3   (1L<<3)
 
#define BNX2_NVM_SW_ARB_ARB_REQ_CLR0   (1L<<4)
 
#define BNX2_NVM_SW_ARB_ARB_REQ_CLR1   (1L<<5)
 
#define BNX2_NVM_SW_ARB_ARB_REQ_CLR2   (1L<<6)
 
#define BNX2_NVM_SW_ARB_ARB_REQ_CLR3   (1L<<7)
 
#define BNX2_NVM_SW_ARB_ARB_ARB0   (1L<<8)
 
#define BNX2_NVM_SW_ARB_ARB_ARB1   (1L<<9)
 
#define BNX2_NVM_SW_ARB_ARB_ARB2   (1L<<10)
 
#define BNX2_NVM_SW_ARB_ARB_ARB3   (1L<<11)
 
#define BNX2_NVM_SW_ARB_REQ0   (1L<<12)
 
#define BNX2_NVM_SW_ARB_REQ1   (1L<<13)
 
#define BNX2_NVM_SW_ARB_REQ2   (1L<<14)
 
#define BNX2_NVM_SW_ARB_REQ3   (1L<<15)
 
#define BNX2_NVM_ACCESS_ENABLE   0x00006424
 
#define BNX2_NVM_ACCESS_ENABLE_EN   (1L<<0)
 
#define BNX2_NVM_ACCESS_ENABLE_WR_EN   (1L<<1)
 
#define BNX2_NVM_WRITE1   0x00006428
 
#define BNX2_NVM_WRITE1_WREN_CMD   (0xffL<<0)
 
#define BNX2_NVM_WRITE1_WRDI_CMD   (0xffL<<8)
 
#define BNX2_NVM_WRITE1_SR_DATA   (0xffL<<16)
 
#define BNX2_NVM_CFG4   0x0000642c
 
#define BNX2_NVM_CFG4_FLASH_SIZE   (0x7L<<0)
 
#define BNX2_NVM_CFG4_FLASH_SIZE_1MBIT   (0L<<0)
 
#define BNX2_NVM_CFG4_FLASH_SIZE_2MBIT   (1L<<0)
 
#define BNX2_NVM_CFG4_FLASH_SIZE_4MBIT   (2L<<0)
 
#define BNX2_NVM_CFG4_FLASH_SIZE_8MBIT   (3L<<0)
 
#define BNX2_NVM_CFG4_FLASH_SIZE_16MBIT   (4L<<0)
 
#define BNX2_NVM_CFG4_FLASH_SIZE_32MBIT   (5L<<0)
 
#define BNX2_NVM_CFG4_FLASH_SIZE_64MBIT   (6L<<0)
 
#define BNX2_NVM_CFG4_FLASH_SIZE_128MBIT   (7L<<0)
 
#define BNX2_NVM_CFG4_FLASH_VENDOR   (1L<<3)
 
#define BNX2_NVM_CFG4_FLASH_VENDOR_ST   (0L<<3)
 
#define BNX2_NVM_CFG4_FLASH_VENDOR_ATMEL   (1L<<3)
 
#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC   (0x3L<<4)
 
#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT8   (0L<<4)
 
#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT9   (1L<<4)
 
#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT10   (2L<<4)
 
#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT11   (3L<<4)
 
#define BNX2_NVM_CFG4_STATUS_BIT_POLARITY   (1L<<6)
 
#define BNX2_NVM_CFG4_RESERVED   (0x1ffffffL<<7)
 
#define BNX2_NVM_RECONFIG   0x00006430
 
#define BNX2_NVM_RECONFIG_ORIG_STRAP_VALUE   (0xfL<<0)
 
#define BNX2_NVM_RECONFIG_ORIG_STRAP_VALUE_ST   (0L<<0)
 
#define BNX2_NVM_RECONFIG_ORIG_STRAP_VALUE_ATMEL   (1L<<0)
 
#define BNX2_NVM_RECONFIG_RECONFIG_STRAP_VALUE   (0xfL<<4)
 
#define BNX2_NVM_RECONFIG_RESERVED   (0x7fffffL<<8)
 
#define BNX2_NVM_RECONFIG_RECONFIG_DONE   (1L<<31)
 
#define BNX2_DMA_COMMAND   0x00000c00
 
#define BNX2_DMA_COMMAND_ENABLE   (1L<<0)
 
#define BNX2_DMA_STATUS   0x00000c04
 
#define BNX2_DMA_STATUS_PAR_ERROR_STATE   (1L<<0)
 
#define BNX2_DMA_STATUS_READ_TRANSFERS_STAT   (1L<<16)
 
#define BNX2_DMA_STATUS_READ_DELAY_PCI_CLKS_STAT   (1L<<17)
 
#define BNX2_DMA_STATUS_BIG_READ_TRANSFERS_STAT   (1L<<18)
 
#define BNX2_DMA_STATUS_BIG_READ_DELAY_PCI_CLKS_STAT   (1L<<19)
 
#define BNX2_DMA_STATUS_BIG_READ_RETRY_AFTER_DATA_STAT   (1L<<20)
 
#define BNX2_DMA_STATUS_WRITE_TRANSFERS_STAT   (1L<<21)
 
#define BNX2_DMA_STATUS_WRITE_DELAY_PCI_CLKS_STAT   (1L<<22)
 
#define BNX2_DMA_STATUS_BIG_WRITE_TRANSFERS_STAT   (1L<<23)
 
#define BNX2_DMA_STATUS_BIG_WRITE_DELAY_PCI_CLKS_STAT   (1L<<24)
 
#define BNX2_DMA_STATUS_BIG_WRITE_RETRY_AFTER_DATA_STAT   (1L<<25)
 
#define BNX2_DMA_STATUS_GLOBAL_ERR_XI   (1L<<0)
 
#define BNX2_DMA_STATUS_BME_XI   (1L<<4)
 
#define BNX2_DMA_CONFIG   0x00000c08
 
#define BNX2_DMA_CONFIG_DATA_BYTE_SWAP   (1L<<0)
 
#define BNX2_DMA_CONFIG_DATA_WORD_SWAP   (1L<<1)
 
#define BNX2_DMA_CONFIG_CNTL_BYTE_SWAP   (1L<<4)
 
#define BNX2_DMA_CONFIG_CNTL_WORD_SWAP   (1L<<5)
 
#define BNX2_DMA_CONFIG_ONE_DMA   (1L<<6)
 
#define BNX2_DMA_CONFIG_CNTL_TWO_DMA   (1L<<7)
 
#define BNX2_DMA_CONFIG_CNTL_FPGA_MODE   (1L<<8)
 
#define BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA   (1L<<10)
 
#define BNX2_DMA_CONFIG_CNTL_PCI_COMP_DLY   (1L<<11)
 
#define BNX2_DMA_CONFIG_NO_RCHANS_IN_USE   (0xfL<<12)
 
#define BNX2_DMA_CONFIG_NO_WCHANS_IN_USE   (0xfL<<16)
 
#define BNX2_DMA_CONFIG_PCI_CLK_CMP_BITS   (0x7L<<20)
 
#define BNX2_DMA_CONFIG_PCI_FAST_CLK_CMP   (1L<<23)
 
#define BNX2_DMA_CONFIG_BIG_SIZE   (0xfL<<24)
 
#define BNX2_DMA_CONFIG_BIG_SIZE_NONE   (0x0L<<24)
 
#define BNX2_DMA_CONFIG_BIG_SIZE_64   (0x1L<<24)
 
#define BNX2_DMA_CONFIG_BIG_SIZE_128   (0x2L<<24)
 
#define BNX2_DMA_CONFIG_BIG_SIZE_256   (0x4L<<24)
 
#define BNX2_DMA_CONFIG_BIG_SIZE_512   (0x8L<<24)
 
#define BNX2_DMA_CONFIG_DAT_WBSWAP_MODE_XI   (0x3L<<0)
 
#define BNX2_DMA_CONFIG_CTL_WBSWAP_MODE_XI   (0x3L<<4)
 
#define BNX2_DMA_CONFIG_MAX_PL_XI   (0x7L<<12)
 
#define BNX2_DMA_CONFIG_MAX_PL_128B_XI   (0L<<12)
 
#define BNX2_DMA_CONFIG_MAX_PL_256B_XI   (1L<<12)
 
#define BNX2_DMA_CONFIG_MAX_PL_512B_XI   (2L<<12)
 
#define BNX2_DMA_CONFIG_MAX_PL_EN_XI   (1L<<15)
 
#define BNX2_DMA_CONFIG_MAX_RRS_XI   (0x7L<<16)
 
#define BNX2_DMA_CONFIG_MAX_RRS_128B_XI   (0L<<16)
 
#define BNX2_DMA_CONFIG_MAX_RRS_256B_XI   (1L<<16)
 
#define BNX2_DMA_CONFIG_MAX_RRS_512B_XI   (2L<<16)
 
#define BNX2_DMA_CONFIG_MAX_RRS_1024B_XI   (3L<<16)
 
#define BNX2_DMA_CONFIG_MAX_RRS_2048B_XI   (4L<<16)
 
#define BNX2_DMA_CONFIG_MAX_RRS_4096B_XI   (5L<<16)
 
#define BNX2_DMA_CONFIG_MAX_RRS_EN_XI   (1L<<19)
 
#define BNX2_DMA_CONFIG_NO_64SWAP_EN_XI   (1L<<31)
 
#define BNX2_DMA_BLACKOUT   0x00000c0c
 
#define BNX2_DMA_BLACKOUT_RD_RETRY_BLACKOUT   (0xffL<<0)
 
#define BNX2_DMA_BLACKOUT_2ND_RD_RETRY_BLACKOUT   (0xffL<<8)
 
#define BNX2_DMA_BLACKOUT_WR_RETRY_BLACKOUT   (0xffL<<16)
 
#define BNX2_DMA_READ_MASTER_SETTING_0   0x00000c10
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_NO_SNOOP   (1L<<0)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_RELAX_ORDER   (1L<<1)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_PRIORITY   (1L<<2)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_TRAFFIC_CLASS   (0x7L<<4)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_PARAM_EN   (1L<<7)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_NO_SNOOP   (1L<<8)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_RELAX_ORDER   (1L<<9)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_PRIORITY   (1L<<10)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_TRAFFIC_CLASS   (0x7L<<12)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_PARAM_EN   (1L<<15)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_NO_SNOOP   (1L<<16)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_RELAX_ORDER   (1L<<17)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_PRIORITY   (1L<<18)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_TRAFFIC_CLASS   (0x7L<<20)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_PARAM_EN   (1L<<23)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_NO_SNOOP   (1L<<24)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_RELAX_ORDER   (1L<<25)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_PRIORITY   (1L<<26)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_TRAFFIC_CLASS   (0x7L<<28)
 
#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_PARAM_EN   (1L<<31)
 
#define BNX2_DMA_READ_MASTER_SETTING_1   0x00000c14
 
#define BNX2_DMA_READ_MASTER_SETTING_1_COM_NO_SNOOP   (1L<<0)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_COM_RELAX_ORDER   (1L<<1)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_COM_PRIORITY   (1L<<2)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_COM_TRAFFIC_CLASS   (0x7L<<4)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_COM_PARAM_EN   (1L<<7)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_CP_NO_SNOOP   (1L<<8)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_CP_RELAX_ORDER   (1L<<9)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_CP_PRIORITY   (1L<<10)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_CP_TRAFFIC_CLASS   (0x7L<<12)
 
#define BNX2_DMA_READ_MASTER_SETTING_1_CP_PARAM_EN   (1L<<15)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0   0x00000c18
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_NO_SNOOP   (1L<<0)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_RELAX_ORDER   (1L<<1)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_PRIORITY   (1L<<2)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_CS_VLD   (1L<<3)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_TRAFFIC_CLASS   (0x7L<<4)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_PARAM_EN   (1L<<7)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_NO_SNOOP   (1L<<8)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_RELAX_ORDER   (1L<<9)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_PRIORITY   (1L<<10)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_CS_VLD   (1L<<11)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_TRAFFIC_CLASS   (0x7L<<12)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_PARAM_EN   (1L<<15)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_NO_SNOOP   (1L<<24)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_RELAX_ORDER   (1L<<25)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_PRIORITY   (1L<<26)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_CS_VLD   (1L<<27)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_TRAFFIC_CLASS   (0x7L<<28)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_PARAM_EN   (1L<<31)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1   0x00000c1c
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_NO_SNOOP   (1L<<0)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_RELAX_ORDER   (1L<<1)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_PRIORITY   (1L<<2)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_CS_VLD   (1L<<3)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_TRAFFIC_CLASS   (0x7L<<4)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_PARAM_EN   (1L<<7)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_NO_SNOOP   (1L<<8)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_RELAX_ORDER   (1L<<9)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_PRIORITY   (1L<<10)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_CS_VLD   (1L<<11)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_TRAFFIC_CLASS   (0x7L<<12)
 
#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_PARAM_EN   (1L<<15)
 
#define BNX2_DMA_ARBITER   0x00000c20
 
#define BNX2_DMA_ARBITER_NUM_READS   (0x7L<<0)
 
#define BNX2_DMA_ARBITER_WR_ARB_MODE   (1L<<4)
 
#define BNX2_DMA_ARBITER_WR_ARB_MODE_STRICT   (0L<<4)
 
#define BNX2_DMA_ARBITER_WR_ARB_MODE_RND_RBN   (1L<<4)
 
#define BNX2_DMA_ARBITER_RD_ARB_MODE   (0x3L<<5)
 
#define BNX2_DMA_ARBITER_RD_ARB_MODE_STRICT   (0L<<5)
 
#define BNX2_DMA_ARBITER_RD_ARB_MODE_RND_RBN   (1L<<5)
 
#define BNX2_DMA_ARBITER_RD_ARB_MODE_WGT_RND_RBN   (2L<<5)
 
#define BNX2_DMA_ARBITER_ALT_MODE_EN   (1L<<8)
 
#define BNX2_DMA_ARBITER_RR_MODE   (1L<<9)
 
#define BNX2_DMA_ARBITER_TIMER_MODE   (1L<<10)
 
#define BNX2_DMA_ARBITER_OUSTD_READ_REQ   (0xfL<<12)
 
#define BNX2_DMA_ARB_TIMERS   0x00000c24
 
#define BNX2_DMA_ARB_TIMERS_RD_DRR_WAIT_TIME   (0xffL<<0)
 
#define BNX2_DMA_ARB_TIMERS_TM_MIN_TIMEOUT   (0xffL<<12)
 
#define BNX2_DMA_ARB_TIMERS_TM_MAX_TIMEOUT   (0xfffL<<20)
 
#define BNX2_DMA_DEBUG_VECT_PEEK   0x00000c2c
 
#define BNX2_DMA_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_DMA_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_DMA_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_DMA_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_DMA_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_DMA_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_DMA_TAG_RAM_00   0x00000c30
 
#define BNX2_DMA_TAG_RAM_00_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_00_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_00_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_00_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_00_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_00_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_00_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_00_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_00_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_00_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_00_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_00_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_00_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_00_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_01   0x00000c34
 
#define BNX2_DMA_TAG_RAM_01_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_01_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_01_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_01_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_01_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_01_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_01_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_01_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_01_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_01_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_01_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_01_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_01_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_01_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_02   0x00000c38
 
#define BNX2_DMA_TAG_RAM_02_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_02_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_02_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_02_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_02_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_02_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_02_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_02_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_02_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_02_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_02_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_02_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_02_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_02_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_03   0x00000c3c
 
#define BNX2_DMA_TAG_RAM_03_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_03_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_03_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_03_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_03_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_03_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_03_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_03_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_03_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_03_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_03_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_03_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_03_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_03_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_04   0x00000c40
 
#define BNX2_DMA_TAG_RAM_04_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_04_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_04_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_04_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_04_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_04_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_04_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_04_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_04_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_04_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_04_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_04_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_04_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_04_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_05   0x00000c44
 
#define BNX2_DMA_TAG_RAM_05_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_05_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_05_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_05_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_05_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_05_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_05_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_05_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_05_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_05_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_05_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_05_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_05_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_05_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_06   0x00000c48
 
#define BNX2_DMA_TAG_RAM_06_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_06_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_06_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_06_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_06_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_06_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_06_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_06_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_06_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_06_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_06_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_06_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_06_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_06_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_07   0x00000c4c
 
#define BNX2_DMA_TAG_RAM_07_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_07_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_07_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_07_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_07_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_07_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_07_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_07_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_07_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_07_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_07_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_07_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_07_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_07_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_08   0x00000c50
 
#define BNX2_DMA_TAG_RAM_08_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_08_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_08_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_08_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_08_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_08_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_08_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_08_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_08_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_08_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_08_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_08_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_08_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_08_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_09   0x00000c54
 
#define BNX2_DMA_TAG_RAM_09_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_09_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_09_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_09_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_09_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_09_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_09_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_09_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_09_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_09_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_09_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_09_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_09_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_09_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_10   0x00000c58
 
#define BNX2_DMA_TAG_RAM_10_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_10_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_10_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_10_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_10_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_10_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_10_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_10_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_10_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_10_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_10_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_10_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_10_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_10_VALID   (1L<<10)
 
#define BNX2_DMA_TAG_RAM_11   0x00000c5c
 
#define BNX2_DMA_TAG_RAM_11_CHANNEL   (0xfL<<0)
 
#define BNX2_DMA_TAG_RAM_11_MASTER   (0x7L<<4)
 
#define BNX2_DMA_TAG_RAM_11_MASTER_CTX   (0L<<4)
 
#define BNX2_DMA_TAG_RAM_11_MASTER_RBDC   (1L<<4)
 
#define BNX2_DMA_TAG_RAM_11_MASTER_TBDC   (2L<<4)
 
#define BNX2_DMA_TAG_RAM_11_MASTER_COM   (3L<<4)
 
#define BNX2_DMA_TAG_RAM_11_MASTER_CP   (4L<<4)
 
#define BNX2_DMA_TAG_RAM_11_MASTER_TDMA   (5L<<4)
 
#define BNX2_DMA_TAG_RAM_11_SWAP   (0x3L<<7)
 
#define BNX2_DMA_TAG_RAM_11_SWAP_CONFIG   (0L<<7)
 
#define BNX2_DMA_TAG_RAM_11_SWAP_DATA   (1L<<7)
 
#define BNX2_DMA_TAG_RAM_11_SWAP_CONTROL   (2L<<7)
 
#define BNX2_DMA_TAG_RAM_11_FUNCTION   (1L<<9)
 
#define BNX2_DMA_TAG_RAM_11_VALID   (1L<<10)
 
#define BNX2_DMA_RCHAN_STAT_22   0x00000c60
 
#define BNX2_DMA_RCHAN_STAT_30   0x00000c64
 
#define BNX2_DMA_RCHAN_STAT_31   0x00000c68
 
#define BNX2_DMA_RCHAN_STAT_32   0x00000c6c
 
#define BNX2_DMA_RCHAN_STAT_40   0x00000c70
 
#define BNX2_DMA_RCHAN_STAT_41   0x00000c74
 
#define BNX2_DMA_RCHAN_STAT_42   0x00000c78
 
#define BNX2_DMA_RCHAN_STAT_50   0x00000c7c
 
#define BNX2_DMA_RCHAN_STAT_51   0x00000c80
 
#define BNX2_DMA_RCHAN_STAT_52   0x00000c84
 
#define BNX2_DMA_RCHAN_STAT_60   0x00000c88
 
#define BNX2_DMA_RCHAN_STAT_61   0x00000c8c
 
#define BNX2_DMA_RCHAN_STAT_62   0x00000c90
 
#define BNX2_DMA_RCHAN_STAT_70   0x00000c94
 
#define BNX2_DMA_RCHAN_STAT_71   0x00000c98
 
#define BNX2_DMA_RCHAN_STAT_72   0x00000c9c
 
#define BNX2_DMA_WCHAN_STAT_00   0x00000ca0
 
#define BNX2_DMA_WCHAN_STAT_00_WCHAN_STA_HOST_ADDR_LOW   (0xffffffffL<<0)
 
#define BNX2_DMA_WCHAN_STAT_01   0x00000ca4
 
#define BNX2_DMA_WCHAN_STAT_01_WCHAN_STA_HOST_ADDR_HIGH   (0xffffffffL<<0)
 
#define BNX2_DMA_WCHAN_STAT_02   0x00000ca8
 
#define BNX2_DMA_WCHAN_STAT_02_LENGTH   (0xffffL<<0)
 
#define BNX2_DMA_WCHAN_STAT_02_WORD_SWAP   (1L<<16)
 
#define BNX2_DMA_WCHAN_STAT_02_BYTE_SWAP   (1L<<17)
 
#define BNX2_DMA_WCHAN_STAT_02_PRIORITY_LVL   (1L<<18)
 
#define BNX2_DMA_WCHAN_STAT_10   0x00000cac
 
#define BNX2_DMA_WCHAN_STAT_11   0x00000cb0
 
#define BNX2_DMA_WCHAN_STAT_12   0x00000cb4
 
#define BNX2_DMA_WCHAN_STAT_20   0x00000cb8
 
#define BNX2_DMA_WCHAN_STAT_21   0x00000cbc
 
#define BNX2_DMA_WCHAN_STAT_22   0x00000cc0
 
#define BNX2_DMA_WCHAN_STAT_30   0x00000cc4
 
#define BNX2_DMA_WCHAN_STAT_31   0x00000cc8
 
#define BNX2_DMA_WCHAN_STAT_32   0x00000ccc
 
#define BNX2_DMA_WCHAN_STAT_40   0x00000cd0
 
#define BNX2_DMA_WCHAN_STAT_41   0x00000cd4
 
#define BNX2_DMA_WCHAN_STAT_42   0x00000cd8
 
#define BNX2_DMA_WCHAN_STAT_50   0x00000cdc
 
#define BNX2_DMA_WCHAN_STAT_51   0x00000ce0
 
#define BNX2_DMA_WCHAN_STAT_52   0x00000ce4
 
#define BNX2_DMA_WCHAN_STAT_60   0x00000ce8
 
#define BNX2_DMA_WCHAN_STAT_61   0x00000cec
 
#define BNX2_DMA_WCHAN_STAT_62   0x00000cf0
 
#define BNX2_DMA_WCHAN_STAT_70   0x00000cf4
 
#define BNX2_DMA_WCHAN_STAT_71   0x00000cf8
 
#define BNX2_DMA_WCHAN_STAT_72   0x00000cfc
 
#define BNX2_DMA_ARB_STAT_00   0x00000d00
 
#define BNX2_DMA_ARB_STAT_00_MASTER   (0xffffL<<0)
 
#define BNX2_DMA_ARB_STAT_00_MASTER_ENC   (0xffL<<16)
 
#define BNX2_DMA_ARB_STAT_00_CUR_BINMSTR   (0xffL<<24)
 
#define BNX2_DMA_ARB_STAT_01   0x00000d04
 
#define BNX2_DMA_ARB_STAT_01_LPR_RPTR   (0xfL<<0)
 
#define BNX2_DMA_ARB_STAT_01_LPR_WPTR   (0xfL<<4)
 
#define BNX2_DMA_ARB_STAT_01_LPB_RPTR   (0xfL<<8)
 
#define BNX2_DMA_ARB_STAT_01_LPB_WPTR   (0xfL<<12)
 
#define BNX2_DMA_ARB_STAT_01_HPR_RPTR   (0xfL<<16)
 
#define BNX2_DMA_ARB_STAT_01_HPR_WPTR   (0xfL<<20)
 
#define BNX2_DMA_ARB_STAT_01_HPB_RPTR   (0xfL<<24)
 
#define BNX2_DMA_ARB_STAT_01_HPB_WPTR   (0xfL<<28)
 
#define BNX2_DMA_FUSE_CTRL0_CMD   0x00000f00
 
#define BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_DONE   (1L<<0)
 
#define BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_DONE   (1L<<1)
 
#define BNX2_DMA_FUSE_CTRL0_CMD_SHIFT   (1L<<2)
 
#define BNX2_DMA_FUSE_CTRL0_CMD_LOAD   (1L<<3)
 
#define BNX2_DMA_FUSE_CTRL0_CMD_SEL   (0xfL<<8)
 
#define BNX2_DMA_FUSE_CTRL0_DATA   0x00000f04
 
#define BNX2_DMA_FUSE_CTRL1_CMD   0x00000f08
 
#define BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_DONE   (1L<<0)
 
#define BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_DONE   (1L<<1)
 
#define BNX2_DMA_FUSE_CTRL1_CMD_SHIFT   (1L<<2)
 
#define BNX2_DMA_FUSE_CTRL1_CMD_LOAD   (1L<<3)
 
#define BNX2_DMA_FUSE_CTRL1_CMD_SEL   (0xfL<<8)
 
#define BNX2_DMA_FUSE_CTRL1_DATA   0x00000f0c
 
#define BNX2_DMA_FUSE_CTRL2_CMD   0x00000f10
 
#define BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_DONE   (1L<<0)
 
#define BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_DONE   (1L<<1)
 
#define BNX2_DMA_FUSE_CTRL2_CMD_SHIFT   (1L<<2)
 
#define BNX2_DMA_FUSE_CTRL2_CMD_LOAD   (1L<<3)
 
#define BNX2_DMA_FUSE_CTRL2_CMD_SEL   (0xfL<<8)
 
#define BNX2_DMA_FUSE_CTRL2_DATA   0x00000f14
 
#define BNX2_CTX_COMMAND   0x00001000
 
#define BNX2_CTX_COMMAND_ENABLED   (1L<<0)
 
#define BNX2_CTX_COMMAND_DISABLE_USAGE_CNT   (1L<<1)
 
#define BNX2_CTX_COMMAND_DISABLE_PLRU   (1L<<2)
 
#define BNX2_CTX_COMMAND_DISABLE_COMBINE_READ   (1L<<3)
 
#define BNX2_CTX_COMMAND_FLUSH_AHEAD   (0x1fL<<8)
 
#define BNX2_CTX_COMMAND_MEM_INIT   (1L<<13)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE   (0xfL<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_256   (0L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_512   (1L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_1K   (2L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_2K   (3L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_4K   (4L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_8K   (5L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_16K   (6L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_32K   (7L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_64K   (8L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_128K   (9L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_256K   (10L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_512K   (11L<<16)
 
#define BNX2_CTX_COMMAND_PAGE_SIZE_1M   (12L<<16)
 
#define BNX2_CTX_STATUS   0x00001004
 
#define BNX2_CTX_STATUS_LOCK_WAIT   (1L<<0)
 
#define BNX2_CTX_STATUS_READ_STAT   (1L<<16)
 
#define BNX2_CTX_STATUS_WRITE_STAT   (1L<<17)
 
#define BNX2_CTX_STATUS_ACC_STALL_STAT   (1L<<18)
 
#define BNX2_CTX_STATUS_LOCK_STALL_STAT   (1L<<19)
 
#define BNX2_CTX_STATUS_EXT_READ_STAT   (1L<<20)
 
#define BNX2_CTX_STATUS_EXT_WRITE_STAT   (1L<<21)
 
#define BNX2_CTX_STATUS_MISS_STAT   (1L<<22)
 
#define BNX2_CTX_STATUS_HIT_STAT   (1L<<23)
 
#define BNX2_CTX_STATUS_DEAD_LOCK   (1L<<24)
 
#define BNX2_CTX_STATUS_USAGE_CNT_ERR   (1L<<25)
 
#define BNX2_CTX_STATUS_INVALID_PAGE   (1L<<26)
 
#define BNX2_CTX_VIRT_ADDR   0x00001008
 
#define BNX2_CTX_VIRT_ADDR_VIRT_ADDR   (0x7fffL<<6)
 
#define BNX2_CTX_PAGE_TBL   0x0000100c
 
#define BNX2_CTX_PAGE_TBL_PAGE_TBL   (0x3fffL<<6)
 
#define BNX2_CTX_DATA_ADR   0x00001010
 
#define BNX2_CTX_DATA_ADR_DATA_ADR   (0x7ffffL<<2)
 
#define BNX2_CTX_DATA   0x00001014
 
#define BNX2_CTX_LOCK   0x00001018
 
#define BNX2_CTX_LOCK_TYPE   (0x7L<<0)
 
#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VOID   (0x0L<<0)
 
#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PROTOCOL   (0x1L<<0)
 
#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX   (0x2L<<0)
 
#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TIMER   (0x4L<<0)
 
#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_COMPLETE   (0x7L<<0)
 
#define BNX2_CTX_LOCK_TYPE_VOID_XI   (0L<<0)
 
#define BNX2_CTX_LOCK_TYPE_PROTOCOL_XI   (1L<<0)
 
#define BNX2_CTX_LOCK_TYPE_TX_XI   (2L<<0)
 
#define BNX2_CTX_LOCK_TYPE_TIMER_XI   (4L<<0)
 
#define BNX2_CTX_LOCK_TYPE_COMPLETE_XI   (7L<<0)
 
#define BNX2_CTX_LOCK_CID_VALUE   (0x3fffL<<7)
 
#define BNX2_CTX_LOCK_GRANTED   (1L<<26)
 
#define BNX2_CTX_LOCK_MODE   (0x7L<<27)
 
#define BNX2_CTX_LOCK_MODE_UNLOCK   (0x0L<<27)
 
#define BNX2_CTX_LOCK_MODE_IMMEDIATE   (0x1L<<27)
 
#define BNX2_CTX_LOCK_MODE_SURE   (0x2L<<27)
 
#define BNX2_CTX_LOCK_STATUS   (1L<<30)
 
#define BNX2_CTX_LOCK_REQ   (1L<<31)
 
#define BNX2_CTX_CTX_CTRL   0x0000101c
 
#define BNX2_CTX_CTX_CTRL_CTX_ADDR   (0x7ffffL<<2)
 
#define BNX2_CTX_CTX_CTRL_MOD_USAGE_CNT   (0x3L<<21)
 
#define BNX2_CTX_CTX_CTRL_NO_RAM_ACC   (1L<<23)
 
#define BNX2_CTX_CTX_CTRL_PREFETCH_SIZE   (0x3L<<24)
 
#define BNX2_CTX_CTX_CTRL_ATTR   (1L<<26)
 
#define BNX2_CTX_CTX_CTRL_WRITE_REQ   (1L<<30)
 
#define BNX2_CTX_CTX_CTRL_READ_REQ   (1L<<31)
 
#define BNX2_CTX_CTX_DATA   0x00001020
 
#define BNX2_CTX_ACCESS_STATUS   0x00001040
 
#define BNX2_CTX_ACCESS_STATUS_MASTERENCODED   (0xfL<<0)
 
#define BNX2_CTX_ACCESS_STATUS_ACCESSMEMORYSM   (0x3L<<10)
 
#define BNX2_CTX_ACCESS_STATUS_PAGETABLEINITSM   (0x3L<<12)
 
#define BNX2_CTX_ACCESS_STATUS_ACCESSMEMORYINITSM   (0x3L<<14)
 
#define BNX2_CTX_ACCESS_STATUS_QUALIFIED_REQUEST   (0x7ffL<<17)
 
#define BNX2_CTX_ACCESS_STATUS_CAMMASTERENCODED_XI   (0x1fL<<0)
 
#define BNX2_CTX_ACCESS_STATUS_CACHEMASTERENCODED_XI   (0x1fL<<5)
 
#define BNX2_CTX_ACCESS_STATUS_REQUEST_XI   (0x3fffffL<<10)
 
#define BNX2_CTX_DBG_LOCK_STATUS   0x00001044
 
#define BNX2_CTX_DBG_LOCK_STATUS_SM   (0x3ffL<<0)
 
#define BNX2_CTX_DBG_LOCK_STATUS_MATCH   (0x3ffL<<22)
 
#define BNX2_CTX_CACHE_CTRL_STATUS   0x00001048
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RFIFO_OVERFLOW   (1L<<0)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_INVALID_READ_COMP   (1L<<1)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_FLUSH_START   (1L<<6)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_FREE_ENTRY_CNT   (0x3fL<<7)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_CACHE_ENTRY_NEEDED   (0x3fL<<13)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN0_ACTIVE   (1L<<19)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN1_ACTIVE   (1L<<20)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN2_ACTIVE   (1L<<21)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN3_ACTIVE   (1L<<22)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN4_ACTIVE   (1L<<23)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN5_ACTIVE   (1L<<24)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN6_ACTIVE   (1L<<25)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN7_ACTIVE   (1L<<26)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN8_ACTIVE   (1L<<27)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN9_ACTIVE   (1L<<28)
 
#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN10_ACTIVE   (1L<<29)
 
#define BNX2_CTX_CACHE_CTRL_SM_STATUS   0x0000104c
 
#define BNX2_CTX_CACHE_CTRL_SM_STATUS_CS_DWC   (0x7L<<0)
 
#define BNX2_CTX_CACHE_CTRL_SM_STATUS_CS_WFIFOC   (0x7L<<3)
 
#define BNX2_CTX_CACHE_CTRL_SM_STATUS_CS_RTAGC   (0x7L<<6)
 
#define BNX2_CTX_CACHE_CTRL_SM_STATUS_CS_RFIFOC   (0x7L<<9)
 
#define BNX2_CTX_CACHE_CTRL_SM_STATUS_INVALID_BLK_ADDR   (0x7fffL<<16)
 
#define BNX2_CTX_CACHE_STATUS   0x00001050
 
#define BNX2_CTX_CACHE_STATUS_HELD_ENTRIES   (0x3ffL<<0)
 
#define BNX2_CTX_CACHE_STATUS_MAX_HELD_ENTRIES   (0x3ffL<<16)
 
#define BNX2_CTX_DMA_STATUS   0x00001054
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN0_STATUS   (0x3L<<0)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN1_STATUS   (0x3L<<2)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN2_STATUS   (0x3L<<4)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN3_STATUS   (0x3L<<6)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN4_STATUS   (0x3L<<8)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN5_STATUS   (0x3L<<10)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN6_STATUS   (0x3L<<12)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN7_STATUS   (0x3L<<14)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN8_STATUS   (0x3L<<16)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN9_STATUS   (0x3L<<18)
 
#define BNX2_CTX_DMA_STATUS_RD_CHAN10_STATUS   (0x3L<<20)
 
#define BNX2_CTX_REP_STATUS   0x00001058
 
#define BNX2_CTX_REP_STATUS_ERROR_ENTRY   (0x3ffL<<0)
 
#define BNX2_CTX_REP_STATUS_ERROR_CLIENT_ID   (0x1fL<<10)
 
#define BNX2_CTX_REP_STATUS_USAGE_CNT_MAX_ERR   (1L<<16)
 
#define BNX2_CTX_REP_STATUS_USAGE_CNT_MIN_ERR   (1L<<17)
 
#define BNX2_CTX_REP_STATUS_USAGE_CNT_MISS_ERR   (1L<<18)
 
#define BNX2_CTX_CKSUM_ERROR_STATUS   0x0000105c
 
#define BNX2_CTX_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)
 
#define BNX2_CTX_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)
 
#define BNX2_CTX_CHNL_LOCK_STATUS_0   0x00001080
 
#define BNX2_CTX_CHNL_LOCK_STATUS_0_CID   (0x3fffL<<0)
 
#define BNX2_CTX_CHNL_LOCK_STATUS_0_TYPE   (0x3L<<14)
 
#define BNX2_CTX_CHNL_LOCK_STATUS_0_MODE   (1L<<16)
 
#define BNX2_CTX_CHNL_LOCK_STATUS_0_MODE_XI   (1L<<14)
 
#define BNX2_CTX_CHNL_LOCK_STATUS_0_TYPE_XI   (0x7L<<15)
 
#define BNX2_CTX_CHNL_LOCK_STATUS_1   0x00001084
 
#define BNX2_CTX_CHNL_LOCK_STATUS_2   0x00001088
 
#define BNX2_CTX_CHNL_LOCK_STATUS_3   0x0000108c
 
#define BNX2_CTX_CHNL_LOCK_STATUS_4   0x00001090
 
#define BNX2_CTX_CHNL_LOCK_STATUS_5   0x00001094
 
#define BNX2_CTX_CHNL_LOCK_STATUS_6   0x00001098
 
#define BNX2_CTX_CHNL_LOCK_STATUS_7   0x0000109c
 
#define BNX2_CTX_CHNL_LOCK_STATUS_8   0x000010a0
 
#define BNX2_CTX_CHNL_LOCK_STATUS_9   0x000010a4
 
#define BNX2_CTX_CACHE_DATA   0x000010c4
 
#define BNX2_CTX_HOST_PAGE_TBL_CTRL   0x000010c8
 
#define BNX2_CTX_HOST_PAGE_TBL_CTRL_PAGE_TBL_ADDR   (0x1ffL<<0)
 
#define BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ   (1L<<30)
 
#define BNX2_CTX_HOST_PAGE_TBL_CTRL_READ_REQ   (1L<<31)
 
#define BNX2_CTX_HOST_PAGE_TBL_DATA0   0x000010cc
 
#define BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID   (1L<<0)
 
#define BNX2_CTX_HOST_PAGE_TBL_DATA0_VALUE   (0xffffffL<<8)
 
#define BNX2_CTX_HOST_PAGE_TBL_DATA1   0x000010d0
 
#define BNX2_CTX_CAM_CTRL   0x000010d4
 
#define BNX2_CTX_CAM_CTRL_CAM_ADDR   (0x3ffL<<0)
 
#define BNX2_CTX_CAM_CTRL_RESET   (1L<<27)
 
#define BNX2_CTX_CAM_CTRL_INVALIDATE   (1L<<28)
 
#define BNX2_CTX_CAM_CTRL_SEARCH   (1L<<29)
 
#define BNX2_CTX_CAM_CTRL_WRITE_REQ   (1L<<30)
 
#define BNX2_CTX_CAM_CTRL_READ_REQ   (1L<<31)
 
#define BNX2_EMAC_MODE   0x00001400
 
#define BNX2_EMAC_MODE_RESET   (1L<<0)
 
#define BNX2_EMAC_MODE_HALF_DUPLEX   (1L<<1)
 
#define BNX2_EMAC_MODE_PORT   (0x3L<<2)
 
#define BNX2_EMAC_MODE_PORT_NONE   (0L<<2)
 
#define BNX2_EMAC_MODE_PORT_MII   (1L<<2)
 
#define BNX2_EMAC_MODE_PORT_GMII   (2L<<2)
 
#define BNX2_EMAC_MODE_PORT_MII_10M   (3L<<2)
 
#define BNX2_EMAC_MODE_MAC_LOOP   (1L<<4)
 
#define BNX2_EMAC_MODE_25G_MODE   (1L<<5)
 
#define BNX2_EMAC_MODE_TAGGED_MAC_CTL   (1L<<7)
 
#define BNX2_EMAC_MODE_TX_BURST   (1L<<8)
 
#define BNX2_EMAC_MODE_MAX_DEFER_DROP_ENA   (1L<<9)
 
#define BNX2_EMAC_MODE_EXT_LINK_POL   (1L<<10)
 
#define BNX2_EMAC_MODE_FORCE_LINK   (1L<<11)
 
#define BNX2_EMAC_MODE_SERDES_MODE   (1L<<12)
 
#define BNX2_EMAC_MODE_BOND_OVRD   (1L<<13)
 
#define BNX2_EMAC_MODE_MPKT   (1L<<18)
 
#define BNX2_EMAC_MODE_MPKT_RCVD   (1L<<19)
 
#define BNX2_EMAC_MODE_ACPI_RCVD   (1L<<20)
 
#define BNX2_EMAC_STATUS   0x00001404
 
#define BNX2_EMAC_STATUS_LINK   (1L<<11)
 
#define BNX2_EMAC_STATUS_LINK_CHANGE   (1L<<12)
 
#define BNX2_EMAC_STATUS_SERDES_AUTONEG_COMPLETE   (1L<<13)
 
#define BNX2_EMAC_STATUS_SERDES_AUTONEG_CHANGE   (1L<<14)
 
#define BNX2_EMAC_STATUS_SERDES_NXT_PG_CHANGE   (1L<<16)
 
#define BNX2_EMAC_STATUS_SERDES_RX_CONFIG_IS_0   (1L<<17)
 
#define BNX2_EMAC_STATUS_SERDES_RX_CONFIG_IS_0_CHANGE   (1L<<18)
 
#define BNX2_EMAC_STATUS_MI_COMPLETE   (1L<<22)
 
#define BNX2_EMAC_STATUS_MI_INT   (1L<<23)
 
#define BNX2_EMAC_STATUS_AP_ERROR   (1L<<24)
 
#define BNX2_EMAC_STATUS_PARITY_ERROR_STATE   (1L<<31)
 
#define BNX2_EMAC_ATTENTION_ENA   0x00001408
 
#define BNX2_EMAC_ATTENTION_ENA_LINK   (1L<<11)
 
#define BNX2_EMAC_ATTENTION_ENA_AUTONEG_CHANGE   (1L<<14)
 
#define BNX2_EMAC_ATTENTION_ENA_NXT_PG_CHANGE   (1L<<16)
 
#define BNX2_EMAC_ATTENTION_ENA_SERDES_RX_CONFIG_IS_0_CHANGE   (1L<<18)
 
#define BNX2_EMAC_ATTENTION_ENA_MI_COMPLETE   (1L<<22)
 
#define BNX2_EMAC_ATTENTION_ENA_MI_INT   (1L<<23)
 
#define BNX2_EMAC_ATTENTION_ENA_AP_ERROR   (1L<<24)
 
#define BNX2_EMAC_LED   0x0000140c
 
#define BNX2_EMAC_LED_OVERRIDE   (1L<<0)
 
#define BNX2_EMAC_LED_1000MB_OVERRIDE   (1L<<1)
 
#define BNX2_EMAC_LED_100MB_OVERRIDE   (1L<<2)
 
#define BNX2_EMAC_LED_10MB_OVERRIDE   (1L<<3)
 
#define BNX2_EMAC_LED_TRAFFIC_OVERRIDE   (1L<<4)
 
#define BNX2_EMAC_LED_BLNK_TRAFFIC   (1L<<5)
 
#define BNX2_EMAC_LED_TRAFFIC   (1L<<6)
 
#define BNX2_EMAC_LED_1000MB   (1L<<7)
 
#define BNX2_EMAC_LED_100MB   (1L<<8)
 
#define BNX2_EMAC_LED_10MB   (1L<<9)
 
#define BNX2_EMAC_LED_TRAFFIC_STAT   (1L<<10)
 
#define BNX2_EMAC_LED_2500MB   (1L<<11)
 
#define BNX2_EMAC_LED_2500MB_OVERRIDE   (1L<<12)
 
#define BNX2_EMAC_LED_ACTIVITY_SEL   (0x3L<<17)
 
#define BNX2_EMAC_LED_ACTIVITY_SEL_0   (0L<<17)
 
#define BNX2_EMAC_LED_ACTIVITY_SEL_1   (1L<<17)
 
#define BNX2_EMAC_LED_ACTIVITY_SEL_2   (2L<<17)
 
#define BNX2_EMAC_LED_ACTIVITY_SEL_3   (3L<<17)
 
#define BNX2_EMAC_LED_BLNK_RATE   (0xfffL<<19)
 
#define BNX2_EMAC_LED_BLNK_RATE_ENA   (1L<<31)
 
#define BNX2_EMAC_MAC_MATCH0   0x00001410
 
#define BNX2_EMAC_MAC_MATCH1   0x00001414
 
#define BNX2_EMAC_MAC_MATCH2   0x00001418
 
#define BNX2_EMAC_MAC_MATCH3   0x0000141c
 
#define BNX2_EMAC_MAC_MATCH4   0x00001420
 
#define BNX2_EMAC_MAC_MATCH5   0x00001424
 
#define BNX2_EMAC_MAC_MATCH6   0x00001428
 
#define BNX2_EMAC_MAC_MATCH7   0x0000142c
 
#define BNX2_EMAC_MAC_MATCH8   0x00001430
 
#define BNX2_EMAC_MAC_MATCH9   0x00001434
 
#define BNX2_EMAC_MAC_MATCH10   0x00001438
 
#define BNX2_EMAC_MAC_MATCH11   0x0000143c
 
#define BNX2_EMAC_MAC_MATCH12   0x00001440
 
#define BNX2_EMAC_MAC_MATCH13   0x00001444
 
#define BNX2_EMAC_MAC_MATCH14   0x00001448
 
#define BNX2_EMAC_MAC_MATCH15   0x0000144c
 
#define BNX2_EMAC_MAC_MATCH16   0x00001450
 
#define BNX2_EMAC_MAC_MATCH17   0x00001454
 
#define BNX2_EMAC_MAC_MATCH18   0x00001458
 
#define BNX2_EMAC_MAC_MATCH19   0x0000145c
 
#define BNX2_EMAC_MAC_MATCH20   0x00001460
 
#define BNX2_EMAC_MAC_MATCH21   0x00001464
 
#define BNX2_EMAC_MAC_MATCH22   0x00001468
 
#define BNX2_EMAC_MAC_MATCH23   0x0000146c
 
#define BNX2_EMAC_MAC_MATCH24   0x00001470
 
#define BNX2_EMAC_MAC_MATCH25   0x00001474
 
#define BNX2_EMAC_MAC_MATCH26   0x00001478
 
#define BNX2_EMAC_MAC_MATCH27   0x0000147c
 
#define BNX2_EMAC_MAC_MATCH28   0x00001480
 
#define BNX2_EMAC_MAC_MATCH29   0x00001484
 
#define BNX2_EMAC_MAC_MATCH30   0x00001488
 
#define BNX2_EMAC_MAC_MATCH31   0x0000148c
 
#define BNX2_EMAC_BACKOFF_SEED   0x00001498
 
#define BNX2_EMAC_BACKOFF_SEED_EMAC_BACKOFF_SEED   (0x3ffL<<0)
 
#define BNX2_EMAC_RX_MTU_SIZE   0x0000149c
 
#define BNX2_EMAC_RX_MTU_SIZE_MTU_SIZE   (0xffffL<<0)
 
#define BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA   (1L<<31)
 
#define BNX2_EMAC_SERDES_CNTL   0x000014a4
 
#define BNX2_EMAC_SERDES_CNTL_RXR   (0x7L<<0)
 
#define BNX2_EMAC_SERDES_CNTL_RXG   (0x3L<<3)
 
#define BNX2_EMAC_SERDES_CNTL_RXCKSEL   (1L<<6)
 
#define BNX2_EMAC_SERDES_CNTL_TXBIAS   (0x7L<<7)
 
#define BNX2_EMAC_SERDES_CNTL_BGMAX   (1L<<10)
 
#define BNX2_EMAC_SERDES_CNTL_BGMIN   (1L<<11)
 
#define BNX2_EMAC_SERDES_CNTL_TXMODE   (1L<<12)
 
#define BNX2_EMAC_SERDES_CNTL_TXEDGE   (1L<<13)
 
#define BNX2_EMAC_SERDES_CNTL_SERDES_MODE   (1L<<14)
 
#define BNX2_EMAC_SERDES_CNTL_PLLTEST   (1L<<15)
 
#define BNX2_EMAC_SERDES_CNTL_CDET_EN   (1L<<16)
 
#define BNX2_EMAC_SERDES_CNTL_TBI_LBK   (1L<<17)
 
#define BNX2_EMAC_SERDES_CNTL_REMOTE_LBK   (1L<<18)
 
#define BNX2_EMAC_SERDES_CNTL_REV_PHASE   (1L<<19)
 
#define BNX2_EMAC_SERDES_CNTL_REGCTL12   (0x3L<<20)
 
#define BNX2_EMAC_SERDES_CNTL_REGCTL25   (0x3L<<22)
 
#define BNX2_EMAC_SERDES_STATUS   0x000014a8
 
#define BNX2_EMAC_SERDES_STATUS_RX_STAT   (0xffL<<0)
 
#define BNX2_EMAC_SERDES_STATUS_COMMA_DET   (1L<<8)
 
#define BNX2_EMAC_MDIO_COMM   0x000014ac
 
#define BNX2_EMAC_MDIO_COMM_DATA   (0xffffL<<0)
 
#define BNX2_EMAC_MDIO_COMM_REG_ADDR   (0x1fL<<16)
 
#define BNX2_EMAC_MDIO_COMM_PHY_ADDR   (0x1fL<<21)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND   (0x3L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_UNDEFINED_0   (0L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_ADDRESS   (0L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_WRITE   (1L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_READ   (2L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_WRITE_22_XI   (1L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_WRITE_45_XI   (1L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_READ_22_XI   (2L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_READ_INC_45_XI   (2L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_UNDEFINED_3   (3L<<26)
 
#define BNX2_EMAC_MDIO_COMM_COMMAND_READ_45   (3L<<26)
 
#define BNX2_EMAC_MDIO_COMM_FAIL   (1L<<28)
 
#define BNX2_EMAC_MDIO_COMM_START_BUSY   (1L<<29)
 
#define BNX2_EMAC_MDIO_COMM_DISEXT   (1L<<30)
 
#define BNX2_EMAC_MDIO_STATUS   0x000014b0
 
#define BNX2_EMAC_MDIO_STATUS_LINK   (1L<<0)
 
#define BNX2_EMAC_MDIO_STATUS_10MB   (1L<<1)
 
#define BNX2_EMAC_MDIO_MODE   0x000014b4
 
#define BNX2_EMAC_MDIO_MODE_SHORT_PREAMBLE   (1L<<1)
 
#define BNX2_EMAC_MDIO_MODE_AUTO_POLL   (1L<<4)
 
#define BNX2_EMAC_MDIO_MODE_BIT_BANG   (1L<<8)
 
#define BNX2_EMAC_MDIO_MODE_MDIO   (1L<<9)
 
#define BNX2_EMAC_MDIO_MODE_MDIO_OE   (1L<<10)
 
#define BNX2_EMAC_MDIO_MODE_MDC   (1L<<11)
 
#define BNX2_EMAC_MDIO_MODE_MDINT   (1L<<12)
 
#define BNX2_EMAC_MDIO_MODE_EXT_MDINT   (1L<<13)
 
#define BNX2_EMAC_MDIO_MODE_CLOCK_CNT   (0x1fL<<16)
 
#define BNX2_EMAC_MDIO_MODE_CLOCK_CNT_XI   (0x3fL<<16)
 
#define BNX2_EMAC_MDIO_MODE_CLAUSE_45_XI   (1L<<31)
 
#define BNX2_EMAC_MDIO_AUTO_STATUS   0x000014b8
 
#define BNX2_EMAC_MDIO_AUTO_STATUS_AUTO_ERR   (1L<<0)
 
#define BNX2_EMAC_TX_MODE   0x000014bc
 
#define BNX2_EMAC_TX_MODE_RESET   (1L<<0)
 
#define BNX2_EMAC_TX_MODE_CS16_TEST   (1L<<2)
 
#define BNX2_EMAC_TX_MODE_EXT_PAUSE_EN   (1L<<3)
 
#define BNX2_EMAC_TX_MODE_FLOW_EN   (1L<<4)
 
#define BNX2_EMAC_TX_MODE_BIG_BACKOFF   (1L<<5)
 
#define BNX2_EMAC_TX_MODE_LONG_PAUSE   (1L<<6)
 
#define BNX2_EMAC_TX_MODE_LINK_AWARE   (1L<<7)
 
#define BNX2_EMAC_TX_STATUS   0x000014c0
 
#define BNX2_EMAC_TX_STATUS_XOFFED   (1L<<0)
 
#define BNX2_EMAC_TX_STATUS_XOFF_SENT   (1L<<1)
 
#define BNX2_EMAC_TX_STATUS_XON_SENT   (1L<<2)
 
#define BNX2_EMAC_TX_STATUS_LINK_UP   (1L<<3)
 
#define BNX2_EMAC_TX_STATUS_UNDERRUN   (1L<<4)
 
#define BNX2_EMAC_TX_STATUS_CS16_ERROR   (1L<<5)
 
#define BNX2_EMAC_TX_LENGTHS   0x000014c4
 
#define BNX2_EMAC_TX_LENGTHS_SLOT   (0xffL<<0)
 
#define BNX2_EMAC_TX_LENGTHS_IPG   (0xfL<<8)
 
#define BNX2_EMAC_TX_LENGTHS_IPG_CRS   (0x3L<<12)
 
#define BNX2_EMAC_RX_MODE   0x000014c8
 
#define BNX2_EMAC_RX_MODE_RESET   (1L<<0)
 
#define BNX2_EMAC_RX_MODE_FLOW_EN   (1L<<2)
 
#define BNX2_EMAC_RX_MODE_KEEP_MAC_CONTROL   (1L<<3)
 
#define BNX2_EMAC_RX_MODE_KEEP_PAUSE   (1L<<4)
 
#define BNX2_EMAC_RX_MODE_ACCEPT_OVERSIZE   (1L<<5)
 
#define BNX2_EMAC_RX_MODE_ACCEPT_RUNTS   (1L<<6)
 
#define BNX2_EMAC_RX_MODE_LLC_CHK   (1L<<7)
 
#define BNX2_EMAC_RX_MODE_PROMISCUOUS   (1L<<8)
 
#define BNX2_EMAC_RX_MODE_NO_CRC_CHK   (1L<<9)
 
#define BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG   (1L<<10)
 
#define BNX2_EMAC_RX_MODE_FILT_BROADCAST   (1L<<11)
 
#define BNX2_EMAC_RX_MODE_SORT_MODE   (1L<<12)
 
#define BNX2_EMAC_RX_STATUS   0x000014cc
 
#define BNX2_EMAC_RX_STATUS_FFED   (1L<<0)
 
#define BNX2_EMAC_RX_STATUS_FF_RECEIVED   (1L<<1)
 
#define BNX2_EMAC_RX_STATUS_N_RECEIVED   (1L<<2)
 
#define BNX2_EMAC_MULTICAST_HASH0   0x000014d0
 
#define BNX2_EMAC_MULTICAST_HASH1   0x000014d4
 
#define BNX2_EMAC_MULTICAST_HASH2   0x000014d8
 
#define BNX2_EMAC_MULTICAST_HASH3   0x000014dc
 
#define BNX2_EMAC_MULTICAST_HASH4   0x000014e0
 
#define BNX2_EMAC_MULTICAST_HASH5   0x000014e4
 
#define BNX2_EMAC_MULTICAST_HASH6   0x000014e8
 
#define BNX2_EMAC_MULTICAST_HASH7   0x000014ec
 
#define BNX2_EMAC_CKSUM_ERROR_STATUS   0x000014f0
 
#define BNX2_EMAC_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)
 
#define BNX2_EMAC_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)
 
#define BNX2_EMAC_RX_STAT_IFHCINOCTETS   0x00001500
 
#define BNX2_EMAC_RX_STAT_IFHCINBADOCTETS   0x00001504
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSFRAGMENTS   0x00001508
 
#define BNX2_EMAC_RX_STAT_IFHCINUCASTPKTS   0x0000150c
 
#define BNX2_EMAC_RX_STAT_IFHCINMULTICASTPKTS   0x00001510
 
#define BNX2_EMAC_RX_STAT_IFHCINBROADCASTPKTS   0x00001514
 
#define BNX2_EMAC_RX_STAT_DOT3STATSFCSERRORS   0x00001518
 
#define BNX2_EMAC_RX_STAT_DOT3STATSALIGNMENTERRORS   0x0000151c
 
#define BNX2_EMAC_RX_STAT_DOT3STATSCARRIERSENSEERRORS   0x00001520
 
#define BNX2_EMAC_RX_STAT_XONPAUSEFRAMESRECEIVED   0x00001524
 
#define BNX2_EMAC_RX_STAT_XOFFPAUSEFRAMESRECEIVED   0x00001528
 
#define BNX2_EMAC_RX_STAT_MACCONTROLFRAMESRECEIVED   0x0000152c
 
#define BNX2_EMAC_RX_STAT_XOFFSTATEENTERED   0x00001530
 
#define BNX2_EMAC_RX_STAT_DOT3STATSFRAMESTOOLONG   0x00001534
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSJABBERS   0x00001538
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSUNDERSIZEPKTS   0x0000153c
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS64OCTETS   0x00001540
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS   0x00001544
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS   0x00001548
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS   0x0000154c
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS   0x00001550
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS   0x00001554
 
#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTSOVER1522OCTETS   0x00001558
 
#define BNX2_EMAC_RXMAC_DEBUG0   0x0000155c
 
#define BNX2_EMAC_RXMAC_DEBUG1   0x00001560
 
#define BNX2_EMAC_RXMAC_DEBUG1_LENGTH_NE_BYTE_COUNT   (1L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG1_LENGTH_OUT_RANGE   (1L<<1)
 
#define BNX2_EMAC_RXMAC_DEBUG1_BAD_CRC   (1L<<2)
 
#define BNX2_EMAC_RXMAC_DEBUG1_RX_ERROR   (1L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ERROR   (1L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG1_LAST_DATA   (1L<<5)
 
#define BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE_START   (1L<<6)
 
#define BNX2_EMAC_RXMAC_DEBUG1_BYTE_COUNT   (0xffffL<<7)
 
#define BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIME   (0xffL<<23)
 
#define BNX2_EMAC_RXMAC_DEBUG2   0x00001564
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE   (0x7L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_IDLE   (0x0L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SFD   (0x1L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_DATA   (0x2L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SKEEP   (0x3L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_EXT   (0x4L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_DROP   (0x5L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SDROP   (0x6L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_FC   (0x7L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE   (0xfL<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_IDLE   (0x0L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA0   (0x1L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA1   (0x2L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA2   (0x3L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA3   (0x4L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_ABORT   (0x5L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_WAIT   (0x6L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_STATUS   (0x7L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_LAST   (0x8L<<3)
 
#define BNX2_EMAC_RXMAC_DEBUG2_BYTE_IN   (0xffL<<7)
 
#define BNX2_EMAC_RXMAC_DEBUG2_FALSEC   (1L<<15)
 
#define BNX2_EMAC_RXMAC_DEBUG2_TAGGED   (1L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE   (1L<<18)
 
#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE_IDLE   (0L<<18)
 
#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE_PAUSED   (1L<<18)
 
#define BNX2_EMAC_RXMAC_DEBUG2_SE_COUNTER   (0xfL<<19)
 
#define BNX2_EMAC_RXMAC_DEBUG2_QUANTA   (0x1fL<<23)
 
#define BNX2_EMAC_RXMAC_DEBUG3   0x00001568
 
#define BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CTR   (0xffffL<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUSE_CTR   (0xffffL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4   0x0000156c
 
#define BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIELD   (0xffffL<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE   (0x3fL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_IDLE   (0x0L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC2   (0x1L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC3   (0x2L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UNI   (0x3L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC3   (0x5L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA1   (0x6L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC2   (0x7L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA2   (0x7L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA3   (0x8L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC2   (0x9L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC3   (0xaL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT1   (0xeL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT2   (0xfL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MCHECK   (0x10L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC   (0x11L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC2   (0x12L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC3   (0x13L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA1   (0x14L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA2   (0x15L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA3   (0x16L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BTYPE   (0x17L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC   (0x18L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PTYPE   (0x19L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_CMD   (0x1aL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MAC   (0x1bL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_LATCH   (0x1cL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_XOFF   (0x1dL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_XON   (0x1eL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PAUSED   (0x1fL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_NPAUSED   (0x20L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_TTYPE   (0x21L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_TVAL   (0x22L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA1   (0x23L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA2   (0x24L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA3   (0x25L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTYPE   (0x26L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTTYPE   (0x27L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTVAL   (0x28L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MTYPE   (0x29L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_DROP   (0x2aL<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG4_DROP_PKT   (1L<<22)
 
#define BNX2_EMAC_RXMAC_DEBUG4_SLOT_FILLED   (1L<<23)
 
#define BNX2_EMAC_RXMAC_DEBUG4_FALSE_CARRIER   (1L<<24)
 
#define BNX2_EMAC_RXMAC_DEBUG4_LAST_DATA   (1L<<25)
 
#define BNX2_EMAC_RXMAC_DEBUG4_SFD_FOUND   (1L<<26)
 
#define BNX2_EMAC_RXMAC_DEBUG4_ADVANCE   (1L<<27)
 
#define BNX2_EMAC_RXMAC_DEBUG4_START   (1L<<28)
 
#define BNX2_EMAC_RXMAC_DEBUG5   0x00001570
 
#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM   (0x7L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_IDLE   (0L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_EOF   (1L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_STAT   (2L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4FCRC   (3L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4RDE   (4L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4ALL   (5L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_1WD_WAIT_STAT   (6L<<0)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1   (0x7L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_VDW   (0x0L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_STAT   (0x1L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_AEOF   (0x2L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_NEOF   (0x3L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SOF   (0x4L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SAEOF   (0x6L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SNEOF   (0x7L<<4)
 
#define BNX2_EMAC_RXMAC_DEBUG5_EOF_DETECTED   (1L<<7)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF0   (0x7L<<8)
 
#define BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_FIFO_FULL   (1L<<11)
 
#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCODE   (1L<<12)
 
#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_DATA   (1L<<13)
 
#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_STAT   (1L<<14)
 
#define BNX2_EMAC_RXMAC_DEBUG5_CLR_STAT   (1L<<15)
 
#define BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_CCODE   (0x3L<<16)
 
#define BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_ACCEPT   (1L<<19)
 
#define BNX2_EMAC_RXMAC_DEBUG5_FMLEN   (0xfffL<<20)
 
#define BNX2_EMAC_RX_STAT_FALSECARRIERERRORS   0x00001574
 
#define BNX2_EMAC_RX_STAT_AC0   0x00001580
 
#define BNX2_EMAC_RX_STAT_AC1   0x00001584
 
#define BNX2_EMAC_RX_STAT_AC2   0x00001588
 
#define BNX2_EMAC_RX_STAT_AC3   0x0000158c
 
#define BNX2_EMAC_RX_STAT_AC4   0x00001590
 
#define BNX2_EMAC_RX_STAT_AC5   0x00001594
 
#define BNX2_EMAC_RX_STAT_AC6   0x00001598
 
#define BNX2_EMAC_RX_STAT_AC7   0x0000159c
 
#define BNX2_EMAC_RX_STAT_AC8   0x000015a0
 
#define BNX2_EMAC_RX_STAT_AC9   0x000015a4
 
#define BNX2_EMAC_RX_STAT_AC10   0x000015a8
 
#define BNX2_EMAC_RX_STAT_AC11   0x000015ac
 
#define BNX2_EMAC_RX_STAT_AC12   0x000015b0
 
#define BNX2_EMAC_RX_STAT_AC13   0x000015b4
 
#define BNX2_EMAC_RX_STAT_AC14   0x000015b8
 
#define BNX2_EMAC_RX_STAT_AC15   0x000015bc
 
#define BNX2_EMAC_RX_STAT_AC16   0x000015c0
 
#define BNX2_EMAC_RX_STAT_AC17   0x000015c4
 
#define BNX2_EMAC_RX_STAT_AC18   0x000015c8
 
#define BNX2_EMAC_RX_STAT_AC19   0x000015cc
 
#define BNX2_EMAC_RX_STAT_AC20   0x000015d0
 
#define BNX2_EMAC_RX_STAT_AC21   0x000015d4
 
#define BNX2_EMAC_RX_STAT_AC22   0x000015d8
 
#define BNX2_EMAC_RXMAC_SUC_DBG_OVERRUNVEC   0x000015dc
 
#define BNX2_EMAC_RX_STAT_AC_28   0x000015f4
 
#define BNX2_EMAC_TX_STAT_IFHCOUTOCTETS   0x00001600
 
#define BNX2_EMAC_TX_STAT_IFHCOUTBADOCTETS   0x00001604
 
#define BNX2_EMAC_TX_STAT_ETHERSTATSCOLLISIONS   0x00001608
 
#define BNX2_EMAC_TX_STAT_OUTXONSENT   0x0000160c
 
#define BNX2_EMAC_TX_STAT_OUTXOFFSENT   0x00001610
 
#define BNX2_EMAC_TX_STAT_FLOWCONTROLDONE   0x00001614
 
#define BNX2_EMAC_TX_STAT_DOT3STATSSINGLECOLLISIONFRAMES   0x00001618
 
#define BNX2_EMAC_TX_STAT_DOT3STATSMULTIPLECOLLISIONFRAMES   0x0000161c
 
#define BNX2_EMAC_TX_STAT_DOT3STATSDEFERREDTRANSMISSIONS   0x00001620
 
#define BNX2_EMAC_TX_STAT_DOT3STATSEXCESSIVECOLLISIONS   0x00001624
 
#define BNX2_EMAC_TX_STAT_DOT3STATSLATECOLLISIONS   0x00001628
 
#define BNX2_EMAC_TX_STAT_IFHCOUTUCASTPKTS   0x0000162c
 
#define BNX2_EMAC_TX_STAT_IFHCOUTMULTICASTPKTS   0x00001630
 
#define BNX2_EMAC_TX_STAT_IFHCOUTBROADCASTPKTS   0x00001634
 
#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS64OCTETS   0x00001638
 
#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS   0x0000163c
 
#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS   0x00001640
 
#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS   0x00001644
 
#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS   0x00001648
 
#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS   0x0000164c
 
#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTSOVER1522OCTETS   0x00001650
 
#define BNX2_EMAC_TX_STAT_DOT3STATSINTERNALMACTRANSMITERRORS   0x00001654
 
#define BNX2_EMAC_TXMAC_DEBUG0   0x00001658
 
#define BNX2_EMAC_TXMAC_DEBUG1   0x0000165c
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE   (0xfL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_IDLE   (0x0L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_START0   (0x1L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA0   (0x4L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA1   (0x5L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA2   (0x6L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA3   (0x7L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT0   (0x8L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT1   (0x9L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG1_CRS_ENABLE   (1L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG1_BAD_CRC   (1L<<5)
 
#define BNX2_EMAC_TXMAC_DEBUG1_SE_COUNTER   (0xfL<<6)
 
#define BNX2_EMAC_TXMAC_DEBUG1_SEND_PAUSE   (1L<<10)
 
#define BNX2_EMAC_TXMAC_DEBUG1_LATE_COLLISION   (1L<<11)
 
#define BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFER   (1L<<12)
 
#define BNX2_EMAC_TXMAC_DEBUG1_DEFERRED   (1L<<13)
 
#define BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE   (1L<<14)
 
#define BNX2_EMAC_TXMAC_DEBUG1_IPG_TIME   (0xfL<<15)
 
#define BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIME   (0xffL<<19)
 
#define BNX2_EMAC_TXMAC_DEBUG2   0x00001660
 
#define BNX2_EMAC_TXMAC_DEBUG2_BACK_OFF   (0x3ffL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG2_BYTE_COUNT   (0xffffL<<10)
 
#define BNX2_EMAC_TXMAC_DEBUG2_COL_COUNT   (0x1fL<<26)
 
#define BNX2_EMAC_TXMAC_DEBUG2_COL_BIT   (1L<<31)
 
#define BNX2_EMAC_TXMAC_DEBUG3   0x00001664
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE   (0xfL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_IDLE   (0x0L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_PRE1   (0x1L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_PRE2   (0x2L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_SFD   (0x3L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_DATA   (0x4L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_CRC1   (0x5L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_CRC2   (0x6L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_EXT   (0x7L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_STATB   (0x8L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_STATG   (0x9L<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_JAM   (0xaL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_EJAM   (0xbL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_BJAM   (0xcL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_SWAIT   (0xdL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_BACKOFF   (0xeL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE   (0x7L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_IDLE   (0x0L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_WAIT   (0x1L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_UNI   (0x2L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_MC   (0x3L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC2   (0x4L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC3   (0x5L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC   (0x6L<<4)
 
#define BNX2_EMAC_TXMAC_DEBUG3_CRS_DONE   (1L<<7)
 
#define BNX2_EMAC_TXMAC_DEBUG3_XOFF   (1L<<8)
 
#define BNX2_EMAC_TXMAC_DEBUG3_SE_COUNTER   (0xfL<<9)
 
#define BNX2_EMAC_TXMAC_DEBUG3_QUANTA_COUNTER   (0x1fL<<13)
 
#define BNX2_EMAC_TXMAC_DEBUG4   0x00001668
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_COUNTER   (0xffffL<<0)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE   (0xfL<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_IDLE   (0x0L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA1   (0x2L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA2   (0x3L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC3   (0x4L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC2   (0x5L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA3   (0x6L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC1   (0x7L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC1   (0x8L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC2   (0x9L<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TIME   (0xaL<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TYPE   (0xcL<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_WAIT   (0xdL<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CMD   (0xeL<<16)
 
#define BNX2_EMAC_TXMAC_DEBUG4_STATS0_VALID   (1L<<20)
 
#define BNX2_EMAC_TXMAC_DEBUG4_APPEND_CRC   (1L<<21)
 
#define BNX2_EMAC_TXMAC_DEBUG4_SLOT_FILLED   (1L<<22)
 
#define BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFER   (1L<<23)
 
#define BNX2_EMAC_TXMAC_DEBUG4_SEND_EXTEND   (1L<<24)
 
#define BNX2_EMAC_TXMAC_DEBUG4_SEND_PADDING   (1L<<25)
 
#define BNX2_EMAC_TXMAC_DEBUG4_EOF_LOC   (1L<<26)
 
#define BNX2_EMAC_TXMAC_DEBUG4_COLLIDING   (1L<<27)
 
#define BNX2_EMAC_TXMAC_DEBUG4_COL_IN   (1L<<28)
 
#define BNX2_EMAC_TXMAC_DEBUG4_BURSTING   (1L<<29)
 
#define BNX2_EMAC_TXMAC_DEBUG4_ADVANCE   (1L<<30)
 
#define BNX2_EMAC_TXMAC_DEBUG4_GO   (1L<<31)
 
#define BNX2_EMAC_TX_STAT_AC0   0x00001680
 
#define BNX2_EMAC_TX_STAT_AC1   0x00001684
 
#define BNX2_EMAC_TX_STAT_AC2   0x00001688
 
#define BNX2_EMAC_TX_STAT_AC3   0x0000168c
 
#define BNX2_EMAC_TX_STAT_AC4   0x00001690
 
#define BNX2_EMAC_TX_STAT_AC5   0x00001694
 
#define BNX2_EMAC_TX_STAT_AC6   0x00001698
 
#define BNX2_EMAC_TX_STAT_AC7   0x0000169c
 
#define BNX2_EMAC_TX_STAT_AC8   0x000016a0
 
#define BNX2_EMAC_TX_STAT_AC9   0x000016a4
 
#define BNX2_EMAC_TX_STAT_AC10   0x000016a8
 
#define BNX2_EMAC_TX_STAT_AC11   0x000016ac
 
#define BNX2_EMAC_TX_STAT_AC12   0x000016b0
 
#define BNX2_EMAC_TX_STAT_AC13   0x000016b4
 
#define BNX2_EMAC_TX_STAT_AC14   0x000016b8
 
#define BNX2_EMAC_TX_STAT_AC15   0x000016bc
 
#define BNX2_EMAC_TX_STAT_AC16   0x000016c0
 
#define BNX2_EMAC_TX_STAT_AC17   0x000016c4
 
#define BNX2_EMAC_TX_STAT_AC18   0x000016c8
 
#define BNX2_EMAC_TX_STAT_AC19   0x000016cc
 
#define BNX2_EMAC_TX_STAT_AC20   0x000016d0
 
#define BNX2_EMAC_TXMAC_SUC_DBG_OVERRUNVEC   0x000016d8
 
#define BNX2_EMAC_TX_RATE_LIMIT_CTRL   0x000016fc
 
#define BNX2_EMAC_TX_RATE_LIMIT_CTRL_TX_THROTTLE_INC   (0x7fL<<0)
 
#define BNX2_EMAC_TX_RATE_LIMIT_CTRL_TX_THROTTLE_NUM   (0x7fL<<16)
 
#define BNX2_EMAC_TX_RATE_LIMIT_CTRL_RATE_LIMITER_EN   (1L<<31)
 
#define BNX2_RPM_COMMAND   0x00001800
 
#define BNX2_RPM_COMMAND_ENABLED   (1L<<0)
 
#define BNX2_RPM_COMMAND_OVERRUN_ABORT   (1L<<4)
 
#define BNX2_RPM_STATUS   0x00001804
 
#define BNX2_RPM_STATUS_MBUF_WAIT   (1L<<0)
 
#define BNX2_RPM_STATUS_FREE_WAIT   (1L<<1)
 
#define BNX2_RPM_CONFIG   0x00001808
 
#define BNX2_RPM_CONFIG_NO_PSD_HDR_CKSUM   (1L<<0)
 
#define BNX2_RPM_CONFIG_ACPI_ENA   (1L<<1)
 
#define BNX2_RPM_CONFIG_ACPI_KEEP   (1L<<2)
 
#define BNX2_RPM_CONFIG_MP_KEEP   (1L<<3)
 
#define BNX2_RPM_CONFIG_SORT_VECT_VAL   (0xfL<<4)
 
#define BNX2_RPM_CONFIG_DISABLE_WOL_ASSERT   (1L<<30)
 
#define BNX2_RPM_CONFIG_IGNORE_VLAN   (1L<<31)
 
#define BNX2_RPM_MGMT_PKT_CTRL   0x0000180c
 
#define BNX2_RPM_MGMT_PKT_CTRL_MGMT_SORT   (0xfL<<0)
 
#define BNX2_RPM_MGMT_PKT_CTRL_MGMT_RULE   (0xfL<<4)
 
#define BNX2_RPM_MGMT_PKT_CTRL_MGMT_DISCARD_EN   (1L<<30)
 
#define BNX2_RPM_MGMT_PKT_CTRL_MGMT_EN   (1L<<31)
 
#define BNX2_RPM_VLAN_MATCH0   0x00001810
 
#define BNX2_RPM_VLAN_MATCH0_RPM_VLAN_MTCH0_VALUE   (0xfffL<<0)
 
#define BNX2_RPM_VLAN_MATCH1   0x00001814
 
#define BNX2_RPM_VLAN_MATCH1_RPM_VLAN_MTCH1_VALUE   (0xfffL<<0)
 
#define BNX2_RPM_VLAN_MATCH2   0x00001818
 
#define BNX2_RPM_VLAN_MATCH2_RPM_VLAN_MTCH2_VALUE   (0xfffL<<0)
 
#define BNX2_RPM_VLAN_MATCH3   0x0000181c
 
#define BNX2_RPM_VLAN_MATCH3_RPM_VLAN_MTCH3_VALUE   (0xfffL<<0)
 
#define BNX2_RPM_SORT_USER0   0x00001820
 
#define BNX2_RPM_SORT_USER0_PM_EN   (0xffffL<<0)
 
#define BNX2_RPM_SORT_USER0_BC_EN   (1L<<16)
 
#define BNX2_RPM_SORT_USER0_MC_EN   (1L<<17)
 
#define BNX2_RPM_SORT_USER0_MC_HSH_EN   (1L<<18)
 
#define BNX2_RPM_SORT_USER0_PROM_EN   (1L<<19)
 
#define BNX2_RPM_SORT_USER0_VLAN_EN   (0xfL<<20)
 
#define BNX2_RPM_SORT_USER0_PROM_VLAN   (1L<<24)
 
#define BNX2_RPM_SORT_USER0_VLAN_NOTMATCH   (1L<<25)
 
#define BNX2_RPM_SORT_USER0_ENA   (1L<<31)
 
#define BNX2_RPM_SORT_USER1   0x00001824
 
#define BNX2_RPM_SORT_USER1_PM_EN   (0xffffL<<0)
 
#define BNX2_RPM_SORT_USER1_BC_EN   (1L<<16)
 
#define BNX2_RPM_SORT_USER1_MC_EN   (1L<<17)
 
#define BNX2_RPM_SORT_USER1_MC_HSH_EN   (1L<<18)
 
#define BNX2_RPM_SORT_USER1_PROM_EN   (1L<<19)
 
#define BNX2_RPM_SORT_USER1_VLAN_EN   (0xfL<<20)
 
#define BNX2_RPM_SORT_USER1_PROM_VLAN   (1L<<24)
 
#define BNX2_RPM_SORT_USER1_ENA   (1L<<31)
 
#define BNX2_RPM_SORT_USER2   0x00001828
 
#define BNX2_RPM_SORT_USER2_PM_EN   (0xffffL<<0)
 
#define BNX2_RPM_SORT_USER2_BC_EN   (1L<<16)
 
#define BNX2_RPM_SORT_USER2_MC_EN   (1L<<17)
 
#define BNX2_RPM_SORT_USER2_MC_HSH_EN   (1L<<18)
 
#define BNX2_RPM_SORT_USER2_PROM_EN   (1L<<19)
 
#define BNX2_RPM_SORT_USER2_VLAN_EN   (0xfL<<20)
 
#define BNX2_RPM_SORT_USER2_PROM_VLAN   (1L<<24)
 
#define BNX2_RPM_SORT_USER2_ENA   (1L<<31)
 
#define BNX2_RPM_SORT_USER3   0x0000182c
 
#define BNX2_RPM_SORT_USER3_PM_EN   (0xffffL<<0)
 
#define BNX2_RPM_SORT_USER3_BC_EN   (1L<<16)
 
#define BNX2_RPM_SORT_USER3_MC_EN   (1L<<17)
 
#define BNX2_RPM_SORT_USER3_MC_HSH_EN   (1L<<18)
 
#define BNX2_RPM_SORT_USER3_PROM_EN   (1L<<19)
 
#define BNX2_RPM_SORT_USER3_VLAN_EN   (0xfL<<20)
 
#define BNX2_RPM_SORT_USER3_PROM_VLAN   (1L<<24)
 
#define BNX2_RPM_SORT_USER3_ENA   (1L<<31)
 
#define BNX2_RPM_STAT_L2_FILTER_DISCARDS   0x00001840
 
#define BNX2_RPM_STAT_RULE_CHECKER_DISCARDS   0x00001844
 
#define BNX2_RPM_STAT_IFINFTQDISCARDS   0x00001848
 
#define BNX2_RPM_STAT_IFINMBUFDISCARD   0x0000184c
 
#define BNX2_RPM_STAT_RULE_CHECKER_P4_HIT   0x00001850
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0   0x00001854
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0_NEXT_HEADER_LEN   (0xffL<<0)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0_NEXT_HEADER   (0xffL<<16)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0_NEXT_HEADER_LEN_TYPE   (1L<<30)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0_NEXT_HEADER_EN   (1L<<31)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1   0x00001858
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1_NEXT_HEADER_LEN   (0xffL<<0)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1_NEXT_HEADER   (0xffL<<16)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1_NEXT_HEADER_LEN_TYPE   (1L<<30)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1_NEXT_HEADER_EN   (1L<<31)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2   0x0000185c
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2_NEXT_HEADER_LEN   (0xffL<<0)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2_NEXT_HEADER   (0xffL<<16)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2_NEXT_HEADER_LEN_TYPE   (1L<<30)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2_NEXT_HEADER_EN   (1L<<31)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3   0x00001860
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3_NEXT_HEADER_LEN   (0xffL<<0)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3_NEXT_HEADER   (0xffL<<16)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3_NEXT_HEADER_LEN_TYPE   (1L<<30)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3_NEXT_HEADER_EN   (1L<<31)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4   0x00001864
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4_NEXT_HEADER_LEN   (0xffL<<0)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4_NEXT_HEADER   (0xffL<<16)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4_NEXT_HEADER_LEN_TYPE   (1L<<30)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4_NEXT_HEADER_EN   (1L<<31)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5   0x00001868
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5_NEXT_HEADER_LEN   (0xffL<<0)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5_NEXT_HEADER   (0xffL<<16)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5_NEXT_HEADER_LEN_TYPE   (1L<<30)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5_NEXT_HEADER_EN   (1L<<31)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6   0x0000186c
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6_NEXT_HEADER_LEN   (0xffL<<0)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6_NEXT_HEADER   (0xffL<<16)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6_NEXT_HEADER_LEN_TYPE   (1L<<30)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6_NEXT_HEADER_EN   (1L<<31)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7   0x00001870
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7_NEXT_HEADER_LEN   (0xffL<<0)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7_NEXT_HEADER   (0xffL<<16)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7_NEXT_HEADER_LEN_TYPE   (1L<<30)
 
#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7_NEXT_HEADER_EN   (1L<<31)
 
#define BNX2_RPM_STAT_AC0   0x00001880
 
#define BNX2_RPM_STAT_AC1   0x00001884
 
#define BNX2_RPM_STAT_AC2   0x00001888
 
#define BNX2_RPM_STAT_AC3   0x0000188c
 
#define BNX2_RPM_STAT_AC4   0x00001890
 
#define BNX2_RPM_RC_CNTL_16   0x000018e0
 
#define BNX2_RPM_RC_CNTL_16_OFFSET   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_16_CLASS   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_16_PRIORITY   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_16_P4   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_16_HDR_TYPE   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_START   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_IP   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_TCP   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_UDP   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_DATA   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_TCP_UDP   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_ICMPV6   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_16_COMP   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_16_COMP_EQUAL   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_16_COMP_NEQUAL   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_16_COMP_GREATER   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_16_COMP_LESS   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_16_MAP   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_16_SBIT   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_16_CMDSEL   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_16_DISCARD   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_16_MASK   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_16_P1   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_16_P2   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_16_P3   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_16_NBIT   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_16   0x000018e4
 
#define BNX2_RPM_RC_VALUE_MASK_16_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_16_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_17   0x000018e8
 
#define BNX2_RPM_RC_CNTL_17_OFFSET   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_17_CLASS   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_17_PRIORITY   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_17_P4   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_17_HDR_TYPE   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_START   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_IP   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_TCP   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_UDP   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_DATA   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_TCP_UDP   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_ICMPV6   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_17_COMP   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_17_COMP_EQUAL   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_17_COMP_NEQUAL   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_17_COMP_GREATER   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_17_COMP_LESS   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_17_MAP   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_17_SBIT   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_17_CMDSEL   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_17_DISCARD   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_17_MASK   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_17_P1   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_17_P2   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_17_P3   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_17_NBIT   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_17   0x000018ec
 
#define BNX2_RPM_RC_VALUE_MASK_17_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_17_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_18   0x000018f0
 
#define BNX2_RPM_RC_CNTL_18_OFFSET   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_18_CLASS   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_18_PRIORITY   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_18_P4   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_18_HDR_TYPE   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_START   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_IP   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_TCP   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_UDP   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_DATA   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_TCP_UDP   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_ICMPV6   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_18_COMP   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_18_COMP_EQUAL   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_18_COMP_NEQUAL   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_18_COMP_GREATER   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_18_COMP_LESS   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_18_MAP   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_18_SBIT   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_18_CMDSEL   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_18_DISCARD   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_18_MASK   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_18_P1   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_18_P2   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_18_P3   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_18_NBIT   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_18   0x000018f4
 
#define BNX2_RPM_RC_VALUE_MASK_18_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_18_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_19   0x000018f8
 
#define BNX2_RPM_RC_CNTL_19_OFFSET   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_19_CLASS   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_19_PRIORITY   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_19_P4   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_19_HDR_TYPE   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_START   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_IP   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_TCP   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_UDP   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_DATA   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_TCP_UDP   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_ICMPV6   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_19_COMP   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_19_COMP_EQUAL   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_19_COMP_NEQUAL   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_19_COMP_GREATER   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_19_COMP_LESS   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_19_MAP   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_19_SBIT   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_19_CMDSEL   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_19_DISCARD   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_19_MASK   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_19_P1   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_19_P2   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_19_P3   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_19_NBIT   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_19   0x000018fc
 
#define BNX2_RPM_RC_VALUE_MASK_19_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_19_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_0   0x00001900
 
#define BNX2_RPM_RC_CNTL_0_OFFSET   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_0_CLASS   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_0_PRIORITY   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_0_P4   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_0_HDR_TYPE   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_START   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_IP   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_DATA   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP_UDP   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_ICMPV6   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_0_COMP   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_0_COMP_EQUAL   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_0_COMP_NEQUAL   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_0_COMP_GREATER   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_0_COMP_LESS   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_0_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_0_SBIT   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_0_CMDSEL   (0xfL<<20)
 
#define BNX2_RPM_RC_CNTL_0_MAP   (1L<<24)
 
#define BNX2_RPM_RC_CNTL_0_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_0_DISCARD   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_0_MASK   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_0_P1   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_0_P2   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_0_P3   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_0_NBIT   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_0   0x00001904
 
#define BNX2_RPM_RC_VALUE_MASK_0_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_0_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_1   0x00001908
 
#define BNX2_RPM_RC_CNTL_1_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_1_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_1_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_1_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_1_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_1_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_1_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_1_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_1_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_1_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_1_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_1_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_1_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_1_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_1_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_1_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_1_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_1_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_1_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_1_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_1   0x0000190c
 
#define BNX2_RPM_RC_VALUE_MASK_1_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_1_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_2   0x00001910
 
#define BNX2_RPM_RC_CNTL_2_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_2_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_2_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_2_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_2_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_2_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_2_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_2_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_2_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_2_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_2_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_2_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_2_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_2_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_2_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_2_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_2_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_2_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_2_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_2_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_2   0x00001914
 
#define BNX2_RPM_RC_VALUE_MASK_2_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_2_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_3   0x00001918
 
#define BNX2_RPM_RC_CNTL_3_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_3_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_3_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_3_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_3_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_3_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_3_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_3_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_3_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_3_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_3_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_3_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_3_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_3_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_3_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_3_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_3_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_3_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_3_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_3_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_3   0x0000191c
 
#define BNX2_RPM_RC_VALUE_MASK_3_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_3_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_4   0x00001920
 
#define BNX2_RPM_RC_CNTL_4_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_4_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_4_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_4_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_4_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_4_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_4_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_4_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_4_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_4_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_4_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_4_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_4_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_4_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_4_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_4_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_4_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_4_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_4_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_4_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_4   0x00001924
 
#define BNX2_RPM_RC_VALUE_MASK_4_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_4_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_5   0x00001928
 
#define BNX2_RPM_RC_CNTL_5_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_5_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_5_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_5_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_5_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_5_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_5_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_5_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_5_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_5_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_5_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_5_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_5_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_5_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_5_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_5_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_5_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_5_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_5_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_5_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_5   0x0000192c
 
#define BNX2_RPM_RC_VALUE_MASK_5_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_5_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_6   0x00001930
 
#define BNX2_RPM_RC_CNTL_6_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_6_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_6_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_6_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_6_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_6_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_6_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_6_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_6_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_6_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_6_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_6_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_6_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_6_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_6_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_6_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_6_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_6_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_6_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_6_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_6   0x00001934
 
#define BNX2_RPM_RC_VALUE_MASK_6_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_6_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_7   0x00001938
 
#define BNX2_RPM_RC_CNTL_7_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_7_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_7_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_7_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_7_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_7_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_7_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_7_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_7_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_7_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_7_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_7_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_7_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_7_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_7_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_7_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_7_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_7_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_7_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_7_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_7   0x0000193c
 
#define BNX2_RPM_RC_VALUE_MASK_7_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_7_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_8   0x00001940
 
#define BNX2_RPM_RC_CNTL_8_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_8_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_8_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_8_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_8_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_8_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_8_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_8_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_8_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_8_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_8_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_8_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_8_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_8_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_8_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_8_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_8_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_8_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_8_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_8_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_8   0x00001944
 
#define BNX2_RPM_RC_VALUE_MASK_8_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_8_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_9   0x00001948
 
#define BNX2_RPM_RC_CNTL_9_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_9_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_9_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_9_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_9_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_9_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_9_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_9_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_9_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_9_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_9_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_9_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_9_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_9_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_9_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_9_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_9_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_9_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_9_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_9_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_9   0x0000194c
 
#define BNX2_RPM_RC_VALUE_MASK_9_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_9_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_10   0x00001950
 
#define BNX2_RPM_RC_CNTL_10_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_10_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_10_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_10_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_10_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_10_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_10_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_10_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_10_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_10_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_10_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_10_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_10_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_10_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_10_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_10_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_10_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_10_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_10_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_10_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_10   0x00001954
 
#define BNX2_RPM_RC_VALUE_MASK_10_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_10_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_11   0x00001958
 
#define BNX2_RPM_RC_CNTL_11_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_11_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_11_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_11_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_11_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_11_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_11_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_11_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_11_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_11_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_11_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_11_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_11_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_11_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_11_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_11_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_11_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_11_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_11_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_11_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_11   0x0000195c
 
#define BNX2_RPM_RC_VALUE_MASK_11_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_11_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_12   0x00001960
 
#define BNX2_RPM_RC_CNTL_12_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_12_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_12_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_12_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_12_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_12_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_12_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_12_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_12_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_12_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_12_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_12_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_12_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_12_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_12_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_12_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_12_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_12_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_12_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_12_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_12   0x00001964
 
#define BNX2_RPM_RC_VALUE_MASK_12_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_12_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_13   0x00001968
 
#define BNX2_RPM_RC_CNTL_13_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_13_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_13_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_13_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_13_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_13_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_13_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_13_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_13_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_13_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_13_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_13_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_13_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_13_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_13_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_13_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_13_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_13_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_13_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_13_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_13   0x0000196c
 
#define BNX2_RPM_RC_VALUE_MASK_13_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_13_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_14   0x00001970
 
#define BNX2_RPM_RC_CNTL_14_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_14_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_14_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_14_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_14_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_14_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_14_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_14_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_14_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_14_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_14_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_14_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_14_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_14_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_14_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_14_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_14_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_14_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_14_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_14_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_14   0x00001974
 
#define BNX2_RPM_RC_VALUE_MASK_14_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_14_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CNTL_15   0x00001978
 
#define BNX2_RPM_RC_CNTL_15_A   (0x3ffffL<<0)
 
#define BNX2_RPM_RC_CNTL_15_B   (0xfffL<<19)
 
#define BNX2_RPM_RC_CNTL_15_OFFSET_XI   (0xffL<<0)
 
#define BNX2_RPM_RC_CNTL_15_CLASS_XI   (0x7L<<8)
 
#define BNX2_RPM_RC_CNTL_15_PRIORITY_XI   (1L<<11)
 
#define BNX2_RPM_RC_CNTL_15_P4_XI   (1L<<12)
 
#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_XI   (0x7L<<13)
 
#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_START_XI   (0L<<13)
 
#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_IP_XI   (1L<<13)
 
#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_TCP_XI   (2L<<13)
 
#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_UDP_XI   (3L<<13)
 
#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_DATA_XI   (4L<<13)
 
#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_TCP_UDP_XI   (5L<<13)
 
#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_ICMPV6_XI   (6L<<13)
 
#define BNX2_RPM_RC_CNTL_15_COMP_XI   (0x3L<<16)
 
#define BNX2_RPM_RC_CNTL_15_COMP_EQUAL_XI   (0L<<16)
 
#define BNX2_RPM_RC_CNTL_15_COMP_NEQUAL_XI   (1L<<16)
 
#define BNX2_RPM_RC_CNTL_15_COMP_GREATER_XI   (2L<<16)
 
#define BNX2_RPM_RC_CNTL_15_COMP_LESS_XI   (3L<<16)
 
#define BNX2_RPM_RC_CNTL_15_MAP_XI   (1L<<18)
 
#define BNX2_RPM_RC_CNTL_15_SBIT_XI   (1L<<19)
 
#define BNX2_RPM_RC_CNTL_15_CMDSEL_XI   (0x1fL<<20)
 
#define BNX2_RPM_RC_CNTL_15_DISCARD_XI   (1L<<25)
 
#define BNX2_RPM_RC_CNTL_15_MASK_XI   (1L<<26)
 
#define BNX2_RPM_RC_CNTL_15_P1_XI   (1L<<27)
 
#define BNX2_RPM_RC_CNTL_15_P2_XI   (1L<<28)
 
#define BNX2_RPM_RC_CNTL_15_P3_XI   (1L<<29)
 
#define BNX2_RPM_RC_CNTL_15_NBIT_XI   (1L<<30)
 
#define BNX2_RPM_RC_VALUE_MASK_15   0x0000197c
 
#define BNX2_RPM_RC_VALUE_MASK_15_VALUE   (0xffffL<<0)
 
#define BNX2_RPM_RC_VALUE_MASK_15_MASK   (0xffffL<<16)
 
#define BNX2_RPM_RC_CONFIG   0x00001980
 
#define BNX2_RPM_RC_CONFIG_RULE_ENABLE   (0xffffL<<0)
 
#define BNX2_RPM_RC_CONFIG_RULE_ENABLE_XI   (0xfffffL<<0)
 
#define BNX2_RPM_RC_CONFIG_DEF_CLASS   (0x7L<<24)
 
#define BNX2_RPM_RC_CONFIG_KNUM_OVERWRITE   (1L<<31)
 
#define BNX2_RPM_DEBUG0   0x00001984
 
#define BNX2_RPM_DEBUG0_FM_BCNT   (0xffffL<<0)
 
#define BNX2_RPM_DEBUG0_T_DATA_OFST_VLD   (1L<<16)
 
#define BNX2_RPM_DEBUG0_T_UDP_OFST_VLD   (1L<<17)
 
#define BNX2_RPM_DEBUG0_T_TCP_OFST_VLD   (1L<<18)
 
#define BNX2_RPM_DEBUG0_T_IP_OFST_VLD   (1L<<19)
 
#define BNX2_RPM_DEBUG0_IP_MORE_FRGMT   (1L<<20)
 
#define BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP_HDR   (1L<<21)
 
#define BNX2_RPM_DEBUG0_LLC_SNAP   (1L<<22)
 
#define BNX2_RPM_DEBUG0_FM_STARTED   (1L<<23)
 
#define BNX2_RPM_DEBUG0_DONE   (1L<<24)
 
#define BNX2_RPM_DEBUG0_WAIT_4_DONE   (1L<<25)
 
#define BNX2_RPM_DEBUG0_USE_TPBUF_CKSUM   (1L<<26)
 
#define BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_CKSUM   (1L<<27)
 
#define BNX2_RPM_DEBUG0_IGNORE_VLAN   (1L<<28)
 
#define BNX2_RPM_DEBUG0_RP_ENA_ACTIVE   (1L<<31)
 
#define BNX2_RPM_DEBUG1   0x00001988
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST   (0xffffL<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE   (0L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_ALL   (1L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IPLLC   (2L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_IP   (4L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IP   (8L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_START   (16L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IP   (32L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_TCP   (64L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_UDP   (128L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_AH   (256L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP   (512L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_PAYLOAD   (1024L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_DATA   (2048L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRY   (0x2000L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRYOUT   (0x4000L<<0)
 
#define BNX2_RPM_DEBUG1_FSM_CUR_ST_LATCH_RESULT   (0x8000L<<0)
 
#define BNX2_RPM_DEBUG1_HDR_BCNT   (0x7ffL<<16)
 
#define BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D   (1L<<28)
 
#define BNX2_RPM_DEBUG1_VLAN_REMOVED_D2   (1L<<29)
 
#define BNX2_RPM_DEBUG1_VLAN_REMOVED_D1   (1L<<30)
 
#define BNX2_RPM_DEBUG1_EOF_0XTRA_WD   (1L<<31)
 
#define BNX2_RPM_DEBUG2   0x0000198c
 
#define BNX2_RPM_DEBUG2_CMD_HIT_VEC   (0xffffL<<0)
 
#define BNX2_RPM_DEBUG2_IP_BCNT   (0xffL<<16)
 
#define BNX2_RPM_DEBUG2_THIS_CMD_M4   (1L<<24)
 
#define BNX2_RPM_DEBUG2_THIS_CMD_M3   (1L<<25)
 
#define BNX2_RPM_DEBUG2_THIS_CMD_M2   (1L<<26)
 
#define BNX2_RPM_DEBUG2_THIS_CMD_M1   (1L<<27)
 
#define BNX2_RPM_DEBUG2_IPIPE_EMPTY   (1L<<28)
 
#define BNX2_RPM_DEBUG2_FM_DISCARD   (1L<<29)
 
#define BNX2_RPM_DEBUG2_LAST_RULE_IN_FM_D2   (1L<<30)
 
#define BNX2_RPM_DEBUG2_LAST_RULE_IN_FM_D1   (1L<<31)
 
#define BNX2_RPM_DEBUG3   0x00001990
 
#define BNX2_RPM_DEBUG3_AVAIL_MBUF_PTR   (0x1ffL<<0)
 
#define BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_REQ_INT   (1L<<9)
 
#define BNX2_RPM_DEBUG3_RDE_RBUF_WR_LAST_INT   (1L<<10)
 
#define BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ_INT   (1L<<11)
 
#define BNX2_RPM_DEBUG3_RDE_RBUF_FREE_REQ   (1L<<12)
 
#define BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_REQ   (1L<<13)
 
#define BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAVAIL   (1L<<14)
 
#define BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DROP   (1L<<15)
 
#define BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY_CT   (0xfL<<16)
 
#define BNX2_RPM_DEBUG3_RDE_SRC_FIFO_ALMFULL   (1L<<21)
 
#define BNX2_RPM_DEBUG3_DROP_NXT_VLD   (1L<<22)
 
#define BNX2_RPM_DEBUG3_DROP_NXT   (1L<<23)
 
#define BNX2_RPM_DEBUG3_FTQ_FSM   (0x3L<<24)
 
#define BNX2_RPM_DEBUG3_FTQ_FSM_IDLE   (0x0L<<24)
 
#define BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_ACK   (0x1L<<24)
 
#define BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FREE   (0x2L<<24)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM   (0x3L<<26)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_SOF   (0x0L<<26)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM_GET_MBUF   (0x1L<<26)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM_DMA_DATA   (0x2L<<26)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_DATA   (0x3L<<26)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_EOF   (0x4L<<26)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_MF_ACK   (0x5L<<26)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_DROP_NXT_VLD   (0x6L<<26)
 
#define BNX2_RPM_DEBUG3_MBWRITE_FSM_DONE   (0x7L<<26)
 
#define BNX2_RPM_DEBUG3_MBFREE_FSM   (1L<<29)
 
#define BNX2_RPM_DEBUG3_MBFREE_FSM_IDLE   (0L<<29)
 
#define BNX2_RPM_DEBUG3_MBFREE_FSM_WAIT_ACK   (1L<<29)
 
#define BNX2_RPM_DEBUG3_MBALLOC_FSM   (1L<<30)
 
#define BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_MBUF   (0x0L<<30)
 
#define BNX2_RPM_DEBUG3_MBALLOC_FSM_IVE_MBUF   (0x1L<<30)
 
#define BNX2_RPM_DEBUG3_CCODE_EOF_ERROR   (1L<<31)
 
#define BNX2_RPM_DEBUG4   0x00001994
 
#define BNX2_RPM_DEBUG4_DFSM_MBUF_CLUSTER   (0x1ffffffL<<0)
 
#define BNX2_RPM_DEBUG4_DFIFO_CUR_CCODE   (0x7L<<25)
 
#define BNX2_RPM_DEBUG4_MBWRITE_FSM   (0x7L<<28)
 
#define BNX2_RPM_DEBUG4_DFIFO_EMPTY   (1L<<31)
 
#define BNX2_RPM_DEBUG5   0x00001998
 
#define BNX2_RPM_DEBUG5_RDROP_WPTR   (0x1fL<<0)
 
#define BNX2_RPM_DEBUG5_RDROP_ACPI_RPTR   (0x1fL<<5)
 
#define BNX2_RPM_DEBUG5_RDROP_MC_RPTR   (0x1fL<<10)
 
#define BNX2_RPM_DEBUG5_RDROP_RC_RPTR   (0x1fL<<15)
 
#define BNX2_RPM_DEBUG5_RDROP_ACPI_EMPTY   (1L<<20)
 
#define BNX2_RPM_DEBUG5_RDROP_MC_EMPTY   (1L<<21)
 
#define BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_AT_RDROP_MC_RPTR   (1L<<22)
 
#define BNX2_RPM_DEBUG5_HOLDREG_WOL_DROP_INT   (1L<<23)
 
#define BNX2_RPM_DEBUG5_HOLDREG_DISCARD   (1L<<24)
 
#define BNX2_RPM_DEBUG5_HOLDREG_MBUF_NOTAVAIL   (1L<<25)
 
#define BNX2_RPM_DEBUG5_HOLDREG_MC_EMPTY   (1L<<26)
 
#define BNX2_RPM_DEBUG5_HOLDREG_RC_EMPTY   (1L<<27)
 
#define BNX2_RPM_DEBUG5_HOLDREG_FC_EMPTY   (1L<<28)
 
#define BNX2_RPM_DEBUG5_HOLDREG_ACPI_EMPTY   (1L<<29)
 
#define BNX2_RPM_DEBUG5_HOLDREG_FULL_T   (1L<<30)
 
#define BNX2_RPM_DEBUG5_HOLDREG_RD   (1L<<31)
 
#define BNX2_RPM_DEBUG6   0x0000199c
 
#define BNX2_RPM_DEBUG6_ACPI_VEC   (0xffffL<<0)
 
#define BNX2_RPM_DEBUG6_VEC   (0xffffL<<16)
 
#define BNX2_RPM_DEBUG7   0x000019a0
 
#define BNX2_RPM_DEBUG7_RPM_DBG7_LAST_CRC   (0xffffffffL<<0)
 
#define BNX2_RPM_DEBUG8   0x000019a4
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM   (0xfL<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDLE   (0L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W1_ADDR   (1L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W2_ADDR   (2L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W3_ADDR   (3L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_WAIT_THBUF   (4L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_DATA   (5L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_ADDR   (6L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_ADDR   (7L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_ADDR   (8L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_ADDR   (9L<<0)
 
#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAIT_THBUF   (10L<<0)
 
#define BNX2_RPM_DEBUG8_COMPARE_AT_W0   (1L<<4)
 
#define BNX2_RPM_DEBUG8_COMPARE_AT_W3_DATA   (1L<<5)
 
#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_WAIT   (1L<<6)
 
#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_W3   (1L<<7)
 
#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_W2   (1L<<8)
 
#define BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLDBYTES   (1L<<9)
 
#define BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLDBYTES   (1L<<10)
 
#define BNX2_RPM_DEBUG8_NXT_EOF_W_12_VLDBYTES   (1L<<11)
 
#define BNX2_RPM_DEBUG8_EOF_DET   (1L<<12)
 
#define BNX2_RPM_DEBUG8_SOF_DET   (1L<<13)
 
#define BNX2_RPM_DEBUG8_WAIT_4_SOF   (1L<<14)
 
#define BNX2_RPM_DEBUG8_ALL_DONE   (1L<<15)
 
#define BNX2_RPM_DEBUG8_THBUF_ADDR   (0x7fL<<16)
 
#define BNX2_RPM_DEBUG8_BYTE_CTR   (0xffL<<24)
 
#define BNX2_RPM_DEBUG9   0x000019a8
 
#define BNX2_RPM_DEBUG9_OUTFIFO_COUNT   (0x7L<<0)
 
#define BNX2_RPM_DEBUG9_RDE_ACPI_RDY   (1L<<3)
 
#define BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT   (0x7L<<4)
 
#define BNX2_RPM_DEBUG9_OUTFIFO_OVERRUN_OCCURRED   (1L<<28)
 
#define BNX2_RPM_DEBUG9_INFIFO_OVERRUN_OCCURRED   (1L<<29)
 
#define BNX2_RPM_DEBUG9_ACPI_MATCH_INT   (1L<<30)
 
#define BNX2_RPM_DEBUG9_ACPI_ENABLE_SYN   (1L<<31)
 
#define BNX2_RPM_DEBUG9_BEMEM_R_XI   (0x1fL<<0)
 
#define BNX2_RPM_DEBUG9_EO_XI   (1L<<5)
 
#define BNX2_RPM_DEBUG9_AEOF_DE_XI   (1L<<6)
 
#define BNX2_RPM_DEBUG9_SO_XI   (1L<<7)
 
#define BNX2_RPM_DEBUG9_WD64_CT_XI   (0x1fL<<8)
 
#define BNX2_RPM_DEBUG9_EOF_VLDBYTE_XI   (0x7L<<13)
 
#define BNX2_RPM_DEBUG9_ACPI_RDE_PAT_ID_XI   (0xfL<<16)
 
#define BNX2_RPM_DEBUG9_CALCRC_RESULT_XI   (0x3ffL<<20)
 
#define BNX2_RPM_DEBUG9_DATA_IN_VL_XI   (1L<<30)
 
#define BNX2_RPM_DEBUG9_CALCRC_BUFFER_VLD_XI   (1L<<31)
 
#define BNX2_RPM_ACPI_DBG_BUF_W00   0x000019c0
 
#define BNX2_RPM_ACPI_DBG_BUF_W01   0x000019c4
 
#define BNX2_RPM_ACPI_DBG_BUF_W02   0x000019c8
 
#define BNX2_RPM_ACPI_DBG_BUF_W03   0x000019cc
 
#define BNX2_RPM_ACPI_DBG_BUF_W10   0x000019d0
 
#define BNX2_RPM_ACPI_DBG_BUF_W11   0x000019d4
 
#define BNX2_RPM_ACPI_DBG_BUF_W12   0x000019d8
 
#define BNX2_RPM_ACPI_DBG_BUF_W13   0x000019dc
 
#define BNX2_RPM_ACPI_DBG_BUF_W20   0x000019e0
 
#define BNX2_RPM_ACPI_DBG_BUF_W21   0x000019e4
 
#define BNX2_RPM_ACPI_DBG_BUF_W22   0x000019e8
 
#define BNX2_RPM_ACPI_DBG_BUF_W23   0x000019ec
 
#define BNX2_RPM_ACPI_DBG_BUF_W30   0x000019f0
 
#define BNX2_RPM_ACPI_DBG_BUF_W31   0x000019f4
 
#define BNX2_RPM_ACPI_DBG_BUF_W32   0x000019f8
 
#define BNX2_RPM_ACPI_DBG_BUF_W33   0x000019fc
 
#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL   0x00001a00
 
#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_BYTE_ADDRESS   (0xffffL<<0)
 
#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_DEBUGRD   (1L<<28)
 
#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_MODE   (1L<<29)
 
#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_INIT   (1L<<30)
 
#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_WR   (1L<<31)
 
#define BNX2_RPM_ACPI_PATTERN_CTRL   0x00001a04
 
#define BNX2_RPM_ACPI_PATTERN_CTRL_PATTERN_ID   (0xfL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_CTRL_CRC_SM_CLR   (1L<<30)
 
#define BNX2_RPM_ACPI_PATTERN_CTRL_WR   (1L<<31)
 
#define BNX2_RPM_ACPI_DATA   0x00001a08
 
#define BNX2_RPM_ACPI_DATA_PATTERN_BE   (0xffffffffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_LEN0   0x00001a0c
 
#define BNX2_RPM_ACPI_PATTERN_LEN0_PATTERN_LEN3   (0xffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_LEN0_PATTERN_LEN2   (0xffL<<8)
 
#define BNX2_RPM_ACPI_PATTERN_LEN0_PATTERN_LEN1   (0xffL<<16)
 
#define BNX2_RPM_ACPI_PATTERN_LEN0_PATTERN_LEN0   (0xffL<<24)
 
#define BNX2_RPM_ACPI_PATTERN_LEN1   0x00001a10
 
#define BNX2_RPM_ACPI_PATTERN_LEN1_PATTERN_LEN7   (0xffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_LEN1_PATTERN_LEN6   (0xffL<<8)
 
#define BNX2_RPM_ACPI_PATTERN_LEN1_PATTERN_LEN5   (0xffL<<16)
 
#define BNX2_RPM_ACPI_PATTERN_LEN1_PATTERN_LEN4   (0xffL<<24)
 
#define BNX2_RPM_ACPI_PATTERN_CRC0   0x00001a18
 
#define BNX2_RPM_ACPI_PATTERN_CRC0_PATTERN_CRC0   (0xffffffffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_CRC1   0x00001a1c
 
#define BNX2_RPM_ACPI_PATTERN_CRC1_PATTERN_CRC1   (0xffffffffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_CRC2   0x00001a20
 
#define BNX2_RPM_ACPI_PATTERN_CRC2_PATTERN_CRC2   (0xffffffffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_CRC3   0x00001a24
 
#define BNX2_RPM_ACPI_PATTERN_CRC3_PATTERN_CRC3   (0xffffffffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_CRC4   0x00001a28
 
#define BNX2_RPM_ACPI_PATTERN_CRC4_PATTERN_CRC4   (0xffffffffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_CRC5   0x00001a2c
 
#define BNX2_RPM_ACPI_PATTERN_CRC5_PATTERN_CRC5   (0xffffffffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_CRC6   0x00001a30
 
#define BNX2_RPM_ACPI_PATTERN_CRC6_PATTERN_CRC6   (0xffffffffL<<0)
 
#define BNX2_RPM_ACPI_PATTERN_CRC7   0x00001a34
 
#define BNX2_RPM_ACPI_PATTERN_CRC7_PATTERN_CRC7   (0xffffffffL<<0)
 
#define BNX2_RLUP_RSS_CONFIG   0x0000201c
 
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_XI   (0x3L<<0)
 
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_OFF_XI   (0L<<0)
 
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_ALL_XI   (1L<<0)
 
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_IP_ONLY_XI   (2L<<0)
 
#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_RES_XI   (3L<<0)
 
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_XI   (0x3L<<2)
 
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_OFF_XI   (0L<<2)
 
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_ALL_XI   (1L<<2)
 
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_IP_ONLY_XI   (2L<<2)
 
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_RES_XI   (3L<<2)
 
#define BNX2_RLUP_RSS_COMMAND   0x00002048
 
#define BNX2_RLUP_RSS_COMMAND_RSS_IND_TABLE_ADDR   (0xfUL<<0)
 
#define BNX2_RLUP_RSS_COMMAND_RSS_WRITE_MASK   (0xffUL<<4)
 
#define BNX2_RLUP_RSS_COMMAND_WRITE   (1UL<<12)
 
#define BNX2_RLUP_RSS_COMMAND_READ   (1UL<<13)
 
#define BNX2_RLUP_RSS_COMMAND_HASH_MASK   (0x7UL<<14)
 
#define BNX2_RLUP_RSS_DATA   0x0000204c
 
#define BNX2_RBUF_COMMAND   0x00200000
 
#define BNX2_RBUF_COMMAND_ENABLED   (1L<<0)
 
#define BNX2_RBUF_COMMAND_FREE_INIT   (1L<<1)
 
#define BNX2_RBUF_COMMAND_RAM_INIT   (1L<<2)
 
#define BNX2_RBUF_COMMAND_PKT_OFFSET_OVFL   (1L<<3)
 
#define BNX2_RBUF_COMMAND_OVER_FREE   (1L<<4)
 
#define BNX2_RBUF_COMMAND_ALLOC_REQ   (1L<<5)
 
#define BNX2_RBUF_COMMAND_EN_PRI_CHNGE_TE   (1L<<6)
 
#define BNX2_RBUF_COMMAND_CU_ISOLATE_XI   (1L<<5)
 
#define BNX2_RBUF_COMMAND_EN_PRI_CHANGE_XI   (1L<<6)
 
#define BNX2_RBUF_COMMAND_GRC_ENDIAN_CONV_DIS_XI   (1L<<7)
 
#define BNX2_RBUF_STATUS1   0x00200004
 
#define BNX2_RBUF_STATUS1_FREE_COUNT   (0x3ffL<<0)
 
#define BNX2_RBUF_STATUS2   0x00200008
 
#define BNX2_RBUF_STATUS2_FREE_TAIL   (0x1ffL<<0)
 
#define BNX2_RBUF_STATUS2_FREE_HEAD   (0x1ffL<<16)
 
#define BNX2_RBUF_CONFIG   0x0020000c
 
#define BNX2_RBUF_CONFIG_XOFF_TRIP   (0x3ffL<<0)
 
#define BNX2_RBUF_CONFIG_XOFF_TRIP_VAL(mtu)   ((((mtu) - 1500) * 31 / 1000) + 54)
 
#define BNX2_RBUF_CONFIG_XON_TRIP   (0x3ffL<<16)
 
#define BNX2_RBUF_CONFIG_XON_TRIP_VAL(mtu)   ((((mtu) - 1500) * 39 / 1000) + 66)
 
#define BNX2_RBUF_CONFIG_VAL(mtu)
 
#define BNX2_RBUF_FW_BUF_ALLOC   0x00200010
 
#define BNX2_RBUF_FW_BUF_ALLOC_VALUE   (0x1ffL<<7)
 
#define BNX2_RBUF_FW_BUF_ALLOC_TYPE   (1L<<16)
 
#define BNX2_RBUF_FW_BUF_ALLOC_ALLOC_REQ   (1L<<31)
 
#define BNX2_RBUF_FW_BUF_FREE   0x00200014
 
#define BNX2_RBUF_FW_BUF_FREE_COUNT   (0x7fL<<0)
 
#define BNX2_RBUF_FW_BUF_FREE_TAIL   (0x1ffL<<7)
 
#define BNX2_RBUF_FW_BUF_FREE_HEAD   (0x1ffL<<16)
 
#define BNX2_RBUF_FW_BUF_FREE_TYPE   (1L<<25)
 
#define BNX2_RBUF_FW_BUF_FREE_FREE_REQ   (1L<<31)
 
#define BNX2_RBUF_FW_BUF_SEL   0x00200018
 
#define BNX2_RBUF_FW_BUF_SEL_COUNT   (0x7fL<<0)
 
#define BNX2_RBUF_FW_BUF_SEL_TAIL   (0x1ffL<<7)
 
#define BNX2_RBUF_FW_BUF_SEL_HEAD   (0x1ffL<<16)
 
#define BNX2_RBUF_FW_BUF_SEL_SEL_REQ   (1L<<31)
 
#define BNX2_RBUF_CONFIG2   0x0020001c
 
#define BNX2_RBUF_CONFIG2_MAC_DROP_TRIP   (0x3ffL<<0)
 
#define BNX2_RBUF_CONFIG2_MAC_DROP_TRIP_VAL(mtu)   ((((mtu) - 1500) * 4 / 1000) + 5)
 
#define BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP   (0x3ffL<<16)
 
#define BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP_VAL(mtu)   ((((mtu) - 1500) * 2 / 100) + 30)
 
#define BNX2_RBUF_CONFIG2_VAL(mtu)
 
#define BNX2_RBUF_CONFIG3   0x00200020
 
#define BNX2_RBUF_CONFIG3_CU_DROP_TRIP   (0x3ffL<<0)
 
#define BNX2_RBUF_CONFIG3_CU_DROP_TRIP_VAL(mtu)   ((((mtu) - 1500) * 12 / 1000) + 18)
 
#define BNX2_RBUF_CONFIG3_CU_KEEP_TRIP   (0x3ffL<<16)
 
#define BNX2_RBUF_CONFIG3_CU_KEEP_TRIP_VAL(mtu)   ((((mtu) - 1500) * 2 / 100) + 30)
 
#define BNX2_RBUF_CONFIG3_VAL(mtu)
 
#define BNX2_RBUF_PKT_DATA   0x00208000
 
#define BNX2_RBUF_CLIST_DATA   0x00210000
 
#define BNX2_RBUF_BUF_DATA   0x00220000
 
#define BNX2_RV2P_COMMAND   0x00002800
 
#define BNX2_RV2P_COMMAND_ENABLED   (1L<<0)
 
#define BNX2_RV2P_COMMAND_PROC1_INTRPT   (1L<<1)
 
#define BNX2_RV2P_COMMAND_PROC2_INTRPT   (1L<<2)
 
#define BNX2_RV2P_COMMAND_ABORT0   (1L<<4)
 
#define BNX2_RV2P_COMMAND_ABORT1   (1L<<5)
 
#define BNX2_RV2P_COMMAND_ABORT2   (1L<<6)
 
#define BNX2_RV2P_COMMAND_ABORT3   (1L<<7)
 
#define BNX2_RV2P_COMMAND_ABORT4   (1L<<8)
 
#define BNX2_RV2P_COMMAND_ABORT5   (1L<<9)
 
#define BNX2_RV2P_COMMAND_PROC1_RESET   (1L<<16)
 
#define BNX2_RV2P_COMMAND_PROC2_RESET   (1L<<17)
 
#define BNX2_RV2P_COMMAND_CTXIF_RESET   (1L<<18)
 
#define BNX2_RV2P_STATUS   0x00002804
 
#define BNX2_RV2P_STATUS_ALWAYS_0   (1L<<0)
 
#define BNX2_RV2P_STATUS_RV2P_GEN_STAT0_CNT   (1L<<8)
 
#define BNX2_RV2P_STATUS_RV2P_GEN_STAT1_CNT   (1L<<9)
 
#define BNX2_RV2P_STATUS_RV2P_GEN_STAT2_CNT   (1L<<10)
 
#define BNX2_RV2P_STATUS_RV2P_GEN_STAT3_CNT   (1L<<11)
 
#define BNX2_RV2P_STATUS_RV2P_GEN_STAT4_CNT   (1L<<12)
 
#define BNX2_RV2P_STATUS_RV2P_GEN_STAT5_CNT   (1L<<13)
 
#define BNX2_RV2P_CONFIG   0x00002808
 
#define BNX2_RV2P_CONFIG_STALL_PROC1   (1L<<0)
 
#define BNX2_RV2P_CONFIG_STALL_PROC2   (1L<<1)
 
#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT0   (1L<<8)
 
#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT1   (1L<<9)
 
#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT2   (1L<<10)
 
#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT3   (1L<<11)
 
#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT4   (1L<<12)
 
#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT5   (1L<<13)
 
#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT0   (1L<<16)
 
#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT1   (1L<<17)
 
#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT2   (1L<<18)
 
#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT3   (1L<<19)
 
#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT4   (1L<<20)
 
#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT5   (1L<<21)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE   (0xfL<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_256   (0L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_512   (1L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_1K   (2L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_2K   (3L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_4K   (4L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_8K   (5L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_16K   (6L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_32K   (7L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_64K   (8L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_128K   (9L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_256K   (10L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_512K   (11L<<24)
 
#define BNX2_RV2P_CONFIG_PAGE_SIZE_1M   (12L<<24)
 
#define BNX2_RV2P_GEN_BFR_ADDR_0   0x00002810
 
#define BNX2_RV2P_GEN_BFR_ADDR_0_VALUE   (0xffffL<<16)
 
#define BNX2_RV2P_GEN_BFR_ADDR_1   0x00002814
 
#define BNX2_RV2P_GEN_BFR_ADDR_1_VALUE   (0xffffL<<16)
 
#define BNX2_RV2P_GEN_BFR_ADDR_2   0x00002818
 
#define BNX2_RV2P_GEN_BFR_ADDR_2_VALUE   (0xffffL<<16)
 
#define BNX2_RV2P_GEN_BFR_ADDR_3   0x0000281c
 
#define BNX2_RV2P_GEN_BFR_ADDR_3_VALUE   (0xffffL<<16)
 
#define BNX2_RV2P_INSTR_HIGH   0x00002830
 
#define BNX2_RV2P_INSTR_HIGH_HIGH   (0x1fL<<0)
 
#define BNX2_RV2P_INSTR_LOW   0x00002834
 
#define BNX2_RV2P_INSTR_LOW_LOW   (0xffffffffL<<0)
 
#define BNX2_RV2P_PROC1_ADDR_CMD   0x00002838
 
#define BNX2_RV2P_PROC1_ADDR_CMD_ADD   (0x3ffL<<0)
 
#define BNX2_RV2P_PROC1_ADDR_CMD_RDWR   (1L<<31)
 
#define BNX2_RV2P_PROC2_ADDR_CMD   0x0000283c
 
#define BNX2_RV2P_PROC2_ADDR_CMD_ADD   (0x3ffL<<0)
 
#define BNX2_RV2P_PROC2_ADDR_CMD_RDWR   (1L<<31)
 
#define BNX2_RV2P_PROC1_GRC_DEBUG   0x00002840
 
#define BNX2_RV2P_PROC2_GRC_DEBUG   0x00002844
 
#define BNX2_RV2P_GRC_PROC_DEBUG   0x00002848
 
#define BNX2_RV2P_DEBUG_VECT_PEEK   0x0000284c
 
#define BNX2_RV2P_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_RV2P_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_RV2P_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_RV2P_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_RV2P_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_RV2P_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_RV2P_MPFE_PFE_CTL   0x00002afc
 
#define BNX2_RV2P_MPFE_PFE_CTL_INC_USAGE_CNT   (1L<<0)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE   (0xfL<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_0   (0L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_1   (1L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_2   (2L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_3   (3L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_4   (4L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_5   (5L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_6   (6L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_7   (7L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_8   (8L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_9   (9L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_10   (10L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_11   (11L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_12   (12L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_13   (13L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_14   (14L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_15   (15L<<4)
 
#define BNX2_RV2P_MPFE_PFE_CTL_PFE_COUNT   (0xfL<<12)
 
#define BNX2_RV2P_MPFE_PFE_CTL_OFFSET   (0x1ffL<<16)
 
#define BNX2_RV2P_RV2PPQ   0x00002b40
 
#define BNX2_RV2P_PFTQ_CMD   0x00002b78
 
#define BNX2_RV2P_PFTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_RV2P_PFTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_RV2P_PFTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_RV2P_PFTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_RV2P_PFTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_RV2P_PFTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_RV2P_PFTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_RV2P_PFTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_RV2P_PFTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_RV2P_PFTQ_CMD_POP   (1L<<30)
 
#define BNX2_RV2P_PFTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_RV2P_PFTQ_CTL   0x00002b7c
 
#define BNX2_RV2P_PFTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_RV2P_PFTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_RV2P_PFTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_RV2P_PFTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_RV2P_PFTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_RV2P_RV2PTQ   0x00002b80
 
#define BNX2_RV2P_TFTQ_CMD   0x00002bb8
 
#define BNX2_RV2P_TFTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_RV2P_TFTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_RV2P_TFTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_RV2P_TFTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_RV2P_TFTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_RV2P_TFTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_RV2P_TFTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_RV2P_TFTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_RV2P_TFTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_RV2P_TFTQ_CMD_POP   (1L<<30)
 
#define BNX2_RV2P_TFTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_RV2P_TFTQ_CTL   0x00002bbc
 
#define BNX2_RV2P_TFTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_RV2P_TFTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_RV2P_TFTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_RV2P_TFTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_RV2P_TFTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_RV2P_RV2PMQ   0x00002bc0
 
#define BNX2_RV2P_MFTQ_CMD   0x00002bf8
 
#define BNX2_RV2P_MFTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_RV2P_MFTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_RV2P_MFTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_RV2P_MFTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_RV2P_MFTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_RV2P_MFTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_RV2P_MFTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_RV2P_MFTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_RV2P_MFTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_RV2P_MFTQ_CMD_POP   (1L<<30)
 
#define BNX2_RV2P_MFTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_RV2P_MFTQ_CTL   0x00002bfc
 
#define BNX2_RV2P_MFTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_RV2P_MFTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_RV2P_MFTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_RV2P_MFTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_RV2P_MFTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_MQ_COMMAND   0x00003c00
 
#define BNX2_MQ_COMMAND_ENABLED   (1L<<0)
 
#define BNX2_MQ_COMMAND_INIT   (1L<<1)
 
#define BNX2_MQ_COMMAND_OVERFLOW   (1L<<4)
 
#define BNX2_MQ_COMMAND_WR_ERROR   (1L<<5)
 
#define BNX2_MQ_COMMAND_RD_ERROR   (1L<<6)
 
#define BNX2_MQ_COMMAND_IDB_CFG_ERROR   (1L<<7)
 
#define BNX2_MQ_COMMAND_IDB_OVERFLOW   (1L<<10)
 
#define BNX2_MQ_COMMAND_NO_BIN_ERROR   (1L<<11)
 
#define BNX2_MQ_COMMAND_NO_MAP_ERROR   (1L<<12)
 
#define BNX2_MQ_STATUS   0x00003c04
 
#define BNX2_MQ_STATUS_CTX_ACCESS_STAT   (1L<<16)
 
#define BNX2_MQ_STATUS_CTX_ACCESS64_STAT   (1L<<17)
 
#define BNX2_MQ_STATUS_PCI_STALL_STAT   (1L<<18)
 
#define BNX2_MQ_STATUS_IDB_OFLOW_STAT   (1L<<19)
 
#define BNX2_MQ_CONFIG   0x00003c08
 
#define BNX2_MQ_CONFIG_TX_HIGH_PRI   (1L<<0)
 
#define BNX2_MQ_CONFIG_HALT_DIS   (1L<<1)
 
#define BNX2_MQ_CONFIG_BIN_MQ_MODE   (1L<<2)
 
#define BNX2_MQ_CONFIG_DIS_IDB_DROP   (1L<<3)
 
#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE   (0x7L<<4)
 
#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256   (0L<<4)
 
#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_512   (1L<<4)
 
#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_1K   (2L<<4)
 
#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_2K   (3L<<4)
 
#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_4K   (4L<<4)
 
#define BNX2_MQ_CONFIG_MAX_DEPTH   (0x7fL<<8)
 
#define BNX2_MQ_CONFIG_CUR_DEPTH   (0x7fL<<20)
 
#define BNX2_MQ_ENQUEUE1   0x00003c0c
 
#define BNX2_MQ_ENQUEUE1_OFFSET   (0x3fL<<2)
 
#define BNX2_MQ_ENQUEUE1_CID   (0x3fffL<<8)
 
#define BNX2_MQ_ENQUEUE1_BYTE_MASK   (0xfL<<24)
 
#define BNX2_MQ_ENQUEUE1_KNL_MODE   (1L<<28)
 
#define BNX2_MQ_ENQUEUE2   0x00003c10
 
#define BNX2_MQ_BAD_WR_ADDR   0x00003c14
 
#define BNX2_MQ_BAD_RD_ADDR   0x00003c18
 
#define BNX2_MQ_KNL_BYP_WIND_START   0x00003c1c
 
#define BNX2_MQ_KNL_BYP_WIND_START_VALUE   (0xfffffL<<12)
 
#define BNX2_MQ_KNL_WIND_END   0x00003c20
 
#define BNX2_MQ_KNL_WIND_END_VALUE   (0xffffffL<<8)
 
#define BNX2_MQ_KNL_WRITE_MASK1   0x00003c24
 
#define BNX2_MQ_KNL_TX_MASK1   0x00003c28
 
#define BNX2_MQ_KNL_CMD_MASK1   0x00003c2c
 
#define BNX2_MQ_KNL_COND_ENQUEUE_MASK1   0x00003c30
 
#define BNX2_MQ_KNL_RX_V2P_MASK1   0x00003c34
 
#define BNX2_MQ_KNL_WRITE_MASK2   0x00003c38
 
#define BNX2_MQ_KNL_TX_MASK2   0x00003c3c
 
#define BNX2_MQ_KNL_CMD_MASK2   0x00003c40
 
#define BNX2_MQ_KNL_COND_ENQUEUE_MASK2   0x00003c44
 
#define BNX2_MQ_KNL_RX_V2P_MASK2   0x00003c48
 
#define BNX2_MQ_KNL_BYP_WRITE_MASK1   0x00003c4c
 
#define BNX2_MQ_KNL_BYP_TX_MASK1   0x00003c50
 
#define BNX2_MQ_KNL_BYP_CMD_MASK1   0x00003c54
 
#define BNX2_MQ_KNL_BYP_COND_ENQUEUE_MASK1   0x00003c58
 
#define BNX2_MQ_KNL_BYP_RX_V2P_MASK1   0x00003c5c
 
#define BNX2_MQ_KNL_BYP_WRITE_MASK2   0x00003c60
 
#define BNX2_MQ_KNL_BYP_TX_MASK2   0x00003c64
 
#define BNX2_MQ_KNL_BYP_CMD_MASK2   0x00003c68
 
#define BNX2_MQ_KNL_BYP_COND_ENQUEUE_MASK2   0x00003c6c
 
#define BNX2_MQ_KNL_BYP_RX_V2P_MASK2   0x00003c70
 
#define BNX2_MQ_MEM_WR_ADDR   0x00003c74
 
#define BNX2_MQ_MEM_WR_ADDR_VALUE   (0x3fL<<0)
 
#define BNX2_MQ_MEM_WR_DATA0   0x00003c78
 
#define BNX2_MQ_MEM_WR_DATA0_VALUE   (0xffffffffL<<0)
 
#define BNX2_MQ_MEM_WR_DATA1   0x00003c7c
 
#define BNX2_MQ_MEM_WR_DATA1_VALUE   (0xffffffffL<<0)
 
#define BNX2_MQ_MEM_WR_DATA2   0x00003c80
 
#define BNX2_MQ_MEM_WR_DATA2_VALUE   (0x3fffffffL<<0)
 
#define BNX2_MQ_MEM_WR_DATA2_VALUE_XI   (0x7fffffffL<<0)
 
#define BNX2_MQ_MEM_RD_ADDR   0x00003c84
 
#define BNX2_MQ_MEM_RD_ADDR_VALUE   (0x3fL<<0)
 
#define BNX2_MQ_MEM_RD_DATA0   0x00003c88
 
#define BNX2_MQ_MEM_RD_DATA0_VALUE   (0xffffffffL<<0)
 
#define BNX2_MQ_MEM_RD_DATA1   0x00003c8c
 
#define BNX2_MQ_MEM_RD_DATA1_VALUE   (0xffffffffL<<0)
 
#define BNX2_MQ_MEM_RD_DATA2   0x00003c90
 
#define BNX2_MQ_MEM_RD_DATA2_VALUE   (0x3fffffffL<<0)
 
#define BNX2_MQ_MEM_RD_DATA2_VALUE_XI   (0x7fffffffL<<0)
 
#define BNX2_MQ_MAP_L2_3   0x00003d2c
 
#define BNX2_MQ_MAP_L2_3_MQ_OFFSET   (0xffL<<0)
 
#define BNX2_MQ_MAP_L2_3_SZ   (0x3L<<8)
 
#define BNX2_MQ_MAP_L2_3_CTX_OFFSET   (0x2ffL<<10)
 
#define BNX2_MQ_MAP_L2_3_BIN_OFFSET   (0x7L<<23)
 
#define BNX2_MQ_MAP_L2_3_ARM   (0x3L<<26)
 
#define BNX2_MQ_MAP_L2_3_ENA   (0x1L<<31)
 
#define BNX2_MQ_MAP_L2_3_DEFAULT   0x82004646
 
#define BNX2_MQ_MAP_L2_5   0x00003d34
 
#define BNX2_MQ_MAP_L2_5_ARM   (0x3L<<26)
 
#define BNX2_TSCH_TSS_CFG   0x00004c1c
 
#define BNX2_TSCH_TSS_CFG_TSS_START_CID   (0x7ffL<<8)
 
#define BNX2_TSCH_TSS_CFG_NUM_OF_TSS_CON   (0xfL<<24)
 
#define BNX2_TBDR_COMMAND   0x00005000
 
#define BNX2_TBDR_COMMAND_ENABLE   (1L<<0)
 
#define BNX2_TBDR_COMMAND_SOFT_RST   (1L<<1)
 
#define BNX2_TBDR_COMMAND_MSTR_ABORT   (1L<<4)
 
#define BNX2_TBDR_STATUS   0x00005004
 
#define BNX2_TBDR_STATUS_DMA_WAIT   (1L<<0)
 
#define BNX2_TBDR_STATUS_FTQ_WAIT   (1L<<1)
 
#define BNX2_TBDR_STATUS_FIFO_OVERFLOW   (1L<<2)
 
#define BNX2_TBDR_STATUS_FIFO_UNDERFLOW   (1L<<3)
 
#define BNX2_TBDR_STATUS_SEARCHMISS_ERROR   (1L<<4)
 
#define BNX2_TBDR_STATUS_FTQ_ENTRY_CNT   (1L<<5)
 
#define BNX2_TBDR_STATUS_BURST_CNT   (1L<<6)
 
#define BNX2_TBDR_CONFIG   0x00005008
 
#define BNX2_TBDR_CONFIG_MAX_BDS   (0xffL<<0)
 
#define BNX2_TBDR_CONFIG_SWAP_MODE   (1L<<8)
 
#define BNX2_TBDR_CONFIG_PRIORITY   (1L<<9)
 
#define BNX2_TBDR_CONFIG_CACHE_NEXT_PAGE_PTRS   (1L<<10)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE   (0xfL<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_256   (0L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_512   (1L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_1K   (2L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_2K   (3L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_4K   (4L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_8K   (5L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_16K   (6L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_32K   (7L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_64K   (8L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_128K   (9L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_256K   (10L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_512K   (11L<<24)
 
#define BNX2_TBDR_CONFIG_PAGE_SIZE_1M   (12L<<24)
 
#define BNX2_TBDR_DEBUG_VECT_PEEK   0x0000500c
 
#define BNX2_TBDR_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_TBDR_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_TBDR_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_TBDR_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_TBDR_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_TBDR_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_TBDR_CKSUM_ERROR_STATUS   0x00005010
 
#define BNX2_TBDR_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)
 
#define BNX2_TBDR_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)
 
#define BNX2_TBDR_TBDRQ   0x000053c0
 
#define BNX2_TBDR_FTQ_CMD   0x000053f8
 
#define BNX2_TBDR_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_TBDR_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_TBDR_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_TBDR_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_TBDR_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_TBDR_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_TBDR_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_TBDR_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_TBDR_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_TBDR_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_TBDR_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_TBDR_FTQ_CTL   0x000053fc
 
#define BNX2_TBDR_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_TBDR_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_TBDR_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_TBDR_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_TBDR_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_TBDC_COMMAND   0x5400
 
#define BNX2_TBDC_COMMAND_CMD_ENABLED   (1UL<<0)
 
#define BNX2_TBDC_COMMAND_CMD_FLUSH   (1UL<<1)
 
#define BNX2_TBDC_COMMAND_CMD_SOFT_RST   (1UL<<2)
 
#define BNX2_TBDC_COMMAND_CMD_REG_ARB   (1UL<<3)
 
#define BNX2_TBDC_COMMAND_WRCHK_RANGE_ERROR   (1UL<<4)
 
#define BNX2_TBDC_COMMAND_WRCHK_ALL_ONES_ERROR   (1UL<<5)
 
#define BNX2_TBDC_COMMAND_WRCHK_ALL_ZEROS_ERROR   (1UL<<6)
 
#define BNX2_TBDC_COMMAND_WRCHK_ANY_ONES_ERROR   (1UL<<7)
 
#define BNX2_TBDC_COMMAND_WRCHK_ANY_ZEROS_ERROR   (1UL<<8)
 
#define BNX2_TBDC_STATUS   0x5404
 
#define BNX2_TBDC_STATUS_FREE_CNT   (0x3fUL<<0)
 
#define BNX2_TBDC_BD_ADDR   0x5424
 
#define BNX2_TBDC_BIDX   0x542c
 
#define BNX2_TBDC_BDIDX_BDIDX   (0xffffUL<<0)
 
#define BNX2_TBDC_BDIDX_CMD   (0xffUL<<24)
 
#define BNX2_TBDC_CID   0x5430
 
#define BNX2_TBDC_CAM_OPCODE   0x5434
 
#define BNX2_TBDC_CAM_OPCODE_OPCODE   (0x7UL<<0)
 
#define BNX2_TBDC_CAM_OPCODE_OPCODE_SEARCH   (0UL<<0)
 
#define BNX2_TBDC_CAM_OPCODE_OPCODE_CACHE_WRITE   (1UL<<0)
 
#define BNX2_TBDC_CAM_OPCODE_OPCODE_INVALIDATE   (2UL<<0)
 
#define BNX2_TBDC_CAM_OPCODE_OPCODE_CAM_WRITE   (4UL<<0)
 
#define BNX2_TBDC_CAM_OPCODE_OPCODE_CAM_READ   (5UL<<0)
 
#define BNX2_TBDC_CAM_OPCODE_OPCODE_RAM_WRITE   (6UL<<0)
 
#define BNX2_TBDC_CAM_OPCODE_OPCODE_RAM_READ   (7UL<<0)
 
#define BNX2_TBDC_CAM_OPCODE_SMASK_BDIDX   (1UL<<4)
 
#define BNX2_TBDC_CAM_OPCODE_SMASK_CID   (1UL<<5)
 
#define BNX2_TBDC_CAM_OPCODE_SMASK_CMD   (1UL<<6)
 
#define BNX2_TBDC_CAM_OPCODE_WMT_FAILED   (1UL<<7)
 
#define BNX2_TBDC_CAM_OPCODE_CAM_VALIDS   (0xffUL<<8)
 
#define BNX2_TDMA_COMMAND   0x00005c00
 
#define BNX2_TDMA_COMMAND_ENABLED   (1L<<0)
 
#define BNX2_TDMA_COMMAND_MASTER_ABORT   (1L<<4)
 
#define BNX2_TDMA_COMMAND_CS16_ERR   (1L<<5)
 
#define BNX2_TDMA_COMMAND_BAD_L2_LENGTH_ABORT   (1L<<7)
 
#define BNX2_TDMA_COMMAND_MASK_CS1   (1L<<20)
 
#define BNX2_TDMA_COMMAND_MASK_CS2   (1L<<21)
 
#define BNX2_TDMA_COMMAND_MASK_CS3   (1L<<22)
 
#define BNX2_TDMA_COMMAND_MASK_CS4   (1L<<23)
 
#define BNX2_TDMA_COMMAND_FORCE_ILOCK_CKERR   (1L<<24)
 
#define BNX2_TDMA_COMMAND_OFIFO_CLR   (1L<<30)
 
#define BNX2_TDMA_COMMAND_IFIFO_CLR   (1L<<31)
 
#define BNX2_TDMA_STATUS   0x00005c04
 
#define BNX2_TDMA_STATUS_DMA_WAIT   (1L<<0)
 
#define BNX2_TDMA_STATUS_PAYLOAD_WAIT   (1L<<1)
 
#define BNX2_TDMA_STATUS_PATCH_FTQ_WAIT   (1L<<2)
 
#define BNX2_TDMA_STATUS_LOCK_WAIT   (1L<<3)
 
#define BNX2_TDMA_STATUS_FTQ_ENTRY_CNT   (1L<<16)
 
#define BNX2_TDMA_STATUS_BURST_CNT   (1L<<17)
 
#define BNX2_TDMA_STATUS_MAX_IFIFO_DEPTH   (0x3fL<<20)
 
#define BNX2_TDMA_STATUS_OFIFO_OVERFLOW   (1L<<30)
 
#define BNX2_TDMA_STATUS_IFIFO_OVERFLOW   (1L<<31)
 
#define BNX2_TDMA_CONFIG   0x00005c08
 
#define BNX2_TDMA_CONFIG_ONE_DMA   (1L<<0)
 
#define BNX2_TDMA_CONFIG_ONE_RECORD   (1L<<1)
 
#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN   (0x3L<<2)
 
#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN_0   (0L<<2)
 
#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN_1   (1L<<2)
 
#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN_2   (2L<<2)
 
#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN_3   (3L<<2)
 
#define BNX2_TDMA_CONFIG_LIMIT_SZ   (0xfL<<4)
 
#define BNX2_TDMA_CONFIG_LIMIT_SZ_64   (0L<<4)
 
#define BNX2_TDMA_CONFIG_LIMIT_SZ_128   (0x4L<<4)
 
#define BNX2_TDMA_CONFIG_LIMIT_SZ_256   (0x6L<<4)
 
#define BNX2_TDMA_CONFIG_LIMIT_SZ_512   (0x8L<<4)
 
#define BNX2_TDMA_CONFIG_LINE_SZ   (0xfL<<8)
 
#define BNX2_TDMA_CONFIG_LINE_SZ_64   (0L<<8)
 
#define BNX2_TDMA_CONFIG_LINE_SZ_128   (4L<<8)
 
#define BNX2_TDMA_CONFIG_LINE_SZ_256   (6L<<8)
 
#define BNX2_TDMA_CONFIG_LINE_SZ_512   (8L<<8)
 
#define BNX2_TDMA_CONFIG_ALIGN_ENA   (1L<<15)
 
#define BNX2_TDMA_CONFIG_CHK_L2_BD   (1L<<16)
 
#define BNX2_TDMA_CONFIG_CMPL_ENTRY   (1L<<17)
 
#define BNX2_TDMA_CONFIG_OFIFO_CMP   (1L<<19)
 
#define BNX2_TDMA_CONFIG_OFIFO_CMP_3   (0L<<19)
 
#define BNX2_TDMA_CONFIG_OFIFO_CMP_2   (1L<<19)
 
#define BNX2_TDMA_CONFIG_FIFO_CMP   (0xfL<<20)
 
#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_XI   (0x7L<<20)
 
#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_0_XI   (0L<<20)
 
#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_4_XI   (1L<<20)
 
#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_8_XI   (2L<<20)
 
#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_16_XI   (3L<<20)
 
#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_32_XI   (4L<<20)
 
#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_64_XI   (5L<<20)
 
#define BNX2_TDMA_CONFIG_FIFO_CMP_EN_XI   (1L<<23)
 
#define BNX2_TDMA_CONFIG_BYTES_OST_XI   (0x7L<<24)
 
#define BNX2_TDMA_CONFIG_BYTES_OST_512_XI   (0L<<24)
 
#define BNX2_TDMA_CONFIG_BYTES_OST_1024_XI   (1L<<24)
 
#define BNX2_TDMA_CONFIG_BYTES_OST_2048_XI   (2L<<24)
 
#define BNX2_TDMA_CONFIG_BYTES_OST_4096_XI   (3L<<24)
 
#define BNX2_TDMA_CONFIG_BYTES_OST_8192_XI   (4L<<24)
 
#define BNX2_TDMA_CONFIG_BYTES_OST_16384_XI   (5L<<24)
 
#define BNX2_TDMA_CONFIG_HC_BYPASS_XI   (1L<<27)
 
#define BNX2_TDMA_CONFIG_LCL_MRRS_XI   (0x7L<<28)
 
#define BNX2_TDMA_CONFIG_LCL_MRRS_128_XI   (0L<<28)
 
#define BNX2_TDMA_CONFIG_LCL_MRRS_256_XI   (1L<<28)
 
#define BNX2_TDMA_CONFIG_LCL_MRRS_512_XI   (2L<<28)
 
#define BNX2_TDMA_CONFIG_LCL_MRRS_1024_XI   (3L<<28)
 
#define BNX2_TDMA_CONFIG_LCL_MRRS_2048_XI   (4L<<28)
 
#define BNX2_TDMA_CONFIG_LCL_MRRS_4096_XI   (5L<<28)
 
#define BNX2_TDMA_CONFIG_LCL_MRRS_EN_XI   (1L<<31)
 
#define BNX2_TDMA_PAYLOAD_PROD   0x00005c0c
 
#define BNX2_TDMA_PAYLOAD_PROD_VALUE   (0x1fffL<<3)
 
#define BNX2_TDMA_DBG_WATCHDOG   0x00005c10
 
#define BNX2_TDMA_DBG_TRIGGER   0x00005c14
 
#define BNX2_TDMA_DMAD_FSM   0x00005c80
 
#define BNX2_TDMA_DMAD_FSM_BD_INVLD   (1L<<0)
 
#define BNX2_TDMA_DMAD_FSM_PUSH   (0xfL<<4)
 
#define BNX2_TDMA_DMAD_FSM_ARB_TBDC   (0x3L<<8)
 
#define BNX2_TDMA_DMAD_FSM_ARB_CTX   (1L<<12)
 
#define BNX2_TDMA_DMAD_FSM_DR_INTF   (1L<<16)
 
#define BNX2_TDMA_DMAD_FSM_DMAD   (0x7L<<20)
 
#define BNX2_TDMA_DMAD_FSM_BD   (0xfL<<24)
 
#define BNX2_TDMA_DMAD_STATUS   0x00005c84
 
#define BNX2_TDMA_DMAD_STATUS_RHOLD_PUSH_ENTRY   (0x3L<<0)
 
#define BNX2_TDMA_DMAD_STATUS_RHOLD_DMAD_ENTRY   (0x3L<<4)
 
#define BNX2_TDMA_DMAD_STATUS_RHOLD_BD_ENTRY   (0x3L<<8)
 
#define BNX2_TDMA_DMAD_STATUS_IFTQ_ENUM   (0xfL<<12)
 
#define BNX2_TDMA_DR_INTF_FSM   0x00005c88
 
#define BNX2_TDMA_DR_INTF_FSM_L2_COMP   (0x3L<<0)
 
#define BNX2_TDMA_DR_INTF_FSM_TPATQ   (0x7L<<4)
 
#define BNX2_TDMA_DR_INTF_FSM_TPBUF   (0x3L<<8)
 
#define BNX2_TDMA_DR_INTF_FSM_DR_BUF   (0x7L<<12)
 
#define BNX2_TDMA_DR_INTF_FSM_DMAD   (0x7L<<16)
 
#define BNX2_TDMA_DR_INTF_STATUS   0x00005c8c
 
#define BNX2_TDMA_DR_INTF_STATUS_HOLE_PHASE   (0x7L<<0)
 
#define BNX2_TDMA_DR_INTF_STATUS_DATA_AVAIL   (0x3L<<4)
 
#define BNX2_TDMA_DR_INTF_STATUS_SHIFT_ADDR   (0x7L<<8)
 
#define BNX2_TDMA_DR_INTF_STATUS_NXT_PNTR   (0xfL<<12)
 
#define BNX2_TDMA_DR_INTF_STATUS_BYTE_COUNT   (0x7L<<16)
 
#define BNX2_TDMA_PUSH_FSM   0x00005c90
 
#define BNX2_TDMA_BD_IF_DEBUG   0x00005c94
 
#define BNX2_TDMA_DMAD_IF_DEBUG   0x00005c98
 
#define BNX2_TDMA_CTX_IF_DEBUG   0x00005c9c
 
#define BNX2_TDMA_TPBUF_IF_DEBUG   0x00005ca0
 
#define BNX2_TDMA_DR_IF_DEBUG   0x00005ca4
 
#define BNX2_TDMA_TPATQ_IF_DEBUG   0x00005ca8
 
#define BNX2_TDMA_TDMA_ILOCK_CKSUM   0x00005cac
 
#define BNX2_TDMA_TDMA_ILOCK_CKSUM_CALCULATED   (0xffffL<<0)
 
#define BNX2_TDMA_TDMA_ILOCK_CKSUM_EXPECTED   (0xffffL<<16)
 
#define BNX2_TDMA_TDMA_PCIE_CKSUM   0x00005cb0
 
#define BNX2_TDMA_TDMA_PCIE_CKSUM_CALCULATED   (0xffffL<<0)
 
#define BNX2_TDMA_TDMA_PCIE_CKSUM_EXPECTED   (0xffffL<<16)
 
#define BNX2_TDMA_TDMAQ   0x00005fc0
 
#define BNX2_TDMA_FTQ_CMD   0x00005ff8
 
#define BNX2_TDMA_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_TDMA_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_TDMA_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_TDMA_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_TDMA_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_TDMA_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_TDMA_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_TDMA_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_TDMA_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_TDMA_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_TDMA_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_TDMA_FTQ_CTL   0x00005ffc
 
#define BNX2_TDMA_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_TDMA_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_TDMA_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_TDMA_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_TDMA_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_HC_COMMAND   0x00006800
 
#define BNX2_HC_COMMAND_ENABLE   (1L<<0)
 
#define BNX2_HC_COMMAND_SKIP_ABORT   (1L<<4)
 
#define BNX2_HC_COMMAND_COAL_NOW   (1L<<16)
 
#define BNX2_HC_COMMAND_COAL_NOW_WO_INT   (1L<<17)
 
#define BNX2_HC_COMMAND_STATS_NOW   (1L<<18)
 
#define BNX2_HC_COMMAND_FORCE_INT   (0x3L<<19)
 
#define BNX2_HC_COMMAND_FORCE_INT_NULL   (0L<<19)
 
#define BNX2_HC_COMMAND_FORCE_INT_HIGH   (1L<<19)
 
#define BNX2_HC_COMMAND_FORCE_INT_LOW   (2L<<19)
 
#define BNX2_HC_COMMAND_FORCE_INT_FREE   (3L<<19)
 
#define BNX2_HC_COMMAND_CLR_STAT_NOW   (1L<<21)
 
#define BNX2_HC_COMMAND_MAIN_PWR_INT   (1L<<22)
 
#define BNX2_HC_COMMAND_COAL_ON_NEXT_EVENT   (1L<<27)
 
#define BNX2_HC_STATUS   0x00006804
 
#define BNX2_HC_STATUS_MASTER_ABORT   (1L<<0)
 
#define BNX2_HC_STATUS_PARITY_ERROR_STATE   (1L<<1)
 
#define BNX2_HC_STATUS_PCI_CLK_CNT_STAT   (1L<<16)
 
#define BNX2_HC_STATUS_CORE_CLK_CNT_STAT   (1L<<17)
 
#define BNX2_HC_STATUS_NUM_STATUS_BLOCKS_STAT   (1L<<18)
 
#define BNX2_HC_STATUS_NUM_INT_GEN_STAT   (1L<<19)
 
#define BNX2_HC_STATUS_NUM_INT_MBOX_WR_STAT   (1L<<20)
 
#define BNX2_HC_STATUS_CORE_CLKS_TO_HW_INTACK_STAT   (1L<<23)
 
#define BNX2_HC_STATUS_CORE_CLKS_TO_SW_INTACK_STAT   (1L<<24)
 
#define BNX2_HC_STATUS_CORE_CLKS_DURING_SW_INTACK_STAT   (1L<<25)
 
#define BNX2_HC_CONFIG   0x00006808
 
#define BNX2_HC_CONFIG_COLLECT_STATS   (1L<<0)
 
#define BNX2_HC_CONFIG_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_CONFIG_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_CONFIG_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_CONFIG_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_CONFIG_STATISTIC_PRIORITY   (1L<<5)
 
#define BNX2_HC_CONFIG_STATUS_PRIORITY   (1L<<6)
 
#define BNX2_HC_CONFIG_STAT_MEM_ADDR   (0xffL<<8)
 
#define BNX2_HC_CONFIG_PER_MODE   (1L<<16)
 
#define BNX2_HC_CONFIG_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_CONFIG_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_CONFIG_SET_MASK_AT_RD   (1L<<19)
 
#define BNX2_HC_CONFIG_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC   (0x7L<<24)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC_64B   (0L<<24)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC_128B   (1L<<24)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC_256B   (2L<<24)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC_512B   (3L<<24)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC_1024B   (4L<<24)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC_2048B   (5L<<24)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC_4096B   (6L<<24)
 
#define BNX2_HC_CONFIG_SB_ADDR_INC_8192B   (7L<<24)
 
#define BNX2_HC_CONFIG_GEN_STAT_AVG_INTR   (1L<<29)
 
#define BNX2_HC_CONFIG_UNMASK_ALL   (1L<<30)
 
#define BNX2_HC_CONFIG_TX_SEL   (1L<<31)
 
#define BNX2_HC_ATTN_BITS_ENABLE   0x0000680c
 
#define BNX2_HC_STATUS_ADDR_L   0x00006810
 
#define BNX2_HC_STATUS_ADDR_H   0x00006814
 
#define BNX2_HC_STATISTICS_ADDR_L   0x00006818
 
#define BNX2_HC_STATISTICS_ADDR_H   0x0000681c
 
#define BNX2_HC_TX_QUICK_CONS_TRIP   0x00006820
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP   0x00006824
 
#define BNX2_HC_COMP_PROD_TRIP_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP   0x00006828
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS   0x0000682c
 
#define BNX2_HC_RX_TICKS_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS   0x00006830
 
#define BNX2_HC_TX_TICKS_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS   0x00006834
 
#define BNX2_HC_COM_TICKS_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS   0x00006838
 
#define BNX2_HC_CMD_TICKS_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS   0x0000683c
 
#define BNX2_HC_PERIODIC_TICKS_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_STAT_COLLECT_TICKS   0x00006840
 
#define BNX2_HC_STAT_COLLECT_TICKS_HC_STAT_COLL_TICKS   (0xffL<<4)
 
#define BNX2_HC_STATS_TICKS   0x00006844
 
#define BNX2_HC_STATS_TICKS_HC_STAT_TICKS   (0xffffL<<8)
 
#define BNX2_HC_STATS_INTERRUPT_STATUS   0x00006848
 
#define BNX2_HC_STATS_INTERRUPT_STATUS_SB_STATUS   (0x1ffL<<0)
 
#define BNX2_HC_STATS_INTERRUPT_STATUS_INT_STATUS   (0x1ffL<<16)
 
#define BNX2_HC_STAT_MEM_DATA   0x0000684c
 
#define BNX2_HC_STAT_GEN_SEL_0   0x00006850
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0   (0x7fL<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT0   (0L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT1   (1L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT2   (2L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT3   (3L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT4   (4L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT5   (5L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT6   (6L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT7   (7L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT8   (8L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT9   (9L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT10   (10L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT11   (11L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT0   (12L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT1   (13L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT2   (14L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT3   (15L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT4   (16L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT5   (17L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT6   (18L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT7   (19L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT0   (20L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT1   (21L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT2   (22L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT3   (23L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT4   (24L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT5   (25L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT6   (26L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT7   (27L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT8   (28L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT9   (29L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT10   (30L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT11   (31L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT0   (32L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT1   (33L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT2   (34L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT3   (35L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT0   (36L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT1   (37L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT2   (38L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT3   (39L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT4   (40L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT5   (41L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT6   (42L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT7   (43L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT0   (44L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT1   (45L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT2   (46L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT3   (47L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT4   (48L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT5   (49L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT6   (50L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT7   (51L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_PCI_CLK_CNT   (52L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CORE_CLK_CNT   (53L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS   (54L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN   (55L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR   (56L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK   (59L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK   (60L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK   (61L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_CMD_CNT   (62L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_SLOT_CNT   (63L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_CMD_CNT   (64L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_SLOT_CNT   (65L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUPQ_VALID_CNT   (66L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPQ_VALID_CNT   (67L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPCQ_VALID_CNT   (68L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PPQ_VALID_CNT   (69L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PMQ_VALID_CNT   (70L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PTQ_VALID_CNT   (71L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMAQ_VALID_CNT   (72L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCHQ_VALID_CNT   (73L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDRQ_VALID_CNT   (74L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXPQ_VALID_CNT   (75L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMAQ_VALID_CNT   (76L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPATQ_VALID_CNT   (77L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TASQ_VALID_CNT   (78L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSQ_VALID_CNT   (79L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CPQ_VALID_CNT   (80L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMXQ_VALID_CNT   (81L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMTQ_VALID_CNT   (82L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMQ_VALID_CNT   (83L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MGMQ_VALID_CNT   (84L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_TRANSFERS_CNT   (85L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_DELAY_PCI_CLKS_CNT   (86L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_TRANSFERS_CNT   (87L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_DELAY_PCI_CLKS_CNT   (88L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_RETRY_AFTER_DATA_CNT   (89L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_TRANSFERS_CNT   (90L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_DELAY_PCI_CLKS_CNT   (91L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_TRANSFERS_CNT   (92L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_DELAY_PCI_CLKS_CNT   (93L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_RETRY_AFTER_DATA_CNT   (94L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_WR_CNT64   (95L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_RD_CNT64   (96L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_ACC_STALL_CLKS   (97L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_LOCK_STALL_CLKS   (98L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS_STAT   (99L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS64_STAT   (100L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_PCI_STALL_STAT   (101L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_FTQ_ENTRY_CNT   (102L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_BURST_CNT   (103L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_FTQ_ENTRY_CNT   (104L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_BURST_CNT   (105L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_FTQ_ENTRY_CNT   (106L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_BURST_CNT   (107L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUP_MATCH_CNT   (108L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_POLL_PASS_CNT   (109L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR1_CNT   (110L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR2_CNT   (111L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR3_CNT   (112L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR4_CNT   (113L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR5_CNT   (114L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT0   (115L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT1   (116L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT2   (117L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT3   (118L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT4   (119L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT5   (120L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC1_MISS   (121L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC2_MISS   (122L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_BURST_CNT   (127L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_1   (0x7fL<<8)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_2   (0x7fL<<16)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_3   (0x7fL<<24)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_XI   (0xffL<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UMP_RX_FRAME_DROP_XI   (52L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S0_XI   (57L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S1_XI   (58L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S2_XI   (85L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S3_XI   (86L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S4_XI   (87L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S5_XI   (88L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S6_XI   (89L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S7_XI   (90L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S8_XI   (91L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S9_XI   (92L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S10_XI   (93L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MQ_IDB_OFLOW_XI   (94L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_BLK_RD_CNT_XI   (123L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_BLK_WR_CNT_XI   (124L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_HITS_XI   (125L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_MISSES_XI   (126L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC1_XI   (128L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC1_XI   (129L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC1_XI   (130L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC1_XI   (131L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC1_XI   (132L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC1_XI   (133L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC2_XI   (134L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC2_XI   (135L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC2_XI   (136L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC2_XI   (137L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC2_XI   (138L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC2_XI   (139L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC3_XI   (140L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC3_XI   (141L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC3_XI   (142L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC3_XI   (143L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC3_XI   (144L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC3_XI   (145L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC4_XI   (146L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC4_XI   (147L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC4_XI   (148L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC4_XI   (149L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC4_XI   (150L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC4_XI   (151L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC5_XI   (152L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC5_XI   (153L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC5_XI   (154L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC5_XI   (155L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC5_XI   (156L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC5_XI   (157L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC6_XI   (158L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC6_XI   (159L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC6_XI   (160L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC6_XI   (161L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC6_XI   (162L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC6_XI   (163L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC7_XI   (164L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC7_XI   (165L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC7_XI   (166L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC7_XI   (167L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC7_XI   (168L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC7_XI   (169L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC8_XI   (170L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC8_XI   (171L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC8_XI   (172L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC8_XI   (173L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC8_XI   (174L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC8_XI   (175L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PCS_CMD_CNT_XI   (176L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PCS_SLOT_CNT_XI   (177L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PCSQ_VALID_CNT_XI   (178L<<0)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_1_XI   (0xffL<<8)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_2_XI   (0xffL<<16)
 
#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_3_XI   (0xffL<<24)
 
#define BNX2_HC_STAT_GEN_SEL_1   0x00006854
 
#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_4   (0x7fL<<0)
 
#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_5   (0x7fL<<8)
 
#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_6   (0x7fL<<16)
 
#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_7   (0x7fL<<24)
 
#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_4_XI   (0xffL<<0)
 
#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_5_XI   (0xffL<<8)
 
#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_6_XI   (0xffL<<16)
 
#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_7_XI   (0xffL<<24)
 
#define BNX2_HC_STAT_GEN_SEL_2   0x00006858
 
#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_8   (0x7fL<<0)
 
#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_9   (0x7fL<<8)
 
#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_10   (0x7fL<<16)
 
#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_11   (0x7fL<<24)
 
#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_8_XI   (0xffL<<0)
 
#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_9_XI   (0xffL<<8)
 
#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_10_XI   (0xffL<<16)
 
#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_11_XI   (0xffL<<24)
 
#define BNX2_HC_STAT_GEN_SEL_3   0x0000685c
 
#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_12   (0x7fL<<0)
 
#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_13   (0x7fL<<8)
 
#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_14   (0x7fL<<16)
 
#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_15   (0x7fL<<24)
 
#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_12_XI   (0xffL<<0)
 
#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_13_XI   (0xffL<<8)
 
#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_14_XI   (0xffL<<16)
 
#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_15_XI   (0xffL<<24)
 
#define BNX2_HC_STAT_GEN_STAT0   0x00006888
 
#define BNX2_HC_STAT_GEN_STAT1   0x0000688c
 
#define BNX2_HC_STAT_GEN_STAT2   0x00006890
 
#define BNX2_HC_STAT_GEN_STAT3   0x00006894
 
#define BNX2_HC_STAT_GEN_STAT4   0x00006898
 
#define BNX2_HC_STAT_GEN_STAT5   0x0000689c
 
#define BNX2_HC_STAT_GEN_STAT6   0x000068a0
 
#define BNX2_HC_STAT_GEN_STAT7   0x000068a4
 
#define BNX2_HC_STAT_GEN_STAT8   0x000068a8
 
#define BNX2_HC_STAT_GEN_STAT9   0x000068ac
 
#define BNX2_HC_STAT_GEN_STAT10   0x000068b0
 
#define BNX2_HC_STAT_GEN_STAT11   0x000068b4
 
#define BNX2_HC_STAT_GEN_STAT12   0x000068b8
 
#define BNX2_HC_STAT_GEN_STAT13   0x000068bc
 
#define BNX2_HC_STAT_GEN_STAT14   0x000068c0
 
#define BNX2_HC_STAT_GEN_STAT15   0x000068c4
 
#define BNX2_HC_STAT_GEN_STAT_AC0   0x000068c8
 
#define BNX2_HC_STAT_GEN_STAT_AC1   0x000068cc
 
#define BNX2_HC_STAT_GEN_STAT_AC2   0x000068d0
 
#define BNX2_HC_STAT_GEN_STAT_AC3   0x000068d4
 
#define BNX2_HC_STAT_GEN_STAT_AC4   0x000068d8
 
#define BNX2_HC_STAT_GEN_STAT_AC5   0x000068dc
 
#define BNX2_HC_STAT_GEN_STAT_AC6   0x000068e0
 
#define BNX2_HC_STAT_GEN_STAT_AC7   0x000068e4
 
#define BNX2_HC_STAT_GEN_STAT_AC8   0x000068e8
 
#define BNX2_HC_STAT_GEN_STAT_AC9   0x000068ec
 
#define BNX2_HC_STAT_GEN_STAT_AC10   0x000068f0
 
#define BNX2_HC_STAT_GEN_STAT_AC11   0x000068f4
 
#define BNX2_HC_STAT_GEN_STAT_AC12   0x000068f8
 
#define BNX2_HC_STAT_GEN_STAT_AC13   0x000068fc
 
#define BNX2_HC_STAT_GEN_STAT_AC14   0x00006900
 
#define BNX2_HC_STAT_GEN_STAT_AC15   0x00006904
 
#define BNX2_HC_STAT_GEN_STAT_AC   0x000068c8
 
#define BNX2_HC_VIS   0x00006908
 
#define BNX2_HC_VIS_STAT_BUILD_STATE   (0xfL<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_IDLE   (0L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_START   (1L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_REQUEST   (2L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE64   (3L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE32   (4L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE_DONE   (5L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_DMA   (6L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_CONTROL   (7L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_LOW   (8L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_HIGH   (9L<<0)
 
#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_DATA   (10L<<0)
 
#define BNX2_HC_VIS_DMA_STAT_STATE   (0xfL<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_IDLE   (0L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_STATUS_PARAM   (1L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_STATUS_DMA   (2L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP   (3L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_COMP   (4L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_STATISTIC_PARAM   (5L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_STATISTIC_DMA   (6L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP_1   (7L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP_2   (8L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_WAIT   (9L<<8)
 
#define BNX2_HC_VIS_DMA_STAT_STATE_ABORT   (15L<<8)
 
#define BNX2_HC_VIS_DMA_MSI_STATE   (0x7L<<12)
 
#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE   (0x3L<<15)
 
#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_IDLE   (0L<<15)
 
#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_COUNT   (1L<<15)
 
#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_START   (2L<<15)
 
#define BNX2_HC_VIS_1   0x0000690c
 
#define BNX2_HC_VIS_1_HW_INTACK_STATE   (1L<<4)
 
#define BNX2_HC_VIS_1_HW_INTACK_STATE_IDLE   (0L<<4)
 
#define BNX2_HC_VIS_1_HW_INTACK_STATE_COUNT   (1L<<4)
 
#define BNX2_HC_VIS_1_SW_INTACK_STATE   (1L<<5)
 
#define BNX2_HC_VIS_1_SW_INTACK_STATE_IDLE   (0L<<5)
 
#define BNX2_HC_VIS_1_SW_INTACK_STATE_COUNT   (1L<<5)
 
#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE   (1L<<6)
 
#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE_IDLE   (0L<<6)
 
#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE_COUNT   (1L<<6)
 
#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE   (1L<<7)
 
#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE_IDLE   (0L<<7)
 
#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE_COUNT   (1L<<7)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE   (0xfL<<17)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_IDLE   (0L<<17)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_DMA   (1L<<17)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_UPDATE   (2L<<17)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ASSIGN   (3L<<17)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_WAIT   (4L<<17)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_UPDATE   (5L<<17)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_ASSIGN   (6L<<17)
 
#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_WAIT   (7L<<17)
 
#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE   (0x3L<<21)
 
#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE_NORMAL   (0L<<21)
 
#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE_CLEAR   (1L<<21)
 
#define BNX2_HC_VIS_1_INT_GEN_STATE   (1L<<23)
 
#define BNX2_HC_VIS_1_INT_GEN_STATE_DLE   (0L<<23)
 
#define BNX2_HC_VIS_1_INT_GEN_STATE_NTERRUPT   (1L<<23)
 
#define BNX2_HC_VIS_1_STAT_CHAN_ID   (0x7L<<24)
 
#define BNX2_HC_VIS_1_INT_B   (1L<<27)
 
#define BNX2_HC_DEBUG_VECT_PEEK   0x00006910
 
#define BNX2_HC_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_HC_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_HC_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_HC_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_HC_COALESCE_NOW   0x00006914
 
#define BNX2_HC_COALESCE_NOW_COAL_NOW   (0x1ffL<<1)
 
#define BNX2_HC_COALESCE_NOW_COAL_NOW_WO_INT   (0x1ffL<<11)
 
#define BNX2_HC_COALESCE_NOW_COAL_ON_NXT_EVENT   (0x1ffL<<21)
 
#define BNX2_HC_MSIX_BIT_VECTOR   0x00006918
 
#define BNX2_HC_MSIX_BIT_VECTOR_VAL   (0x1ffL<<0)
 
#define BNX2_HC_SB_CONFIG_1   0x00006a00
 
#define BNX2_HC_SB_CONFIG_1_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_SB_CONFIG_1_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_SB_CONFIG_1_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_SB_CONFIG_1_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_SB_CONFIG_1_PER_MODE   (1L<<16)
 
#define BNX2_HC_SB_CONFIG_1_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_SB_CONFIG_1_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_SB_CONFIG_1_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_1   0x00006a04
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_1_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_1_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP_1   0x00006a08
 
#define BNX2_HC_COMP_PROD_TRIP_1_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_1_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_1   0x00006a0c
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_1_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_1_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS_1   0x00006a10
 
#define BNX2_HC_RX_TICKS_1_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_1_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS_1   0x00006a14
 
#define BNX2_HC_TX_TICKS_1_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_1_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS_1   0x00006a18
 
#define BNX2_HC_COM_TICKS_1_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_1_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS_1   0x00006a1c
 
#define BNX2_HC_CMD_TICKS_1_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_1_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS_1   0x00006a20
 
#define BNX2_HC_PERIODIC_TICKS_1_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_1_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_SB_CONFIG_2   0x00006a24
 
#define BNX2_HC_SB_CONFIG_2_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_SB_CONFIG_2_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_SB_CONFIG_2_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_SB_CONFIG_2_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_SB_CONFIG_2_PER_MODE   (1L<<16)
 
#define BNX2_HC_SB_CONFIG_2_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_SB_CONFIG_2_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_SB_CONFIG_2_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_2   0x00006a28
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_2_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_2_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP_2   0x00006a2c
 
#define BNX2_HC_COMP_PROD_TRIP_2_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_2_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_2   0x00006a30
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_2_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_2_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS_2   0x00006a34
 
#define BNX2_HC_RX_TICKS_2_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_2_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS_2   0x00006a38
 
#define BNX2_HC_TX_TICKS_2_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_2_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS_2   0x00006a3c
 
#define BNX2_HC_COM_TICKS_2_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_2_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS_2   0x00006a40
 
#define BNX2_HC_CMD_TICKS_2_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_2_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS_2   0x00006a44
 
#define BNX2_HC_PERIODIC_TICKS_2_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_2_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_SB_CONFIG_3   0x00006a48
 
#define BNX2_HC_SB_CONFIG_3_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_SB_CONFIG_3_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_SB_CONFIG_3_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_SB_CONFIG_3_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_SB_CONFIG_3_PER_MODE   (1L<<16)
 
#define BNX2_HC_SB_CONFIG_3_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_SB_CONFIG_3_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_SB_CONFIG_3_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_3   0x00006a4c
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_3_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_3_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP_3   0x00006a50
 
#define BNX2_HC_COMP_PROD_TRIP_3_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_3_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_3   0x00006a54
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_3_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_3_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS_3   0x00006a58
 
#define BNX2_HC_RX_TICKS_3_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_3_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS_3   0x00006a5c
 
#define BNX2_HC_TX_TICKS_3_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_3_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS_3   0x00006a60
 
#define BNX2_HC_COM_TICKS_3_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_3_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS_3   0x00006a64
 
#define BNX2_HC_CMD_TICKS_3_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_3_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS_3   0x00006a68
 
#define BNX2_HC_PERIODIC_TICKS_3_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_3_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_SB_CONFIG_4   0x00006a6c
 
#define BNX2_HC_SB_CONFIG_4_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_SB_CONFIG_4_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_SB_CONFIG_4_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_SB_CONFIG_4_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_SB_CONFIG_4_PER_MODE   (1L<<16)
 
#define BNX2_HC_SB_CONFIG_4_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_SB_CONFIG_4_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_SB_CONFIG_4_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_4   0x00006a70
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_4_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_4_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP_4   0x00006a74
 
#define BNX2_HC_COMP_PROD_TRIP_4_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_4_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_4   0x00006a78
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_4_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_4_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS_4   0x00006a7c
 
#define BNX2_HC_RX_TICKS_4_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_4_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS_4   0x00006a80
 
#define BNX2_HC_TX_TICKS_4_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_4_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS_4   0x00006a84
 
#define BNX2_HC_COM_TICKS_4_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_4_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS_4   0x00006a88
 
#define BNX2_HC_CMD_TICKS_4_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_4_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS_4   0x00006a8c
 
#define BNX2_HC_PERIODIC_TICKS_4_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_4_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_SB_CONFIG_5   0x00006a90
 
#define BNX2_HC_SB_CONFIG_5_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_SB_CONFIG_5_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_SB_CONFIG_5_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_SB_CONFIG_5_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_SB_CONFIG_5_PER_MODE   (1L<<16)
 
#define BNX2_HC_SB_CONFIG_5_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_SB_CONFIG_5_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_SB_CONFIG_5_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_5   0x00006a94
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_5_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_5_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP_5   0x00006a98
 
#define BNX2_HC_COMP_PROD_TRIP_5_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_5_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_5   0x00006a9c
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_5_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_5_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS_5   0x00006aa0
 
#define BNX2_HC_RX_TICKS_5_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_5_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS_5   0x00006aa4
 
#define BNX2_HC_TX_TICKS_5_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_5_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS_5   0x00006aa8
 
#define BNX2_HC_COM_TICKS_5_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_5_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS_5   0x00006aac
 
#define BNX2_HC_CMD_TICKS_5_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_5_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS_5   0x00006ab0
 
#define BNX2_HC_PERIODIC_TICKS_5_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_5_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_SB_CONFIG_6   0x00006ab4
 
#define BNX2_HC_SB_CONFIG_6_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_SB_CONFIG_6_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_SB_CONFIG_6_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_SB_CONFIG_6_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_SB_CONFIG_6_PER_MODE   (1L<<16)
 
#define BNX2_HC_SB_CONFIG_6_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_SB_CONFIG_6_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_SB_CONFIG_6_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_6   0x00006ab8
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_6_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_6_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP_6   0x00006abc
 
#define BNX2_HC_COMP_PROD_TRIP_6_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_6_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_6   0x00006ac0
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_6_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_6_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS_6   0x00006ac4
 
#define BNX2_HC_RX_TICKS_6_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_6_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS_6   0x00006ac8
 
#define BNX2_HC_TX_TICKS_6_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_6_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS_6   0x00006acc
 
#define BNX2_HC_COM_TICKS_6_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_6_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS_6   0x00006ad0
 
#define BNX2_HC_CMD_TICKS_6_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_6_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS_6   0x00006ad4
 
#define BNX2_HC_PERIODIC_TICKS_6_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_6_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_SB_CONFIG_7   0x00006ad8
 
#define BNX2_HC_SB_CONFIG_7_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_SB_CONFIG_7_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_SB_CONFIG_7_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_SB_CONFIG_7_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_SB_CONFIG_7_PER_MODE   (1L<<16)
 
#define BNX2_HC_SB_CONFIG_7_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_SB_CONFIG_7_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_SB_CONFIG_7_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_7   0x00006adc
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_7_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_7_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP_7   0x00006ae0
 
#define BNX2_HC_COMP_PROD_TRIP_7_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_7_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_7   0x00006ae4
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_7_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_7_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS_7   0x00006ae8
 
#define BNX2_HC_RX_TICKS_7_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_7_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS_7   0x00006aec
 
#define BNX2_HC_TX_TICKS_7_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_7_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS_7   0x00006af0
 
#define BNX2_HC_COM_TICKS_7_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_7_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS_7   0x00006af4
 
#define BNX2_HC_CMD_TICKS_7_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_7_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS_7   0x00006af8
 
#define BNX2_HC_PERIODIC_TICKS_7_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_7_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_SB_CONFIG_8   0x00006afc
 
#define BNX2_HC_SB_CONFIG_8_RX_TMR_MODE   (1L<<1)
 
#define BNX2_HC_SB_CONFIG_8_TX_TMR_MODE   (1L<<2)
 
#define BNX2_HC_SB_CONFIG_8_COM_TMR_MODE   (1L<<3)
 
#define BNX2_HC_SB_CONFIG_8_CMD_TMR_MODE   (1L<<4)
 
#define BNX2_HC_SB_CONFIG_8_PER_MODE   (1L<<16)
 
#define BNX2_HC_SB_CONFIG_8_ONE_SHOT   (1L<<17)
 
#define BNX2_HC_SB_CONFIG_8_USE_INT_PARAM   (1L<<18)
 
#define BNX2_HC_SB_CONFIG_8_PER_COLLECT_LIMIT   (0xfL<<20)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_8   0x00006b00
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_8_VALUE   (0xffL<<0)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_8_INT   (0xffL<<16)
 
#define BNX2_HC_COMP_PROD_TRIP_8   0x00006b04
 
#define BNX2_HC_COMP_PROD_TRIP_8_VALUE   (0xffL<<0)
 
#define BNX2_HC_COMP_PROD_TRIP_8_INT   (0xffL<<16)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_8   0x00006b08
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_8_VALUE   (0xffL<<0)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_8_INT   (0xffL<<16)
 
#define BNX2_HC_RX_TICKS_8   0x00006b0c
 
#define BNX2_HC_RX_TICKS_8_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_RX_TICKS_8_INT   (0x3ffL<<16)
 
#define BNX2_HC_TX_TICKS_8   0x00006b10
 
#define BNX2_HC_TX_TICKS_8_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_TX_TICKS_8_INT   (0x3ffL<<16)
 
#define BNX2_HC_COM_TICKS_8   0x00006b14
 
#define BNX2_HC_COM_TICKS_8_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_COM_TICKS_8_INT   (0x3ffL<<16)
 
#define BNX2_HC_CMD_TICKS_8   0x00006b18
 
#define BNX2_HC_CMD_TICKS_8_VALUE   (0x3ffL<<0)
 
#define BNX2_HC_CMD_TICKS_8_INT   (0x3ffL<<16)
 
#define BNX2_HC_PERIODIC_TICKS_8   0x00006b1c
 
#define BNX2_HC_PERIODIC_TICKS_8_HC_PERIODIC_TICKS   (0xffffL<<0)
 
#define BNX2_HC_PERIODIC_TICKS_8_HC_INT_PERIODIC_TICKS   (0xffffL<<16)
 
#define BNX2_HC_SB_CONFIG_SIZE   (BNX2_HC_SB_CONFIG_2 - BNX2_HC_SB_CONFIG_1)
 
#define BNX2_HC_COMP_PROD_TRIP_OFF
 
#define BNX2_HC_COM_TICKS_OFF   (BNX2_HC_COM_TICKS_1 - BNX2_HC_SB_CONFIG_1)
 
#define BNX2_HC_CMD_TICKS_OFF   (BNX2_HC_CMD_TICKS_1 - BNX2_HC_SB_CONFIG_1)
 
#define BNX2_HC_TX_QUICK_CONS_TRIP_OFF
 
#define BNX2_HC_TX_TICKS_OFF   (BNX2_HC_TX_TICKS_1 - BNX2_HC_SB_CONFIG_1)
 
#define BNX2_HC_RX_QUICK_CONS_TRIP_OFF
 
#define BNX2_HC_RX_TICKS_OFF   (BNX2_HC_RX_TICKS_1 - BNX2_HC_SB_CONFIG_1)
 
#define BNX2_TXP_CPU_MODE   0x00045000
 
#define BNX2_TXP_CPU_MODE_LOCAL_RST   (1L<<0)
 
#define BNX2_TXP_CPU_MODE_STEP_ENA   (1L<<1)
 
#define BNX2_TXP_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)
 
#define BNX2_TXP_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)
 
#define BNX2_TXP_CPU_MODE_MSG_BIT1   (1L<<6)
 
#define BNX2_TXP_CPU_MODE_INTERRUPT_ENA   (1L<<7)
 
#define BNX2_TXP_CPU_MODE_SOFT_HALT   (1L<<10)
 
#define BNX2_TXP_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)
 
#define BNX2_TXP_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)
 
#define BNX2_TXP_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)
 
#define BNX2_TXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)
 
#define BNX2_TXP_CPU_STATE   0x00045004
 
#define BNX2_TXP_CPU_STATE_BREAKPOINT   (1L<<0)
 
#define BNX2_TXP_CPU_STATE_BAD_INST_HALTED   (1L<<2)
 
#define BNX2_TXP_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)
 
#define BNX2_TXP_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)
 
#define BNX2_TXP_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)
 
#define BNX2_TXP_CPU_STATE_BAD_PC_HALTED   (1L<<6)
 
#define BNX2_TXP_CPU_STATE_ALIGN_HALTED   (1L<<7)
 
#define BNX2_TXP_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)
 
#define BNX2_TXP_CPU_STATE_SOFT_HALTED   (1L<<10)
 
#define BNX2_TXP_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)
 
#define BNX2_TXP_CPU_STATE_INTERRUPT   (1L<<12)
 
#define BNX2_TXP_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)
 
#define BNX2_TXP_CPU_STATE_INST_FETCH_STALL   (1L<<15)
 
#define BNX2_TXP_CPU_STATE_BLOCKED_READ   (1L<<31)
 
#define BNX2_TXP_CPU_EVENT_MASK   0x00045008
 
#define BNX2_TXP_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)
 
#define BNX2_TXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)
 
#define BNX2_TXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)
 
#define BNX2_TXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)
 
#define BNX2_TXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)
 
#define BNX2_TXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)
 
#define BNX2_TXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)
 
#define BNX2_TXP_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)
 
#define BNX2_TXP_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)
 
#define BNX2_TXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)
 
#define BNX2_TXP_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)
 
#define BNX2_TXP_CPU_PROGRAM_COUNTER   0x0004501c
 
#define BNX2_TXP_CPU_INSTRUCTION   0x00045020
 
#define BNX2_TXP_CPU_DATA_ACCESS   0x00045024
 
#define BNX2_TXP_CPU_INTERRUPT_ENABLE   0x00045028
 
#define BNX2_TXP_CPU_INTERRUPT_VECTOR   0x0004502c
 
#define BNX2_TXP_CPU_INTERRUPT_SAVED_PC   0x00045030
 
#define BNX2_TXP_CPU_HW_BREAKPOINT   0x00045034
 
#define BNX2_TXP_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)
 
#define BNX2_TXP_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)
 
#define BNX2_TXP_CPU_DEBUG_VECT_PEEK   0x00045038
 
#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_TXP_CPU_LAST_BRANCH_ADDR   0x00045048
 
#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)
 
#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)
 
#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)
 
#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)
 
#define BNX2_TXP_CPU_REG_FILE   0x00045200
 
#define BNX2_TXP_TXPQ   0x000453c0
 
#define BNX2_TXP_FTQ_CMD   0x000453f8
 
#define BNX2_TXP_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_TXP_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_TXP_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_TXP_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_TXP_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_TXP_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_TXP_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_TXP_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_TXP_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_TXP_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_TXP_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_TXP_FTQ_CTL   0x000453fc
 
#define BNX2_TXP_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_TXP_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_TXP_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_TXP_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_TXP_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_TXP_SCRATCH   0x00060000
 
#define BNX2_TPAT_CPU_MODE   0x00085000
 
#define BNX2_TPAT_CPU_MODE_LOCAL_RST   (1L<<0)
 
#define BNX2_TPAT_CPU_MODE_STEP_ENA   (1L<<1)
 
#define BNX2_TPAT_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)
 
#define BNX2_TPAT_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)
 
#define BNX2_TPAT_CPU_MODE_MSG_BIT1   (1L<<6)
 
#define BNX2_TPAT_CPU_MODE_INTERRUPT_ENA   (1L<<7)
 
#define BNX2_TPAT_CPU_MODE_SOFT_HALT   (1L<<10)
 
#define BNX2_TPAT_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)
 
#define BNX2_TPAT_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)
 
#define BNX2_TPAT_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)
 
#define BNX2_TPAT_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)
 
#define BNX2_TPAT_CPU_STATE   0x00085004
 
#define BNX2_TPAT_CPU_STATE_BREAKPOINT   (1L<<0)
 
#define BNX2_TPAT_CPU_STATE_BAD_INST_HALTED   (1L<<2)
 
#define BNX2_TPAT_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)
 
#define BNX2_TPAT_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)
 
#define BNX2_TPAT_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)
 
#define BNX2_TPAT_CPU_STATE_BAD_PC_HALTED   (1L<<6)
 
#define BNX2_TPAT_CPU_STATE_ALIGN_HALTED   (1L<<7)
 
#define BNX2_TPAT_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)
 
#define BNX2_TPAT_CPU_STATE_SOFT_HALTED   (1L<<10)
 
#define BNX2_TPAT_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)
 
#define BNX2_TPAT_CPU_STATE_INTERRUPT   (1L<<12)
 
#define BNX2_TPAT_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)
 
#define BNX2_TPAT_CPU_STATE_INST_FETCH_STALL   (1L<<15)
 
#define BNX2_TPAT_CPU_STATE_BLOCKED_READ   (1L<<31)
 
#define BNX2_TPAT_CPU_EVENT_MASK   0x00085008
 
#define BNX2_TPAT_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)
 
#define BNX2_TPAT_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)
 
#define BNX2_TPAT_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)
 
#define BNX2_TPAT_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)
 
#define BNX2_TPAT_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)
 
#define BNX2_TPAT_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)
 
#define BNX2_TPAT_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)
 
#define BNX2_TPAT_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)
 
#define BNX2_TPAT_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)
 
#define BNX2_TPAT_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)
 
#define BNX2_TPAT_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)
 
#define BNX2_TPAT_CPU_PROGRAM_COUNTER   0x0008501c
 
#define BNX2_TPAT_CPU_INSTRUCTION   0x00085020
 
#define BNX2_TPAT_CPU_DATA_ACCESS   0x00085024
 
#define BNX2_TPAT_CPU_INTERRUPT_ENABLE   0x00085028
 
#define BNX2_TPAT_CPU_INTERRUPT_VECTOR   0x0008502c
 
#define BNX2_TPAT_CPU_INTERRUPT_SAVED_PC   0x00085030
 
#define BNX2_TPAT_CPU_HW_BREAKPOINT   0x00085034
 
#define BNX2_TPAT_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)
 
#define BNX2_TPAT_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)
 
#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK   0x00085038
 
#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR   0x00085048
 
#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)
 
#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)
 
#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)
 
#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)
 
#define BNX2_TPAT_CPU_REG_FILE   0x00085200
 
#define BNX2_TPAT_TPATQ   0x000853c0
 
#define BNX2_TPAT_FTQ_CMD   0x000853f8
 
#define BNX2_TPAT_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_TPAT_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_TPAT_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_TPAT_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_TPAT_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_TPAT_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_TPAT_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_TPAT_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_TPAT_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_TPAT_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_TPAT_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_TPAT_FTQ_CTL   0x000853fc
 
#define BNX2_TPAT_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_TPAT_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_TPAT_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_TPAT_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_TPAT_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_TPAT_SCRATCH   0x000a0000
 
#define BNX2_RXP_CPU_MODE   0x000c5000
 
#define BNX2_RXP_CPU_MODE_LOCAL_RST   (1L<<0)
 
#define BNX2_RXP_CPU_MODE_STEP_ENA   (1L<<1)
 
#define BNX2_RXP_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)
 
#define BNX2_RXP_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)
 
#define BNX2_RXP_CPU_MODE_MSG_BIT1   (1L<<6)
 
#define BNX2_RXP_CPU_MODE_INTERRUPT_ENA   (1L<<7)
 
#define BNX2_RXP_CPU_MODE_SOFT_HALT   (1L<<10)
 
#define BNX2_RXP_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)
 
#define BNX2_RXP_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)
 
#define BNX2_RXP_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)
 
#define BNX2_RXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)
 
#define BNX2_RXP_CPU_STATE   0x000c5004
 
#define BNX2_RXP_CPU_STATE_BREAKPOINT   (1L<<0)
 
#define BNX2_RXP_CPU_STATE_BAD_INST_HALTED   (1L<<2)
 
#define BNX2_RXP_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)
 
#define BNX2_RXP_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)
 
#define BNX2_RXP_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)
 
#define BNX2_RXP_CPU_STATE_BAD_PC_HALTED   (1L<<6)
 
#define BNX2_RXP_CPU_STATE_ALIGN_HALTED   (1L<<7)
 
#define BNX2_RXP_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)
 
#define BNX2_RXP_CPU_STATE_SOFT_HALTED   (1L<<10)
 
#define BNX2_RXP_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)
 
#define BNX2_RXP_CPU_STATE_INTERRUPT   (1L<<12)
 
#define BNX2_RXP_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)
 
#define BNX2_RXP_CPU_STATE_INST_FETCH_STALL   (1L<<15)
 
#define BNX2_RXP_CPU_STATE_BLOCKED_READ   (1L<<31)
 
#define BNX2_RXP_CPU_EVENT_MASK   0x000c5008
 
#define BNX2_RXP_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)
 
#define BNX2_RXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)
 
#define BNX2_RXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)
 
#define BNX2_RXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)
 
#define BNX2_RXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)
 
#define BNX2_RXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)
 
#define BNX2_RXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)
 
#define BNX2_RXP_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)
 
#define BNX2_RXP_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)
 
#define BNX2_RXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)
 
#define BNX2_RXP_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)
 
#define BNX2_RXP_CPU_PROGRAM_COUNTER   0x000c501c
 
#define BNX2_RXP_CPU_INSTRUCTION   0x000c5020
 
#define BNX2_RXP_CPU_DATA_ACCESS   0x000c5024
 
#define BNX2_RXP_CPU_INTERRUPT_ENABLE   0x000c5028
 
#define BNX2_RXP_CPU_INTERRUPT_VECTOR   0x000c502c
 
#define BNX2_RXP_CPU_INTERRUPT_SAVED_PC   0x000c5030
 
#define BNX2_RXP_CPU_HW_BREAKPOINT   0x000c5034
 
#define BNX2_RXP_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)
 
#define BNX2_RXP_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)
 
#define BNX2_RXP_CPU_DEBUG_VECT_PEEK   0x000c5038
 
#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_RXP_CPU_LAST_BRANCH_ADDR   0x000c5048
 
#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)
 
#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)
 
#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)
 
#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)
 
#define BNX2_RXP_CPU_REG_FILE   0x000c5200
 
#define BNX2_RXP_PFE_PFE_CTL   0x000c537c
 
#define BNX2_RXP_PFE_PFE_CTL_INC_USAGE_CNT   (1L<<0)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE   (0xfL<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_0   (0L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_1   (1L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_2   (2L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_3   (3L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_4   (4L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_5   (5L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_6   (6L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_7   (7L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_8   (8L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_9   (9L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_10   (10L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_11   (11L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_12   (12L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_13   (13L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_14   (14L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_15   (15L<<4)
 
#define BNX2_RXP_PFE_PFE_CTL_PFE_COUNT   (0xfL<<12)
 
#define BNX2_RXP_PFE_PFE_CTL_OFFSET   (0x1ffL<<16)
 
#define BNX2_RXP_RXPCQ   0x000c5380
 
#define BNX2_RXP_CFTQ_CMD   0x000c53b8
 
#define BNX2_RXP_CFTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_RXP_CFTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_RXP_CFTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_RXP_CFTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_RXP_CFTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_RXP_CFTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_RXP_CFTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_RXP_CFTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_RXP_CFTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_RXP_CFTQ_CMD_POP   (1L<<30)
 
#define BNX2_RXP_CFTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_RXP_CFTQ_CTL   0x000c53bc
 
#define BNX2_RXP_CFTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_RXP_CFTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_RXP_CFTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_RXP_CFTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_RXP_CFTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_RXP_RXPQ   0x000c53c0
 
#define BNX2_RXP_FTQ_CMD   0x000c53f8
 
#define BNX2_RXP_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_RXP_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_RXP_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_RXP_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_RXP_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_RXP_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_RXP_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_RXP_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_RXP_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_RXP_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_RXP_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_RXP_FTQ_CTL   0x000c53fc
 
#define BNX2_RXP_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_RXP_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_RXP_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_RXP_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_RXP_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_RXP_SCRATCH   0x000e0000
 
#define BNX2_RXP_SCRATCH_RXP_FLOOD   0x000e0024
 
#define BNX2_RXP_SCRATCH_RSS_TBL_SZ   0x000e0038
 
#define BNX2_RXP_SCRATCH_RSS_TBL   0x000e003c
 
#define BNX2_RXP_SCRATCH_RSS_TBL_MAX_ENTRIES   128
 
#define BNX2_COM_CKSUM_ERROR_STATUS   0x00100000
 
#define BNX2_COM_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)
 
#define BNX2_COM_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)
 
#define BNX2_COM_CPU_MODE   0x00105000
 
#define BNX2_COM_CPU_MODE_LOCAL_RST   (1L<<0)
 
#define BNX2_COM_CPU_MODE_STEP_ENA   (1L<<1)
 
#define BNX2_COM_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)
 
#define BNX2_COM_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)
 
#define BNX2_COM_CPU_MODE_MSG_BIT1   (1L<<6)
 
#define BNX2_COM_CPU_MODE_INTERRUPT_ENA   (1L<<7)
 
#define BNX2_COM_CPU_MODE_SOFT_HALT   (1L<<10)
 
#define BNX2_COM_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)
 
#define BNX2_COM_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)
 
#define BNX2_COM_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)
 
#define BNX2_COM_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)
 
#define BNX2_COM_CPU_STATE   0x00105004
 
#define BNX2_COM_CPU_STATE_BREAKPOINT   (1L<<0)
 
#define BNX2_COM_CPU_STATE_BAD_INST_HALTED   (1L<<2)
 
#define BNX2_COM_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)
 
#define BNX2_COM_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)
 
#define BNX2_COM_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)
 
#define BNX2_COM_CPU_STATE_BAD_PC_HALTED   (1L<<6)
 
#define BNX2_COM_CPU_STATE_ALIGN_HALTED   (1L<<7)
 
#define BNX2_COM_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)
 
#define BNX2_COM_CPU_STATE_SOFT_HALTED   (1L<<10)
 
#define BNX2_COM_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)
 
#define BNX2_COM_CPU_STATE_INTERRUPT   (1L<<12)
 
#define BNX2_COM_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)
 
#define BNX2_COM_CPU_STATE_INST_FETCH_STALL   (1L<<15)
 
#define BNX2_COM_CPU_STATE_BLOCKED_READ   (1L<<31)
 
#define BNX2_COM_CPU_EVENT_MASK   0x00105008
 
#define BNX2_COM_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)
 
#define BNX2_COM_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)
 
#define BNX2_COM_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)
 
#define BNX2_COM_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)
 
#define BNX2_COM_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)
 
#define BNX2_COM_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)
 
#define BNX2_COM_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)
 
#define BNX2_COM_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)
 
#define BNX2_COM_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)
 
#define BNX2_COM_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)
 
#define BNX2_COM_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)
 
#define BNX2_COM_CPU_PROGRAM_COUNTER   0x0010501c
 
#define BNX2_COM_CPU_INSTRUCTION   0x00105020
 
#define BNX2_COM_CPU_DATA_ACCESS   0x00105024
 
#define BNX2_COM_CPU_INTERRUPT_ENABLE   0x00105028
 
#define BNX2_COM_CPU_INTERRUPT_VECTOR   0x0010502c
 
#define BNX2_COM_CPU_INTERRUPT_SAVED_PC   0x00105030
 
#define BNX2_COM_CPU_HW_BREAKPOINT   0x00105034
 
#define BNX2_COM_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)
 
#define BNX2_COM_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)
 
#define BNX2_COM_CPU_DEBUG_VECT_PEEK   0x00105038
 
#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_COM_CPU_LAST_BRANCH_ADDR   0x00105048
 
#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)
 
#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)
 
#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)
 
#define BNX2_COM_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)
 
#define BNX2_COM_CPU_REG_FILE   0x00105200
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL   0x001052bc
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_INC_USAGE_CNT   (1L<<0)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE   (0xfL<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_0   (0L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_1   (1L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_2   (2L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_3   (3L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_4   (4L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_5   (5L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_6   (6L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_7   (7L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_8   (8L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_9   (9L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_10   (10L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_11   (11L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_12   (12L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_13   (13L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_14   (14L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_15   (15L<<4)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_COUNT   (0xfL<<12)
 
#define BNX2_COM_COMTQ_PFE_PFE_CTL_OFFSET   (0x1ffL<<16)
 
#define BNX2_COM_COMXQ   0x00105340
 
#define BNX2_COM_COMXQ_FTQ_CMD   0x00105378
 
#define BNX2_COM_COMXQ_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_COM_COMXQ_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_COM_COMXQ_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_COM_COMXQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_COM_COMXQ_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_COM_COMXQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_COM_COMXQ_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_COM_COMXQ_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_COM_COMXQ_FTQ_CTL   0x0010537c
 
#define BNX2_COM_COMXQ_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_COM_COMXQ_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_COM_COMXQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_COM_COMTQ   0x00105380
 
#define BNX2_COM_COMTQ_FTQ_CMD   0x001053b8
 
#define BNX2_COM_COMTQ_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_COM_COMTQ_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_COM_COMTQ_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_COM_COMTQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_COM_COMTQ_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_COM_COMTQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_COM_COMTQ_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_COM_COMTQ_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_COM_COMTQ_FTQ_CTL   0x001053bc
 
#define BNX2_COM_COMTQ_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_COM_COMTQ_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_COM_COMTQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_COM_COMQ   0x001053c0
 
#define BNX2_COM_COMQ_FTQ_CMD   0x001053f8
 
#define BNX2_COM_COMQ_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_COM_COMQ_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_COM_COMQ_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_COM_COMQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_COM_COMQ_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_COM_COMQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_COM_COMQ_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_COM_COMQ_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_COM_COMQ_FTQ_CTL   0x001053fc
 
#define BNX2_COM_COMQ_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_COM_COMQ_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_COM_COMQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_COM_SCRATCH   0x00120000
 
#define BNX2_FW_RX_LOW_LATENCY   0x00120058
 
#define BNX2_FW_RX_DROP_COUNT   0x00120084
 
#define BNX2_CP_CKSUM_ERROR_STATUS   0x00180000
 
#define BNX2_CP_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)
 
#define BNX2_CP_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)
 
#define BNX2_CP_CPU_MODE   0x00185000
 
#define BNX2_CP_CPU_MODE_LOCAL_RST   (1L<<0)
 
#define BNX2_CP_CPU_MODE_STEP_ENA   (1L<<1)
 
#define BNX2_CP_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)
 
#define BNX2_CP_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)
 
#define BNX2_CP_CPU_MODE_MSG_BIT1   (1L<<6)
 
#define BNX2_CP_CPU_MODE_INTERRUPT_ENA   (1L<<7)
 
#define BNX2_CP_CPU_MODE_SOFT_HALT   (1L<<10)
 
#define BNX2_CP_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)
 
#define BNX2_CP_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)
 
#define BNX2_CP_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)
 
#define BNX2_CP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)
 
#define BNX2_CP_CPU_STATE   0x00185004
 
#define BNX2_CP_CPU_STATE_BREAKPOINT   (1L<<0)
 
#define BNX2_CP_CPU_STATE_BAD_INST_HALTED   (1L<<2)
 
#define BNX2_CP_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)
 
#define BNX2_CP_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)
 
#define BNX2_CP_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)
 
#define BNX2_CP_CPU_STATE_BAD_PC_HALTED   (1L<<6)
 
#define BNX2_CP_CPU_STATE_ALIGN_HALTED   (1L<<7)
 
#define BNX2_CP_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)
 
#define BNX2_CP_CPU_STATE_SOFT_HALTED   (1L<<10)
 
#define BNX2_CP_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)
 
#define BNX2_CP_CPU_STATE_INTERRUPT   (1L<<12)
 
#define BNX2_CP_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)
 
#define BNX2_CP_CPU_STATE_INST_FETCH_STALL   (1L<<15)
 
#define BNX2_CP_CPU_STATE_BLOCKED_READ   (1L<<31)
 
#define BNX2_CP_CPU_EVENT_MASK   0x00185008
 
#define BNX2_CP_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)
 
#define BNX2_CP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)
 
#define BNX2_CP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)
 
#define BNX2_CP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)
 
#define BNX2_CP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)
 
#define BNX2_CP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)
 
#define BNX2_CP_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)
 
#define BNX2_CP_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)
 
#define BNX2_CP_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)
 
#define BNX2_CP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)
 
#define BNX2_CP_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)
 
#define BNX2_CP_CPU_PROGRAM_COUNTER   0x0018501c
 
#define BNX2_CP_CPU_INSTRUCTION   0x00185020
 
#define BNX2_CP_CPU_DATA_ACCESS   0x00185024
 
#define BNX2_CP_CPU_INTERRUPT_ENABLE   0x00185028
 
#define BNX2_CP_CPU_INTERRUPT_VECTOR   0x0018502c
 
#define BNX2_CP_CPU_INTERRUPT_SAVED_PC   0x00185030
 
#define BNX2_CP_CPU_HW_BREAKPOINT   0x00185034
 
#define BNX2_CP_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)
 
#define BNX2_CP_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)
 
#define BNX2_CP_CPU_DEBUG_VECT_PEEK   0x00185038
 
#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_CP_CPU_LAST_BRANCH_ADDR   0x00185048
 
#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)
 
#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)
 
#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)
 
#define BNX2_CP_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)
 
#define BNX2_CP_CPU_REG_FILE   0x00185200
 
#define BNX2_CP_CPQ_PFE_PFE_CTL   0x001853bc
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_INC_USAGE_CNT   (1L<<0)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE   (0xfL<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_0   (0L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_1   (1L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_2   (2L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_3   (3L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_4   (4L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_5   (5L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_6   (6L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_7   (7L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_8   (8L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_9   (9L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_10   (10L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_11   (11L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_12   (12L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_13   (13L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_14   (14L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_15   (15L<<4)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_COUNT   (0xfL<<12)
 
#define BNX2_CP_CPQ_PFE_PFE_CTL_OFFSET   (0x1ffL<<16)
 
#define BNX2_CP_CPQ   0x001853c0
 
#define BNX2_CP_CPQ_FTQ_CMD   0x001853f8
 
#define BNX2_CP_CPQ_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_CP_CPQ_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_CP_CPQ_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_CP_CPQ_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_CP_CPQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_CP_CPQ_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_CP_CPQ_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_CP_CPQ_FTQ_CTL   0x001853fc
 
#define BNX2_CP_CPQ_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_CP_CPQ_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_CP_CPQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_CP_SCRATCH   0x001a0000
 
#define BNX2_FW_MAX_ISCSI_CONN   0x001a0080
 
#define BNX2_MCP_MCP_CONTROL   0x00140080
 
#define BNX2_MCP_MCP_CONTROL_SMBUS_SEL   (1L<<30)
 
#define BNX2_MCP_MCP_CONTROL_MCP_ISOLATE   (1L<<31)
 
#define BNX2_MCP_MCP_ATTENTION_STATUS   0x00140084
 
#define BNX2_MCP_MCP_ATTENTION_STATUS_DRV_DOORBELL   (1L<<29)
 
#define BNX2_MCP_MCP_ATTENTION_STATUS_WATCHDOG_TIMEOUT   (1L<<30)
 
#define BNX2_MCP_MCP_ATTENTION_STATUS_CPU_EVENT   (1L<<31)
 
#define BNX2_MCP_MCP_HEARTBEAT_CONTROL   0x00140088
 
#define BNX2_MCP_MCP_HEARTBEAT_CONTROL_MCP_HEARTBEAT_ENABLE   (1L<<31)
 
#define BNX2_MCP_MCP_HEARTBEAT_STATUS   0x0014008c
 
#define BNX2_MCP_MCP_HEARTBEAT_STATUS_MCP_HEARTBEAT_PERIOD   (0x7ffL<<0)
 
#define BNX2_MCP_MCP_HEARTBEAT_STATUS_VALID   (1L<<31)
 
#define BNX2_MCP_MCP_HEARTBEAT   0x00140090
 
#define BNX2_MCP_MCP_HEARTBEAT_MCP_HEARTBEAT_COUNT   (0x3fffffffL<<0)
 
#define BNX2_MCP_MCP_HEARTBEAT_MCP_HEARTBEAT_INC   (1L<<30)
 
#define BNX2_MCP_MCP_HEARTBEAT_MCP_HEARTBEAT_RESET   (1L<<31)
 
#define BNX2_MCP_WATCHDOG_RESET   0x00140094
 
#define BNX2_MCP_WATCHDOG_RESET_WATCHDOG_RESET   (1L<<31)
 
#define BNX2_MCP_WATCHDOG_CONTROL   0x00140098
 
#define BNX2_MCP_WATCHDOG_CONTROL_WATCHDOG_TIMEOUT   (0xfffffffL<<0)
 
#define BNX2_MCP_WATCHDOG_CONTROL_WATCHDOG_ATTN   (1L<<29)
 
#define BNX2_MCP_WATCHDOG_CONTROL_MCP_RST_ENABLE   (1L<<30)
 
#define BNX2_MCP_WATCHDOG_CONTROL_WATCHDOG_ENABLE   (1L<<31)
 
#define BNX2_MCP_ACCESS_LOCK   0x0014009c
 
#define BNX2_MCP_ACCESS_LOCK_LOCK   (1L<<31)
 
#define BNX2_MCP_TOE_ID   0x001400a0
 
#define BNX2_MCP_TOE_ID_FUNCTION_ID   (1L<<31)
 
#define BNX2_MCP_MAILBOX_CFG   0x001400a4
 
#define BNX2_MCP_MAILBOX_CFG_MAILBOX_OFFSET   (0x3fffL<<0)
 
#define BNX2_MCP_MAILBOX_CFG_MAILBOX_SIZE   (0xfffL<<20)
 
#define BNX2_MCP_MAILBOX_CFG_OTHER_FUNC   0x001400a8
 
#define BNX2_MCP_MAILBOX_CFG_OTHER_FUNC_MAILBOX_OFFSET   (0x3fffL<<0)
 
#define BNX2_MCP_MAILBOX_CFG_OTHER_FUNC_MAILBOX_SIZE   (0xfffL<<20)
 
#define BNX2_MCP_MCP_DOORBELL   0x001400ac
 
#define BNX2_MCP_MCP_DOORBELL_MCP_DOORBELL   (1L<<31)
 
#define BNX2_MCP_DRIVER_DOORBELL   0x001400b0
 
#define BNX2_MCP_DRIVER_DOORBELL_DRIVER_DOORBELL   (1L<<31)
 
#define BNX2_MCP_DRIVER_DOORBELL_OTHER_FUNC   0x001400b4
 
#define BNX2_MCP_DRIVER_DOORBELL_OTHER_FUNC_DRIVER_DOORBELL   (1L<<31)
 
#define BNX2_MCP_CPU_MODE   0x00145000
 
#define BNX2_MCP_CPU_MODE_LOCAL_RST   (1L<<0)
 
#define BNX2_MCP_CPU_MODE_STEP_ENA   (1L<<1)
 
#define BNX2_MCP_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)
 
#define BNX2_MCP_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)
 
#define BNX2_MCP_CPU_MODE_MSG_BIT1   (1L<<6)
 
#define BNX2_MCP_CPU_MODE_INTERRUPT_ENA   (1L<<7)
 
#define BNX2_MCP_CPU_MODE_SOFT_HALT   (1L<<10)
 
#define BNX2_MCP_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)
 
#define BNX2_MCP_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)
 
#define BNX2_MCP_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)
 
#define BNX2_MCP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)
 
#define BNX2_MCP_CPU_STATE   0x00145004
 
#define BNX2_MCP_CPU_STATE_BREAKPOINT   (1L<<0)
 
#define BNX2_MCP_CPU_STATE_BAD_INST_HALTED   (1L<<2)
 
#define BNX2_MCP_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)
 
#define BNX2_MCP_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)
 
#define BNX2_MCP_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)
 
#define BNX2_MCP_CPU_STATE_BAD_PC_HALTED   (1L<<6)
 
#define BNX2_MCP_CPU_STATE_ALIGN_HALTED   (1L<<7)
 
#define BNX2_MCP_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)
 
#define BNX2_MCP_CPU_STATE_SOFT_HALTED   (1L<<10)
 
#define BNX2_MCP_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)
 
#define BNX2_MCP_CPU_STATE_INTERRUPT   (1L<<12)
 
#define BNX2_MCP_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)
 
#define BNX2_MCP_CPU_STATE_INST_FETCH_STALL   (1L<<15)
 
#define BNX2_MCP_CPU_STATE_BLOCKED_READ   (1L<<31)
 
#define BNX2_MCP_CPU_EVENT_MASK   0x00145008
 
#define BNX2_MCP_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)
 
#define BNX2_MCP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)
 
#define BNX2_MCP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)
 
#define BNX2_MCP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)
 
#define BNX2_MCP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)
 
#define BNX2_MCP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)
 
#define BNX2_MCP_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)
 
#define BNX2_MCP_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)
 
#define BNX2_MCP_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)
 
#define BNX2_MCP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)
 
#define BNX2_MCP_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)
 
#define BNX2_MCP_CPU_PROGRAM_COUNTER   0x0014501c
 
#define BNX2_MCP_CPU_INSTRUCTION   0x00145020
 
#define BNX2_MCP_CPU_DATA_ACCESS   0x00145024
 
#define BNX2_MCP_CPU_INTERRUPT_ENABLE   0x00145028
 
#define BNX2_MCP_CPU_INTERRUPT_VECTOR   0x0014502c
 
#define BNX2_MCP_CPU_INTERRUPT_SAVED_PC   0x00145030
 
#define BNX2_MCP_CPU_HW_BREAKPOINT   0x00145034
 
#define BNX2_MCP_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)
 
#define BNX2_MCP_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)
 
#define BNX2_MCP_CPU_DEBUG_VECT_PEEK   0x00145038
 
#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)
 
#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)
 
#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)
 
#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)
 
#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)
 
#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)
 
#define BNX2_MCP_CPU_LAST_BRANCH_ADDR   0x00145048
 
#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)
 
#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)
 
#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)
 
#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)
 
#define BNX2_MCP_CPU_REG_FILE   0x00145200
 
#define BNX2_MCP_MCPQ   0x001453c0
 
#define BNX2_MCP_MCPQ_FTQ_CMD   0x001453f8
 
#define BNX2_MCP_MCPQ_FTQ_CMD_OFFSET   (0x3ffL<<0)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP   (1L<<10)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0   (0L<<10)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1   (1L<<10)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET   (1L<<25)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_RD_DATA   (1L<<26)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA   (1L<<28)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_POP   (1L<<30)
 
#define BNX2_MCP_MCPQ_FTQ_CMD_BUSY   (1L<<31)
 
#define BNX2_MCP_MCPQ_FTQ_CTL   0x001453fc
 
#define BNX2_MCP_MCPQ_FTQ_CTL_INTERVENE   (1L<<0)
 
#define BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW   (1L<<1)
 
#define BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)
 
#define BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)
 
#define BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)
 
#define BNX2_MCP_ROM   0x00150000
 
#define BNX2_MCP_SCRATCH   0x00160000
 
#define BNX2_MCP_STATE_P1   0x0016f9c8
 
#define BNX2_MCP_STATE_P0   0x0016fdc8
 
#define BNX2_MCP_STATE_P1_5708   0x001699c8
 
#define BNX2_MCP_STATE_P0_5708   0x00169dc8
 
#define BNX2_SHM_HDR_SIGNATURE   BNX2_MCP_SCRATCH
 
#define BNX2_SHM_HDR_SIGNATURE_SIG_MASK   0xffff0000
 
#define BNX2_SHM_HDR_SIGNATURE_SIG   0x53530000
 
#define BNX2_SHM_HDR_SIGNATURE_VER_MASK   0x000000ff
 
#define BNX2_SHM_HDR_SIGNATURE_VER_ONE   0x00000001
 
#define BNX2_SHM_HDR_ADDR_0   BNX2_MCP_SCRATCH + 4
 
#define BNX2_SHM_HDR_ADDR_1   BNX2_MCP_SCRATCH + 8
 
#define NUM_MC_HASH_REGISTERS   8
 
#define PHY_BCM5706_PHY_ID   0x00206160
 
#define PHY_ID(id)   ((id) & 0xfffffff0)
 
#define PHY_REV_ID(id)   ((id) & 0xf)
 
#define BCM5708S_BMCR_FORCE_2500   0x20
 
#define BCM5708S_UP1   0xb
 
#define BCM5708S_UP1_2G5   0x1
 
#define BCM5708S_BLK_ADDR   0x1f
 
#define BCM5708S_BLK_ADDR_DIG   0x0000
 
#define BCM5708S_BLK_ADDR_DIG3   0x0002
 
#define BCM5708S_BLK_ADDR_TX_MISC   0x0005
 
#define BCM5708S_1000X_CTL1   0x10
 
#define BCM5708S_1000X_CTL1_FIBER_MODE   0x0001
 
#define BCM5708S_1000X_CTL1_AUTODET_EN   0x0010
 
#define BCM5708S_1000X_CTL2   0x11
 
#define BCM5708S_1000X_CTL2_PLLEL_DET_EN   0x0001
 
#define BCM5708S_1000X_STAT1   0x14
 
#define BCM5708S_1000X_STAT1_SGMII   0x0001
 
#define BCM5708S_1000X_STAT1_LINK   0x0002
 
#define BCM5708S_1000X_STAT1_FD   0x0004
 
#define BCM5708S_1000X_STAT1_SPEED_MASK   0x0018
 
#define BCM5708S_1000X_STAT1_SPEED_10   0x0000
 
#define BCM5708S_1000X_STAT1_SPEED_100   0x0008
 
#define BCM5708S_1000X_STAT1_SPEED_1G   0x0010
 
#define BCM5708S_1000X_STAT1_SPEED_2G5   0x0018
 
#define BCM5708S_1000X_STAT1_TX_PAUSE   0x0020
 
#define BCM5708S_1000X_STAT1_RX_PAUSE   0x0040
 
#define BCM5708S_DIG_3_0   0x10
 
#define BCM5708S_DIG_3_0_USE_IEEE   0x0001
 
#define BCM5708S_TX_ACTL1   0x15
 
#define BCM5708S_TX_ACTL1_DRIVER_VCM   0x30
 
#define BCM5708S_TX_ACTL3   0x17
 
#define MII_BNX2_DSP_RW_PORT   0x15
 
#define MII_BNX2_DSP_ADDRESS   0x17
 
#define MII_BNX2_DSP_EXPAND_REG   0x0f00
 
#define MII_EXPAND_REG1   (MII_BNX2_DSP_EXPAND_REG | 1)
 
#define MII_EXPAND_REG1_RUDI_C   0x20
 
#define MII_EXPAND_SERDES_CTL   (MII_BNX2_DSP_EXPAND_REG | 3)
 
#define MII_BNX2_MISC_SHADOW   0x1c
 
#define MISC_SHDW_AN_DBG   0x6800
 
#define MISC_SHDW_AN_DBG_NOSYNC   0x0002
 
#define MISC_SHDW_AN_DBG_RUDI_INVALID   0x0100
 
#define MISC_SHDW_MODE_CTL   0x7c00
 
#define MISC_SHDW_MODE_CTL_SIG_DET   0x0010
 
#define MII_BNX2_BLK_ADDR   0x1f
 
#define MII_BNX2_BLK_ADDR_IEEE0   0x0000
 
#define MII_BNX2_BLK_ADDR_GP_STATUS   0x8120
 
#define MII_BNX2_GP_TOP_AN_STATUS1   0x1b
 
#define MII_BNX2_GP_TOP_AN_SPEED_MSK   0x3f00
 
#define MII_BNX2_GP_TOP_AN_SPEED_10   0x0000
 
#define MII_BNX2_GP_TOP_AN_SPEED_100   0x0100
 
#define MII_BNX2_GP_TOP_AN_SPEED_1G   0x0200
 
#define MII_BNX2_GP_TOP_AN_SPEED_2_5G   0x0300
 
#define MII_BNX2_GP_TOP_AN_SPEED_1GKV   0x0d00
 
#define MII_BNX2_GP_TOP_AN_FD   0x8
 
#define MII_BNX2_BLK_ADDR_SERDES_DIG   0x8300
 
#define MII_BNX2_SERDES_DIG_1000XCTL1   0x10
 
#define MII_BNX2_SD_1000XCTL1_FIBER   0x01
 
#define MII_BNX2_SD_1000XCTL1_AUTODET   0x10
 
#define MII_BNX2_SERDES_DIG_MISC1   0x18
 
#define MII_BNX2_SD_MISC1_FORCE_MSK   0xf
 
#define MII_BNX2_SD_MISC1_FORCE_2_5G   0x0
 
#define MII_BNX2_SD_MISC1_FORCE   0x10
 
#define MII_BNX2_BLK_ADDR_OVER1G   0x8320
 
#define MII_BNX2_OVER1G_UP1   0x19
 
#define MII_BNX2_BLK_ADDR_BAM_NXTPG   0x8350
 
#define MII_BNX2_BAM_NXTPG_CTL   0x10
 
#define MII_BNX2_NXTPG_CTL_BAM   0x1
 
#define MII_BNX2_NXTPG_CTL_T2   0x2
 
#define MII_BNX2_BLK_ADDR_CL73_USERB0   0x8370
 
#define MII_BNX2_CL73_BAM_CTL1   0x12
 
#define MII_BNX2_CL73_BAM_EN   0x8000
 
#define MII_BNX2_CL73_BAM_STA_MGR_EN   0x4000
 
#define MII_BNX2_CL73_BAM_NP_AFT_BP_EN   0x2000
 
#define MII_BNX2_BLK_ADDR_AER   0xffd0
 
#define MII_BNX2_AER_AER   0x1e
 
#define MII_BNX2_AER_AER_AN_MMD   0x3800
 
#define MII_BNX2_BLK_ADDR_COMBO_IEEEB0   0xffe0
 
#define MIN_ETHERNET_PACKET_SIZE   60
 
#define MAX_ETHERNET_PACKET_SIZE   1514
 
#define MAX_ETHERNET_JUMBO_PACKET_SIZE   9014
 
#define BNX2_RX_COPY_THRESH   128
 
#define BNX2_MISC_ENABLE_DEFAULT   0x17ffffff
 
#define BNX2_START_UNICAST_ADDRESS_INDEX   4
 
#define BNX2_END_UNICAST_ADDRESS_INDEX   7
 
#define BNX2_MAX_UNICAST_ADDRESSES
 
#define DMA_READ_CHANS   5
 
#define DMA_WRITE_CHANS   3
 
#define BCM_PAGE_BITS   PAGE_SHIFT
 
#define BCM_PAGE_SIZE   (1 << BCM_PAGE_BITS)
 
#define TX_DESC_CNT   (BCM_PAGE_SIZE / sizeof(struct tx_bd))
 
#define MAX_TX_DESC_CNT   (TX_DESC_CNT - 1)
 
#define MAX_RX_RINGS   8
 
#define MAX_RX_PG_RINGS   32
 
#define RX_DESC_CNT   (BCM_PAGE_SIZE / sizeof(struct rx_bd))
 
#define MAX_RX_DESC_CNT   (RX_DESC_CNT - 1)
 
#define MAX_TOTAL_RX_DESC_CNT   (MAX_RX_DESC_CNT * MAX_RX_RINGS)
 
#define MAX_TOTAL_RX_PG_DESC_CNT   (MAX_RX_DESC_CNT * MAX_RX_PG_RINGS)
 
#define NEXT_TX_BD(x)
 
#define TX_RING_IDX(x)   ((x) & MAX_TX_DESC_CNT)
 
#define NEXT_RX_BD(x)
 
#define RX_RING_IDX(x)   ((x) & bp->rx_max_ring_idx)
 
#define RX_PG_RING_IDX(x)   ((x) & bp->rx_max_pg_ring_idx)
 
#define RX_RING(x)   (((x) & ~MAX_RX_DESC_CNT) >> (BCM_PAGE_BITS - 4))
 
#define RX_IDX(x)   ((x) & MAX_RX_DESC_CNT)
 
#define CTX_SHIFT   7
 
#define CTX_SIZE   (1 << CTX_SHIFT)
 
#define CTX_MASK   (CTX_SIZE - 1)
 
#define GET_CID_ADDR(_cid)   ((_cid) << CTX_SHIFT)
 
#define GET_CID(_cid_addr)   ((_cid_addr) >> CTX_SHIFT)
 
#define PHY_CTX_SHIFT   6
 
#define PHY_CTX_SIZE   (1 << PHY_CTX_SHIFT)
 
#define PHY_CTX_MASK   (PHY_CTX_SIZE - 1)
 
#define GET_PCID_ADDR(_pcid)   ((_pcid) << PHY_CTX_SHIFT)
 
#define GET_PCID(_pcid_addr)   ((_pcid_addr) >> PHY_CTX_SHIFT)
 
#define MB_KERNEL_CTX_SHIFT   8
 
#define MB_KERNEL_CTX_SIZE   (1 << MB_KERNEL_CTX_SHIFT)
 
#define MB_KERNEL_CTX_MASK   (MB_KERNEL_CTX_SIZE - 1)
 
#define MB_GET_CID_ADDR(_cid)   (0x10000 + ((_cid) << MB_KERNEL_CTX_SHIFT))
 
#define MAX_CID_CNT   0x4000
 
#define MAX_CID_ADDR   (GET_CID_ADDR(MAX_CID_CNT))
 
#define INVALID_CID_ADDR   0xffffffff
 
#define TX_CID   16
 
#define TX_TSS_CID   32
 
#define RX_CID   0
 
#define RX_RSS_CID   4
 
#define RX_MAX_RSS_RINGS   7
 
#define RX_MAX_RINGS   (RX_MAX_RSS_RINGS + 1)
 
#define TX_MAX_TSS_RINGS   7
 
#define TX_MAX_RINGS   (TX_MAX_TSS_RINGS + 1)
 
#define MB_TX_CID_ADDR   MB_GET_CID_ADDR(TX_CID)
 
#define MB_RX_CID_ADDR   MB_GET_CID_ADDR(RX_CID)
 
#define SW_RXBD_RING_SIZE   (sizeof(struct sw_bd) * RX_DESC_CNT)
 
#define SW_RXPG_RING_SIZE   (sizeof(struct sw_pg) * RX_DESC_CNT)
 
#define RXBD_RING_SIZE   (sizeof(struct rx_bd) * RX_DESC_CNT)
 
#define SW_TXBD_RING_SIZE   (sizeof(struct sw_tx_bd) * TX_DESC_CNT)
 
#define TXBD_RING_SIZE   (sizeof(struct tx_bd) * TX_DESC_CNT)
 
#define SEEPROM_PAGE_BITS   2
 
#define SEEPROM_PHY_PAGE_SIZE   (1 << SEEPROM_PAGE_BITS)
 
#define SEEPROM_BYTE_ADDR_MASK   (SEEPROM_PHY_PAGE_SIZE-1)
 
#define SEEPROM_PAGE_SIZE   4
 
#define SEEPROM_TOTAL_SIZE   65536
 
#define BUFFERED_FLASH_PAGE_BITS   9
 
#define BUFFERED_FLASH_PHY_PAGE_SIZE   (1 << BUFFERED_FLASH_PAGE_BITS)
 
#define BUFFERED_FLASH_BYTE_ADDR_MASK   (BUFFERED_FLASH_PHY_PAGE_SIZE-1)
 
#define BUFFERED_FLASH_PAGE_SIZE   264
 
#define BUFFERED_FLASH_TOTAL_SIZE   0x21000
 
#define SAIFUN_FLASH_PAGE_BITS   8
 
#define SAIFUN_FLASH_PHY_PAGE_SIZE   (1 << SAIFUN_FLASH_PAGE_BITS)
 
#define SAIFUN_FLASH_BYTE_ADDR_MASK   (SAIFUN_FLASH_PHY_PAGE_SIZE-1)
 
#define SAIFUN_FLASH_PAGE_SIZE   256
 
#define SAIFUN_FLASH_BASE_TOTAL_SIZE   65536
 
#define ST_MICRO_FLASH_PAGE_BITS   8
 
#define ST_MICRO_FLASH_PHY_PAGE_SIZE   (1 << ST_MICRO_FLASH_PAGE_BITS)
 
#define ST_MICRO_FLASH_BYTE_ADDR_MASK   (ST_MICRO_FLASH_PHY_PAGE_SIZE-1)
 
#define ST_MICRO_FLASH_PAGE_SIZE   256
 
#define ST_MICRO_FLASH_BASE_TOTAL_SIZE   65536
 
#define BCM5709_FLASH_PAGE_BITS   8
 
#define BCM5709_FLASH_PHY_PAGE_SIZE   (1 << BCM5709_FLASH_PAGE_BITS)
 
#define BCM5709_FLASH_BYTE_ADDR_MASK   (BCM5709_FLASH_PHY_PAGE_SIZE-1)
 
#define BCM5709_FLASH_PAGE_SIZE   256
 
#define NVRAM_TIMEOUT_COUNT   30000
 
#define FLASH_STRAP_MASK
 
#define FLASH_BACKUP_STRAP_MASK   (0xf << 26)
 
#define BNX2_NV_BUFFERED   0x00000001
 
#define BNX2_NV_TRANSLATE   0x00000002
 
#define BNX2_NV_WREN   0x00000004
 
#define BNX2_MAX_MSIX_HW_VEC   9
 
#define BNX2_MAX_MSIX_VEC   9
 
#define BNX2_MIN_MSIX_VEC   1
 
#define BNX2_FLAG_PCIX   0x00000001
 
#define BNX2_FLAG_PCI_32BIT   0x00000002
 
#define BNX2_FLAG_MSIX_CAP   0x00000004
 
#define BNX2_FLAG_NO_WOL   0x00000008
 
#define BNX2_FLAG_USING_MSI   0x00000020
 
#define BNX2_FLAG_ASF_ENABLE   0x00000040
 
#define BNX2_FLAG_MSI_CAP   0x00000080
 
#define BNX2_FLAG_ONE_SHOT_MSI   0x00000100
 
#define BNX2_FLAG_PCIE   0x00000200
 
#define BNX2_FLAG_USING_MSIX   0x00000400
 
#define BNX2_FLAG_USING_MSI_OR_MSIX
 
#define BNX2_FLAG_JUMBO_BROKEN   0x00000800
 
#define BNX2_FLAG_CAN_KEEP_VLAN   0x00001000
 
#define BNX2_FLAG_BROKEN_STATS   0x00002000
 
#define BNX2_FLAG_AER_ENABLED   0x00004000
 
#define BNX2_TIMER_INTERVAL   HZ
 
#define BNX2_SERDES_AN_TIMEOUT   (HZ / 3)
 
#define BNX2_SERDES_FORCED_TIMEOUT   (HZ / 10)
 
#define BNX2_PHY_FLAG_SERDES   0x00000001
 
#define BNX2_PHY_FLAG_CRC_FIX   0x00000002
 
#define BNX2_PHY_FLAG_PARALLEL_DETECT   0x00000004
 
#define BNX2_PHY_FLAG_2_5G_CAPABLE   0x00000008
 
#define BNX2_PHY_FLAG_INT_MODE_MASK   0x00000300
 
#define BNX2_PHY_FLAG_INT_MODE_AUTO_POLLING   0x00000100
 
#define BNX2_PHY_FLAG_INT_MODE_LINK_READY   0x00000200
 
#define BNX2_PHY_FLAG_DIS_EARLY_DAC   0x00000400
 
#define BNX2_PHY_FLAG_REMOTE_PHY_CAP   0x00000800
 
#define BNX2_PHY_FLAG_FORCED_DOWN   0x00001000
 
#define BNX2_PHY_FLAG_NO_PARALLEL   0x00002000
 
#define CHIP_NUM(bp)   (((bp)->chip_id) & 0xffff0000)
 
#define CHIP_NUM_5706   0x57060000
 
#define CHIP_NUM_5708   0x57080000
 
#define CHIP_NUM_5709   0x57090000
 
#define CHIP_REV(bp)   (((bp)->chip_id) & 0x0000f000)
 
#define CHIP_REV_Ax   0x00000000
 
#define CHIP_REV_Bx   0x00001000
 
#define CHIP_REV_Cx   0x00002000
 
#define CHIP_METAL(bp)   (((bp)->chip_id) & 0x00000ff0)
 
#define CHIP_BONDING(bp)   (((bp)->chip_id) & 0x0000000f)
 
#define CHIP_ID(bp)   (((bp)->chip_id) & 0xfffffff0)
 
#define CHIP_ID_5706_A0   0x57060000
 
#define CHIP_ID_5706_A1   0x57060010
 
#define CHIP_ID_5706_A2   0x57060020
 
#define CHIP_ID_5708_A0   0x57080000
 
#define CHIP_ID_5708_B0   0x57081000
 
#define CHIP_ID_5708_B1   0x57081010
 
#define CHIP_ID_5709_A0   0x57090000
 
#define CHIP_ID_5709_A1   0x57090010
 
#define CHIP_BOND_ID(bp)   (((bp)->chip_id) & 0xf)
 
#define CHIP_BOND_ID_SERDES_BIT   0x01
 
#define AUTONEG_SPEED   1
 
#define AUTONEG_FLOW_CTRL   2
 
#define MAC_LOOPBACK   1
 
#define PHY_LOOPBACK   2
 
#define REG_RD(bp, offset)   readl(bp->regview + offset)
 
#define REG_WR(bp, offset, val)   writel(val, bp->regview + offset)
 
#define REG_WR16(bp, offset, val)   writew(val, bp->regview + offset)
 
#define RV2P_P1_FIXUP_PAGE_SIZE_IDX   0
 
#define RV2P_BD_PAGE_SIZE_MSK   0xffff
 
#define RV2P_BD_PAGE_SIZE   ((BCM_PAGE_SIZE / 16) - 1)
 
#define RV2P_PROC1   0
 
#define RV2P_PROC2   1
 
#define BNX2_DRV_PULSE_PERIOD_MS   250
 
#define BNX2_FW_ACK_TIME_OUT_MS   1000
 
#define BNX2_DRV_RESET_SIGNATURE   0x00000000
 
#define BNX2_DRV_RESET_SIGNATURE_MAGIC   0x4841564b /* HAVK */
 
#define BNX2_DRV_MB   0x00000004
 
#define BNX2_DRV_MSG_CODE   0xff000000
 
#define BNX2_DRV_MSG_CODE_RESET   0x01000000
 
#define BNX2_DRV_MSG_CODE_UNLOAD   0x02000000
 
#define BNX2_DRV_MSG_CODE_SHUTDOWN   0x03000000
 
#define BNX2_DRV_MSG_CODE_SUSPEND_WOL   0x04000000
 
#define BNX2_DRV_MSG_CODE_FW_TIMEOUT   0x05000000
 
#define BNX2_DRV_MSG_CODE_PULSE   0x06000000
 
#define BNX2_DRV_MSG_CODE_DIAG   0x07000000
 
#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL   0x09000000
 
#define BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN   0x0b000000
 
#define BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE   0x0d000000
 
#define BNX2_DRV_MSG_CODE_CMD_SET_LINK   0x10000000
 
#define BNX2_DRV_MSG_DATA   0x00ff0000
 
#define BNX2_DRV_MSG_DATA_WAIT0   0x00010000
 
#define BNX2_DRV_MSG_DATA_WAIT1   0x00020000
 
#define BNX2_DRV_MSG_DATA_WAIT2   0x00030000
 
#define BNX2_DRV_MSG_DATA_WAIT3   0x00040000
 
#define BNX2_DRV_MSG_SEQ   0x0000ffff
 
#define BNX2_FW_MB   0x00000008
 
#define BNX2_FW_MSG_ACK   0x0000ffff
 
#define BNX2_FW_MSG_STATUS_MASK   0x00ff0000
 
#define BNX2_FW_MSG_STATUS_OK   0x00000000
 
#define BNX2_FW_MSG_STATUS_FAILURE   0x00ff0000
 
#define BNX2_LINK_STATUS   0x0000000c
 
#define BNX2_LINK_STATUS_INIT_VALUE   0xffffffff
 
#define BNX2_LINK_STATUS_LINK_UP   0x1
 
#define BNX2_LINK_STATUS_LINK_DOWN   0x0
 
#define BNX2_LINK_STATUS_SPEED_MASK   0x1e
 
#define BNX2_LINK_STATUS_AN_INCOMPLETE   (0<<1)
 
#define BNX2_LINK_STATUS_10HALF   (1<<1)
 
#define BNX2_LINK_STATUS_10FULL   (2<<1)
 
#define BNX2_LINK_STATUS_100HALF   (3<<1)
 
#define BNX2_LINK_STATUS_100BASE_T4   (4<<1)
 
#define BNX2_LINK_STATUS_100FULL   (5<<1)
 
#define BNX2_LINK_STATUS_1000HALF   (6<<1)
 
#define BNX2_LINK_STATUS_1000FULL   (7<<1)
 
#define BNX2_LINK_STATUS_2500HALF   (8<<1)
 
#define BNX2_LINK_STATUS_2500FULL   (9<<1)
 
#define BNX2_LINK_STATUS_AN_ENABLED   (1<<5)
 
#define BNX2_LINK_STATUS_AN_COMPLETE   (1<<6)
 
#define BNX2_LINK_STATUS_PARALLEL_DET   (1<<7)
 
#define BNX2_LINK_STATUS_RESERVED   (1<<8)
 
#define BNX2_LINK_STATUS_PARTNER_AD_1000FULL   (1<<9)
 
#define BNX2_LINK_STATUS_PARTNER_AD_1000HALF   (1<<10)
 
#define BNX2_LINK_STATUS_PARTNER_AD_100BT4   (1<<11)
 
#define BNX2_LINK_STATUS_PARTNER_AD_100FULL   (1<<12)
 
#define BNX2_LINK_STATUS_PARTNER_AD_100HALF   (1<<13)
 
#define BNX2_LINK_STATUS_PARTNER_AD_10FULL   (1<<14)
 
#define BNX2_LINK_STATUS_PARTNER_AD_10HALF   (1<<15)
 
#define BNX2_LINK_STATUS_TX_FC_ENABLED   (1<<16)
 
#define BNX2_LINK_STATUS_RX_FC_ENABLED   (1<<17)
 
#define BNX2_LINK_STATUS_PARTNER_SYM_PAUSE_CAP   (1<<18)
 
#define BNX2_LINK_STATUS_PARTNER_ASYM_PAUSE_CAP   (1<<19)
 
#define BNX2_LINK_STATUS_SERDES_LINK   (1<<20)
 
#define BNX2_LINK_STATUS_PARTNER_AD_2500FULL   (1<<21)
 
#define BNX2_LINK_STATUS_PARTNER_AD_2500HALF   (1<<22)
 
#define BNX2_LINK_STATUS_HEART_BEAT_EXPIRED   (1<<31)
 
#define BNX2_DRV_PULSE_MB   0x00000010
 
#define BNX2_DRV_PULSE_SEQ_MASK   0x00007fff
 
#define BNX2_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE   0x00080000
 
#define BNX2_DRV_MB_ARG0   0x00000014
 
#define BNX2_NETLINK_SET_LINK_SPEED_10HALF   (1<<0)
 
#define BNX2_NETLINK_SET_LINK_SPEED_10FULL   (1<<1)
 
#define BNX2_NETLINK_SET_LINK_SPEED_10
 
#define BNX2_NETLINK_SET_LINK_SPEED_100HALF   (1<<2)
 
#define BNX2_NETLINK_SET_LINK_SPEED_100FULL   (1<<3)
 
#define BNX2_NETLINK_SET_LINK_SPEED_100
 
#define BNX2_NETLINK_SET_LINK_SPEED_1GHALF   (1<<4)
 
#define BNX2_NETLINK_SET_LINK_SPEED_1GFULL   (1<<5)
 
#define BNX2_NETLINK_SET_LINK_SPEED_2G5HALF   (1<<6)
 
#define BNX2_NETLINK_SET_LINK_SPEED_2G5FULL   (1<<7)
 
#define BNX2_NETLINK_SET_LINK_SPEED_10GHALF   (1<<8)
 
#define BNX2_NETLINK_SET_LINK_SPEED_10GFULL   (1<<9)
 
#define BNX2_NETLINK_SET_LINK_ENABLE_AUTONEG   (1<<10)
 
#define BNX2_NETLINK_SET_LINK_PHY_APP_REMOTE   (1<<11)
 
#define BNX2_NETLINK_SET_LINK_FC_SYM_PAUSE   (1<<12)
 
#define BNX2_NETLINK_SET_LINK_FC_ASYM_PAUSE   (1<<13)
 
#define BNX2_NETLINK_SET_LINK_ETH_AT_WIRESPEED   (1<<14)
 
#define BNX2_NETLINK_SET_LINK_PHY_RESET   (1<<15)
 
#define BNX2_DEV_INFO_SIGNATURE   0x00000020
 
#define BNX2_DEV_INFO_SIGNATURE_MAGIC   0x44564900
 
#define BNX2_DEV_INFO_SIGNATURE_MAGIC_MASK   0xffffff00
 
#define BNX2_DEV_INFO_FEATURE_CFG_VALID   0x01
 
#define BNX2_DEV_INFO_SECONDARY_PORT   0x80
 
#define BNX2_DEV_INFO_DRV_ALWAYS_ALIVE   0x40
 
#define BNX2_SHARED_HW_CFG_PART_NUM   0x00000024
 
#define BNX2_SHARED_HW_CFG_POWER_DISSIPATED   0x00000034
 
#define BNX2_SHARED_HW_CFG_POWER_STATE_D3_MASK   0xff000000
 
#define BNX2_SHARED_HW_CFG_POWER_STATE_D2_MASK   0xff0000
 
#define BNX2_SHARED_HW_CFG_POWER_STATE_D1_MASK   0xff00
 
#define BNX2_SHARED_HW_CFG_POWER_STATE_D0_MASK   0xff
 
#define BNX2_SHARED_HW_CFG   POWER_CONSUMED 0x00000038
 
#define BNX2_SHARED_HW_CFG_CONFIG   0x0000003c
 
#define BNX2_SHARED_HW_CFG_DESIGN_NIC   0
 
#define BNX2_SHARED_HW_CFG_DESIGN_LOM   0x1
 
#define BNX2_SHARED_HW_CFG_PHY_COPPER   0
 
#define BNX2_SHARED_HW_CFG_PHY_FIBER   0x2
 
#define BNX2_SHARED_HW_CFG_PHY_2_5G   0x20
 
#define BNX2_SHARED_HW_CFG_PHY_BACKPLANE   0x40
 
#define BNX2_SHARED_HW_CFG_LED_MODE_SHIFT_BITS   8
 
#define BNX2_SHARED_HW_CFG_LED_MODE_MASK   0x300
 
#define BNX2_SHARED_HW_CFG_LED_MODE_MAC   0
 
#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1   0x100
 
#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2   0x200
 
#define BNX2_SHARED_HW_CFG_GIG_LINK_ON_VAUX   0x8000
 
#define BNX2_SHARED_HW_CFG_CONFIG2   0x00000040
 
#define BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK   0x00fff000
 
#define BNX2_DEV_INFO_BC_REV   0x0000004c
 
#define BNX2_PORT_HW_CFG_MAC_UPPER   0x00000050
 
#define BNX2_PORT_HW_CFG_UPPERMAC_MASK   0xffff
 
#define BNX2_PORT_HW_CFG_MAC_LOWER   0x00000054
 
#define BNX2_PORT_HW_CFG_CONFIG   0x00000058
 
#define BNX2_PORT_HW_CFG_CFG_TXCTL3_MASK   0x0000ffff
 
#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_MASK   0x001f0000
 
#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_AN   0x00000000
 
#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_1G   0x00030000
 
#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_2_5G   0x00040000
 
#define BNX2_PORT_HW_CFG_IMD_MAC_A_UPPER   0x00000068
 
#define BNX2_PORT_HW_CFG_IMD_MAC_A_LOWER   0x0000006c
 
#define BNX2_PORT_HW_CFG_IMD_MAC_B_UPPER   0x00000070
 
#define BNX2_PORT_HW_CFG_IMD_MAC_B_LOWER   0x00000074
 
#define BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER   0x00000078
 
#define BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER   0x0000007c
 
#define BNX2_DEV_INFO_PER_PORT_HW_CONFIG2   0x000000b4
 
#define BNX2_DEV_INFO_FORMAT_REV   0x000000c4
 
#define BNX2_DEV_INFO_FORMAT_REV_MASK   0xff000000
 
#define BNX2_DEV_INFO_FORMAT_REV_ID   ('A' << 24)
 
#define BNX2_SHARED_FEATURE   0x000000c8
 
#define BNX2_SHARED_FEATURE_MASK   0xffffffff
 
#define BNX2_PORT_FEATURE   0x000000d8
 
#define BNX2_PORT2_FEATURE   0x00000014c
 
#define BNX2_PORT_FEATURE_WOL_ENABLED   0x01000000
 
#define BNX2_PORT_FEATURE_MBA_ENABLED   0x02000000
 
#define BNX2_PORT_FEATURE_ASF_ENABLED   0x04000000
 
#define BNX2_PORT_FEATURE_IMD_ENABLED   0x08000000
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_MASK   0xf
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_DISABLED   0x0
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_64K   0x1
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_128K   0x2
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_256K   0x3
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_512K   0x4
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_1M   0x5
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_2M   0x6
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_4M   0x7
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_8M   0x8
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_16M   0x9
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_32M   0xa
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_64M   0xb
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_128M   0xc
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_256M   0xd
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_512M   0xe
 
#define BNX2_PORT_FEATURE_BAR1_SIZE_1G   0xf
 
#define BNX2_PORT_FEATURE_WOL   0xdc
 
#define BNX2_PORT2_FEATURE_WOL   0x150
 
#define BNX2_PORT_FEATURE_WOL_DEFAULT_SHIFT_BITS   4
 
#define BNX2_PORT_FEATURE_WOL_DEFAULT_MASK   0x30
 
#define BNX2_PORT_FEATURE_WOL_DEFAULT_DISABLE   0
 
#define BNX2_PORT_FEATURE_WOL_DEFAULT_MAGIC   0x10
 
#define BNX2_PORT_FEATURE_WOL_DEFAULT_ACPI   0x20
 
#define BNX2_PORT_FEATURE_WOL_DEFAULT_MAGIC_AND_ACPI   0x30
 
#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_MASK   0xf
 
#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_AUTONEG   0
 
#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_10HALF   1
 
#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_10FULL   2
 
#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_100HALF   3
 
#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_100FULL   4
 
#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_1000HALF   5
 
#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_1000FULL   6
 
#define BNX2_PORT_FEATURE_WOL_AUTONEG_ADVERTISE_1000   0x40
 
#define BNX2_PORT_FEATURE_WOL_RESERVED_PAUSE_CAP   0x400
 
#define BNX2_PORT_FEATURE_WOL_RESERVED_ASYM_PAUSE_CAP   0x800
 
#define BNX2_PORT_FEATURE_MBA   0xe0
 
#define BNX2_PORT2_FEATURE_MBA   0x154
 
#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_SHIFT_BITS   0
 
#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_MASK   0x3
 
#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_PXE   0
 
#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_RPL   1
 
#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_BOOTP   2
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_SHIFT_BITS   2
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_MASK   0x3c
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_AUTONEG   0
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_10HALF   0x4
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_10FULL   0x8
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_100HALF   0xc
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_100FULL   0x10
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_1000HALF   0x14
 
#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_1000FULL   0x18
 
#define BNX2_PORT_FEATURE_MBA_SETUP_PROMPT_ENABLE   0x40
 
#define BNX2_PORT_FEATURE_MBA_HOTKEY_CTRL_S   0
 
#define BNX2_PORT_FEATURE_MBA_HOTKEY_CTRL_B   0x80
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_SHIFT_BITS   8
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_MASK   0xff00
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_DISABLED   0
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_1K   0x100
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_2K   0x200
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_4K   0x300
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_8K   0x400
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_16K   0x500
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_32K   0x600
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_64K   0x700
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_128K   0x800
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_256K   0x900
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_512K   0xa00
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_1M   0xb00
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_2M   0xc00
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_4M   0xd00
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_8M   0xe00
 
#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_16M   0xf00
 
#define BNX2_PORT_FEATURE_MBA_MSG_TIMEOUT_SHIFT_BITS   16
 
#define BNX2_PORT_FEATURE_MBA_MSG_TIMEOUT_MASK   0xf0000
 
#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_SHIFT_BITS   20
 
#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_MASK   0x300000
 
#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_AUTO   0
 
#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_BBS   0x100000
 
#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT18H   0x200000
 
#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT19H   0x300000
 
#define BNX2_PORT_FEATURE_IMD   0xe4
 
#define BNX2_PORT2_FEATURE_IMD   0x158
 
#define BNX2_PORT_FEATURE_IMD_LINK_OVERRIDE_DEFAULT   0
 
#define BNX2_PORT_FEATURE_IMD_LINK_OVERRIDE_ENABLE   1
 
#define BNX2_PORT_FEATURE_VLAN   0xe8
 
#define BNX2_PORT2_FEATURE_VLAN   0x15c
 
#define BNX2_PORT_FEATURE_MBA_VLAN_TAG_MASK   0xffff
 
#define BNX2_PORT_FEATURE_MBA_VLAN_ENABLE   0x10000
 
#define BNX2_MFW_VER_PTR   0x00000014c
 
#define BNX2_BC_STATE_RESET_TYPE   0x000001c0
 
#define BNX2_BC_STATE_RESET_TYPE_SIG   0x00005254
 
#define BNX2_BC_STATE_RESET_TYPE_SIG_MASK   0x0000ffff
 
#define BNX2_BC_STATE_RESET_TYPE_NONE
 
#define BNX2_BC_STATE_RESET_TYPE_PCI
 
#define BNX2_BC_STATE_RESET_TYPE_VAUX
 
#define BNX2_BC_STATE_RESET_TYPE_DRV_MASK   DRV_MSG_CODE
 
#define BNX2_BC_STATE_RESET_TYPE_DRV_RESET
 
#define BNX2_BC_STATE_RESET_TYPE_DRV_UNLOAD
 
#define BNX2_BC_STATE_RESET_TYPE_DRV_SHUTDOWN
 
#define BNX2_BC_STATE_RESET_TYPE_DRV_WOL
 
#define BNX2_BC_STATE_RESET_TYPE_DRV_DIAG
 
#define BNX2_BC_STATE_RESET_TYPE_VALUE(msg)
 
#define BNX2_BC_RESET_TYPE   0x000001c0
 
#define BNX2_BC_STATE   0x000001c4
 
#define BNX2_BC_STATE_ERR_MASK   0x0000ff00
 
#define BNX2_BC_STATE_SIGN   0x42530000
 
#define BNX2_BC_STATE_SIGN_MASK   0xffff0000
 
#define BNX2_BC_STATE_BC1_START   (BNX2_BC_STATE_SIGN | 0x1)
 
#define BNX2_BC_STATE_GET_NVM_CFG1   (BNX2_BC_STATE_SIGN | 0x2)
 
#define BNX2_BC_STATE_PROG_BAR   (BNX2_BC_STATE_SIGN | 0x3)
 
#define BNX2_BC_STATE_INIT_VID   (BNX2_BC_STATE_SIGN | 0x4)
 
#define BNX2_BC_STATE_GET_NVM_CFG2   (BNX2_BC_STATE_SIGN | 0x5)
 
#define BNX2_BC_STATE_APPLY_WKARND   (BNX2_BC_STATE_SIGN | 0x6)
 
#define BNX2_BC_STATE_LOAD_BC2   (BNX2_BC_STATE_SIGN | 0x7)
 
#define BNX2_BC_STATE_GOING_BC2   (BNX2_BC_STATE_SIGN | 0x8)
 
#define BNX2_BC_STATE_GOING_DIAG   (BNX2_BC_STATE_SIGN | 0x9)
 
#define BNX2_BC_STATE_RT_FINAL_INIT   (BNX2_BC_STATE_SIGN | 0x81)
 
#define BNX2_BC_STATE_RT_WKARND   (BNX2_BC_STATE_SIGN | 0x82)
 
#define BNX2_BC_STATE_RT_DRV_PULSE   (BNX2_BC_STATE_SIGN | 0x83)
 
#define BNX2_BC_STATE_RT_FIOEVTS   (BNX2_BC_STATE_SIGN | 0x84)
 
#define BNX2_BC_STATE_RT_DRV_CMD   (BNX2_BC_STATE_SIGN | 0x85)
 
#define BNX2_BC_STATE_RT_LOW_POWER   (BNX2_BC_STATE_SIGN | 0x86)
 
#define BNX2_BC_STATE_RT_SET_WOL   (BNX2_BC_STATE_SIGN | 0x87)
 
#define BNX2_BC_STATE_RT_OTHER_FW   (BNX2_BC_STATE_SIGN | 0x88)
 
#define BNX2_BC_STATE_RT_GOING_D3   (BNX2_BC_STATE_SIGN | 0x89)
 
#define BNX2_BC_STATE_ERR_BAD_VERSION   (BNX2_BC_STATE_SIGN | 0x0100)
 
#define BNX2_BC_STATE_ERR_BAD_BC2_CRC   (BNX2_BC_STATE_SIGN | 0x0200)
 
#define BNX2_BC_STATE_ERR_BC1_LOOP   (BNX2_BC_STATE_SIGN | 0x0300)
 
#define BNX2_BC_STATE_ERR_UNKNOWN_CMD   (BNX2_BC_STATE_SIGN | 0x0400)
 
#define BNX2_BC_STATE_ERR_DRV_DEAD   (BNX2_BC_STATE_SIGN | 0x0500)
 
#define BNX2_BC_STATE_ERR_NO_RXP   (BNX2_BC_STATE_SIGN | 0x0600)
 
#define BNX2_BC_STATE_ERR_TOO_MANY_RBUF   (BNX2_BC_STATE_SIGN | 0x0700)
 
#define BNX2_BC_STATE_CONDITION   0x000001c8
 
#define BNX2_CONDITION_MFW_RUN_UNKNOWN   0x00000000
 
#define BNX2_CONDITION_MFW_RUN_IPMI   0x00002000
 
#define BNX2_CONDITION_MFW_RUN_UMP   0x00004000
 
#define BNX2_CONDITION_MFW_RUN_NCSI   0x00006000
 
#define BNX2_CONDITION_MFW_RUN_NONE   0x0000e000
 
#define BNX2_CONDITION_MFW_RUN_MASK   0x0000e000
 
#define BNX2_BC_STATE_DEBUG_CMD   0x1dc
 
#define BNX2_BC_STATE_BC_DBG_CMD_SIGNATURE   0x42440000
 
#define BNX2_BC_STATE_BC_DBG_CMD_SIGNATURE_MASK   0xffff0000
 
#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_CNT_MASK   0xffff
 
#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_INFINITE   0xffff
 
#define BNX2_FW_EVT_CODE_MB   0x354
 
#define BNX2_FW_EVT_CODE_SW_TIMER_EXPIRATION_EVENT   0x00000000
 
#define BNX2_FW_EVT_CODE_LINK_EVENT   0x00000001
 
#define BNX2_DRV_ACK_CAP_MB   0x364
 
#define BNX2_DRV_ACK_CAP_SIGNATURE   0x35450000
 
#define BNX2_CAPABILITY_SIGNATURE_MASK   0xFFFF0000
 
#define BNX2_FW_CAP_MB   0x368
 
#define BNX2_FW_CAP_SIGNATURE   0xaa550000
 
#define BNX2_FW_ACK_DRV_SIGNATURE   0x52500000
 
#define BNX2_FW_CAP_SIGNATURE_MASK   0xffff0000
 
#define BNX2_FW_CAP_REMOTE_PHY_CAPABLE   0x00000001
 
#define BNX2_FW_CAP_REMOTE_PHY_PRESENT   0x00000002
 
#define BNX2_FW_CAP_MFW_CAN_KEEP_VLAN   0x00000008
 
#define BNX2_FW_CAP_BC_CAN_KEEP_VLAN   0x00000010
 
#define BNX2_FW_CAP_CAN_KEEP_VLAN
 
#define BNX2_RPHY_SIGNATURE   0x36c
 
#define BNX2_RPHY_LOAD_SIGNATURE   0x5a5a5a5a
 
#define BNX2_RPHY_FLAGS   0x370
 
#define BNX2_RPHY_SERDES_LINK   0x374
 
#define BNX2_RPHY_COPPER_LINK   0x378
 
#define BNX2_ISCSI_INITIATOR   0x3dc
 
#define BNX2_ISCSI_INITIATOR_EN   0x00080000
 
#define BNX2_ISCSI_MAX_CONN   0x3e4
 
#define BNX2_ISCSI_MAX_CONN_MASK   0xffff0000
 
#define BNX2_ISCSI_MAX_CONN_SHIFT   16
 
#define HOST_VIEW_SHMEM_BASE   0x167c00
 
#define DP_SHMEM_LINE(bp, offset)
 

Macro Definition Documentation

#define AUTONEG_FLOW_CTRL   2

Definition at line 6949 of file bnx2.h.

#define AUTONEG_SPEED   1

Definition at line 6948 of file bnx2.h.

#define BCM5708S_1000X_CTL1   0x10

Definition at line 6440 of file bnx2.h.

#define BCM5708S_1000X_CTL1_AUTODET_EN   0x0010

Definition at line 6443 of file bnx2.h.

#define BCM5708S_1000X_CTL1_FIBER_MODE   0x0001

Definition at line 6442 of file bnx2.h.

#define BCM5708S_1000X_CTL2   0x11

Definition at line 6445 of file bnx2.h.

#define BCM5708S_1000X_CTL2_PLLEL_DET_EN   0x0001

Definition at line 6447 of file bnx2.h.

#define BCM5708S_1000X_STAT1   0x14

Definition at line 6449 of file bnx2.h.

#define BCM5708S_1000X_STAT1_FD   0x0004

Definition at line 6453 of file bnx2.h.

#define BCM5708S_1000X_STAT1_LINK   0x0002

Definition at line 6452 of file bnx2.h.

#define BCM5708S_1000X_STAT1_RX_PAUSE   0x0040

Definition at line 6460 of file bnx2.h.

#define BCM5708S_1000X_STAT1_SGMII   0x0001

Definition at line 6451 of file bnx2.h.

#define BCM5708S_1000X_STAT1_SPEED_10   0x0000

Definition at line 6455 of file bnx2.h.

#define BCM5708S_1000X_STAT1_SPEED_100   0x0008

Definition at line 6456 of file bnx2.h.

#define BCM5708S_1000X_STAT1_SPEED_1G   0x0010

Definition at line 6457 of file bnx2.h.

#define BCM5708S_1000X_STAT1_SPEED_2G5   0x0018

Definition at line 6458 of file bnx2.h.

#define BCM5708S_1000X_STAT1_SPEED_MASK   0x0018

Definition at line 6454 of file bnx2.h.

#define BCM5708S_1000X_STAT1_TX_PAUSE   0x0020

Definition at line 6459 of file bnx2.h.

#define BCM5708S_BLK_ADDR   0x1f

Definition at line 6433 of file bnx2.h.

#define BCM5708S_BLK_ADDR_DIG   0x0000

Definition at line 6435 of file bnx2.h.

#define BCM5708S_BLK_ADDR_DIG3   0x0002

Definition at line 6436 of file bnx2.h.

#define BCM5708S_BLK_ADDR_TX_MISC   0x0005

Definition at line 6437 of file bnx2.h.

#define BCM5708S_BMCR_FORCE_2500   0x20

Definition at line 6427 of file bnx2.h.

#define BCM5708S_DIG_3_0   0x10

Definition at line 6463 of file bnx2.h.

#define BCM5708S_DIG_3_0_USE_IEEE   0x0001

Definition at line 6465 of file bnx2.h.

#define BCM5708S_TX_ACTL1   0x15

Definition at line 6468 of file bnx2.h.

#define BCM5708S_TX_ACTL1_DRIVER_VCM   0x30

Definition at line 6470 of file bnx2.h.

#define BCM5708S_TX_ACTL3   0x17

Definition at line 6472 of file bnx2.h.

#define BCM5708S_UP1   0xb

Definition at line 6429 of file bnx2.h.

#define BCM5708S_UP1_2G5   0x1

Definition at line 6431 of file bnx2.h.

#define BCM5709_FLASH_BYTE_ADDR_MASK   (BCM5709_FLASH_PHY_PAGE_SIZE-1)

Definition at line 6671 of file bnx2.h.

#define BCM5709_FLASH_PAGE_BITS   8

Definition at line 6669 of file bnx2.h.

#define BCM5709_FLASH_PAGE_SIZE   256

Definition at line 6672 of file bnx2.h.

#define BCM5709_FLASH_PHY_PAGE_SIZE   (1 << BCM5709_FLASH_PAGE_BITS)

Definition at line 6670 of file bnx2.h.

#define BCM_PAGE_BITS   PAGE_SHIFT

Definition at line 6543 of file bnx2.h.

#define BCM_PAGE_SIZE   (1 << BCM_PAGE_BITS)

Definition at line 6545 of file bnx2.h.

#define BNX2_BC_RESET_TYPE   0x000001c0

Definition at line 7360 of file bnx2.h.

#define BNX2_BC_STATE   0x000001c4

Definition at line 7362 of file bnx2.h.

#define BNX2_BC_STATE_APPLY_WKARND   (BNX2_BC_STATE_SIGN | 0x6)

Definition at line 7371 of file bnx2.h.

#define BNX2_BC_STATE_BC1_START   (BNX2_BC_STATE_SIGN | 0x1)

Definition at line 7366 of file bnx2.h.

#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_CNT_MASK   0xffff

Definition at line 7403 of file bnx2.h.

#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_INFINITE   0xffff

Definition at line 7404 of file bnx2.h.

#define BNX2_BC_STATE_BC_DBG_CMD_SIGNATURE   0x42440000

Definition at line 7401 of file bnx2.h.

#define BNX2_BC_STATE_BC_DBG_CMD_SIGNATURE_MASK   0xffff0000

Definition at line 7402 of file bnx2.h.

#define BNX2_BC_STATE_CONDITION   0x000001c8

Definition at line 7392 of file bnx2.h.

#define BNX2_BC_STATE_DEBUG_CMD   0x1dc

Definition at line 7400 of file bnx2.h.

#define BNX2_BC_STATE_ERR_BAD_BC2_CRC   (BNX2_BC_STATE_SIGN | 0x0200)

Definition at line 7385 of file bnx2.h.

#define BNX2_BC_STATE_ERR_BAD_VERSION   (BNX2_BC_STATE_SIGN | 0x0100)

Definition at line 7384 of file bnx2.h.

#define BNX2_BC_STATE_ERR_BC1_LOOP   (BNX2_BC_STATE_SIGN | 0x0300)

Definition at line 7386 of file bnx2.h.

#define BNX2_BC_STATE_ERR_DRV_DEAD   (BNX2_BC_STATE_SIGN | 0x0500)

Definition at line 7388 of file bnx2.h.

#define BNX2_BC_STATE_ERR_MASK   0x0000ff00

Definition at line 7363 of file bnx2.h.

#define BNX2_BC_STATE_ERR_NO_RXP   (BNX2_BC_STATE_SIGN | 0x0600)

Definition at line 7389 of file bnx2.h.

#define BNX2_BC_STATE_ERR_TOO_MANY_RBUF   (BNX2_BC_STATE_SIGN | 0x0700)

Definition at line 7390 of file bnx2.h.

#define BNX2_BC_STATE_ERR_UNKNOWN_CMD   (BNX2_BC_STATE_SIGN | 0x0400)

Definition at line 7387 of file bnx2.h.

#define BNX2_BC_STATE_GET_NVM_CFG1   (BNX2_BC_STATE_SIGN | 0x2)

Definition at line 7367 of file bnx2.h.

#define BNX2_BC_STATE_GET_NVM_CFG2   (BNX2_BC_STATE_SIGN | 0x5)

Definition at line 7370 of file bnx2.h.

#define BNX2_BC_STATE_GOING_BC2   (BNX2_BC_STATE_SIGN | 0x8)

Definition at line 7373 of file bnx2.h.

#define BNX2_BC_STATE_GOING_DIAG   (BNX2_BC_STATE_SIGN | 0x9)

Definition at line 7374 of file bnx2.h.

#define BNX2_BC_STATE_INIT_VID   (BNX2_BC_STATE_SIGN | 0x4)

Definition at line 7369 of file bnx2.h.

#define BNX2_BC_STATE_LOAD_BC2   (BNX2_BC_STATE_SIGN | 0x7)

Definition at line 7372 of file bnx2.h.

#define BNX2_BC_STATE_PROG_BAR   (BNX2_BC_STATE_SIGN | 0x3)

Definition at line 7368 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE   0x000001c0

Definition at line 7337 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_DRV_DIAG
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
DRV_MSG_CODE_DIAG)

Definition at line 7355 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_DRV_MASK   DRV_MSG_CODE

Definition at line 7346 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_DRV_RESET
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
DRV_MSG_CODE_RESET)

Definition at line 7347 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_DRV_SHUTDOWN
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
DRV_MSG_CODE_SHUTDOWN)

Definition at line 7351 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_DRV_UNLOAD
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
DRV_MSG_CODE_UNLOAD)

Definition at line 7349 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_DRV_WOL
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
DRV_MSG_CODE_WOL)

Definition at line 7353 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_NONE
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
0x00010000)

Definition at line 7340 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_PCI
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
0x00020000)

Definition at line 7342 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_SIG   0x00005254

Definition at line 7338 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_SIG_MASK   0x0000ffff

Definition at line 7339 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_VALUE (   msg)
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
(msg))

Definition at line 7357 of file bnx2.h.

#define BNX2_BC_STATE_RESET_TYPE_VAUX
Value:
(BNX2_BC_STATE_RESET_TYPE_SIG | \
0x00030000)

Definition at line 7344 of file bnx2.h.

#define BNX2_BC_STATE_RT_DRV_CMD   (BNX2_BC_STATE_SIGN | 0x85)

Definition at line 7379 of file bnx2.h.

#define BNX2_BC_STATE_RT_DRV_PULSE   (BNX2_BC_STATE_SIGN | 0x83)

Definition at line 7377 of file bnx2.h.

#define BNX2_BC_STATE_RT_FINAL_INIT   (BNX2_BC_STATE_SIGN | 0x81)

Definition at line 7375 of file bnx2.h.

#define BNX2_BC_STATE_RT_FIOEVTS   (BNX2_BC_STATE_SIGN | 0x84)

Definition at line 7378 of file bnx2.h.

#define BNX2_BC_STATE_RT_GOING_D3   (BNX2_BC_STATE_SIGN | 0x89)

Definition at line 7383 of file bnx2.h.

#define BNX2_BC_STATE_RT_LOW_POWER   (BNX2_BC_STATE_SIGN | 0x86)

Definition at line 7380 of file bnx2.h.

#define BNX2_BC_STATE_RT_OTHER_FW   (BNX2_BC_STATE_SIGN | 0x88)

Definition at line 7382 of file bnx2.h.

#define BNX2_BC_STATE_RT_SET_WOL   (BNX2_BC_STATE_SIGN | 0x87)

Definition at line 7381 of file bnx2.h.

#define BNX2_BC_STATE_RT_WKARND   (BNX2_BC_STATE_SIGN | 0x82)

Definition at line 7376 of file bnx2.h.

#define BNX2_BC_STATE_SIGN   0x42530000

Definition at line 7364 of file bnx2.h.

#define BNX2_BC_STATE_SIGN_MASK   0xffff0000

Definition at line 7365 of file bnx2.h.

#define BNX2_CAPABILITY_SIGNATURE_MASK   0xFFFF0000

Definition at line 7412 of file bnx2.h.

#define BNX2_COM_CKSUM_ERROR_STATUS   0x00100000

Definition at line 5969 of file bnx2.h.

#define BNX2_COM_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)

Definition at line 5970 of file bnx2.h.

#define BNX2_COM_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)

Definition at line 5971 of file bnx2.h.

#define BNX2_COM_COMQ   0x001053c0

Definition at line 6104 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD   0x001053f8

Definition at line 6105 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 6113 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 6112 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_BUSY   (1L<<31)

Definition at line 6116 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 6114 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 6106 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_POP   (1L<<30)

Definition at line 6115 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 6111 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 6110 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 6107 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 6108 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 6109 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CTL   0x001053fc

Definition at line 6118 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 6123 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 6121 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 6119 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 6122 of file bnx2.h.

#define BNX2_COM_COMQ_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 6120 of file bnx2.h.

#define BNX2_COM_COMTQ   0x00105380

Definition at line 6083 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD   0x001053b8

Definition at line 6084 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 6092 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 6091 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_BUSY   (1L<<31)

Definition at line 6095 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 6093 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 6085 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_POP   (1L<<30)

Definition at line 6094 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 6090 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 6089 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 6086 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 6087 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 6088 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CTL   0x001053bc

Definition at line 6097 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 6102 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 6100 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 6098 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 6101 of file bnx2.h.

#define BNX2_COM_COMTQ_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 6099 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL   0x001052bc

Definition at line 6040 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_INC_USAGE_CNT   (1L<<0)

Definition at line 6041 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_OFFSET   (0x1ffL<<16)

Definition at line 6060 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_COUNT   (0xfL<<12)

Definition at line 6059 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE   (0xfL<<4)

Definition at line 6042 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_0   (0L<<4)

Definition at line 6043 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_1   (1L<<4)

Definition at line 6044 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_10   (10L<<4)

Definition at line 6053 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_11   (11L<<4)

Definition at line 6054 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_12   (12L<<4)

Definition at line 6055 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_13   (13L<<4)

Definition at line 6056 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_14   (14L<<4)

Definition at line 6057 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_15   (15L<<4)

Definition at line 6058 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_2   (2L<<4)

Definition at line 6045 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_3   (3L<<4)

Definition at line 6046 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_4   (4L<<4)

Definition at line 6047 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_5   (5L<<4)

Definition at line 6048 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_6   (6L<<4)

Definition at line 6049 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_7   (7L<<4)

Definition at line 6050 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_8   (8L<<4)

Definition at line 6051 of file bnx2.h.

#define BNX2_COM_COMTQ_PFE_PFE_CTL_PFE_SIZE_9   (9L<<4)

Definition at line 6052 of file bnx2.h.

#define BNX2_COM_COMXQ   0x00105340

Definition at line 6062 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD   0x00105378

Definition at line 6063 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 6071 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 6070 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_BUSY   (1L<<31)

Definition at line 6074 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 6072 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 6064 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_POP   (1L<<30)

Definition at line 6073 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 6069 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 6068 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 6065 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 6066 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 6067 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CTL   0x0010537c

Definition at line 6076 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 6081 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 6079 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 6077 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 6080 of file bnx2.h.

#define BNX2_COM_COMXQ_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 6078 of file bnx2.h.

#define BNX2_COM_CPU_DATA_ACCESS   0x00105024

Definition at line 6017 of file bnx2.h.

#define BNX2_COM_CPU_DEBUG_VECT_PEEK   0x00105038

Definition at line 6025 of file bnx2.h.

#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 6027 of file bnx2.h.

#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 6028 of file bnx2.h.

#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 6026 of file bnx2.h.

#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 6030 of file bnx2.h.

#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 6031 of file bnx2.h.

#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 6029 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK   0x00105008

Definition at line 6002 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)

Definition at line 6009 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)

Definition at line 6007 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)

Definition at line 6004 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)

Definition at line 6008 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)

Definition at line 6003 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)

Definition at line 6010 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)

Definition at line 6013 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)

Definition at line 6005 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)

Definition at line 6006 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)

Definition at line 6011 of file bnx2.h.

#define BNX2_COM_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)

Definition at line 6012 of file bnx2.h.

#define BNX2_COM_CPU_HW_BREAKPOINT   0x00105034

Definition at line 6021 of file bnx2.h.

#define BNX2_COM_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)

Definition at line 6023 of file bnx2.h.

#define BNX2_COM_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)

Definition at line 6022 of file bnx2.h.

#define BNX2_COM_CPU_INSTRUCTION   0x00105020

Definition at line 6016 of file bnx2.h.

#define BNX2_COM_CPU_INTERRUPT_ENABLE   0x00105028

Definition at line 6018 of file bnx2.h.

#define BNX2_COM_CPU_INTERRUPT_SAVED_PC   0x00105030

Definition at line 6020 of file bnx2.h.

#define BNX2_COM_CPU_INTERRUPT_VECTOR   0x0010502c

Definition at line 6019 of file bnx2.h.

#define BNX2_COM_CPU_LAST_BRANCH_ADDR   0x00105048

Definition at line 6033 of file bnx2.h.

#define BNX2_COM_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)

Definition at line 6037 of file bnx2.h.

#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)

Definition at line 6034 of file bnx2.h.

#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)

Definition at line 6036 of file bnx2.h.

#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)

Definition at line 6035 of file bnx2.h.

#define BNX2_COM_CPU_MODE   0x00105000

Definition at line 5973 of file bnx2.h.

#define BNX2_COM_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)

Definition at line 5981 of file bnx2.h.

#define BNX2_COM_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)

Definition at line 5982 of file bnx2.h.

#define BNX2_COM_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)

Definition at line 5983 of file bnx2.h.

#define BNX2_COM_CPU_MODE_INTERRUPT_ENA   (1L<<7)

Definition at line 5979 of file bnx2.h.

#define BNX2_COM_CPU_MODE_LOCAL_RST   (1L<<0)

Definition at line 5974 of file bnx2.h.

#define BNX2_COM_CPU_MODE_MSG_BIT1   (1L<<6)

Definition at line 5978 of file bnx2.h.

#define BNX2_COM_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)

Definition at line 5976 of file bnx2.h.

#define BNX2_COM_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)

Definition at line 5977 of file bnx2.h.

#define BNX2_COM_CPU_MODE_SOFT_HALT   (1L<<10)

Definition at line 5980 of file bnx2.h.

#define BNX2_COM_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)

Definition at line 5984 of file bnx2.h.

#define BNX2_COM_CPU_MODE_STEP_ENA   (1L<<1)

Definition at line 5975 of file bnx2.h.

#define BNX2_COM_CPU_PROGRAM_COUNTER   0x0010501c

Definition at line 6015 of file bnx2.h.

#define BNX2_COM_CPU_REG_FILE   0x00105200

Definition at line 6039 of file bnx2.h.

#define BNX2_COM_CPU_STATE   0x00105004

Definition at line 5986 of file bnx2.h.

#define BNX2_COM_CPU_STATE_ALIGN_HALTED   (1L<<7)

Definition at line 5993 of file bnx2.h.

#define BNX2_COM_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)

Definition at line 5991 of file bnx2.h.

#define BNX2_COM_CPU_STATE_BAD_INST_HALTED   (1L<<2)

Definition at line 5988 of file bnx2.h.

#define BNX2_COM_CPU_STATE_BAD_PC_HALTED   (1L<<6)

Definition at line 5992 of file bnx2.h.

#define BNX2_COM_CPU_STATE_BLOCKED_READ   (1L<<31)

Definition at line 6000 of file bnx2.h.

#define BNX2_COM_CPU_STATE_BREAKPOINT   (1L<<0)

Definition at line 5987 of file bnx2.h.

#define BNX2_COM_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)

Definition at line 5998 of file bnx2.h.

#define BNX2_COM_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)

Definition at line 5994 of file bnx2.h.

#define BNX2_COM_CPU_STATE_INST_FETCH_STALL   (1L<<15)

Definition at line 5999 of file bnx2.h.

#define BNX2_COM_CPU_STATE_INTERRUPT   (1L<<12)

Definition at line 5997 of file bnx2.h.

#define BNX2_COM_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)

Definition at line 5989 of file bnx2.h.

#define BNX2_COM_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)

Definition at line 5990 of file bnx2.h.

#define BNX2_COM_CPU_STATE_SOFT_HALTED   (1L<<10)

Definition at line 5995 of file bnx2.h.

#define BNX2_COM_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)

Definition at line 5996 of file bnx2.h.

#define BNX2_COM_SCRATCH   0x00120000

Definition at line 6125 of file bnx2.h.

#define BNX2_CONDITION_MFW_RUN_IPMI   0x00002000

Definition at line 7394 of file bnx2.h.

#define BNX2_CONDITION_MFW_RUN_MASK   0x0000e000

Definition at line 7398 of file bnx2.h.

#define BNX2_CONDITION_MFW_RUN_NCSI   0x00006000

Definition at line 7396 of file bnx2.h.

#define BNX2_CONDITION_MFW_RUN_NONE   0x0000e000

Definition at line 7397 of file bnx2.h.

#define BNX2_CONDITION_MFW_RUN_UMP   0x00004000

Definition at line 7395 of file bnx2.h.

#define BNX2_CONDITION_MFW_RUN_UNKNOWN   0x00000000

Definition at line 7393 of file bnx2.h.

#define BNX2_CP_CKSUM_ERROR_STATUS   0x00180000

Definition at line 6135 of file bnx2.h.

#define BNX2_CP_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)

Definition at line 6136 of file bnx2.h.

#define BNX2_CP_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)

Definition at line 6137 of file bnx2.h.

#define BNX2_CP_CPQ   0x001853c0

Definition at line 6228 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD   0x001853f8

Definition at line 6229 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 6237 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 6236 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_BUSY   (1L<<31)

Definition at line 6240 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 6238 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 6230 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_POP   (1L<<30)

Definition at line 6239 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 6235 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 6234 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 6231 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 6232 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 6233 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CTL   0x001853fc

Definition at line 6242 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 6247 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 6245 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 6243 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 6246 of file bnx2.h.

#define BNX2_CP_CPQ_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 6244 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL   0x001853bc

Definition at line 6206 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_INC_USAGE_CNT   (1L<<0)

Definition at line 6207 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_OFFSET   (0x1ffL<<16)

Definition at line 6226 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_COUNT   (0xfL<<12)

Definition at line 6225 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE   (0xfL<<4)

Definition at line 6208 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_0   (0L<<4)

Definition at line 6209 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_1   (1L<<4)

Definition at line 6210 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_10   (10L<<4)

Definition at line 6219 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_11   (11L<<4)

Definition at line 6220 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_12   (12L<<4)

Definition at line 6221 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_13   (13L<<4)

Definition at line 6222 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_14   (14L<<4)

Definition at line 6223 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_15   (15L<<4)

Definition at line 6224 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_2   (2L<<4)

Definition at line 6211 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_3   (3L<<4)

Definition at line 6212 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_4   (4L<<4)

Definition at line 6213 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_5   (5L<<4)

Definition at line 6214 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_6   (6L<<4)

Definition at line 6215 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_7   (7L<<4)

Definition at line 6216 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_8   (8L<<4)

Definition at line 6217 of file bnx2.h.

#define BNX2_CP_CPQ_PFE_PFE_CTL_PFE_SIZE_9   (9L<<4)

Definition at line 6218 of file bnx2.h.

#define BNX2_CP_CPU_DATA_ACCESS   0x00185024

Definition at line 6183 of file bnx2.h.

#define BNX2_CP_CPU_DEBUG_VECT_PEEK   0x00185038

Definition at line 6191 of file bnx2.h.

#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 6193 of file bnx2.h.

#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 6194 of file bnx2.h.

#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 6192 of file bnx2.h.

#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 6196 of file bnx2.h.

#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 6197 of file bnx2.h.

#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 6195 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK   0x00185008

Definition at line 6168 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)

Definition at line 6175 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)

Definition at line 6173 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)

Definition at line 6170 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)

Definition at line 6174 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)

Definition at line 6169 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)

Definition at line 6176 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)

Definition at line 6179 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)

Definition at line 6171 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)

Definition at line 6172 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)

Definition at line 6177 of file bnx2.h.

#define BNX2_CP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)

Definition at line 6178 of file bnx2.h.

#define BNX2_CP_CPU_HW_BREAKPOINT   0x00185034

Definition at line 6187 of file bnx2.h.

#define BNX2_CP_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)

Definition at line 6189 of file bnx2.h.

#define BNX2_CP_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)

Definition at line 6188 of file bnx2.h.

#define BNX2_CP_CPU_INSTRUCTION   0x00185020

Definition at line 6182 of file bnx2.h.

#define BNX2_CP_CPU_INTERRUPT_ENABLE   0x00185028

Definition at line 6184 of file bnx2.h.

#define BNX2_CP_CPU_INTERRUPT_SAVED_PC   0x00185030

Definition at line 6186 of file bnx2.h.

#define BNX2_CP_CPU_INTERRUPT_VECTOR   0x0018502c

Definition at line 6185 of file bnx2.h.

#define BNX2_CP_CPU_LAST_BRANCH_ADDR   0x00185048

Definition at line 6199 of file bnx2.h.

#define BNX2_CP_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)

Definition at line 6203 of file bnx2.h.

#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)

Definition at line 6200 of file bnx2.h.

#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)

Definition at line 6202 of file bnx2.h.

#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)

Definition at line 6201 of file bnx2.h.

#define BNX2_CP_CPU_MODE   0x00185000

Definition at line 6139 of file bnx2.h.

#define BNX2_CP_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)

Definition at line 6147 of file bnx2.h.

#define BNX2_CP_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)

Definition at line 6148 of file bnx2.h.

#define BNX2_CP_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)

Definition at line 6149 of file bnx2.h.

#define BNX2_CP_CPU_MODE_INTERRUPT_ENA   (1L<<7)

Definition at line 6145 of file bnx2.h.

#define BNX2_CP_CPU_MODE_LOCAL_RST   (1L<<0)

Definition at line 6140 of file bnx2.h.

#define BNX2_CP_CPU_MODE_MSG_BIT1   (1L<<6)

Definition at line 6144 of file bnx2.h.

#define BNX2_CP_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)

Definition at line 6142 of file bnx2.h.

#define BNX2_CP_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)

Definition at line 6143 of file bnx2.h.

#define BNX2_CP_CPU_MODE_SOFT_HALT   (1L<<10)

Definition at line 6146 of file bnx2.h.

#define BNX2_CP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)

Definition at line 6150 of file bnx2.h.

#define BNX2_CP_CPU_MODE_STEP_ENA   (1L<<1)

Definition at line 6141 of file bnx2.h.

#define BNX2_CP_CPU_PROGRAM_COUNTER   0x0018501c

Definition at line 6181 of file bnx2.h.

#define BNX2_CP_CPU_REG_FILE   0x00185200

Definition at line 6205 of file bnx2.h.

#define BNX2_CP_CPU_STATE   0x00185004

Definition at line 6152 of file bnx2.h.

#define BNX2_CP_CPU_STATE_ALIGN_HALTED   (1L<<7)

Definition at line 6159 of file bnx2.h.

#define BNX2_CP_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)

Definition at line 6157 of file bnx2.h.

#define BNX2_CP_CPU_STATE_BAD_INST_HALTED   (1L<<2)

Definition at line 6154 of file bnx2.h.

#define BNX2_CP_CPU_STATE_BAD_PC_HALTED   (1L<<6)

Definition at line 6158 of file bnx2.h.

#define BNX2_CP_CPU_STATE_BLOCKED_READ   (1L<<31)

Definition at line 6166 of file bnx2.h.

#define BNX2_CP_CPU_STATE_BREAKPOINT   (1L<<0)

Definition at line 6153 of file bnx2.h.

#define BNX2_CP_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)

Definition at line 6164 of file bnx2.h.

#define BNX2_CP_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)

Definition at line 6160 of file bnx2.h.

#define BNX2_CP_CPU_STATE_INST_FETCH_STALL   (1L<<15)

Definition at line 6165 of file bnx2.h.

#define BNX2_CP_CPU_STATE_INTERRUPT   (1L<<12)

Definition at line 6163 of file bnx2.h.

#define BNX2_CP_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)

Definition at line 6155 of file bnx2.h.

#define BNX2_CP_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)

Definition at line 6156 of file bnx2.h.

#define BNX2_CP_CPU_STATE_SOFT_HALTED   (1L<<10)

Definition at line 6161 of file bnx2.h.

#define BNX2_CP_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)

Definition at line 6162 of file bnx2.h.

#define BNX2_CP_SCRATCH   0x001a0000

Definition at line 6249 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS   0x00001040

Definition at line 2484 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS_ACCESSMEMORYINITSM   (0x3L<<14)

Definition at line 2488 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS_ACCESSMEMORYSM   (0x3L<<10)

Definition at line 2486 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS_CACHEMASTERENCODED_XI   (0x1fL<<5)

Definition at line 2491 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS_CAMMASTERENCODED_XI   (0x1fL<<0)

Definition at line 2490 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS_MASTERENCODED   (0xfL<<0)

Definition at line 2485 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS_PAGETABLEINITSM   (0x3L<<12)

Definition at line 2487 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS_QUALIFIED_REQUEST   (0x7ffL<<17)

Definition at line 2489 of file bnx2.h.

#define BNX2_CTX_ACCESS_STATUS_REQUEST_XI   (0x3fffffL<<10)

Definition at line 2492 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_SM_STATUS   0x0000104c

Definition at line 2516 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_SM_STATUS_CS_DWC   (0x7L<<0)

Definition at line 2517 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_SM_STATUS_CS_RFIFOC   (0x7L<<9)

Definition at line 2520 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_SM_STATUS_CS_RTAGC   (0x7L<<6)

Definition at line 2519 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_SM_STATUS_CS_WFIFOC   (0x7L<<3)

Definition at line 2518 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_SM_STATUS_INVALID_BLK_ADDR   (0x7fffL<<16)

Definition at line 2521 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS   0x00001048

Definition at line 2498 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_CACHE_ENTRY_NEEDED   (0x3fL<<13)

Definition at line 2503 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_FLUSH_START   (1L<<6)

Definition at line 2501 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_FREE_ENTRY_CNT   (0x3fL<<7)

Definition at line 2502 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_INVALID_READ_COMP   (1L<<1)

Definition at line 2500 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN0_ACTIVE   (1L<<19)

Definition at line 2504 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN10_ACTIVE   (1L<<29)

Definition at line 2514 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN1_ACTIVE   (1L<<20)

Definition at line 2505 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN2_ACTIVE   (1L<<21)

Definition at line 2506 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN3_ACTIVE   (1L<<22)

Definition at line 2507 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN4_ACTIVE   (1L<<23)

Definition at line 2508 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN5_ACTIVE   (1L<<24)

Definition at line 2509 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN6_ACTIVE   (1L<<25)

Definition at line 2510 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN7_ACTIVE   (1L<<26)

Definition at line 2511 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN8_ACTIVE   (1L<<27)

Definition at line 2512 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RD_CHAN9_ACTIVE   (1L<<28)

Definition at line 2513 of file bnx2.h.

#define BNX2_CTX_CACHE_CTRL_STATUS_RFIFO_OVERFLOW   (1L<<0)

Definition at line 2499 of file bnx2.h.

#define BNX2_CTX_CACHE_DATA   0x000010c4

Definition at line 2568 of file bnx2.h.

#define BNX2_CTX_CACHE_STATUS   0x00001050

Definition at line 2523 of file bnx2.h.

#define BNX2_CTX_CACHE_STATUS_HELD_ENTRIES   (0x3ffL<<0)

Definition at line 2524 of file bnx2.h.

#define BNX2_CTX_CACHE_STATUS_MAX_HELD_ENTRIES   (0x3ffL<<16)

Definition at line 2525 of file bnx2.h.

#define BNX2_CTX_CAM_CTRL   0x000010d4

Definition at line 2579 of file bnx2.h.

#define BNX2_CTX_CAM_CTRL_CAM_ADDR   (0x3ffL<<0)

Definition at line 2580 of file bnx2.h.

#define BNX2_CTX_CAM_CTRL_INVALIDATE   (1L<<28)

Definition at line 2582 of file bnx2.h.

#define BNX2_CTX_CAM_CTRL_READ_REQ   (1L<<31)

Definition at line 2585 of file bnx2.h.

#define BNX2_CTX_CAM_CTRL_RESET   (1L<<27)

Definition at line 2581 of file bnx2.h.

#define BNX2_CTX_CAM_CTRL_SEARCH   (1L<<29)

Definition at line 2583 of file bnx2.h.

#define BNX2_CTX_CAM_CTRL_WRITE_REQ   (1L<<30)

Definition at line 2584 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_0   0x00001080

Definition at line 2551 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_0_CID   (0x3fffL<<0)

Definition at line 2552 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_0_MODE   (1L<<16)

Definition at line 2554 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_0_MODE_XI   (1L<<14)

Definition at line 2555 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_0_TYPE   (0x3L<<14)

Definition at line 2553 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_0_TYPE_XI   (0x7L<<15)

Definition at line 2556 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_1   0x00001084

Definition at line 2558 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_2   0x00001088

Definition at line 2559 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_3   0x0000108c

Definition at line 2560 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_4   0x00001090

Definition at line 2561 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_5   0x00001094

Definition at line 2562 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_6   0x00001098

Definition at line 2563 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_7   0x0000109c

Definition at line 2564 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_8   0x000010a0

Definition at line 2565 of file bnx2.h.

#define BNX2_CTX_CHNL_LOCK_STATUS_9   0x000010a4

Definition at line 2566 of file bnx2.h.

#define BNX2_CTX_CKSUM_ERROR_STATUS   0x0000105c

Definition at line 2547 of file bnx2.h.

#define BNX2_CTX_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)

Definition at line 2548 of file bnx2.h.

#define BNX2_CTX_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)

Definition at line 2549 of file bnx2.h.

#define BNX2_CTX_COMMAND   0x00001000

Definition at line 2407 of file bnx2.h.

#define BNX2_CTX_COMMAND_DISABLE_COMBINE_READ   (1L<<3)

Definition at line 2411 of file bnx2.h.

#define BNX2_CTX_COMMAND_DISABLE_PLRU   (1L<<2)

Definition at line 2410 of file bnx2.h.

#define BNX2_CTX_COMMAND_DISABLE_USAGE_CNT   (1L<<1)

Definition at line 2409 of file bnx2.h.

#define BNX2_CTX_COMMAND_ENABLED   (1L<<0)

Definition at line 2408 of file bnx2.h.

#define BNX2_CTX_COMMAND_FLUSH_AHEAD   (0x1fL<<8)

Definition at line 2412 of file bnx2.h.

#define BNX2_CTX_COMMAND_MEM_INIT   (1L<<13)

Definition at line 2413 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE   (0xfL<<16)

Definition at line 2414 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_128K   (9L<<16)

Definition at line 2424 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_16K   (6L<<16)

Definition at line 2421 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_1K   (2L<<16)

Definition at line 2417 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_1M   (12L<<16)

Definition at line 2427 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_256   (0L<<16)

Definition at line 2415 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_256K   (10L<<16)

Definition at line 2425 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_2K   (3L<<16)

Definition at line 2418 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_32K   (7L<<16)

Definition at line 2422 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_4K   (4L<<16)

Definition at line 2419 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_512   (1L<<16)

Definition at line 2416 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_512K   (11L<<16)

Definition at line 2426 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_64K   (8L<<16)

Definition at line 2423 of file bnx2.h.

#define BNX2_CTX_COMMAND_PAGE_SIZE_8K   (5L<<16)

Definition at line 2420 of file bnx2.h.

#define BNX2_CTX_CTX_CTRL   0x0000101c

Definition at line 2474 of file bnx2.h.

#define BNX2_CTX_CTX_CTRL_ATTR   (1L<<26)

Definition at line 2479 of file bnx2.h.

#define BNX2_CTX_CTX_CTRL_CTX_ADDR   (0x7ffffL<<2)

Definition at line 2475 of file bnx2.h.

#define BNX2_CTX_CTX_CTRL_MOD_USAGE_CNT   (0x3L<<21)

Definition at line 2476 of file bnx2.h.

#define BNX2_CTX_CTX_CTRL_NO_RAM_ACC   (1L<<23)

Definition at line 2477 of file bnx2.h.

#define BNX2_CTX_CTX_CTRL_PREFETCH_SIZE   (0x3L<<24)

Definition at line 2478 of file bnx2.h.

#define BNX2_CTX_CTX_CTRL_READ_REQ   (1L<<31)

Definition at line 2481 of file bnx2.h.

#define BNX2_CTX_CTX_CTRL_WRITE_REQ   (1L<<30)

Definition at line 2480 of file bnx2.h.

#define BNX2_CTX_CTX_DATA   0x00001020

Definition at line 2483 of file bnx2.h.

#define BNX2_CTX_DATA   0x00001014

Definition at line 2452 of file bnx2.h.

#define BNX2_CTX_DATA_ADR   0x00001010

Definition at line 2449 of file bnx2.h.

#define BNX2_CTX_DATA_ADR_DATA_ADR   (0x7ffffL<<2)

Definition at line 2450 of file bnx2.h.

#define BNX2_CTX_DBG_LOCK_STATUS   0x00001044

Definition at line 2494 of file bnx2.h.

#define BNX2_CTX_DBG_LOCK_STATUS_MATCH   (0x3ffL<<22)

Definition at line 2496 of file bnx2.h.

#define BNX2_CTX_DBG_LOCK_STATUS_SM   (0x3ffL<<0)

Definition at line 2495 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS   0x00001054

Definition at line 2527 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN0_STATUS   (0x3L<<0)

Definition at line 2528 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN10_STATUS   (0x3L<<20)

Definition at line 2538 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN1_STATUS   (0x3L<<2)

Definition at line 2529 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN2_STATUS   (0x3L<<4)

Definition at line 2530 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN3_STATUS   (0x3L<<6)

Definition at line 2531 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN4_STATUS   (0x3L<<8)

Definition at line 2532 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN5_STATUS   (0x3L<<10)

Definition at line 2533 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN6_STATUS   (0x3L<<12)

Definition at line 2534 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN7_STATUS   (0x3L<<14)

Definition at line 2535 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN8_STATUS   (0x3L<<16)

Definition at line 2536 of file bnx2.h.

#define BNX2_CTX_DMA_STATUS_RD_CHAN9_STATUS   (0x3L<<18)

Definition at line 2537 of file bnx2.h.

#define BNX2_CTX_HOST_PAGE_TBL_CTRL   0x000010c8

Definition at line 2569 of file bnx2.h.

#define BNX2_CTX_HOST_PAGE_TBL_CTRL_PAGE_TBL_ADDR   (0x1ffL<<0)

Definition at line 2570 of file bnx2.h.

#define BNX2_CTX_HOST_PAGE_TBL_CTRL_READ_REQ   (1L<<31)

Definition at line 2572 of file bnx2.h.

#define BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ   (1L<<30)

Definition at line 2571 of file bnx2.h.

#define BNX2_CTX_HOST_PAGE_TBL_DATA0   0x000010cc

Definition at line 2574 of file bnx2.h.

#define BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID   (1L<<0)

Definition at line 2575 of file bnx2.h.

#define BNX2_CTX_HOST_PAGE_TBL_DATA0_VALUE   (0xffffffL<<8)

Definition at line 2576 of file bnx2.h.

#define BNX2_CTX_HOST_PAGE_TBL_DATA1   0x000010d0

Definition at line 2578 of file bnx2.h.

#define BNX2_CTX_LOCK   0x00001018

Definition at line 2453 of file bnx2.h.

#define BNX2_CTX_LOCK_CID_VALUE   (0x3fffL<<7)

Definition at line 2465 of file bnx2.h.

#define BNX2_CTX_LOCK_GRANTED   (1L<<26)

Definition at line 2466 of file bnx2.h.

#define BNX2_CTX_LOCK_MODE   (0x7L<<27)

Definition at line 2467 of file bnx2.h.

#define BNX2_CTX_LOCK_MODE_IMMEDIATE   (0x1L<<27)

Definition at line 2469 of file bnx2.h.

#define BNX2_CTX_LOCK_MODE_SURE   (0x2L<<27)

Definition at line 2470 of file bnx2.h.

#define BNX2_CTX_LOCK_MODE_UNLOCK   (0x0L<<27)

Definition at line 2468 of file bnx2.h.

#define BNX2_CTX_LOCK_REQ   (1L<<31)

Definition at line 2472 of file bnx2.h.

#define BNX2_CTX_LOCK_STATUS   (1L<<30)

Definition at line 2471 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE   (0x7L<<0)

Definition at line 2454 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_COMPLETE_XI   (7L<<0)

Definition at line 2464 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_COMPLETE   (0x7L<<0)

Definition at line 2459 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PROTOCOL   (0x1L<<0)

Definition at line 2456 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TIMER   (0x4L<<0)

Definition at line 2458 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX   (0x2L<<0)

Definition at line 2457 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VOID   (0x0L<<0)

Definition at line 2455 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_PROTOCOL_XI   (1L<<0)

Definition at line 2461 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_TIMER_XI   (4L<<0)

Definition at line 2463 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_TX_XI   (2L<<0)

Definition at line 2462 of file bnx2.h.

#define BNX2_CTX_LOCK_TYPE_VOID_XI   (0L<<0)

Definition at line 2460 of file bnx2.h.

#define BNX2_CTX_PAGE_TBL   0x0000100c

Definition at line 2446 of file bnx2.h.

#define BNX2_CTX_PAGE_TBL_PAGE_TBL   (0x3fffL<<6)

Definition at line 2447 of file bnx2.h.

#define BNX2_CTX_REP_STATUS   0x00001058

Definition at line 2540 of file bnx2.h.

#define BNX2_CTX_REP_STATUS_ERROR_CLIENT_ID   (0x1fL<<10)

Definition at line 2542 of file bnx2.h.

#define BNX2_CTX_REP_STATUS_ERROR_ENTRY   (0x3ffL<<0)

Definition at line 2541 of file bnx2.h.

#define BNX2_CTX_REP_STATUS_USAGE_CNT_MAX_ERR   (1L<<16)

Definition at line 2543 of file bnx2.h.

#define BNX2_CTX_REP_STATUS_USAGE_CNT_MIN_ERR   (1L<<17)

Definition at line 2544 of file bnx2.h.

#define BNX2_CTX_REP_STATUS_USAGE_CNT_MISS_ERR   (1L<<18)

Definition at line 2545 of file bnx2.h.

#define BNX2_CTX_STATUS   0x00001004

Definition at line 2429 of file bnx2.h.

#define BNX2_CTX_STATUS_ACC_STALL_STAT   (1L<<18)

Definition at line 2433 of file bnx2.h.

#define BNX2_CTX_STATUS_DEAD_LOCK   (1L<<24)

Definition at line 2439 of file bnx2.h.

#define BNX2_CTX_STATUS_EXT_READ_STAT   (1L<<20)

Definition at line 2435 of file bnx2.h.

#define BNX2_CTX_STATUS_EXT_WRITE_STAT   (1L<<21)

Definition at line 2436 of file bnx2.h.

#define BNX2_CTX_STATUS_HIT_STAT   (1L<<23)

Definition at line 2438 of file bnx2.h.

#define BNX2_CTX_STATUS_INVALID_PAGE   (1L<<26)

Definition at line 2441 of file bnx2.h.

#define BNX2_CTX_STATUS_LOCK_STALL_STAT   (1L<<19)

Definition at line 2434 of file bnx2.h.

#define BNX2_CTX_STATUS_LOCK_WAIT   (1L<<0)

Definition at line 2430 of file bnx2.h.

#define BNX2_CTX_STATUS_MISS_STAT   (1L<<22)

Definition at line 2437 of file bnx2.h.

#define BNX2_CTX_STATUS_READ_STAT   (1L<<16)

Definition at line 2431 of file bnx2.h.

#define BNX2_CTX_STATUS_USAGE_CNT_ERR   (1L<<25)

Definition at line 2440 of file bnx2.h.

#define BNX2_CTX_STATUS_WRITE_STAT   (1L<<17)

Definition at line 2432 of file bnx2.h.

#define BNX2_CTX_VIRT_ADDR   0x00001008

Definition at line 2443 of file bnx2.h.

#define BNX2_CTX_VIRT_ADDR_VIRT_ADDR   (0x7fffL<<6)

Definition at line 2444 of file bnx2.h.

#define BNX2_DEV_INFO_BC_REV   0x0000004c

Definition at line 7206 of file bnx2.h.

#define BNX2_DEV_INFO_DRV_ALWAYS_ALIVE   0x40

Definition at line 7178 of file bnx2.h.

#define BNX2_DEV_INFO_FEATURE_CFG_VALID   0x01

Definition at line 7176 of file bnx2.h.

#define BNX2_DEV_INFO_FORMAT_REV   0x000000c4

Definition at line 7228 of file bnx2.h.

#define BNX2_DEV_INFO_FORMAT_REV_ID   ('A' << 24)

Definition at line 7230 of file bnx2.h.

#define BNX2_DEV_INFO_FORMAT_REV_MASK   0xff000000

Definition at line 7229 of file bnx2.h.

#define BNX2_DEV_INFO_PER_PORT_HW_CONFIG2   0x000000b4

Definition at line 7226 of file bnx2.h.

#define BNX2_DEV_INFO_SECONDARY_PORT   0x80

Definition at line 7177 of file bnx2.h.

#define BNX2_DEV_INFO_SIGNATURE   0x00000020

Definition at line 7173 of file bnx2.h.

#define BNX2_DEV_INFO_SIGNATURE_MAGIC   0x44564900

Definition at line 7174 of file bnx2.h.

#define BNX2_DEV_INFO_SIGNATURE_MAGIC_MASK   0xffffff00

Definition at line 7175 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_00   0x00000d00

Definition at line 2362 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_00_CUR_BINMSTR   (0xffL<<24)

Definition at line 2365 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_00_MASTER   (0xffffL<<0)

Definition at line 2363 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_00_MASTER_ENC   (0xffL<<16)

Definition at line 2364 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01   0x00000d04

Definition at line 2367 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01_HPB_RPTR   (0xfL<<24)

Definition at line 2374 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01_HPB_WPTR   (0xfL<<28)

Definition at line 2375 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01_HPR_RPTR   (0xfL<<16)

Definition at line 2372 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01_HPR_WPTR   (0xfL<<20)

Definition at line 2373 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01_LPB_RPTR   (0xfL<<8)

Definition at line 2370 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01_LPB_WPTR   (0xfL<<12)

Definition at line 2371 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01_LPR_RPTR   (0xfL<<0)

Definition at line 2368 of file bnx2.h.

#define BNX2_DMA_ARB_STAT_01_LPR_WPTR   (0xfL<<4)

Definition at line 2369 of file bnx2.h.

#define BNX2_DMA_ARB_TIMERS   0x00000c24

Definition at line 2108 of file bnx2.h.

#define BNX2_DMA_ARB_TIMERS_RD_DRR_WAIT_TIME   (0xffL<<0)

Definition at line 2109 of file bnx2.h.

#define BNX2_DMA_ARB_TIMERS_TM_MAX_TIMEOUT   (0xfffL<<20)

Definition at line 2111 of file bnx2.h.

#define BNX2_DMA_ARB_TIMERS_TM_MIN_TIMEOUT   (0xffL<<12)

Definition at line 2110 of file bnx2.h.

#define BNX2_DMA_ARBITER   0x00000c20

Definition at line 2094 of file bnx2.h.

#define BNX2_DMA_ARBITER_ALT_MODE_EN   (1L<<8)

Definition at line 2103 of file bnx2.h.

#define BNX2_DMA_ARBITER_NUM_READS   (0x7L<<0)

Definition at line 2095 of file bnx2.h.

#define BNX2_DMA_ARBITER_OUSTD_READ_REQ   (0xfL<<12)

Definition at line 2106 of file bnx2.h.

#define BNX2_DMA_ARBITER_RD_ARB_MODE   (0x3L<<5)

Definition at line 2099 of file bnx2.h.

#define BNX2_DMA_ARBITER_RD_ARB_MODE_RND_RBN   (1L<<5)

Definition at line 2101 of file bnx2.h.

#define BNX2_DMA_ARBITER_RD_ARB_MODE_STRICT   (0L<<5)

Definition at line 2100 of file bnx2.h.

#define BNX2_DMA_ARBITER_RD_ARB_MODE_WGT_RND_RBN   (2L<<5)

Definition at line 2102 of file bnx2.h.

#define BNX2_DMA_ARBITER_RR_MODE   (1L<<9)

Definition at line 2104 of file bnx2.h.

#define BNX2_DMA_ARBITER_TIMER_MODE   (1L<<10)

Definition at line 2105 of file bnx2.h.

#define BNX2_DMA_ARBITER_WR_ARB_MODE   (1L<<4)

Definition at line 2096 of file bnx2.h.

#define BNX2_DMA_ARBITER_WR_ARB_MODE_RND_RBN   (1L<<4)

Definition at line 2098 of file bnx2.h.

#define BNX2_DMA_ARBITER_WR_ARB_MODE_STRICT   (0L<<4)

Definition at line 2097 of file bnx2.h.

#define BNX2_DMA_BLACKOUT   0x00000c0c

Definition at line 2021 of file bnx2.h.

#define BNX2_DMA_BLACKOUT_2ND_RD_RETRY_BLACKOUT   (0xffL<<8)

Definition at line 2023 of file bnx2.h.

#define BNX2_DMA_BLACKOUT_RD_RETRY_BLACKOUT   (0xffL<<0)

Definition at line 2022 of file bnx2.h.

#define BNX2_DMA_BLACKOUT_WR_RETRY_BLACKOUT   (0xffL<<16)

Definition at line 2024 of file bnx2.h.

#define BNX2_DMA_COMMAND   0x00000c00

Definition at line 1966 of file bnx2.h.

#define BNX2_DMA_COMMAND_ENABLE   (1L<<0)

Definition at line 1967 of file bnx2.h.

#define BNX2_DMA_CONFIG   0x00000c08

Definition at line 1984 of file bnx2.h.

#define BNX2_DMA_CONFIG_BIG_SIZE   (0xfL<<24)

Definition at line 1998 of file bnx2.h.

#define BNX2_DMA_CONFIG_BIG_SIZE_128   (0x2L<<24)

Definition at line 2001 of file bnx2.h.

#define BNX2_DMA_CONFIG_BIG_SIZE_256   (0x4L<<24)

Definition at line 2002 of file bnx2.h.

#define BNX2_DMA_CONFIG_BIG_SIZE_512   (0x8L<<24)

Definition at line 2003 of file bnx2.h.

#define BNX2_DMA_CONFIG_BIG_SIZE_64   (0x1L<<24)

Definition at line 2000 of file bnx2.h.

#define BNX2_DMA_CONFIG_BIG_SIZE_NONE   (0x0L<<24)

Definition at line 1999 of file bnx2.h.

#define BNX2_DMA_CONFIG_CNTL_BYTE_SWAP   (1L<<4)

Definition at line 1987 of file bnx2.h.

#define BNX2_DMA_CONFIG_CNTL_FPGA_MODE   (1L<<8)

Definition at line 1991 of file bnx2.h.

#define BNX2_DMA_CONFIG_CNTL_PCI_COMP_DLY   (1L<<11)

Definition at line 1993 of file bnx2.h.

#define BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA   (1L<<10)

Definition at line 1992 of file bnx2.h.

#define BNX2_DMA_CONFIG_CNTL_TWO_DMA   (1L<<7)

Definition at line 1990 of file bnx2.h.

#define BNX2_DMA_CONFIG_CNTL_WORD_SWAP   (1L<<5)

Definition at line 1988 of file bnx2.h.

#define BNX2_DMA_CONFIG_CTL_WBSWAP_MODE_XI   (0x3L<<4)

Definition at line 2005 of file bnx2.h.

#define BNX2_DMA_CONFIG_DAT_WBSWAP_MODE_XI   (0x3L<<0)

Definition at line 2004 of file bnx2.h.

#define BNX2_DMA_CONFIG_DATA_BYTE_SWAP   (1L<<0)

Definition at line 1985 of file bnx2.h.

#define BNX2_DMA_CONFIG_DATA_WORD_SWAP   (1L<<1)

Definition at line 1986 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_PL_128B_XI   (0L<<12)

Definition at line 2007 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_PL_256B_XI   (1L<<12)

Definition at line 2008 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_PL_512B_XI   (2L<<12)

Definition at line 2009 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_PL_EN_XI   (1L<<15)

Definition at line 2010 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_PL_XI   (0x7L<<12)

Definition at line 2006 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_RRS_1024B_XI   (3L<<16)

Definition at line 2015 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_RRS_128B_XI   (0L<<16)

Definition at line 2012 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_RRS_2048B_XI   (4L<<16)

Definition at line 2016 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_RRS_256B_XI   (1L<<16)

Definition at line 2013 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_RRS_4096B_XI   (5L<<16)

Definition at line 2017 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_RRS_512B_XI   (2L<<16)

Definition at line 2014 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_RRS_EN_XI   (1L<<19)

Definition at line 2018 of file bnx2.h.

#define BNX2_DMA_CONFIG_MAX_RRS_XI   (0x7L<<16)

Definition at line 2011 of file bnx2.h.

#define BNX2_DMA_CONFIG_NO_64SWAP_EN_XI   (1L<<31)

Definition at line 2019 of file bnx2.h.

#define BNX2_DMA_CONFIG_NO_RCHANS_IN_USE   (0xfL<<12)

Definition at line 1994 of file bnx2.h.

#define BNX2_DMA_CONFIG_NO_WCHANS_IN_USE   (0xfL<<16)

Definition at line 1995 of file bnx2.h.

#define BNX2_DMA_CONFIG_ONE_DMA   (1L<<6)

Definition at line 1989 of file bnx2.h.

#define BNX2_DMA_CONFIG_PCI_CLK_CMP_BITS   (0x7L<<20)

Definition at line 1996 of file bnx2.h.

#define BNX2_DMA_CONFIG_PCI_FAST_CLK_CMP   (1L<<23)

Definition at line 1997 of file bnx2.h.

#define BNX2_DMA_DEBUG_VECT_PEEK   0x00000c2c

Definition at line 2113 of file bnx2.h.

#define BNX2_DMA_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 2115 of file bnx2.h.

#define BNX2_DMA_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 2116 of file bnx2.h.

#define BNX2_DMA_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 2114 of file bnx2.h.

#define BNX2_DMA_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 2118 of file bnx2.h.

#define BNX2_DMA_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 2119 of file bnx2.h.

#define BNX2_DMA_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 2117 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL0_CMD   0x00000f00

Definition at line 2377 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL0_CMD_LOAD   (1L<<3)

Definition at line 2381 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_DONE   (1L<<0)

Definition at line 2378 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL0_CMD_SEL   (0xfL<<8)

Definition at line 2382 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL0_CMD_SHIFT   (1L<<2)

Definition at line 2380 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_DONE   (1L<<1)

Definition at line 2379 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL0_DATA   0x00000f04

Definition at line 2384 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL1_CMD   0x00000f08

Definition at line 2385 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL1_CMD_LOAD   (1L<<3)

Definition at line 2389 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_DONE   (1L<<0)

Definition at line 2386 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL1_CMD_SEL   (0xfL<<8)

Definition at line 2390 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL1_CMD_SHIFT   (1L<<2)

Definition at line 2388 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_DONE   (1L<<1)

Definition at line 2387 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL1_DATA   0x00000f0c

Definition at line 2392 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL2_CMD   0x00000f10

Definition at line 2393 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL2_CMD_LOAD   (1L<<3)

Definition at line 2397 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_DONE   (1L<<0)

Definition at line 2394 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL2_CMD_SEL   (0xfL<<8)

Definition at line 2398 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL2_CMD_SHIFT   (1L<<2)

Definition at line 2396 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_DONE   (1L<<1)

Definition at line 2395 of file bnx2.h.

#define BNX2_DMA_FUSE_CTRL2_DATA   0x00000f14

Definition at line 2400 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_22   0x00000c60

Definition at line 2313 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_30   0x00000c64

Definition at line 2314 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_31   0x00000c68

Definition at line 2315 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_32   0x00000c6c

Definition at line 2316 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_40   0x00000c70

Definition at line 2317 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_41   0x00000c74

Definition at line 2318 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_42   0x00000c78

Definition at line 2319 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_50   0x00000c7c

Definition at line 2320 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_51   0x00000c80

Definition at line 2321 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_52   0x00000c84

Definition at line 2322 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_60   0x00000c88

Definition at line 2323 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_61   0x00000c8c

Definition at line 2324 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_62   0x00000c90

Definition at line 2325 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_70   0x00000c94

Definition at line 2326 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_71   0x00000c98

Definition at line 2327 of file bnx2.h.

#define BNX2_DMA_RCHAN_STAT_72   0x00000c9c

Definition at line 2328 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0   0x00000c10

Definition at line 2026 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_NO_SNOOP   (1L<<24)

Definition at line 2042 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_PARAM_EN   (1L<<31)

Definition at line 2046 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_PRIORITY   (1L<<26)

Definition at line 2044 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_RELAX_ORDER   (1L<<25)

Definition at line 2043 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_CTX_TRAFFIC_CLASS   (0x7L<<28)

Definition at line 2045 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_NO_SNOOP   (1L<<8)

Definition at line 2032 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_PARAM_EN   (1L<<15)

Definition at line 2036 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_PRIORITY   (1L<<10)

Definition at line 2034 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_RELAX_ORDER   (1L<<9)

Definition at line 2033 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_RBDC_TRAFFIC_CLASS   (0x7L<<12)

Definition at line 2035 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_NO_SNOOP   (1L<<0)

Definition at line 2027 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_PARAM_EN   (1L<<7)

Definition at line 2031 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_PRIORITY   (1L<<2)

Definition at line 2029 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_RELAX_ORDER   (1L<<1)

Definition at line 2028 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TBDC_TRAFFIC_CLASS   (0x7L<<4)

Definition at line 2030 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_NO_SNOOP   (1L<<16)

Definition at line 2037 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_PARAM_EN   (1L<<23)

Definition at line 2041 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_PRIORITY   (1L<<18)

Definition at line 2039 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_RELAX_ORDER   (1L<<17)

Definition at line 2038 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_0_TDMA_TRAFFIC_CLASS   (0x7L<<20)

Definition at line 2040 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1   0x00000c14

Definition at line 2048 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_COM_NO_SNOOP   (1L<<0)

Definition at line 2049 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_COM_PARAM_EN   (1L<<7)

Definition at line 2053 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_COM_PRIORITY   (1L<<2)

Definition at line 2051 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_COM_RELAX_ORDER   (1L<<1)

Definition at line 2050 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_COM_TRAFFIC_CLASS   (0x7L<<4)

Definition at line 2052 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_CP_NO_SNOOP   (1L<<8)

Definition at line 2054 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_CP_PARAM_EN   (1L<<15)

Definition at line 2058 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_CP_PRIORITY   (1L<<10)

Definition at line 2056 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_CP_RELAX_ORDER   (1L<<9)

Definition at line 2055 of file bnx2.h.

#define BNX2_DMA_READ_MASTER_SETTING_1_CP_TRAFFIC_CLASS   (0x7L<<12)

Definition at line 2057 of file bnx2.h.

#define BNX2_DMA_STATUS   0x00000c04

Definition at line 1969 of file bnx2.h.

#define BNX2_DMA_STATUS_BIG_READ_DELAY_PCI_CLKS_STAT   (1L<<19)

Definition at line 1974 of file bnx2.h.

#define BNX2_DMA_STATUS_BIG_READ_RETRY_AFTER_DATA_STAT   (1L<<20)

Definition at line 1975 of file bnx2.h.

#define BNX2_DMA_STATUS_BIG_READ_TRANSFERS_STAT   (1L<<18)

Definition at line 1973 of file bnx2.h.

#define BNX2_DMA_STATUS_BIG_WRITE_DELAY_PCI_CLKS_STAT   (1L<<24)

Definition at line 1979 of file bnx2.h.

#define BNX2_DMA_STATUS_BIG_WRITE_RETRY_AFTER_DATA_STAT   (1L<<25)

Definition at line 1980 of file bnx2.h.

#define BNX2_DMA_STATUS_BIG_WRITE_TRANSFERS_STAT   (1L<<23)

Definition at line 1978 of file bnx2.h.

#define BNX2_DMA_STATUS_BME_XI   (1L<<4)

Definition at line 1982 of file bnx2.h.

#define BNX2_DMA_STATUS_GLOBAL_ERR_XI   (1L<<0)

Definition at line 1981 of file bnx2.h.

#define BNX2_DMA_STATUS_PAR_ERROR_STATE   (1L<<0)

Definition at line 1970 of file bnx2.h.

#define BNX2_DMA_STATUS_READ_DELAY_PCI_CLKS_STAT   (1L<<17)

Definition at line 1972 of file bnx2.h.

#define BNX2_DMA_STATUS_READ_TRANSFERS_STAT   (1L<<16)

Definition at line 1971 of file bnx2.h.

#define BNX2_DMA_STATUS_WRITE_DELAY_PCI_CLKS_STAT   (1L<<22)

Definition at line 1977 of file bnx2.h.

#define BNX2_DMA_STATUS_WRITE_TRANSFERS_STAT   (1L<<21)

Definition at line 1976 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00   0x00000c30

Definition at line 2121 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_CHANNEL   (0xfL<<0)

Definition at line 2122 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_FUNCTION   (1L<<9)

Definition at line 2134 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_MASTER   (0x7L<<4)

Definition at line 2123 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_MASTER_COM   (3L<<4)

Definition at line 2127 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_MASTER_CP   (4L<<4)

Definition at line 2128 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_MASTER_CTX   (0L<<4)

Definition at line 2124 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_MASTER_RBDC   (1L<<4)

Definition at line 2125 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_MASTER_TBDC   (2L<<4)

Definition at line 2126 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_MASTER_TDMA   (5L<<4)

Definition at line 2129 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_SWAP   (0x3L<<7)

Definition at line 2130 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_SWAP_CONFIG   (0L<<7)

Definition at line 2131 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_SWAP_CONTROL   (2L<<7)

Definition at line 2133 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_SWAP_DATA   (1L<<7)

Definition at line 2132 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_00_VALID   (1L<<10)

Definition at line 2135 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01   0x00000c34

Definition at line 2137 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_CHANNEL   (0xfL<<0)

Definition at line 2138 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_FUNCTION   (1L<<9)

Definition at line 2150 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_MASTER   (0x7L<<4)

Definition at line 2139 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_MASTER_COM   (3L<<4)

Definition at line 2143 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_MASTER_CP   (4L<<4)

Definition at line 2144 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_MASTER_CTX   (0L<<4)

Definition at line 2140 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_MASTER_RBDC   (1L<<4)

Definition at line 2141 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_MASTER_TBDC   (2L<<4)

Definition at line 2142 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_MASTER_TDMA   (5L<<4)

Definition at line 2145 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_SWAP   (0x3L<<7)

Definition at line 2146 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_SWAP_CONFIG   (0L<<7)

Definition at line 2147 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_SWAP_CONTROL   (2L<<7)

Definition at line 2149 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_SWAP_DATA   (1L<<7)

Definition at line 2148 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_01_VALID   (1L<<10)

Definition at line 2151 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02   0x00000c38

Definition at line 2153 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_CHANNEL   (0xfL<<0)

Definition at line 2154 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_FUNCTION   (1L<<9)

Definition at line 2166 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_MASTER   (0x7L<<4)

Definition at line 2155 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_MASTER_COM   (3L<<4)

Definition at line 2159 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_MASTER_CP   (4L<<4)

Definition at line 2160 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_MASTER_CTX   (0L<<4)

Definition at line 2156 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_MASTER_RBDC   (1L<<4)

Definition at line 2157 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_MASTER_TBDC   (2L<<4)

Definition at line 2158 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_MASTER_TDMA   (5L<<4)

Definition at line 2161 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_SWAP   (0x3L<<7)

Definition at line 2162 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_SWAP_CONFIG   (0L<<7)

Definition at line 2163 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_SWAP_CONTROL   (2L<<7)

Definition at line 2165 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_SWAP_DATA   (1L<<7)

Definition at line 2164 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_02_VALID   (1L<<10)

Definition at line 2167 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03   0x00000c3c

Definition at line 2169 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_CHANNEL   (0xfL<<0)

Definition at line 2170 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_FUNCTION   (1L<<9)

Definition at line 2182 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_MASTER   (0x7L<<4)

Definition at line 2171 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_MASTER_COM   (3L<<4)

Definition at line 2175 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_MASTER_CP   (4L<<4)

Definition at line 2176 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_MASTER_CTX   (0L<<4)

Definition at line 2172 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_MASTER_RBDC   (1L<<4)

Definition at line 2173 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_MASTER_TBDC   (2L<<4)

Definition at line 2174 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_MASTER_TDMA   (5L<<4)

Definition at line 2177 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_SWAP   (0x3L<<7)

Definition at line 2178 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_SWAP_CONFIG   (0L<<7)

Definition at line 2179 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_SWAP_CONTROL   (2L<<7)

Definition at line 2181 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_SWAP_DATA   (1L<<7)

Definition at line 2180 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_03_VALID   (1L<<10)

Definition at line 2183 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04   0x00000c40

Definition at line 2185 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_CHANNEL   (0xfL<<0)

Definition at line 2186 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_FUNCTION   (1L<<9)

Definition at line 2198 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_MASTER   (0x7L<<4)

Definition at line 2187 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_MASTER_COM   (3L<<4)

Definition at line 2191 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_MASTER_CP   (4L<<4)

Definition at line 2192 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_MASTER_CTX   (0L<<4)

Definition at line 2188 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_MASTER_RBDC   (1L<<4)

Definition at line 2189 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_MASTER_TBDC   (2L<<4)

Definition at line 2190 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_MASTER_TDMA   (5L<<4)

Definition at line 2193 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_SWAP   (0x3L<<7)

Definition at line 2194 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_SWAP_CONFIG   (0L<<7)

Definition at line 2195 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_SWAP_CONTROL   (2L<<7)

Definition at line 2197 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_SWAP_DATA   (1L<<7)

Definition at line 2196 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_04_VALID   (1L<<10)

Definition at line 2199 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05   0x00000c44

Definition at line 2201 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_CHANNEL   (0xfL<<0)

Definition at line 2202 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_FUNCTION   (1L<<9)

Definition at line 2214 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_MASTER   (0x7L<<4)

Definition at line 2203 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_MASTER_COM   (3L<<4)

Definition at line 2207 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_MASTER_CP   (4L<<4)

Definition at line 2208 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_MASTER_CTX   (0L<<4)

Definition at line 2204 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_MASTER_RBDC   (1L<<4)

Definition at line 2205 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_MASTER_TBDC   (2L<<4)

Definition at line 2206 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_MASTER_TDMA   (5L<<4)

Definition at line 2209 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_SWAP   (0x3L<<7)

Definition at line 2210 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_SWAP_CONFIG   (0L<<7)

Definition at line 2211 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_SWAP_CONTROL   (2L<<7)

Definition at line 2213 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_SWAP_DATA   (1L<<7)

Definition at line 2212 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_05_VALID   (1L<<10)

Definition at line 2215 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06   0x00000c48

Definition at line 2217 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_CHANNEL   (0xfL<<0)

Definition at line 2218 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_FUNCTION   (1L<<9)

Definition at line 2230 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_MASTER   (0x7L<<4)

Definition at line 2219 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_MASTER_COM   (3L<<4)

Definition at line 2223 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_MASTER_CP   (4L<<4)

Definition at line 2224 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_MASTER_CTX   (0L<<4)

Definition at line 2220 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_MASTER_RBDC   (1L<<4)

Definition at line 2221 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_MASTER_TBDC   (2L<<4)

Definition at line 2222 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_MASTER_TDMA   (5L<<4)

Definition at line 2225 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_SWAP   (0x3L<<7)

Definition at line 2226 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_SWAP_CONFIG   (0L<<7)

Definition at line 2227 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_SWAP_CONTROL   (2L<<7)

Definition at line 2229 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_SWAP_DATA   (1L<<7)

Definition at line 2228 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_06_VALID   (1L<<10)

Definition at line 2231 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07   0x00000c4c

Definition at line 2233 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_CHANNEL   (0xfL<<0)

Definition at line 2234 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_FUNCTION   (1L<<9)

Definition at line 2246 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_MASTER   (0x7L<<4)

Definition at line 2235 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_MASTER_COM   (3L<<4)

Definition at line 2239 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_MASTER_CP   (4L<<4)

Definition at line 2240 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_MASTER_CTX   (0L<<4)

Definition at line 2236 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_MASTER_RBDC   (1L<<4)

Definition at line 2237 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_MASTER_TBDC   (2L<<4)

Definition at line 2238 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_MASTER_TDMA   (5L<<4)

Definition at line 2241 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_SWAP   (0x3L<<7)

Definition at line 2242 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_SWAP_CONFIG   (0L<<7)

Definition at line 2243 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_SWAP_CONTROL   (2L<<7)

Definition at line 2245 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_SWAP_DATA   (1L<<7)

Definition at line 2244 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_07_VALID   (1L<<10)

Definition at line 2247 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08   0x00000c50

Definition at line 2249 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_CHANNEL   (0xfL<<0)

Definition at line 2250 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_FUNCTION   (1L<<9)

Definition at line 2262 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_MASTER   (0x7L<<4)

Definition at line 2251 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_MASTER_COM   (3L<<4)

Definition at line 2255 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_MASTER_CP   (4L<<4)

Definition at line 2256 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_MASTER_CTX   (0L<<4)

Definition at line 2252 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_MASTER_RBDC   (1L<<4)

Definition at line 2253 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_MASTER_TBDC   (2L<<4)

Definition at line 2254 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_MASTER_TDMA   (5L<<4)

Definition at line 2257 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_SWAP   (0x3L<<7)

Definition at line 2258 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_SWAP_CONFIG   (0L<<7)

Definition at line 2259 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_SWAP_CONTROL   (2L<<7)

Definition at line 2261 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_SWAP_DATA   (1L<<7)

Definition at line 2260 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_08_VALID   (1L<<10)

Definition at line 2263 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09   0x00000c54

Definition at line 2265 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_CHANNEL   (0xfL<<0)

Definition at line 2266 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_FUNCTION   (1L<<9)

Definition at line 2278 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_MASTER   (0x7L<<4)

Definition at line 2267 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_MASTER_COM   (3L<<4)

Definition at line 2271 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_MASTER_CP   (4L<<4)

Definition at line 2272 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_MASTER_CTX   (0L<<4)

Definition at line 2268 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_MASTER_RBDC   (1L<<4)

Definition at line 2269 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_MASTER_TBDC   (2L<<4)

Definition at line 2270 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_MASTER_TDMA   (5L<<4)

Definition at line 2273 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_SWAP   (0x3L<<7)

Definition at line 2274 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_SWAP_CONFIG   (0L<<7)

Definition at line 2275 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_SWAP_CONTROL   (2L<<7)

Definition at line 2277 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_SWAP_DATA   (1L<<7)

Definition at line 2276 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_09_VALID   (1L<<10)

Definition at line 2279 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10   0x00000c58

Definition at line 2281 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_CHANNEL   (0xfL<<0)

Definition at line 2282 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_FUNCTION   (1L<<9)

Definition at line 2294 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_MASTER   (0x7L<<4)

Definition at line 2283 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_MASTER_COM   (3L<<4)

Definition at line 2287 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_MASTER_CP   (4L<<4)

Definition at line 2288 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_MASTER_CTX   (0L<<4)

Definition at line 2284 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_MASTER_RBDC   (1L<<4)

Definition at line 2285 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_MASTER_TBDC   (2L<<4)

Definition at line 2286 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_MASTER_TDMA   (5L<<4)

Definition at line 2289 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_SWAP   (0x3L<<7)

Definition at line 2290 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_SWAP_CONFIG   (0L<<7)

Definition at line 2291 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_SWAP_CONTROL   (2L<<7)

Definition at line 2293 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_SWAP_DATA   (1L<<7)

Definition at line 2292 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_10_VALID   (1L<<10)

Definition at line 2295 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11   0x00000c5c

Definition at line 2297 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_CHANNEL   (0xfL<<0)

Definition at line 2298 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_FUNCTION   (1L<<9)

Definition at line 2310 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_MASTER   (0x7L<<4)

Definition at line 2299 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_MASTER_COM   (3L<<4)

Definition at line 2303 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_MASTER_CP   (4L<<4)

Definition at line 2304 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_MASTER_CTX   (0L<<4)

Definition at line 2300 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_MASTER_RBDC   (1L<<4)

Definition at line 2301 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_MASTER_TBDC   (2L<<4)

Definition at line 2302 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_MASTER_TDMA   (5L<<4)

Definition at line 2305 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_SWAP   (0x3L<<7)

Definition at line 2306 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_SWAP_CONFIG   (0L<<7)

Definition at line 2307 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_SWAP_CONTROL   (2L<<7)

Definition at line 2309 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_SWAP_DATA   (1L<<7)

Definition at line 2308 of file bnx2.h.

#define BNX2_DMA_TAG_RAM_11_VALID   (1L<<10)

Definition at line 2311 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_00   0x00000ca0

Definition at line 2329 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_00_WCHAN_STA_HOST_ADDR_LOW   (0xffffffffL<<0)

Definition at line 2330 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_01   0x00000ca4

Definition at line 2332 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_01_WCHAN_STA_HOST_ADDR_HIGH   (0xffffffffL<<0)

Definition at line 2333 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_02   0x00000ca8

Definition at line 2335 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_02_BYTE_SWAP   (1L<<17)

Definition at line 2338 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_02_LENGTH   (0xffffL<<0)

Definition at line 2336 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_02_PRIORITY_LVL   (1L<<18)

Definition at line 2339 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_02_WORD_SWAP   (1L<<16)

Definition at line 2337 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_10   0x00000cac

Definition at line 2341 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_11   0x00000cb0

Definition at line 2342 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_12   0x00000cb4

Definition at line 2343 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_20   0x00000cb8

Definition at line 2344 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_21   0x00000cbc

Definition at line 2345 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_22   0x00000cc0

Definition at line 2346 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_30   0x00000cc4

Definition at line 2347 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_31   0x00000cc8

Definition at line 2348 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_32   0x00000ccc

Definition at line 2349 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_40   0x00000cd0

Definition at line 2350 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_41   0x00000cd4

Definition at line 2351 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_42   0x00000cd8

Definition at line 2352 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_50   0x00000cdc

Definition at line 2353 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_51   0x00000ce0

Definition at line 2354 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_52   0x00000ce4

Definition at line 2355 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_60   0x00000ce8

Definition at line 2356 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_61   0x00000cec

Definition at line 2357 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_62   0x00000cf0

Definition at line 2358 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_70   0x00000cf4

Definition at line 2359 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_71   0x00000cf8

Definition at line 2360 of file bnx2.h.

#define BNX2_DMA_WCHAN_STAT_72   0x00000cfc

Definition at line 2361 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0   0x00000c18

Definition at line 2060 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_CS_VLD   (1L<<27)

Definition at line 2076 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_NO_SNOOP   (1L<<24)

Definition at line 2073 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_PARAM_EN   (1L<<31)

Definition at line 2078 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_PRIORITY   (1L<<26)

Definition at line 2075 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_RELAX_ORDER   (1L<<25)

Definition at line 2074 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_CTX_TRAFFIC_CLASS   (0x7L<<28)

Definition at line 2077 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_CS_VLD   (1L<<3)

Definition at line 2064 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_NO_SNOOP   (1L<<0)

Definition at line 2061 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_PARAM_EN   (1L<<7)

Definition at line 2066 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_PRIORITY   (1L<<2)

Definition at line 2063 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_RELAX_ORDER   (1L<<1)

Definition at line 2062 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_HC_TRAFFIC_CLASS   (0x7L<<4)

Definition at line 2065 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_CS_VLD   (1L<<11)

Definition at line 2070 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_NO_SNOOP   (1L<<8)

Definition at line 2067 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_PARAM_EN   (1L<<15)

Definition at line 2072 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_PRIORITY   (1L<<10)

Definition at line 2069 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_RELAX_ORDER   (1L<<9)

Definition at line 2068 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_0_RDMA_TRAFFIC_CLASS   (0x7L<<12)

Definition at line 2071 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1   0x00000c1c

Definition at line 2080 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_CS_VLD   (1L<<3)

Definition at line 2084 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_NO_SNOOP   (1L<<0)

Definition at line 2081 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_PARAM_EN   (1L<<7)

Definition at line 2086 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_PRIORITY   (1L<<2)

Definition at line 2083 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_RELAX_ORDER   (1L<<1)

Definition at line 2082 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_COM_TRAFFIC_CLASS   (0x7L<<4)

Definition at line 2085 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_CS_VLD   (1L<<11)

Definition at line 2090 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_NO_SNOOP   (1L<<8)

Definition at line 2087 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_PARAM_EN   (1L<<15)

Definition at line 2092 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_PRIORITY   (1L<<10)

Definition at line 2089 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_RELAX_ORDER   (1L<<9)

Definition at line 2088 of file bnx2.h.

#define BNX2_DMA_WRITE_MASTER_SETTING_1_CP_TRAFFIC_CLASS   (0x7L<<12)

Definition at line 2091 of file bnx2.h.

#define BNX2_DRV_ACK_CAP_MB   0x364

Definition at line 7410 of file bnx2.h.

#define BNX2_DRV_ACK_CAP_SIGNATURE   0x35450000

Definition at line 7411 of file bnx2.h.

#define BNX2_DRV_MB   0x00000004

Definition at line 7078 of file bnx2.h.

#define BNX2_DRV_MB_ARG0   0x00000014

Definition at line 7149 of file bnx2.h.

#define BNX2_DRV_MSG_CODE   0xff000000

Definition at line 7079 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_CMD_SET_LINK   0x10000000

Definition at line 7090 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_DIAG   0x07000000

Definition at line 7086 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_FW_TIMEOUT   0x05000000

Definition at line 7084 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE   0x0d000000

Definition at line 7089 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_PULSE   0x06000000

Definition at line 7085 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_RESET   0x01000000

Definition at line 7080 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_SHUTDOWN   0x03000000

Definition at line 7082 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL   0x09000000

Definition at line 7087 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_SUSPEND_WOL   0x04000000

Definition at line 7083 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_UNLOAD   0x02000000

Definition at line 7081 of file bnx2.h.

#define BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN   0x0b000000

Definition at line 7088 of file bnx2.h.

#define BNX2_DRV_MSG_DATA   0x00ff0000

Definition at line 7092 of file bnx2.h.

#define BNX2_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE   0x00080000

Definition at line 7147 of file bnx2.h.

#define BNX2_DRV_MSG_DATA_WAIT0   0x00010000

Definition at line 7093 of file bnx2.h.

#define BNX2_DRV_MSG_DATA_WAIT1   0x00020000

Definition at line 7094 of file bnx2.h.

#define BNX2_DRV_MSG_DATA_WAIT2   0x00030000

Definition at line 7095 of file bnx2.h.

#define BNX2_DRV_MSG_DATA_WAIT3   0x00040000

Definition at line 7096 of file bnx2.h.

#define BNX2_DRV_MSG_SEQ   0x0000ffff

Definition at line 7098 of file bnx2.h.

#define BNX2_DRV_PULSE_MB   0x00000010

Definition at line 7141 of file bnx2.h.

#define BNX2_DRV_PULSE_PERIOD_MS   250

Definition at line 7064 of file bnx2.h.

#define BNX2_DRV_PULSE_SEQ_MASK   0x00007fff

Definition at line 7142 of file bnx2.h.

#define BNX2_DRV_RESET_SIGNATURE   0x00000000

Definition at line 7074 of file bnx2.h.

#define BNX2_DRV_RESET_SIGNATURE_MAGIC   0x4841564b /* HAVK */

Definition at line 7075 of file bnx2.h.

#define BNX2_EMAC_ATTENTION_ENA   0x00001408

Definition at line 2626 of file bnx2.h.

#define BNX2_EMAC_ATTENTION_ENA_AP_ERROR   (1L<<24)

Definition at line 2633 of file bnx2.h.

#define BNX2_EMAC_ATTENTION_ENA_AUTONEG_CHANGE   (1L<<14)

Definition at line 2628 of file bnx2.h.

#define BNX2_EMAC_ATTENTION_ENA_LINK   (1L<<11)

Definition at line 2627 of file bnx2.h.

#define BNX2_EMAC_ATTENTION_ENA_MI_COMPLETE   (1L<<22)

Definition at line 2631 of file bnx2.h.

#define BNX2_EMAC_ATTENTION_ENA_MI_INT   (1L<<23)

Definition at line 2632 of file bnx2.h.

#define BNX2_EMAC_ATTENTION_ENA_NXT_PG_CHANGE   (1L<<16)

Definition at line 2629 of file bnx2.h.

#define BNX2_EMAC_ATTENTION_ENA_SERDES_RX_CONFIG_IS_0_CHANGE   (1L<<18)

Definition at line 2630 of file bnx2.h.

#define BNX2_EMAC_BACKOFF_SEED   0x00001498

Definition at line 2689 of file bnx2.h.

#define BNX2_EMAC_BACKOFF_SEED_EMAC_BACKOFF_SEED   (0x3ffL<<0)

Definition at line 2690 of file bnx2.h.

#define BNX2_EMAC_CKSUM_ERROR_STATUS   0x000014f0

Definition at line 2806 of file bnx2.h.

#define BNX2_EMAC_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)

Definition at line 2807 of file bnx2.h.

#define BNX2_EMAC_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)

Definition at line 2808 of file bnx2.h.

#define BNX2_EMAC_LED   0x0000140c

Definition at line 2635 of file bnx2.h.

#define BNX2_EMAC_LED_1000MB   (1L<<7)

Definition at line 2643 of file bnx2.h.

#define BNX2_EMAC_LED_1000MB_OVERRIDE   (1L<<1)

Definition at line 2637 of file bnx2.h.

#define BNX2_EMAC_LED_100MB   (1L<<8)

Definition at line 2644 of file bnx2.h.

#define BNX2_EMAC_LED_100MB_OVERRIDE   (1L<<2)

Definition at line 2638 of file bnx2.h.

#define BNX2_EMAC_LED_10MB   (1L<<9)

Definition at line 2645 of file bnx2.h.

#define BNX2_EMAC_LED_10MB_OVERRIDE   (1L<<3)

Definition at line 2639 of file bnx2.h.

#define BNX2_EMAC_LED_2500MB   (1L<<11)

Definition at line 2647 of file bnx2.h.

#define BNX2_EMAC_LED_2500MB_OVERRIDE   (1L<<12)

Definition at line 2648 of file bnx2.h.

#define BNX2_EMAC_LED_ACTIVITY_SEL   (0x3L<<17)

Definition at line 2649 of file bnx2.h.

#define BNX2_EMAC_LED_ACTIVITY_SEL_0   (0L<<17)

Definition at line 2650 of file bnx2.h.

#define BNX2_EMAC_LED_ACTIVITY_SEL_1   (1L<<17)

Definition at line 2651 of file bnx2.h.

#define BNX2_EMAC_LED_ACTIVITY_SEL_2   (2L<<17)

Definition at line 2652 of file bnx2.h.

#define BNX2_EMAC_LED_ACTIVITY_SEL_3   (3L<<17)

Definition at line 2653 of file bnx2.h.

#define BNX2_EMAC_LED_BLNK_RATE   (0xfffL<<19)

Definition at line 2654 of file bnx2.h.

#define BNX2_EMAC_LED_BLNK_RATE_ENA   (1L<<31)

Definition at line 2655 of file bnx2.h.

#define BNX2_EMAC_LED_BLNK_TRAFFIC   (1L<<5)

Definition at line 2641 of file bnx2.h.

#define BNX2_EMAC_LED_OVERRIDE   (1L<<0)

Definition at line 2636 of file bnx2.h.

#define BNX2_EMAC_LED_TRAFFIC   (1L<<6)

Definition at line 2642 of file bnx2.h.

#define BNX2_EMAC_LED_TRAFFIC_OVERRIDE   (1L<<4)

Definition at line 2640 of file bnx2.h.

#define BNX2_EMAC_LED_TRAFFIC_STAT   (1L<<10)

Definition at line 2646 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH0   0x00001410

Definition at line 2657 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH1   0x00001414

Definition at line 2658 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH10   0x00001438

Definition at line 2667 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH11   0x0000143c

Definition at line 2668 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH12   0x00001440

Definition at line 2669 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH13   0x00001444

Definition at line 2670 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH14   0x00001448

Definition at line 2671 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH15   0x0000144c

Definition at line 2672 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH16   0x00001450

Definition at line 2673 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH17   0x00001454

Definition at line 2674 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH18   0x00001458

Definition at line 2675 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH19   0x0000145c

Definition at line 2676 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH2   0x00001418

Definition at line 2659 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH20   0x00001460

Definition at line 2677 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH21   0x00001464

Definition at line 2678 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH22   0x00001468

Definition at line 2679 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH23   0x0000146c

Definition at line 2680 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH24   0x00001470

Definition at line 2681 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH25   0x00001474

Definition at line 2682 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH26   0x00001478

Definition at line 2683 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH27   0x0000147c

Definition at line 2684 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH28   0x00001480

Definition at line 2685 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH29   0x00001484

Definition at line 2686 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH3   0x0000141c

Definition at line 2660 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH30   0x00001488

Definition at line 2687 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH31   0x0000148c

Definition at line 2688 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH4   0x00001420

Definition at line 2661 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH5   0x00001424

Definition at line 2662 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH6   0x00001428

Definition at line 2663 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH7   0x0000142c

Definition at line 2664 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH8   0x00001430

Definition at line 2665 of file bnx2.h.

#define BNX2_EMAC_MAC_MATCH9   0x00001434

Definition at line 2666 of file bnx2.h.

#define BNX2_EMAC_MDIO_AUTO_STATUS   0x000014b8

Definition at line 2754 of file bnx2.h.

#define BNX2_EMAC_MDIO_AUTO_STATUS_AUTO_ERR   (1L<<0)

Definition at line 2755 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM   0x000014ac

Definition at line 2718 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND   (0x3L<<26)

Definition at line 2722 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_ADDRESS   (0L<<26)

Definition at line 2724 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_READ   (2L<<26)

Definition at line 2726 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_READ_22_XI   (2L<<26)

Definition at line 2729 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_READ_45   (3L<<26)

Definition at line 2732 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_READ_INC_45_XI   (2L<<26)

Definition at line 2730 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_UNDEFINED_0   (0L<<26)

Definition at line 2723 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_UNDEFINED_3   (3L<<26)

Definition at line 2731 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_WRITE   (1L<<26)

Definition at line 2725 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_WRITE_22_XI   (1L<<26)

Definition at line 2727 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_COMMAND_WRITE_45_XI   (1L<<26)

Definition at line 2728 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_DATA   (0xffffL<<0)

Definition at line 2719 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_DISEXT   (1L<<30)

Definition at line 2735 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_FAIL   (1L<<28)

Definition at line 2733 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_PHY_ADDR   (0x1fL<<21)

Definition at line 2721 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_REG_ADDR   (0x1fL<<16)

Definition at line 2720 of file bnx2.h.

#define BNX2_EMAC_MDIO_COMM_START_BUSY   (1L<<29)

Definition at line 2734 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE   0x000014b4

Definition at line 2741 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_AUTO_POLL   (1L<<4)

Definition at line 2743 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_BIT_BANG   (1L<<8)

Definition at line 2744 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_CLAUSE_45_XI   (1L<<31)

Definition at line 2752 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_CLOCK_CNT   (0x1fL<<16)

Definition at line 2750 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_CLOCK_CNT_XI   (0x3fL<<16)

Definition at line 2751 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_EXT_MDINT   (1L<<13)

Definition at line 2749 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_MDC   (1L<<11)

Definition at line 2747 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_MDINT   (1L<<12)

Definition at line 2748 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_MDIO   (1L<<9)

Definition at line 2745 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_MDIO_OE   (1L<<10)

Definition at line 2746 of file bnx2.h.

#define BNX2_EMAC_MDIO_MODE_SHORT_PREAMBLE   (1L<<1)

Definition at line 2742 of file bnx2.h.

#define BNX2_EMAC_MDIO_STATUS   0x000014b0

Definition at line 2737 of file bnx2.h.

#define BNX2_EMAC_MDIO_STATUS_10MB   (1L<<1)

Definition at line 2739 of file bnx2.h.

#define BNX2_EMAC_MDIO_STATUS_LINK   (1L<<0)

Definition at line 2738 of file bnx2.h.

#define BNX2_EMAC_MODE   0x00001400

Definition at line 2592 of file bnx2.h.

#define BNX2_EMAC_MODE_25G_MODE   (1L<<5)

Definition at line 2601 of file bnx2.h.

#define BNX2_EMAC_MODE_ACPI_RCVD   (1L<<20)

Definition at line 2611 of file bnx2.h.

#define BNX2_EMAC_MODE_BOND_OVRD   (1L<<13)

Definition at line 2608 of file bnx2.h.

#define BNX2_EMAC_MODE_EXT_LINK_POL   (1L<<10)

Definition at line 2605 of file bnx2.h.

#define BNX2_EMAC_MODE_FORCE_LINK   (1L<<11)

Definition at line 2606 of file bnx2.h.

#define BNX2_EMAC_MODE_HALF_DUPLEX   (1L<<1)

Definition at line 2594 of file bnx2.h.

#define BNX2_EMAC_MODE_MAC_LOOP   (1L<<4)

Definition at line 2600 of file bnx2.h.

#define BNX2_EMAC_MODE_MAX_DEFER_DROP_ENA   (1L<<9)

Definition at line 2604 of file bnx2.h.

#define BNX2_EMAC_MODE_MPKT   (1L<<18)

Definition at line 2609 of file bnx2.h.

#define BNX2_EMAC_MODE_MPKT_RCVD   (1L<<19)

Definition at line 2610 of file bnx2.h.

#define BNX2_EMAC_MODE_PORT   (0x3L<<2)

Definition at line 2595 of file bnx2.h.

#define BNX2_EMAC_MODE_PORT_GMII   (2L<<2)

Definition at line 2598 of file bnx2.h.

#define BNX2_EMAC_MODE_PORT_MII   (1L<<2)

Definition at line 2597 of file bnx2.h.

#define BNX2_EMAC_MODE_PORT_MII_10M   (3L<<2)

Definition at line 2599 of file bnx2.h.

#define BNX2_EMAC_MODE_PORT_NONE   (0L<<2)

Definition at line 2596 of file bnx2.h.

#define BNX2_EMAC_MODE_RESET   (1L<<0)

Definition at line 2593 of file bnx2.h.

#define BNX2_EMAC_MODE_SERDES_MODE   (1L<<12)

Definition at line 2607 of file bnx2.h.

#define BNX2_EMAC_MODE_TAGGED_MAC_CTL   (1L<<7)

Definition at line 2602 of file bnx2.h.

#define BNX2_EMAC_MODE_TX_BURST   (1L<<8)

Definition at line 2603 of file bnx2.h.

#define BNX2_EMAC_MULTICAST_HASH0   0x000014d0

Definition at line 2798 of file bnx2.h.

#define BNX2_EMAC_MULTICAST_HASH1   0x000014d4

Definition at line 2799 of file bnx2.h.

#define BNX2_EMAC_MULTICAST_HASH2   0x000014d8

Definition at line 2800 of file bnx2.h.

#define BNX2_EMAC_MULTICAST_HASH3   0x000014dc

Definition at line 2801 of file bnx2.h.

#define BNX2_EMAC_MULTICAST_HASH4   0x000014e0

Definition at line 2802 of file bnx2.h.

#define BNX2_EMAC_MULTICAST_HASH5   0x000014e4

Definition at line 2803 of file bnx2.h.

#define BNX2_EMAC_MULTICAST_HASH6   0x000014e8

Definition at line 2804 of file bnx2.h.

#define BNX2_EMAC_MULTICAST_HASH7   0x000014ec

Definition at line 2805 of file bnx2.h.

#define BNX2_EMAC_RX_MODE   0x000014c8

Definition at line 2779 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_ACCEPT_OVERSIZE   (1L<<5)

Definition at line 2784 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_ACCEPT_RUNTS   (1L<<6)

Definition at line 2785 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_FILT_BROADCAST   (1L<<11)

Definition at line 2790 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_FLOW_EN   (1L<<2)

Definition at line 2781 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_KEEP_MAC_CONTROL   (1L<<3)

Definition at line 2782 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_KEEP_PAUSE   (1L<<4)

Definition at line 2783 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG   (1L<<10)

Definition at line 2789 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_LLC_CHK   (1L<<7)

Definition at line 2786 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_NO_CRC_CHK   (1L<<9)

Definition at line 2788 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_PROMISCUOUS   (1L<<8)

Definition at line 2787 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_RESET   (1L<<0)

Definition at line 2780 of file bnx2.h.

#define BNX2_EMAC_RX_MODE_SORT_MODE   (1L<<12)

Definition at line 2791 of file bnx2.h.

#define BNX2_EMAC_RX_MTU_SIZE   0x0000149c

Definition at line 2692 of file bnx2.h.

#define BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA   (1L<<31)

Definition at line 2694 of file bnx2.h.

#define BNX2_EMAC_RX_MTU_SIZE_MTU_SIZE   (0xffffL<<0)

Definition at line 2693 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC0   0x00001580

Definition at line 2958 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC1   0x00001584

Definition at line 2959 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC10   0x000015a8

Definition at line 2968 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC11   0x000015ac

Definition at line 2969 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC12   0x000015b0

Definition at line 2970 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC13   0x000015b4

Definition at line 2971 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC14   0x000015b8

Definition at line 2972 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC15   0x000015bc

Definition at line 2973 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC16   0x000015c0

Definition at line 2974 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC17   0x000015c4

Definition at line 2975 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC18   0x000015c8

Definition at line 2976 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC19   0x000015cc

Definition at line 2977 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC2   0x00001588

Definition at line 2960 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC20   0x000015d0

Definition at line 2978 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC21   0x000015d4

Definition at line 2979 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC22   0x000015d8

Definition at line 2980 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC3   0x0000158c

Definition at line 2961 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC4   0x00001590

Definition at line 2962 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC5   0x00001594

Definition at line 2963 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC6   0x00001598

Definition at line 2964 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC7   0x0000159c

Definition at line 2965 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC8   0x000015a0

Definition at line 2966 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC9   0x000015a4

Definition at line 2967 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_AC_28   0x000015f4

Definition at line 2982 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_DOT3STATSALIGNMENTERRORS   0x0000151c

Definition at line 2817 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_DOT3STATSCARRIERSENSEERRORS   0x00001520

Definition at line 2818 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_DOT3STATSFCSERRORS   0x00001518

Definition at line 2816 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_DOT3STATSFRAMESTOOLONG   0x00001534

Definition at line 2823 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSFRAGMENTS   0x00001508

Definition at line 2812 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSJABBERS   0x00001538

Definition at line 2824 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS   0x00001554

Definition at line 2831 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS   0x00001548

Definition at line 2828 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS   0x0000154c

Definition at line 2829 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS   0x00001550

Definition at line 2830 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS64OCTETS   0x00001540

Definition at line 2826 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS   0x00001544

Definition at line 2827 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTSOVER1522OCTETS   0x00001558

Definition at line 2832 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_ETHERSTATSUNDERSIZEPKTS   0x0000153c

Definition at line 2825 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_FALSECARRIERERRORS   0x00001574

Definition at line 2957 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_IFHCINBADOCTETS   0x00001504

Definition at line 2811 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_IFHCINBROADCASTPKTS   0x00001514

Definition at line 2815 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_IFHCINMULTICASTPKTS   0x00001510

Definition at line 2814 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_IFHCINOCTETS   0x00001500

Definition at line 2810 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_IFHCINUCASTPKTS   0x0000150c

Definition at line 2813 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_MACCONTROLFRAMESRECEIVED   0x0000152c

Definition at line 2821 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_XOFFPAUSEFRAMESRECEIVED   0x00001528

Definition at line 2820 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_XOFFSTATEENTERED   0x00001530

Definition at line 2822 of file bnx2.h.

#define BNX2_EMAC_RX_STAT_XONPAUSEFRAMESRECEIVED   0x00001524

Definition at line 2819 of file bnx2.h.

#define BNX2_EMAC_RX_STATUS   0x000014cc

Definition at line 2793 of file bnx2.h.

#define BNX2_EMAC_RX_STATUS_FF_RECEIVED   (1L<<1)

Definition at line 2795 of file bnx2.h.

#define BNX2_EMAC_RX_STATUS_FFED   (1L<<0)

Definition at line 2794 of file bnx2.h.

#define BNX2_EMAC_RX_STATUS_N_RECEIVED   (1L<<2)

Definition at line 2796 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG0   0x0000155c

Definition at line 2833 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1   0x00001560

Definition at line 2834 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ERROR   (1L<<4)

Definition at line 2839 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_BAD_CRC   (1L<<2)

Definition at line 2837 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_BYTE_COUNT   (0xffffL<<7)

Definition at line 2842 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_LAST_DATA   (1L<<5)

Definition at line 2840 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_LENGTH_NE_BYTE_COUNT   (1L<<0)

Definition at line 2835 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_LENGTH_OUT_RANGE   (1L<<1)

Definition at line 2836 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE_START   (1L<<6)

Definition at line 2841 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_RX_ERROR   (1L<<3)

Definition at line 2838 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIME   (0xffL<<23)

Definition at line 2843 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2   0x00001564

Definition at line 2845 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_BYTE_IN   (0xffL<<7)

Definition at line 2865 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_FALSEC   (1L<<15)

Definition at line 2866 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE   (0xfL<<3)

Definition at line 2855 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_ABORT   (0x5L<<3)

Definition at line 2861 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA0   (0x1L<<3)

Definition at line 2857 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA1   (0x2L<<3)

Definition at line 2858 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA2   (0x3L<<3)

Definition at line 2859 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA3   (0x4L<<3)

Definition at line 2860 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_IDLE   (0x0L<<3)

Definition at line 2856 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_LAST   (0x8L<<3)

Definition at line 2864 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_STATUS   (0x7L<<3)

Definition at line 2863 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_WAIT   (0x6L<<3)

Definition at line 2862 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE   (1L<<18)

Definition at line 2868 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE_IDLE   (0L<<18)

Definition at line 2869 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE_PAUSED   (1L<<18)

Definition at line 2870 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_QUANTA   (0x1fL<<23)

Definition at line 2872 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SE_COUNTER   (0xfL<<19)

Definition at line 2871 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE   (0x7L<<0)

Definition at line 2846 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_DATA   (0x2L<<0)

Definition at line 2849 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_DROP   (0x5L<<0)

Definition at line 2852 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_EXT   (0x4L<<0)

Definition at line 2851 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_FC   (0x7L<<0)

Definition at line 2854 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_IDLE   (0x0L<<0)

Definition at line 2847 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SDROP   (0x6L<<0)

Definition at line 2853 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SFD   (0x1L<<0)

Definition at line 2848 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SKEEP   (0x3L<<0)

Definition at line 2850 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG2_TAGGED   (1L<<16)

Definition at line 2867 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG3   0x00001568

Definition at line 2874 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CTR   (0xffffL<<0)

Definition at line 2875 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUSE_CTR   (0xffffL<<16)

Definition at line 2876 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4   0x0000156c

Definition at line 2878 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_ADVANCE   (1L<<27)

Definition at line 2926 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_DROP_PKT   (1L<<22)

Definition at line 2921 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FALSE_CARRIER   (1L<<24)

Definition at line 2923 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE   (0x3fL<<16)

Definition at line 2880 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC   (0x18L<<16)

Definition at line 2902 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC2   (0x12L<<16)

Definition at line 2896 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC3   (0x13L<<16)

Definition at line 2897 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA1   (0x14L<<16)

Definition at line 2898 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA2   (0x15L<<16)

Definition at line 2899 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA3   (0x16L<<16)

Definition at line 2900 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BTYPE   (0x17L<<16)

Definition at line 2901 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_CMD   (0x1aL<<16)

Definition at line 2904 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_DROP   (0x2aL<<16)

Definition at line 2920 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_IDLE   (0x0L<<16)

Definition at line 2881 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_LATCH   (0x1cL<<16)

Definition at line 2906 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MAC   (0x1bL<<16)

Definition at line 2905 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC   (0x11L<<16)

Definition at line 2895 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC2   (0x9L<<16)

Definition at line 2890 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC3   (0xaL<<16)

Definition at line 2891 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MCHECK   (0x10L<<16)

Definition at line 2894 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC2   (0x7L<<16)

Definition at line 2887 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC3   (0x5L<<16)

Definition at line 2885 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MTYPE   (0x29L<<16)

Definition at line 2919 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT1   (0xeL<<16)

Definition at line 2892 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT2   (0xfL<<16)

Definition at line 2893 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_NPAUSED   (0x20L<<16)

Definition at line 2910 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PAUSED   (0x1fL<<16)

Definition at line 2909 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA1   (0x6L<<16)

Definition at line 2886 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA2   (0x7L<<16)

Definition at line 2888 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA3   (0x8L<<16)

Definition at line 2889 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PTYPE   (0x19L<<16)

Definition at line 2903 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_TTYPE   (0x21L<<16)

Definition at line 2911 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_TVAL   (0x22L<<16)

Definition at line 2912 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC2   (0x1L<<16)

Definition at line 2882 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC3   (0x2L<<16)

Definition at line 2883 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UNI   (0x3L<<16)

Definition at line 2884 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA1   (0x23L<<16)

Definition at line 2913 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA2   (0x24L<<16)

Definition at line 2914 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA3   (0x25L<<16)

Definition at line 2915 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTTYPE   (0x27L<<16)

Definition at line 2917 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTVAL   (0x28L<<16)

Definition at line 2918 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTYPE   (0x26L<<16)

Definition at line 2916 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_XOFF   (0x1dL<<16)

Definition at line 2907 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_XON   (0x1eL<<16)

Definition at line 2908 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_LAST_DATA   (1L<<25)

Definition at line 2924 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_SFD_FOUND   (1L<<26)

Definition at line 2925 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_SLOT_FILLED   (1L<<23)

Definition at line 2922 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_START   (1L<<28)

Definition at line 2927 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIELD   (0xffffL<<0)

Definition at line 2879 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5   0x00001570

Definition at line 2929 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF0   (0x7L<<8)

Definition at line 2947 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1   (0x7L<<4)

Definition at line 2938 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_AEOF   (0x2L<<4)

Definition at line 2941 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_NEOF   (0x3L<<4)

Definition at line 2942 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SAEOF   (0x6L<<4)

Definition at line 2944 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SNEOF   (0x7L<<4)

Definition at line 2945 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SOF   (0x4L<<4)

Definition at line 2943 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_STAT   (0x1L<<4)

Definition at line 2940 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_VDW   (0x0L<<4)

Definition at line 2939 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_CLR_STAT   (1L<<15)

Definition at line 2952 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_EOF_DETECTED   (1L<<7)

Definition at line 2946 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_FMLEN   (0xfffL<<20)

Definition at line 2955 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_ACCEPT   (1L<<19)

Definition at line 2954 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_CCODE   (0x3L<<16)

Definition at line 2953 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCODE   (1L<<12)

Definition at line 2949 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_DATA   (1L<<13)

Definition at line 2950 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_STAT   (1L<<14)

Definition at line 2951 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM   (0x7L<<0)

Definition at line 2930 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_1WD_WAIT_STAT   (6L<<0)

Definition at line 2937 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_IDLE   (0L<<0)

Definition at line 2931 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4ALL   (5L<<0)

Definition at line 2936 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4FCRC   (3L<<0)

Definition at line 2934 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4RDE   (4L<<0)

Definition at line 2935 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_EOF   (1L<<0)

Definition at line 2932 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_STAT   (2L<<0)

Definition at line 2933 of file bnx2.h.

#define BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_FIFO_FULL   (1L<<11)

Definition at line 2948 of file bnx2.h.

#define BNX2_EMAC_RXMAC_SUC_DBG_OVERRUNVEC   0x000015dc

Definition at line 2981 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL   0x000014a4

Definition at line 2696 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_BGMAX   (1L<<10)

Definition at line 2701 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_BGMIN   (1L<<11)

Definition at line 2702 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_CDET_EN   (1L<<16)

Definition at line 2707 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_PLLTEST   (1L<<15)

Definition at line 2706 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_REGCTL12   (0x3L<<20)

Definition at line 2711 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_REGCTL25   (0x3L<<22)

Definition at line 2712 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_REMOTE_LBK   (1L<<18)

Definition at line 2709 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_REV_PHASE   (1L<<19)

Definition at line 2710 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_RXCKSEL   (1L<<6)

Definition at line 2699 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_RXG   (0x3L<<3)

Definition at line 2698 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_RXR   (0x7L<<0)

Definition at line 2697 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_SERDES_MODE   (1L<<14)

Definition at line 2705 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_TBI_LBK   (1L<<17)

Definition at line 2708 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_TXBIAS   (0x7L<<7)

Definition at line 2700 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_TXEDGE   (1L<<13)

Definition at line 2704 of file bnx2.h.

#define BNX2_EMAC_SERDES_CNTL_TXMODE   (1L<<12)

Definition at line 2703 of file bnx2.h.

#define BNX2_EMAC_SERDES_STATUS   0x000014a8

Definition at line 2714 of file bnx2.h.

#define BNX2_EMAC_SERDES_STATUS_COMMA_DET   (1L<<8)

Definition at line 2716 of file bnx2.h.

#define BNX2_EMAC_SERDES_STATUS_RX_STAT   (0xffL<<0)

Definition at line 2715 of file bnx2.h.

#define BNX2_EMAC_STATUS   0x00001404

Definition at line 2613 of file bnx2.h.

#define BNX2_EMAC_STATUS_AP_ERROR   (1L<<24)

Definition at line 2623 of file bnx2.h.

#define BNX2_EMAC_STATUS_LINK   (1L<<11)

Definition at line 2614 of file bnx2.h.

#define BNX2_EMAC_STATUS_LINK_CHANGE   (1L<<12)

Definition at line 2615 of file bnx2.h.

#define BNX2_EMAC_STATUS_MI_COMPLETE   (1L<<22)

Definition at line 2621 of file bnx2.h.

#define BNX2_EMAC_STATUS_MI_INT   (1L<<23)

Definition at line 2622 of file bnx2.h.

#define BNX2_EMAC_STATUS_PARITY_ERROR_STATE   (1L<<31)

Definition at line 2624 of file bnx2.h.

#define BNX2_EMAC_STATUS_SERDES_AUTONEG_CHANGE   (1L<<14)

Definition at line 2617 of file bnx2.h.

#define BNX2_EMAC_STATUS_SERDES_AUTONEG_COMPLETE   (1L<<13)

Definition at line 2616 of file bnx2.h.

#define BNX2_EMAC_STATUS_SERDES_NXT_PG_CHANGE   (1L<<16)

Definition at line 2618 of file bnx2.h.

#define BNX2_EMAC_STATUS_SERDES_RX_CONFIG_IS_0   (1L<<17)

Definition at line 2619 of file bnx2.h.

#define BNX2_EMAC_STATUS_SERDES_RX_CONFIG_IS_0_CHANGE   (1L<<18)

Definition at line 2620 of file bnx2.h.

#define BNX2_EMAC_TX_LENGTHS   0x000014c4

Definition at line 2774 of file bnx2.h.

#define BNX2_EMAC_TX_LENGTHS_IPG   (0xfL<<8)

Definition at line 2776 of file bnx2.h.

#define BNX2_EMAC_TX_LENGTHS_IPG_CRS   (0x3L<<12)

Definition at line 2777 of file bnx2.h.

#define BNX2_EMAC_TX_LENGTHS_SLOT   (0xffL<<0)

Definition at line 2775 of file bnx2.h.

#define BNX2_EMAC_TX_MODE   0x000014bc

Definition at line 2757 of file bnx2.h.

#define BNX2_EMAC_TX_MODE_BIG_BACKOFF   (1L<<5)

Definition at line 2762 of file bnx2.h.

#define BNX2_EMAC_TX_MODE_CS16_TEST   (1L<<2)

Definition at line 2759 of file bnx2.h.

#define BNX2_EMAC_TX_MODE_EXT_PAUSE_EN   (1L<<3)

Definition at line 2760 of file bnx2.h.

#define BNX2_EMAC_TX_MODE_FLOW_EN   (1L<<4)

Definition at line 2761 of file bnx2.h.

#define BNX2_EMAC_TX_MODE_LINK_AWARE   (1L<<7)

Definition at line 2764 of file bnx2.h.

#define BNX2_EMAC_TX_MODE_LONG_PAUSE   (1L<<6)

Definition at line 2763 of file bnx2.h.

#define BNX2_EMAC_TX_MODE_RESET   (1L<<0)

Definition at line 2758 of file bnx2.h.

#define BNX2_EMAC_TX_RATE_LIMIT_CTRL   0x000016fc

Definition at line 3114 of file bnx2.h.

#define BNX2_EMAC_TX_RATE_LIMIT_CTRL_RATE_LIMITER_EN   (1L<<31)

Definition at line 3117 of file bnx2.h.

#define BNX2_EMAC_TX_RATE_LIMIT_CTRL_TX_THROTTLE_INC   (0x7fL<<0)

Definition at line 3115 of file bnx2.h.

#define BNX2_EMAC_TX_RATE_LIMIT_CTRL_TX_THROTTLE_NUM   (0x7fL<<16)

Definition at line 3116 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC0   0x00001680

Definition at line 3092 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC1   0x00001684

Definition at line 3093 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC10   0x000016a8

Definition at line 3102 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC11   0x000016ac

Definition at line 3103 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC12   0x000016b0

Definition at line 3104 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC13   0x000016b4

Definition at line 3105 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC14   0x000016b8

Definition at line 3106 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC15   0x000016bc

Definition at line 3107 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC16   0x000016c0

Definition at line 3108 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC17   0x000016c4

Definition at line 3109 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC18   0x000016c8

Definition at line 3110 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC19   0x000016cc

Definition at line 3111 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC2   0x00001688

Definition at line 3094 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC20   0x000016d0

Definition at line 3112 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC3   0x0000168c

Definition at line 3095 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC4   0x00001690

Definition at line 3096 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC5   0x00001694

Definition at line 3097 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC6   0x00001698

Definition at line 3098 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC7   0x0000169c

Definition at line 3099 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC8   0x000016a0

Definition at line 3100 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_AC9   0x000016a4

Definition at line 3101 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_DOT3STATSDEFERREDTRANSMISSIONS   0x00001620

Definition at line 2991 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_DOT3STATSEXCESSIVECOLLISIONS   0x00001624

Definition at line 2992 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_DOT3STATSINTERNALMACTRANSMITERRORS   0x00001654

Definition at line 3004 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_DOT3STATSLATECOLLISIONS   0x00001628

Definition at line 2993 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_DOT3STATSMULTIPLECOLLISIONFRAMES   0x0000161c

Definition at line 2990 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_DOT3STATSSINGLECOLLISIONFRAMES   0x00001618

Definition at line 2989 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_ETHERSTATSCOLLISIONS   0x00001608

Definition at line 2985 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS   0x0000164c

Definition at line 3002 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS   0x00001640

Definition at line 2999 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS   0x00001644

Definition at line 3000 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS   0x00001648

Definition at line 3001 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS64OCTETS   0x00001638

Definition at line 2997 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS   0x0000163c

Definition at line 2998 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTSOVER1522OCTETS   0x00001650

Definition at line 3003 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_FLOWCONTROLDONE   0x00001614

Definition at line 2988 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_IFHCOUTBADOCTETS   0x00001604

Definition at line 2984 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_IFHCOUTBROADCASTPKTS   0x00001634

Definition at line 2996 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_IFHCOUTMULTICASTPKTS   0x00001630

Definition at line 2995 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_IFHCOUTOCTETS   0x00001600

Definition at line 2983 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_IFHCOUTUCASTPKTS   0x0000162c

Definition at line 2994 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_OUTXOFFSENT   0x00001610

Definition at line 2987 of file bnx2.h.

#define BNX2_EMAC_TX_STAT_OUTXONSENT   0x0000160c

Definition at line 2986 of file bnx2.h.

#define BNX2_EMAC_TX_STATUS   0x000014c0

Definition at line 2766 of file bnx2.h.

#define BNX2_EMAC_TX_STATUS_CS16_ERROR   (1L<<5)

Definition at line 2772 of file bnx2.h.

#define BNX2_EMAC_TX_STATUS_LINK_UP   (1L<<3)

Definition at line 2770 of file bnx2.h.

#define BNX2_EMAC_TX_STATUS_UNDERRUN   (1L<<4)

Definition at line 2771 of file bnx2.h.

#define BNX2_EMAC_TX_STATUS_XOFF_SENT   (1L<<1)

Definition at line 2768 of file bnx2.h.

#define BNX2_EMAC_TX_STATUS_XOFFED   (1L<<0)

Definition at line 2767 of file bnx2.h.

#define BNX2_EMAC_TX_STATUS_XON_SENT   (1L<<2)

Definition at line 2769 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG0   0x00001658

Definition at line 3005 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1   0x0000165c

Definition at line 3006 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_BAD_CRC   (1L<<5)

Definition at line 3017 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_CRS_ENABLE   (1L<<4)

Definition at line 3016 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_DEFERRED   (1L<<13)

Definition at line 3022 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_IPG_TIME   (0xfL<<15)

Definition at line 3024 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_LATE_COLLISION   (1L<<11)

Definition at line 3020 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFER   (1L<<12)

Definition at line 3021 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE   (0xfL<<0)

Definition at line 3007 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA0   (0x4L<<0)

Definition at line 3010 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA1   (0x5L<<0)

Definition at line 3011 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA2   (0x6L<<0)

Definition at line 3012 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA3   (0x7L<<0)

Definition at line 3013 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_IDLE   (0x0L<<0)

Definition at line 3008 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_START0   (0x1L<<0)

Definition at line 3009 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT0   (0x8L<<0)

Definition at line 3014 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT1   (0x9L<<0)

Definition at line 3015 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE   (1L<<14)

Definition at line 3023 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_SE_COUNTER   (0xfL<<6)

Definition at line 3018 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_SEND_PAUSE   (1L<<10)

Definition at line 3019 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIME   (0xffL<<19)

Definition at line 3025 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG2   0x00001660

Definition at line 3027 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG2_BACK_OFF   (0x3ffL<<0)

Definition at line 3028 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG2_BYTE_COUNT   (0xffffL<<10)

Definition at line 3029 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG2_COL_BIT   (1L<<31)

Definition at line 3031 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG2_COL_COUNT   (0x1fL<<26)

Definition at line 3030 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3   0x00001664

Definition at line 3033 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_CRS_DONE   (1L<<7)

Definition at line 3058 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE   (0x7L<<4)

Definition at line 3050 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC   (0x6L<<4)

Definition at line 3057 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC2   (0x4L<<4)

Definition at line 3055 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC3   (0x5L<<4)

Definition at line 3056 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_IDLE   (0x0L<<4)

Definition at line 3051 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_MC   (0x3L<<4)

Definition at line 3054 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_UNI   (0x2L<<4)

Definition at line 3053 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_WAIT   (0x1L<<4)

Definition at line 3052 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_QUANTA_COUNTER   (0x1fL<<13)

Definition at line 3061 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SE_COUNTER   (0xfL<<9)

Definition at line 3060 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE   (0xfL<<0)

Definition at line 3034 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_BACKOFF   (0xeL<<0)

Definition at line 3049 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_BJAM   (0xcL<<0)

Definition at line 3047 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_CRC1   (0x5L<<0)

Definition at line 3040 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_CRC2   (0x6L<<0)

Definition at line 3041 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_DATA   (0x4L<<0)

Definition at line 3039 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_EJAM   (0xbL<<0)

Definition at line 3046 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_EXT   (0x7L<<0)

Definition at line 3042 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_IDLE   (0x0L<<0)

Definition at line 3035 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_JAM   (0xaL<<0)

Definition at line 3045 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_PRE1   (0x1L<<0)

Definition at line 3036 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_PRE2   (0x2L<<0)

Definition at line 3037 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_SFD   (0x3L<<0)

Definition at line 3038 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_STATB   (0x8L<<0)

Definition at line 3043 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_STATG   (0x9L<<0)

Definition at line 3044 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_SWAIT   (0xdL<<0)

Definition at line 3048 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG3_XOFF   (1L<<8)

Definition at line 3059 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4   0x00001668

Definition at line 3063 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_ADVANCE   (1L<<30)

Definition at line 3089 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_APPEND_CRC   (1L<<21)

Definition at line 3080 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_BURSTING   (1L<<29)

Definition at line 3088 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_COL_IN   (1L<<28)

Definition at line 3087 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_COLLIDING   (1L<<27)

Definition at line 3086 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_EOF_LOC   (1L<<26)

Definition at line 3085 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_GO   (1L<<31)

Definition at line 3090 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFER   (1L<<23)

Definition at line 3082 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_COUNTER   (0xffffL<<0)

Definition at line 3064 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE   (0xfL<<16)

Definition at line 3065 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CMD   (0xeL<<16)

Definition at line 3078 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC1   (0x8L<<16)

Definition at line 3073 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC2   (0x9L<<16)

Definition at line 3074 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_IDLE   (0x0L<<16)

Definition at line 3066 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA1   (0x2L<<16)

Definition at line 3067 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA2   (0x3L<<16)

Definition at line 3068 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA3   (0x6L<<16)

Definition at line 3071 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC1   (0x7L<<16)

Definition at line 3072 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC2   (0x5L<<16)

Definition at line 3070 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC3   (0x4L<<16)

Definition at line 3069 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TIME   (0xaL<<16)

Definition at line 3075 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TYPE   (0xcL<<16)

Definition at line 3076 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_WAIT   (0xdL<<16)

Definition at line 3077 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_SEND_EXTEND   (1L<<24)

Definition at line 3083 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_SEND_PADDING   (1L<<25)

Definition at line 3084 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_SLOT_FILLED   (1L<<22)

Definition at line 3081 of file bnx2.h.

#define BNX2_EMAC_TXMAC_DEBUG4_STATS0_VALID   (1L<<20)

Definition at line 3079 of file bnx2.h.

#define BNX2_EMAC_TXMAC_SUC_DBG_OVERRUNVEC   0x000016d8

Definition at line 3113 of file bnx2.h.

#define BNX2_END_UNICAST_ADDRESS_INDEX   7

Definition at line 6532 of file bnx2.h.

#define BNX2_FLAG_AER_ENABLED   0x00004000

Definition at line 6800 of file bnx2.h.

#define BNX2_FLAG_ASF_ENABLE   0x00000040

Definition at line 6790 of file bnx2.h.

#define BNX2_FLAG_BROKEN_STATS   0x00002000

Definition at line 6799 of file bnx2.h.

#define BNX2_FLAG_CAN_KEEP_VLAN   0x00001000

Definition at line 6798 of file bnx2.h.

#define BNX2_FLAG_JUMBO_BROKEN   0x00000800

Definition at line 6797 of file bnx2.h.

#define BNX2_FLAG_MSI_CAP   0x00000080

Definition at line 6791 of file bnx2.h.

#define BNX2_FLAG_MSIX_CAP   0x00000004

Definition at line 6787 of file bnx2.h.

#define BNX2_FLAG_NO_WOL   0x00000008

Definition at line 6788 of file bnx2.h.

#define BNX2_FLAG_ONE_SHOT_MSI   0x00000100

Definition at line 6792 of file bnx2.h.

#define BNX2_FLAG_PCI_32BIT   0x00000002

Definition at line 6786 of file bnx2.h.

#define BNX2_FLAG_PCIE   0x00000200

Definition at line 6793 of file bnx2.h.

#define BNX2_FLAG_PCIX   0x00000001

Definition at line 6785 of file bnx2.h.

#define BNX2_FLAG_USING_MSI   0x00000020

Definition at line 6789 of file bnx2.h.

#define BNX2_FLAG_USING_MSI_OR_MSIX
Value:
(BNX2_FLAG_USING_MSI | \
BNX2_FLAG_USING_MSIX)

Definition at line 6795 of file bnx2.h.

#define BNX2_FLAG_USING_MSIX   0x00000400

Definition at line 6794 of file bnx2.h.

#define BNX2_FW_ACK_DRV_SIGNATURE   0x52500000

Definition at line 7416 of file bnx2.h.

#define BNX2_FW_ACK_TIME_OUT_MS   1000

Definition at line 7071 of file bnx2.h.

#define BNX2_FW_CAP_BC_CAN_KEEP_VLAN   0x00000010

Definition at line 7421 of file bnx2.h.

#define BNX2_FW_CAP_CAN_KEEP_VLAN
Value:
(BNX2_FW_CAP_BC_CAN_KEEP_VLAN | \
BNX2_FW_CAP_MFW_CAN_KEEP_VLAN)

Definition at line 7422 of file bnx2.h.

#define BNX2_FW_CAP_MB   0x368

Definition at line 7414 of file bnx2.h.

#define BNX2_FW_CAP_MFW_CAN_KEEP_VLAN   0x00000008

Definition at line 7420 of file bnx2.h.

#define BNX2_FW_CAP_REMOTE_PHY_CAPABLE   0x00000001

Definition at line 7418 of file bnx2.h.

#define BNX2_FW_CAP_REMOTE_PHY_PRESENT   0x00000002

Definition at line 7419 of file bnx2.h.

#define BNX2_FW_CAP_SIGNATURE   0xaa550000

Definition at line 7415 of file bnx2.h.

#define BNX2_FW_CAP_SIGNATURE_MASK   0xffff0000

Definition at line 7417 of file bnx2.h.

#define BNX2_FW_EVT_CODE_LINK_EVENT   0x00000001

Definition at line 7408 of file bnx2.h.

#define BNX2_FW_EVT_CODE_MB   0x354

Definition at line 7406 of file bnx2.h.

#define BNX2_FW_EVT_CODE_SW_TIMER_EXPIRATION_EVENT   0x00000000

Definition at line 7407 of file bnx2.h.

#define BNX2_FW_MAX_ISCSI_CONN   0x001a0080

Definition at line 6251 of file bnx2.h.

#define BNX2_FW_MB   0x00000008

Definition at line 7100 of file bnx2.h.

#define BNX2_FW_MSG_ACK   0x0000ffff

Definition at line 7101 of file bnx2.h.

#define BNX2_FW_MSG_STATUS_FAILURE   0x00ff0000

Definition at line 7104 of file bnx2.h.

#define BNX2_FW_MSG_STATUS_MASK   0x00ff0000

Definition at line 7102 of file bnx2.h.

#define BNX2_FW_MSG_STATUS_OK   0x00000000

Definition at line 7103 of file bnx2.h.

#define BNX2_FW_RX_DROP_COUNT   0x00120084

Definition at line 6128 of file bnx2.h.

#define BNX2_FW_RX_LOW_LATENCY   0x00120058

Definition at line 6127 of file bnx2.h.

#define BNX2_HC_ATTN_BITS_ENABLE   0x0000680c

Definition at line 4895 of file bnx2.h.

#define BNX2_HC_CMD_TICKS   0x00006838

Definition at line 4924 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_1   0x00006a1c

Definition at line 5318 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_1_INT   (0x3ffL<<16)

Definition at line 5320 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_1_VALUE   (0x3ffL<<0)

Definition at line 5319 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_2   0x00006a40

Definition at line 5360 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_2_INT   (0x3ffL<<16)

Definition at line 5362 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_2_VALUE   (0x3ffL<<0)

Definition at line 5361 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_3   0x00006a64

Definition at line 5402 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_3_INT   (0x3ffL<<16)

Definition at line 5404 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_3_VALUE   (0x3ffL<<0)

Definition at line 5403 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_4   0x00006a88

Definition at line 5444 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_4_INT   (0x3ffL<<16)

Definition at line 5446 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_4_VALUE   (0x3ffL<<0)

Definition at line 5445 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_5   0x00006aac

Definition at line 5486 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_5_INT   (0x3ffL<<16)

Definition at line 5488 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_5_VALUE   (0x3ffL<<0)

Definition at line 5487 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_6   0x00006ad0

Definition at line 5528 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_6_INT   (0x3ffL<<16)

Definition at line 5530 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_6_VALUE   (0x3ffL<<0)

Definition at line 5529 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_7   0x00006af4

Definition at line 5570 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_7_INT   (0x3ffL<<16)

Definition at line 5572 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_7_VALUE   (0x3ffL<<0)

Definition at line 5571 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_8   0x00006b18

Definition at line 5612 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_8_INT   (0x3ffL<<16)

Definition at line 5614 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_8_VALUE   (0x3ffL<<0)

Definition at line 5613 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_INT   (0x3ffL<<16)

Definition at line 4926 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_OFF   (BNX2_HC_CMD_TICKS_1 - BNX2_HC_SB_CONFIG_1)

Definition at line 5624 of file bnx2.h.

#define BNX2_HC_CMD_TICKS_VALUE   (0x3ffL<<0)

Definition at line 4925 of file bnx2.h.

#define BNX2_HC_COALESCE_NOW   0x00006914

Definition at line 5276 of file bnx2.h.

#define BNX2_HC_COALESCE_NOW_COAL_NOW   (0x1ffL<<1)

Definition at line 5277 of file bnx2.h.

#define BNX2_HC_COALESCE_NOW_COAL_NOW_WO_INT   (0x1ffL<<11)

Definition at line 5278 of file bnx2.h.

#define BNX2_HC_COALESCE_NOW_COAL_ON_NXT_EVENT   (0x1ffL<<21)

Definition at line 5279 of file bnx2.h.

#define BNX2_HC_COM_TICKS   0x00006834

Definition at line 4920 of file bnx2.h.

#define BNX2_HC_COM_TICKS_1   0x00006a18

Definition at line 5314 of file bnx2.h.

#define BNX2_HC_COM_TICKS_1_INT   (0x3ffL<<16)

Definition at line 5316 of file bnx2.h.

#define BNX2_HC_COM_TICKS_1_VALUE   (0x3ffL<<0)

Definition at line 5315 of file bnx2.h.

#define BNX2_HC_COM_TICKS_2   0x00006a3c

Definition at line 5356 of file bnx2.h.

#define BNX2_HC_COM_TICKS_2_INT   (0x3ffL<<16)

Definition at line 5358 of file bnx2.h.

#define BNX2_HC_COM_TICKS_2_VALUE   (0x3ffL<<0)

Definition at line 5357 of file bnx2.h.

#define BNX2_HC_COM_TICKS_3   0x00006a60

Definition at line 5398 of file bnx2.h.

#define BNX2_HC_COM_TICKS_3_INT   (0x3ffL<<16)

Definition at line 5400 of file bnx2.h.

#define BNX2_HC_COM_TICKS_3_VALUE   (0x3ffL<<0)

Definition at line 5399 of file bnx2.h.

#define BNX2_HC_COM_TICKS_4   0x00006a84

Definition at line 5440 of file bnx2.h.

#define BNX2_HC_COM_TICKS_4_INT   (0x3ffL<<16)

Definition at line 5442 of file bnx2.h.

#define BNX2_HC_COM_TICKS_4_VALUE   (0x3ffL<<0)

Definition at line 5441 of file bnx2.h.

#define BNX2_HC_COM_TICKS_5   0x00006aa8

Definition at line 5482 of file bnx2.h.

#define BNX2_HC_COM_TICKS_5_INT   (0x3ffL<<16)

Definition at line 5484 of file bnx2.h.

#define BNX2_HC_COM_TICKS_5_VALUE   (0x3ffL<<0)

Definition at line 5483 of file bnx2.h.

#define BNX2_HC_COM_TICKS_6   0x00006acc

Definition at line 5524 of file bnx2.h.

#define BNX2_HC_COM_TICKS_6_INT   (0x3ffL<<16)

Definition at line 5526 of file bnx2.h.

#define BNX2_HC_COM_TICKS_6_VALUE   (0x3ffL<<0)

Definition at line 5525 of file bnx2.h.

#define BNX2_HC_COM_TICKS_7   0x00006af0

Definition at line 5566 of file bnx2.h.

#define BNX2_HC_COM_TICKS_7_INT   (0x3ffL<<16)

Definition at line 5568 of file bnx2.h.

#define BNX2_HC_COM_TICKS_7_VALUE   (0x3ffL<<0)

Definition at line 5567 of file bnx2.h.

#define BNX2_HC_COM_TICKS_8   0x00006b14

Definition at line 5608 of file bnx2.h.

#define BNX2_HC_COM_TICKS_8_INT   (0x3ffL<<16)

Definition at line 5610 of file bnx2.h.

#define BNX2_HC_COM_TICKS_8_VALUE   (0x3ffL<<0)

Definition at line 5609 of file bnx2.h.

#define BNX2_HC_COM_TICKS_INT   (0x3ffL<<16)

Definition at line 4922 of file bnx2.h.

#define BNX2_HC_COM_TICKS_OFF   (BNX2_HC_COM_TICKS_1 - BNX2_HC_SB_CONFIG_1)

Definition at line 5623 of file bnx2.h.

#define BNX2_HC_COM_TICKS_VALUE   (0x3ffL<<0)

Definition at line 4921 of file bnx2.h.

#define BNX2_HC_COMMAND   0x00006800

Definition at line 4841 of file bnx2.h.

#define BNX2_HC_COMMAND_CLR_STAT_NOW   (1L<<21)

Definition at line 4852 of file bnx2.h.

#define BNX2_HC_COMMAND_COAL_NOW   (1L<<16)

Definition at line 4844 of file bnx2.h.

#define BNX2_HC_COMMAND_COAL_NOW_WO_INT   (1L<<17)

Definition at line 4845 of file bnx2.h.

#define BNX2_HC_COMMAND_COAL_ON_NEXT_EVENT   (1L<<27)

Definition at line 4854 of file bnx2.h.

#define BNX2_HC_COMMAND_ENABLE   (1L<<0)

Definition at line 4842 of file bnx2.h.

#define BNX2_HC_COMMAND_FORCE_INT   (0x3L<<19)

Definition at line 4847 of file bnx2.h.

#define BNX2_HC_COMMAND_FORCE_INT_FREE   (3L<<19)

Definition at line 4851 of file bnx2.h.

#define BNX2_HC_COMMAND_FORCE_INT_HIGH   (1L<<19)

Definition at line 4849 of file bnx2.h.

#define BNX2_HC_COMMAND_FORCE_INT_LOW   (2L<<19)

Definition at line 4850 of file bnx2.h.

#define BNX2_HC_COMMAND_FORCE_INT_NULL   (0L<<19)

Definition at line 4848 of file bnx2.h.

#define BNX2_HC_COMMAND_MAIN_PWR_INT   (1L<<22)

Definition at line 4853 of file bnx2.h.

#define BNX2_HC_COMMAND_SKIP_ABORT   (1L<<4)

Definition at line 4843 of file bnx2.h.

#define BNX2_HC_COMMAND_STATS_NOW   (1L<<18)

Definition at line 4846 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP   0x00006824

Definition at line 4904 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_1   0x00006a08

Definition at line 5298 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_1_INT   (0xffL<<16)

Definition at line 5300 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_1_VALUE   (0xffL<<0)

Definition at line 5299 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_2   0x00006a2c

Definition at line 5340 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_2_INT   (0xffL<<16)

Definition at line 5342 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_2_VALUE   (0xffL<<0)

Definition at line 5341 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_3   0x00006a50

Definition at line 5382 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_3_INT   (0xffL<<16)

Definition at line 5384 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_3_VALUE   (0xffL<<0)

Definition at line 5383 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_4   0x00006a74

Definition at line 5424 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_4_INT   (0xffL<<16)

Definition at line 5426 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_4_VALUE   (0xffL<<0)

Definition at line 5425 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_5   0x00006a98

Definition at line 5466 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_5_INT   (0xffL<<16)

Definition at line 5468 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_5_VALUE   (0xffL<<0)

Definition at line 5467 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_6   0x00006abc

Definition at line 5508 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_6_INT   (0xffL<<16)

Definition at line 5510 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_6_VALUE   (0xffL<<0)

Definition at line 5509 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_7   0x00006ae0

Definition at line 5550 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_7_INT   (0xffL<<16)

Definition at line 5552 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_7_VALUE   (0xffL<<0)

Definition at line 5551 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_8   0x00006b04

Definition at line 5592 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_8_INT   (0xffL<<16)

Definition at line 5594 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_8_VALUE   (0xffL<<0)

Definition at line 5593 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_INT   (0xffL<<16)

Definition at line 4906 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_OFF
Value:
(BNX2_HC_COMP_PROD_TRIP_1 - \
BNX2_HC_SB_CONFIG_1)

Definition at line 5621 of file bnx2.h.

#define BNX2_HC_COMP_PROD_TRIP_VALUE   (0xffL<<0)

Definition at line 4905 of file bnx2.h.

#define BNX2_HC_CONFIG   0x00006808

Definition at line 4868 of file bnx2.h.

#define BNX2_HC_CONFIG_CMD_TMR_MODE   (1L<<4)

Definition at line 4873 of file bnx2.h.

#define BNX2_HC_CONFIG_COLLECT_STATS   (1L<<0)

Definition at line 4869 of file bnx2.h.

#define BNX2_HC_CONFIG_COM_TMR_MODE   (1L<<3)

Definition at line 4872 of file bnx2.h.

#define BNX2_HC_CONFIG_GEN_STAT_AVG_INTR   (1L<<29)

Definition at line 4891 of file bnx2.h.

#define BNX2_HC_CONFIG_ONE_SHOT   (1L<<17)

Definition at line 4878 of file bnx2.h.

#define BNX2_HC_CONFIG_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 4881 of file bnx2.h.

#define BNX2_HC_CONFIG_PER_MODE   (1L<<16)

Definition at line 4877 of file bnx2.h.

#define BNX2_HC_CONFIG_RX_TMR_MODE   (1L<<1)

Definition at line 4870 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC   (0x7L<<24)

Definition at line 4882 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC_1024B   (4L<<24)

Definition at line 4887 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC_128B   (1L<<24)

Definition at line 4884 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC_2048B   (5L<<24)

Definition at line 4888 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC_256B   (2L<<24)

Definition at line 4885 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC_4096B   (6L<<24)

Definition at line 4889 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC_512B   (3L<<24)

Definition at line 4886 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC_64B   (0L<<24)

Definition at line 4883 of file bnx2.h.

#define BNX2_HC_CONFIG_SB_ADDR_INC_8192B   (7L<<24)

Definition at line 4890 of file bnx2.h.

#define BNX2_HC_CONFIG_SET_MASK_AT_RD   (1L<<19)

Definition at line 4880 of file bnx2.h.

#define BNX2_HC_CONFIG_STAT_MEM_ADDR   (0xffL<<8)

Definition at line 4876 of file bnx2.h.

#define BNX2_HC_CONFIG_STATISTIC_PRIORITY   (1L<<5)

Definition at line 4874 of file bnx2.h.

#define BNX2_HC_CONFIG_STATUS_PRIORITY   (1L<<6)

Definition at line 4875 of file bnx2.h.

#define BNX2_HC_CONFIG_TX_SEL   (1L<<31)

Definition at line 4893 of file bnx2.h.

#define BNX2_HC_CONFIG_TX_TMR_MODE   (1L<<2)

Definition at line 4871 of file bnx2.h.

#define BNX2_HC_CONFIG_UNMASK_ALL   (1L<<30)

Definition at line 4892 of file bnx2.h.

#define BNX2_HC_CONFIG_USE_INT_PARAM   (1L<<18)

Definition at line 4879 of file bnx2.h.

#define BNX2_HC_DEBUG_VECT_PEEK   0x00006910

Definition at line 5268 of file bnx2.h.

#define BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 5270 of file bnx2.h.

#define BNX2_HC_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 5271 of file bnx2.h.

#define BNX2_HC_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 5269 of file bnx2.h.

#define BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 5273 of file bnx2.h.

#define BNX2_HC_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 5274 of file bnx2.h.

#define BNX2_HC_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 5272 of file bnx2.h.

#define BNX2_HC_MSIX_BIT_VECTOR   0x00006918

Definition at line 5281 of file bnx2.h.

#define BNX2_HC_MSIX_BIT_VECTOR_VAL   (0x1ffL<<0)

Definition at line 5282 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS   0x0000683c

Definition at line 4928 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_1   0x00006a20

Definition at line 5322 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_1_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 5324 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_1_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 5323 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_2   0x00006a44

Definition at line 5364 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_2_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 5366 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_2_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 5365 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_3   0x00006a68

Definition at line 5406 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_3_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 5408 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_3_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 5407 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_4   0x00006a8c

Definition at line 5448 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_4_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 5450 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_4_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 5449 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_5   0x00006ab0

Definition at line 5490 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_5_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 5492 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_5_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 5491 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_6   0x00006ad4

Definition at line 5532 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_6_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 5534 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_6_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 5533 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_7   0x00006af8

Definition at line 5574 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_7_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 5576 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_7_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 5575 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_8   0x00006b1c

Definition at line 5616 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_8_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 5618 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_8_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 5617 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_HC_INT_PERIODIC_TICKS   (0xffffL<<16)

Definition at line 4930 of file bnx2.h.

#define BNX2_HC_PERIODIC_TICKS_HC_PERIODIC_TICKS   (0xffffL<<0)

Definition at line 4929 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP   0x00006828

Definition at line 4908 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_1   0x00006a0c

Definition at line 5302 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_1_INT   (0xffL<<16)

Definition at line 5304 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_1_VALUE   (0xffL<<0)

Definition at line 5303 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_2   0x00006a30

Definition at line 5344 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_2_INT   (0xffL<<16)

Definition at line 5346 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_2_VALUE   (0xffL<<0)

Definition at line 5345 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_3   0x00006a54

Definition at line 5386 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_3_INT   (0xffL<<16)

Definition at line 5388 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_3_VALUE   (0xffL<<0)

Definition at line 5387 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_4   0x00006a78

Definition at line 5428 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_4_INT   (0xffL<<16)

Definition at line 5430 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_4_VALUE   (0xffL<<0)

Definition at line 5429 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_5   0x00006a9c

Definition at line 5470 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_5_INT   (0xffL<<16)

Definition at line 5472 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_5_VALUE   (0xffL<<0)

Definition at line 5471 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_6   0x00006ac0

Definition at line 5512 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_6_INT   (0xffL<<16)

Definition at line 5514 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_6_VALUE   (0xffL<<0)

Definition at line 5513 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_7   0x00006ae4

Definition at line 5554 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_7_INT   (0xffL<<16)

Definition at line 5556 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_7_VALUE   (0xffL<<0)

Definition at line 5555 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_8   0x00006b08

Definition at line 5596 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_8_INT   (0xffL<<16)

Definition at line 5598 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_8_VALUE   (0xffL<<0)

Definition at line 5597 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_INT   (0xffL<<16)

Definition at line 4910 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_OFF
Value:
(BNX2_HC_RX_QUICK_CONS_TRIP_1 - \
BNX2_HC_SB_CONFIG_1)

Definition at line 5628 of file bnx2.h.

#define BNX2_HC_RX_QUICK_CONS_TRIP_VALUE   (0xffL<<0)

Definition at line 4909 of file bnx2.h.

#define BNX2_HC_RX_TICKS   0x0000682c

Definition at line 4912 of file bnx2.h.

#define BNX2_HC_RX_TICKS_1   0x00006a10

Definition at line 5306 of file bnx2.h.

#define BNX2_HC_RX_TICKS_1_INT   (0x3ffL<<16)

Definition at line 5308 of file bnx2.h.

#define BNX2_HC_RX_TICKS_1_VALUE   (0x3ffL<<0)

Definition at line 5307 of file bnx2.h.

#define BNX2_HC_RX_TICKS_2   0x00006a34

Definition at line 5348 of file bnx2.h.

#define BNX2_HC_RX_TICKS_2_INT   (0x3ffL<<16)

Definition at line 5350 of file bnx2.h.

#define BNX2_HC_RX_TICKS_2_VALUE   (0x3ffL<<0)

Definition at line 5349 of file bnx2.h.

#define BNX2_HC_RX_TICKS_3   0x00006a58

Definition at line 5390 of file bnx2.h.

#define BNX2_HC_RX_TICKS_3_INT   (0x3ffL<<16)

Definition at line 5392 of file bnx2.h.

#define BNX2_HC_RX_TICKS_3_VALUE   (0x3ffL<<0)

Definition at line 5391 of file bnx2.h.

#define BNX2_HC_RX_TICKS_4   0x00006a7c

Definition at line 5432 of file bnx2.h.

#define BNX2_HC_RX_TICKS_4_INT   (0x3ffL<<16)

Definition at line 5434 of file bnx2.h.

#define BNX2_HC_RX_TICKS_4_VALUE   (0x3ffL<<0)

Definition at line 5433 of file bnx2.h.

#define BNX2_HC_RX_TICKS_5   0x00006aa0

Definition at line 5474 of file bnx2.h.

#define BNX2_HC_RX_TICKS_5_INT   (0x3ffL<<16)

Definition at line 5476 of file bnx2.h.

#define BNX2_HC_RX_TICKS_5_VALUE   (0x3ffL<<0)

Definition at line 5475 of file bnx2.h.

#define BNX2_HC_RX_TICKS_6   0x00006ac4

Definition at line 5516 of file bnx2.h.

#define BNX2_HC_RX_TICKS_6_INT   (0x3ffL<<16)

Definition at line 5518 of file bnx2.h.

#define BNX2_HC_RX_TICKS_6_VALUE   (0x3ffL<<0)

Definition at line 5517 of file bnx2.h.

#define BNX2_HC_RX_TICKS_7   0x00006ae8

Definition at line 5558 of file bnx2.h.

#define BNX2_HC_RX_TICKS_7_INT   (0x3ffL<<16)

Definition at line 5560 of file bnx2.h.

#define BNX2_HC_RX_TICKS_7_VALUE   (0x3ffL<<0)

Definition at line 5559 of file bnx2.h.

#define BNX2_HC_RX_TICKS_8   0x00006b0c

Definition at line 5600 of file bnx2.h.

#define BNX2_HC_RX_TICKS_8_INT   (0x3ffL<<16)

Definition at line 5602 of file bnx2.h.

#define BNX2_HC_RX_TICKS_8_VALUE   (0x3ffL<<0)

Definition at line 5601 of file bnx2.h.

#define BNX2_HC_RX_TICKS_INT   (0x3ffL<<16)

Definition at line 4914 of file bnx2.h.

#define BNX2_HC_RX_TICKS_OFF   (BNX2_HC_RX_TICKS_1 - BNX2_HC_SB_CONFIG_1)

Definition at line 5630 of file bnx2.h.

#define BNX2_HC_RX_TICKS_VALUE   (0x3ffL<<0)

Definition at line 4913 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1   0x00006a00

Definition at line 5284 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1_CMD_TMR_MODE   (1L<<4)

Definition at line 5288 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1_COM_TMR_MODE   (1L<<3)

Definition at line 5287 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1_ONE_SHOT   (1L<<17)

Definition at line 5290 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 5292 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1_PER_MODE   (1L<<16)

Definition at line 5289 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1_RX_TMR_MODE   (1L<<1)

Definition at line 5285 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1_TX_TMR_MODE   (1L<<2)

Definition at line 5286 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_1_USE_INT_PARAM   (1L<<18)

Definition at line 5291 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2   0x00006a24

Definition at line 5326 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2_CMD_TMR_MODE   (1L<<4)

Definition at line 5330 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2_COM_TMR_MODE   (1L<<3)

Definition at line 5329 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2_ONE_SHOT   (1L<<17)

Definition at line 5332 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 5334 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2_PER_MODE   (1L<<16)

Definition at line 5331 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2_RX_TMR_MODE   (1L<<1)

Definition at line 5327 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2_TX_TMR_MODE   (1L<<2)

Definition at line 5328 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_2_USE_INT_PARAM   (1L<<18)

Definition at line 5333 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3   0x00006a48

Definition at line 5368 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3_CMD_TMR_MODE   (1L<<4)

Definition at line 5372 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3_COM_TMR_MODE   (1L<<3)

Definition at line 5371 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3_ONE_SHOT   (1L<<17)

Definition at line 5374 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 5376 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3_PER_MODE   (1L<<16)

Definition at line 5373 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3_RX_TMR_MODE   (1L<<1)

Definition at line 5369 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3_TX_TMR_MODE   (1L<<2)

Definition at line 5370 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_3_USE_INT_PARAM   (1L<<18)

Definition at line 5375 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4   0x00006a6c

Definition at line 5410 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4_CMD_TMR_MODE   (1L<<4)

Definition at line 5414 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4_COM_TMR_MODE   (1L<<3)

Definition at line 5413 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4_ONE_SHOT   (1L<<17)

Definition at line 5416 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 5418 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4_PER_MODE   (1L<<16)

Definition at line 5415 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4_RX_TMR_MODE   (1L<<1)

Definition at line 5411 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4_TX_TMR_MODE   (1L<<2)

Definition at line 5412 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_4_USE_INT_PARAM   (1L<<18)

Definition at line 5417 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5   0x00006a90

Definition at line 5452 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5_CMD_TMR_MODE   (1L<<4)

Definition at line 5456 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5_COM_TMR_MODE   (1L<<3)

Definition at line 5455 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5_ONE_SHOT   (1L<<17)

Definition at line 5458 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 5460 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5_PER_MODE   (1L<<16)

Definition at line 5457 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5_RX_TMR_MODE   (1L<<1)

Definition at line 5453 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5_TX_TMR_MODE   (1L<<2)

Definition at line 5454 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_5_USE_INT_PARAM   (1L<<18)

Definition at line 5459 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6   0x00006ab4

Definition at line 5494 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6_CMD_TMR_MODE   (1L<<4)

Definition at line 5498 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6_COM_TMR_MODE   (1L<<3)

Definition at line 5497 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6_ONE_SHOT   (1L<<17)

Definition at line 5500 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 5502 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6_PER_MODE   (1L<<16)

Definition at line 5499 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6_RX_TMR_MODE   (1L<<1)

Definition at line 5495 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6_TX_TMR_MODE   (1L<<2)

Definition at line 5496 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_6_USE_INT_PARAM   (1L<<18)

Definition at line 5501 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7   0x00006ad8

Definition at line 5536 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7_CMD_TMR_MODE   (1L<<4)

Definition at line 5540 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7_COM_TMR_MODE   (1L<<3)

Definition at line 5539 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7_ONE_SHOT   (1L<<17)

Definition at line 5542 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 5544 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7_PER_MODE   (1L<<16)

Definition at line 5541 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7_RX_TMR_MODE   (1L<<1)

Definition at line 5537 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7_TX_TMR_MODE   (1L<<2)

Definition at line 5538 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_7_USE_INT_PARAM   (1L<<18)

Definition at line 5543 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8   0x00006afc

Definition at line 5578 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8_CMD_TMR_MODE   (1L<<4)

Definition at line 5582 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8_COM_TMR_MODE   (1L<<3)

Definition at line 5581 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8_ONE_SHOT   (1L<<17)

Definition at line 5584 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8_PER_COLLECT_LIMIT   (0xfL<<20)

Definition at line 5586 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8_PER_MODE   (1L<<16)

Definition at line 5583 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8_RX_TMR_MODE   (1L<<1)

Definition at line 5579 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8_TX_TMR_MODE   (1L<<2)

Definition at line 5580 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_8_USE_INT_PARAM   (1L<<18)

Definition at line 5585 of file bnx2.h.

#define BNX2_HC_SB_CONFIG_SIZE   (BNX2_HC_SB_CONFIG_2 - BNX2_HC_SB_CONFIG_1)

Definition at line 5620 of file bnx2.h.

#define BNX2_HC_STAT_COLLECT_TICKS   0x00006840

Definition at line 4932 of file bnx2.h.

#define BNX2_HC_STAT_COLLECT_TICKS_HC_STAT_COLL_TICKS   (0xffL<<4)

Definition at line 4933 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0   0x00006850

Definition at line 4943 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0   (0x7fL<<0)

Definition at line 4944 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT0   (20L<<0)

Definition at line 4965 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT1   (21L<<0)

Definition at line 4966 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT10   (30L<<0)

Definition at line 4975 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT11   (31L<<0)

Definition at line 4976 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT2   (22L<<0)

Definition at line 4967 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT3   (23L<<0)

Definition at line 4968 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT4   (24L<<0)

Definition at line 4969 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT5   (25L<<0)

Definition at line 4970 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT6   (26L<<0)

Definition at line 4971 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT7   (27L<<0)

Definition at line 4972 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT8   (28L<<0)

Definition at line 4973 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT9   (29L<<0)

Definition at line 4974 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMQ_VALID_CNT   (83L<<0)

Definition at line 5026 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMTQ_VALID_CNT   (82L<<0)

Definition at line 5025 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMXQ_VALID_CNT   (81L<<0)

Definition at line 5024 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CORE_CLK_CNT   (53L<<0)

Definition at line 4998 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT0   (36L<<0)

Definition at line 4981 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT1   (37L<<0)

Definition at line 4982 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT2   (38L<<0)

Definition at line 4983 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT3   (39L<<0)

Definition at line 4984 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT4   (40L<<0)

Definition at line 4985 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT5   (41L<<0)

Definition at line 4986 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT6   (42L<<0)

Definition at line 4987 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT7   (43L<<0)

Definition at line 4988 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CPQ_VALID_CNT   (80L<<0)

Definition at line 5023 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_CMD_CNT   (64L<<0)

Definition at line 5007 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_SLOT_CNT   (65L<<0)

Definition at line 5008 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSQ_VALID_CNT   (79L<<0)

Definition at line 5022 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_ACC_STALL_CLKS   (97L<<0)

Definition at line 5040 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_BLK_RD_CNT_XI   (123L<<0)

Definition at line 5084 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_BLK_WR_CNT_XI   (124L<<0)

Definition at line 5085 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_HITS_XI   (125L<<0)

Definition at line 5086 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_LOCK_STALL_CLKS   (98L<<0)

Definition at line 5041 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_MISSES_XI   (126L<<0)

Definition at line 5087 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_RD_CNT64   (96L<<0)

Definition at line 5039 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_WR_CNT64   (95L<<0)

Definition at line 5038 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_DELAY_PCI_CLKS_CNT   (88L<<0)

Definition at line 5031 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_RETRY_AFTER_DATA_CNT   (89L<<0)

Definition at line 5032 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_TRANSFERS_CNT   (87L<<0)

Definition at line 5030 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_DELAY_PCI_CLKS_CNT   (93L<<0)

Definition at line 5036 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_RETRY_AFTER_DATA_CNT   (94L<<0)

Definition at line 5037 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_TRANSFERS_CNT   (92L<<0)

Definition at line 5035 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_DELAY_PCI_CLKS_CNT   (86L<<0)

Definition at line 5029 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_TRANSFERS_CNT   (85L<<0)

Definition at line 5028 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_DELAY_PCI_CLKS_CNT   (91L<<0)

Definition at line 5034 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_TRANSFERS_CNT   (90L<<0)

Definition at line 5033 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK   (61L<<0)

Definition at line 5004 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC1_XI   (133L<<0)

Definition at line 5093 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC2_XI   (139L<<0)

Definition at line 5099 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC3_XI   (145L<<0)

Definition at line 5105 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC4_XI   (151L<<0)

Definition at line 5111 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC5_XI   (157L<<0)

Definition at line 5117 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC6_XI   (163L<<0)

Definition at line 5123 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC7_XI   (169L<<0)

Definition at line 5129 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK_VEC8_XI   (175L<<0)

Definition at line 5135 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK   (59L<<0)

Definition at line 5002 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC1_XI   (131L<<0)

Definition at line 5091 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC2_XI   (137L<<0)

Definition at line 5097 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC3_XI   (143L<<0)

Definition at line 5103 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC4_XI   (149L<<0)

Definition at line 5109 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC5_XI   (155L<<0)

Definition at line 5115 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC6_XI   (161L<<0)

Definition at line 5121 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC7_XI   (167L<<0)

Definition at line 5127 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK_VEC8_XI   (173L<<0)

Definition at line 5133 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK   (60L<<0)

Definition at line 5003 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC1_XI   (132L<<0)

Definition at line 5092 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC2_XI   (138L<<0)

Definition at line 5098 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC3_XI   (144L<<0)

Definition at line 5104 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC4_XI   (150L<<0)

Definition at line 5110 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC5_XI   (156L<<0)

Definition at line 5116 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC6_XI   (162L<<0)

Definition at line 5122 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC7_XI   (168L<<0)

Definition at line 5128 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK_VEC8_XI   (174L<<0)

Definition at line 5134 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN   (55L<<0)

Definition at line 5000 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC1_XI   (129L<<0)

Definition at line 5089 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC2_XI   (135L<<0)

Definition at line 5095 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC3_XI   (141L<<0)

Definition at line 5101 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC4_XI   (147L<<0)

Definition at line 5107 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC5_XI   (153L<<0)

Definition at line 5113 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC6_XI   (159L<<0)

Definition at line 5119 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC7_XI   (165L<<0)

Definition at line 5125 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN_VEC8_XI   (171L<<0)

Definition at line 5131 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR   (56L<<0)

Definition at line 5001 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC1_XI   (130L<<0)

Definition at line 5090 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC2_XI   (136L<<0)

Definition at line 5096 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC3_XI   (142L<<0)

Definition at line 5102 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC4_XI   (148L<<0)

Definition at line 5108 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC5_XI   (154L<<0)

Definition at line 5114 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC6_XI   (160L<<0)

Definition at line 5120 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC7_XI   (166L<<0)

Definition at line 5126 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR_VEC8_XI   (172L<<0)

Definition at line 5132 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS   (54L<<0)

Definition at line 4999 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC1_XI   (128L<<0)

Definition at line 5088 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC2_XI   (134L<<0)

Definition at line 5094 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC3_XI   (140L<<0)

Definition at line 5100 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC4_XI   (146L<<0)

Definition at line 5106 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC5_XI   (152L<<0)

Definition at line 5112 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC6_XI   (158L<<0)

Definition at line 5118 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC7_XI   (164L<<0)

Definition at line 5124 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS_VEC8_XI   (170L<<0)

Definition at line 5130 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS64_STAT   (100L<<0)

Definition at line 5043 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS_STAT   (99L<<0)

Definition at line 5042 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_PCI_STALL_STAT   (101L<<0)

Definition at line 5044 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT0   (44L<<0)

Definition at line 4989 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT1   (45L<<0)

Definition at line 4990 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT2   (46L<<0)

Definition at line 4991 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT3   (47L<<0)

Definition at line 4992 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT4   (48L<<0)

Definition at line 4993 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT5   (49L<<0)

Definition at line 4994 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT6   (50L<<0)

Definition at line 4995 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT7   (51L<<0)

Definition at line 4996 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MGMQ_VALID_CNT   (84L<<0)

Definition at line 5027 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MQ_IDB_OFLOW_XI   (94L<<0)

Definition at line 5083 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_PCI_CLK_CNT   (52L<<0)

Definition at line 4997 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_BURST_CNT   (127L<<0)

Definition at line 5066 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC1_MISS   (121L<<0)

Definition at line 5064 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC2_MISS   (122L<<0)

Definition at line 5065 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_BURST_CNT   (107L<<0)

Definition at line 5050 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_FTQ_ENTRY_CNT   (106L<<0)

Definition at line 5049 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMAQ_VALID_CNT   (72L<<0)

Definition at line 5015 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUP_MATCH_CNT   (108L<<0)

Definition at line 5051 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUPQ_VALID_CNT   (66L<<0)

Definition at line 5009 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT0   (115L<<0)

Definition at line 5058 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT1   (116L<<0)

Definition at line 5059 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT2   (117L<<0)

Definition at line 5060 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT3   (118L<<0)

Definition at line 5061 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT4   (119L<<0)

Definition at line 5062 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT5   (120L<<0)

Definition at line 5063 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PCS_CMD_CNT_XI   (176L<<0)

Definition at line 5136 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PCS_SLOT_CNT_XI   (177L<<0)

Definition at line 5137 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PCSQ_VALID_CNT_XI   (178L<<0)

Definition at line 5138 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PMQ_VALID_CNT   (70L<<0)

Definition at line 5013 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PPQ_VALID_CNT   (69L<<0)

Definition at line 5012 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PTQ_VALID_CNT   (71L<<0)

Definition at line 5014 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT0   (0L<<0)

Definition at line 4945 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT1   (1L<<0)

Definition at line 4946 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT10   (10L<<0)

Definition at line 4955 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT11   (11L<<0)

Definition at line 4956 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT2   (2L<<0)

Definition at line 4947 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT3   (3L<<0)

Definition at line 4948 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT4   (4L<<0)

Definition at line 4949 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT5   (5L<<0)

Definition at line 4950 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT6   (6L<<0)

Definition at line 4951 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT7   (7L<<0)

Definition at line 4952 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT8   (8L<<0)

Definition at line 4953 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT9   (9L<<0)

Definition at line 4954 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPCQ_VALID_CNT   (68L<<0)

Definition at line 5011 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPQ_VALID_CNT   (67L<<0)

Definition at line 5010 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TASQ_VALID_CNT   (78L<<0)

Definition at line 5021 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_BURST_CNT   (103L<<0)

Definition at line 5046 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_FTQ_ENTRY_CNT   (102L<<0)

Definition at line 5045 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDRQ_VALID_CNT   (74L<<0)

Definition at line 5017 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_BURST_CNT   (105L<<0)

Definition at line 5048 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_FTQ_ENTRY_CNT   (104L<<0)

Definition at line 5047 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMAQ_VALID_CNT   (76L<<0)

Definition at line 5019 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_POLL_PASS_CNT   (109L<<0)

Definition at line 5052 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR1_CNT   (110L<<0)

Definition at line 5053 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR2_CNT   (111L<<0)

Definition at line 5054 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR3_CNT   (112L<<0)

Definition at line 5055 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR4_CNT   (113L<<0)

Definition at line 5056 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR5_CNT   (114L<<0)

Definition at line 5057 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT0   (32L<<0)

Definition at line 4977 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT1   (33L<<0)

Definition at line 4978 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT2   (34L<<0)

Definition at line 4979 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT3   (35L<<0)

Definition at line 4980 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPATQ_VALID_CNT   (77L<<0)

Definition at line 5020 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_CMD_CNT   (62L<<0)

Definition at line 5005 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_SLOT_CNT   (63L<<0)

Definition at line 5006 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCHQ_VALID_CNT   (73L<<0)

Definition at line 5016 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT0   (12L<<0)

Definition at line 4957 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT1   (13L<<0)

Definition at line 4958 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT2   (14L<<0)

Definition at line 4959 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT3   (15L<<0)

Definition at line 4960 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT4   (16L<<0)

Definition at line 4961 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT5   (17L<<0)

Definition at line 4962 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT6   (18L<<0)

Definition at line 4963 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT7   (19L<<0)

Definition at line 4964 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXPQ_VALID_CNT   (75L<<0)

Definition at line 5018 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UMP_RX_FRAME_DROP_XI   (52L<<0)

Definition at line 5071 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S0_XI   (57L<<0)

Definition at line 5072 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S10_XI   (93L<<0)

Definition at line 5082 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S1_XI   (58L<<0)

Definition at line 5073 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S2_XI   (85L<<0)

Definition at line 5074 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S3_XI   (86L<<0)

Definition at line 5075 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S4_XI   (87L<<0)

Definition at line 5076 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S5_XI   (88L<<0)

Definition at line 5077 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S6_XI   (89L<<0)

Definition at line 5078 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S7_XI   (90L<<0)

Definition at line 5079 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S8_XI   (91L<<0)

Definition at line 5080 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_UNUSED_S9_XI   (92L<<0)

Definition at line 5081 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_XI   (0xffL<<0)

Definition at line 5070 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_1   (0x7fL<<8)

Definition at line 5067 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_1_XI   (0xffL<<8)

Definition at line 5139 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_2   (0x7fL<<16)

Definition at line 5068 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_2_XI   (0xffL<<16)

Definition at line 5140 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_3   (0x7fL<<24)

Definition at line 5069 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_3_XI   (0xffL<<24)

Definition at line 5141 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1   0x00006854

Definition at line 5143 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_4   (0x7fL<<0)

Definition at line 5144 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_4_XI   (0xffL<<0)

Definition at line 5148 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_5   (0x7fL<<8)

Definition at line 5145 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_5_XI   (0xffL<<8)

Definition at line 5149 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_6   (0x7fL<<16)

Definition at line 5146 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_6_XI   (0xffL<<16)

Definition at line 5150 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_7   (0x7fL<<24)

Definition at line 5147 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_7_XI   (0xffL<<24)

Definition at line 5151 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2   0x00006858

Definition at line 5153 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_10   (0x7fL<<16)

Definition at line 5156 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_10_XI   (0xffL<<16)

Definition at line 5160 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_11   (0x7fL<<24)

Definition at line 5157 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_11_XI   (0xffL<<24)

Definition at line 5161 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_8   (0x7fL<<0)

Definition at line 5154 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_8_XI   (0xffL<<0)

Definition at line 5158 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_9   (0x7fL<<8)

Definition at line 5155 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_9_XI   (0xffL<<8)

Definition at line 5159 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3   0x0000685c

Definition at line 5163 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_12   (0x7fL<<0)

Definition at line 5164 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_12_XI   (0xffL<<0)

Definition at line 5168 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_13   (0x7fL<<8)

Definition at line 5165 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_13_XI   (0xffL<<8)

Definition at line 5169 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_14   (0x7fL<<16)

Definition at line 5166 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_14_XI   (0xffL<<16)

Definition at line 5170 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_15   (0x7fL<<24)

Definition at line 5167 of file bnx2.h.

#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_15_XI   (0xffL<<24)

Definition at line 5171 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT0   0x00006888

Definition at line 5173 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT1   0x0000688c

Definition at line 5174 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT10   0x000068b0

Definition at line 5183 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT11   0x000068b4

Definition at line 5184 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT12   0x000068b8

Definition at line 5185 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT13   0x000068bc

Definition at line 5186 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT14   0x000068c0

Definition at line 5187 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT15   0x000068c4

Definition at line 5188 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT2   0x00006890

Definition at line 5175 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT3   0x00006894

Definition at line 5176 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT4   0x00006898

Definition at line 5177 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT5   0x0000689c

Definition at line 5178 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT6   0x000068a0

Definition at line 5179 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT7   0x000068a4

Definition at line 5180 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT8   0x000068a8

Definition at line 5181 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT9   0x000068ac

Definition at line 5182 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC   0x000068c8

Definition at line 5205 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC0   0x000068c8

Definition at line 5189 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC1   0x000068cc

Definition at line 5190 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC10   0x000068f0

Definition at line 5199 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC11   0x000068f4

Definition at line 5200 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC12   0x000068f8

Definition at line 5201 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC13   0x000068fc

Definition at line 5202 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC14   0x00006900

Definition at line 5203 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC15   0x00006904

Definition at line 5204 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC2   0x000068d0

Definition at line 5191 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC3   0x000068d4

Definition at line 5192 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC4   0x000068d8

Definition at line 5193 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC5   0x000068dc

Definition at line 5194 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC6   0x000068e0

Definition at line 5195 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC7   0x000068e4

Definition at line 5196 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC8   0x000068e8

Definition at line 5197 of file bnx2.h.

#define BNX2_HC_STAT_GEN_STAT_AC9   0x000068ec

Definition at line 5198 of file bnx2.h.

#define BNX2_HC_STAT_MEM_DATA   0x0000684c

Definition at line 4942 of file bnx2.h.

#define BNX2_HC_STATISTICS_ADDR_H   0x0000681c

Definition at line 4899 of file bnx2.h.

#define BNX2_HC_STATISTICS_ADDR_L   0x00006818

Definition at line 4898 of file bnx2.h.

#define BNX2_HC_STATS_INTERRUPT_STATUS   0x00006848

Definition at line 4938 of file bnx2.h.

#define BNX2_HC_STATS_INTERRUPT_STATUS_INT_STATUS   (0x1ffL<<16)

Definition at line 4940 of file bnx2.h.

#define BNX2_HC_STATS_INTERRUPT_STATUS_SB_STATUS   (0x1ffL<<0)

Definition at line 4939 of file bnx2.h.

#define BNX2_HC_STATS_TICKS   0x00006844

Definition at line 4935 of file bnx2.h.

#define BNX2_HC_STATS_TICKS_HC_STAT_TICKS   (0xffffL<<8)

Definition at line 4936 of file bnx2.h.

#define BNX2_HC_STATUS   0x00006804

Definition at line 4856 of file bnx2.h.

#define BNX2_HC_STATUS_ADDR_H   0x00006814

Definition at line 4897 of file bnx2.h.

#define BNX2_HC_STATUS_ADDR_L   0x00006810

Definition at line 4896 of file bnx2.h.

#define BNX2_HC_STATUS_CORE_CLK_CNT_STAT   (1L<<17)

Definition at line 4860 of file bnx2.h.

#define BNX2_HC_STATUS_CORE_CLKS_DURING_SW_INTACK_STAT   (1L<<25)

Definition at line 4866 of file bnx2.h.

#define BNX2_HC_STATUS_CORE_CLKS_TO_HW_INTACK_STAT   (1L<<23)

Definition at line 4864 of file bnx2.h.

#define BNX2_HC_STATUS_CORE_CLKS_TO_SW_INTACK_STAT   (1L<<24)

Definition at line 4865 of file bnx2.h.

#define BNX2_HC_STATUS_MASTER_ABORT   (1L<<0)

Definition at line 4857 of file bnx2.h.

#define BNX2_HC_STATUS_NUM_INT_GEN_STAT   (1L<<19)

Definition at line 4862 of file bnx2.h.

#define BNX2_HC_STATUS_NUM_INT_MBOX_WR_STAT   (1L<<20)

Definition at line 4863 of file bnx2.h.

#define BNX2_HC_STATUS_NUM_STATUS_BLOCKS_STAT   (1L<<18)

Definition at line 4861 of file bnx2.h.

#define BNX2_HC_STATUS_PARITY_ERROR_STATE   (1L<<1)

Definition at line 4858 of file bnx2.h.

#define BNX2_HC_STATUS_PCI_CLK_CNT_STAT   (1L<<16)

Definition at line 4859 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP   0x00006820

Definition at line 4900 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_1   0x00006a04

Definition at line 5294 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_1_INT   (0xffL<<16)

Definition at line 5296 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_1_VALUE   (0xffL<<0)

Definition at line 5295 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_2   0x00006a28

Definition at line 5336 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_2_INT   (0xffL<<16)

Definition at line 5338 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_2_VALUE   (0xffL<<0)

Definition at line 5337 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_3   0x00006a4c

Definition at line 5378 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_3_INT   (0xffL<<16)

Definition at line 5380 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_3_VALUE   (0xffL<<0)

Definition at line 5379 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_4   0x00006a70

Definition at line 5420 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_4_INT   (0xffL<<16)

Definition at line 5422 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_4_VALUE   (0xffL<<0)

Definition at line 5421 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_5   0x00006a94

Definition at line 5462 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_5_INT   (0xffL<<16)

Definition at line 5464 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_5_VALUE   (0xffL<<0)

Definition at line 5463 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_6   0x00006ab8

Definition at line 5504 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_6_INT   (0xffL<<16)

Definition at line 5506 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_6_VALUE   (0xffL<<0)

Definition at line 5505 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_7   0x00006adc

Definition at line 5546 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_7_INT   (0xffL<<16)

Definition at line 5548 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_7_VALUE   (0xffL<<0)

Definition at line 5547 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_8   0x00006b00

Definition at line 5588 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_8_INT   (0xffL<<16)

Definition at line 5590 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_8_VALUE   (0xffL<<0)

Definition at line 5589 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_INT   (0xffL<<16)

Definition at line 4902 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_OFF
Value:
(BNX2_HC_TX_QUICK_CONS_TRIP_1 - \
BNX2_HC_SB_CONFIG_1)

Definition at line 5625 of file bnx2.h.

#define BNX2_HC_TX_QUICK_CONS_TRIP_VALUE   (0xffL<<0)

Definition at line 4901 of file bnx2.h.

#define BNX2_HC_TX_TICKS   0x00006830

Definition at line 4916 of file bnx2.h.

#define BNX2_HC_TX_TICKS_1   0x00006a14

Definition at line 5310 of file bnx2.h.

#define BNX2_HC_TX_TICKS_1_INT   (0x3ffL<<16)

Definition at line 5312 of file bnx2.h.

#define BNX2_HC_TX_TICKS_1_VALUE   (0x3ffL<<0)

Definition at line 5311 of file bnx2.h.

#define BNX2_HC_TX_TICKS_2   0x00006a38

Definition at line 5352 of file bnx2.h.

#define BNX2_HC_TX_TICKS_2_INT   (0x3ffL<<16)

Definition at line 5354 of file bnx2.h.

#define BNX2_HC_TX_TICKS_2_VALUE   (0x3ffL<<0)

Definition at line 5353 of file bnx2.h.

#define BNX2_HC_TX_TICKS_3   0x00006a5c

Definition at line 5394 of file bnx2.h.

#define BNX2_HC_TX_TICKS_3_INT   (0x3ffL<<16)

Definition at line 5396 of file bnx2.h.

#define BNX2_HC_TX_TICKS_3_VALUE   (0x3ffL<<0)

Definition at line 5395 of file bnx2.h.

#define BNX2_HC_TX_TICKS_4   0x00006a80

Definition at line 5436 of file bnx2.h.

#define BNX2_HC_TX_TICKS_4_INT   (0x3ffL<<16)

Definition at line 5438 of file bnx2.h.

#define BNX2_HC_TX_TICKS_4_VALUE   (0x3ffL<<0)

Definition at line 5437 of file bnx2.h.

#define BNX2_HC_TX_TICKS_5   0x00006aa4

Definition at line 5478 of file bnx2.h.

#define BNX2_HC_TX_TICKS_5_INT   (0x3ffL<<16)

Definition at line 5480 of file bnx2.h.

#define BNX2_HC_TX_TICKS_5_VALUE   (0x3ffL<<0)

Definition at line 5479 of file bnx2.h.

#define BNX2_HC_TX_TICKS_6   0x00006ac8

Definition at line 5520 of file bnx2.h.

#define BNX2_HC_TX_TICKS_6_INT   (0x3ffL<<16)

Definition at line 5522 of file bnx2.h.

#define BNX2_HC_TX_TICKS_6_VALUE   (0x3ffL<<0)

Definition at line 5521 of file bnx2.h.

#define BNX2_HC_TX_TICKS_7   0x00006aec

Definition at line 5562 of file bnx2.h.

#define BNX2_HC_TX_TICKS_7_INT   (0x3ffL<<16)

Definition at line 5564 of file bnx2.h.

#define BNX2_HC_TX_TICKS_7_VALUE   (0x3ffL<<0)

Definition at line 5563 of file bnx2.h.

#define BNX2_HC_TX_TICKS_8   0x00006b10

Definition at line 5604 of file bnx2.h.

#define BNX2_HC_TX_TICKS_8_INT   (0x3ffL<<16)

Definition at line 5606 of file bnx2.h.

#define BNX2_HC_TX_TICKS_8_VALUE   (0x3ffL<<0)

Definition at line 5605 of file bnx2.h.

#define BNX2_HC_TX_TICKS_INT   (0x3ffL<<16)

Definition at line 4918 of file bnx2.h.

#define BNX2_HC_TX_TICKS_OFF   (BNX2_HC_TX_TICKS_1 - BNX2_HC_SB_CONFIG_1)

Definition at line 5627 of file bnx2.h.

#define BNX2_HC_TX_TICKS_VALUE   (0x3ffL<<0)

Definition at line 4917 of file bnx2.h.

#define BNX2_HC_VIS   0x00006908

Definition at line 5206 of file bnx2.h.

#define BNX2_HC_VIS_1   0x0000690c

Definition at line 5237 of file bnx2.h.

#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE   (1L<<6)

Definition at line 5244 of file bnx2.h.

#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE_COUNT   (1L<<6)

Definition at line 5246 of file bnx2.h.

#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE_IDLE   (0L<<6)

Definition at line 5245 of file bnx2.h.

#define BNX2_HC_VIS_1_HW_INTACK_STATE   (1L<<4)

Definition at line 5238 of file bnx2.h.

#define BNX2_HC_VIS_1_HW_INTACK_STATE_COUNT   (1L<<4)

Definition at line 5240 of file bnx2.h.

#define BNX2_HC_VIS_1_HW_INTACK_STATE_IDLE   (0L<<4)

Definition at line 5239 of file bnx2.h.

#define BNX2_HC_VIS_1_INT_B   (1L<<27)

Definition at line 5266 of file bnx2.h.

#define BNX2_HC_VIS_1_INT_GEN_STATE   (1L<<23)

Definition at line 5262 of file bnx2.h.

#define BNX2_HC_VIS_1_INT_GEN_STATE_DLE   (0L<<23)

Definition at line 5263 of file bnx2.h.

#define BNX2_HC_VIS_1_INT_GEN_STATE_NTERRUPT   (1L<<23)

Definition at line 5264 of file bnx2.h.

#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE   (1L<<7)

Definition at line 5247 of file bnx2.h.

#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE_COUNT   (1L<<7)

Definition at line 5249 of file bnx2.h.

#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE_IDLE   (0L<<7)

Definition at line 5248 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE   (0xfL<<17)

Definition at line 5250 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ASSIGN   (3L<<17)

Definition at line 5254 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_DMA   (1L<<17)

Definition at line 5252 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_IDLE   (0L<<17)

Definition at line 5251 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_ASSIGN   (6L<<17)

Definition at line 5257 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_UPDATE   (5L<<17)

Definition at line 5256 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_WAIT   (7L<<17)

Definition at line 5258 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_UPDATE   (2L<<17)

Definition at line 5253 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_WAIT   (4L<<17)

Definition at line 5255 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE   (0x3L<<21)

Definition at line 5259 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE_CLEAR   (1L<<21)

Definition at line 5261 of file bnx2.h.

#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE_NORMAL   (0L<<21)

Definition at line 5260 of file bnx2.h.

#define BNX2_HC_VIS_1_STAT_CHAN_ID   (0x7L<<24)

Definition at line 5265 of file bnx2.h.

#define BNX2_HC_VIS_1_SW_INTACK_STATE   (1L<<5)

Definition at line 5241 of file bnx2.h.

#define BNX2_HC_VIS_1_SW_INTACK_STATE_COUNT   (1L<<5)

Definition at line 5243 of file bnx2.h.

#define BNX2_HC_VIS_1_SW_INTACK_STATE_IDLE   (0L<<5)

Definition at line 5242 of file bnx2.h.

#define BNX2_HC_VIS_DMA_MSI_STATE   (0x7L<<12)

Definition at line 5231 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE   (0xfL<<8)

Definition at line 5219 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_ABORT   (15L<<8)

Definition at line 5230 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_COMP   (4L<<8)

Definition at line 5224 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_IDLE   (0L<<8)

Definition at line 5220 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_STATISTIC_DMA   (6L<<8)

Definition at line 5226 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_STATISTIC_PARAM   (5L<<8)

Definition at line 5225 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_STATUS_DMA   (2L<<8)

Definition at line 5222 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_STATUS_PARAM   (1L<<8)

Definition at line 5221 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_WAIT   (9L<<8)

Definition at line 5229 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP   (3L<<8)

Definition at line 5223 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP_1   (7L<<8)

Definition at line 5227 of file bnx2.h.

#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP_2   (8L<<8)

Definition at line 5228 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE   (0xfL<<0)

Definition at line 5207 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_DMA   (6L<<0)

Definition at line 5214 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_IDLE   (0L<<0)

Definition at line 5208 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_CONTROL   (7L<<0)

Definition at line 5215 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_DATA   (10L<<0)

Definition at line 5218 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_HIGH   (9L<<0)

Definition at line 5217 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_LOW   (8L<<0)

Definition at line 5216 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_REQUEST   (2L<<0)

Definition at line 5210 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_START   (1L<<0)

Definition at line 5209 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE32   (4L<<0)

Definition at line 5212 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE64   (3L<<0)

Definition at line 5211 of file bnx2.h.

#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE_DONE   (5L<<0)

Definition at line 5213 of file bnx2.h.

#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE   (0x3L<<15)

Definition at line 5232 of file bnx2.h.

#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_COUNT   (1L<<15)

Definition at line 5234 of file bnx2.h.

#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_IDLE   (0L<<15)

Definition at line 5233 of file bnx2.h.

#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_START   (2L<<15)

Definition at line 5235 of file bnx2.h.

#define BNX2_ISCSI_INITIATOR   0x3dc

Definition at line 7432 of file bnx2.h.

#define BNX2_ISCSI_INITIATOR_EN   0x00080000

Definition at line 7433 of file bnx2.h.

#define BNX2_ISCSI_MAX_CONN   0x3e4

Definition at line 7435 of file bnx2.h.

#define BNX2_ISCSI_MAX_CONN_MASK   0xffff0000

Definition at line 7436 of file bnx2.h.

#define BNX2_ISCSI_MAX_CONN_SHIFT   16

Definition at line 7437 of file bnx2.h.

#define BNX2_L2CTX_BD_PRE_READ   0x00000000

Definition at line 352 of file bnx2.h.

#define BNX2_L2CTX_CMD_TYPE   0x00000088

Definition at line 328 of file bnx2.h.

#define BNX2_L2CTX_CMD_TYPE_TYPE   (0xf<<24)

Definition at line 329 of file bnx2.h.

#define BNX2_L2CTX_CMD_TYPE_TYPE_L2   (0<<24)

Definition at line 330 of file bnx2.h.

#define BNX2_L2CTX_CMD_TYPE_TYPE_TCP   (1<<24)

Definition at line 331 of file bnx2.h.

#define BNX2_L2CTX_CMD_TYPE_XI   0x00000240

Definition at line 345 of file bnx2.h.

#define BNX2_L2CTX_CTX_SIZE   0x00000000

Definition at line 353 of file bnx2.h.

#define BNX2_L2CTX_CTX_TYPE   0x00000000

Definition at line 354 of file bnx2.h.

#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE   (0xf<<28)

Definition at line 357 of file bnx2.h.

#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED   (0<<28)

Definition at line 358 of file bnx2.h.

#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE   (1<<28)

Definition at line 359 of file bnx2.h.

#define BNX2_L2CTX_CTX_TYPE_SIZE_L2   ((0x20/20)<<16)

Definition at line 356 of file bnx2.h.

#define BNX2_L2CTX_EST_NBD   0x00000088

Definition at line 327 of file bnx2.h.

#define BNX2_L2CTX_FLOW_CTRL_ENABLE   0x000000ff

Definition at line 355 of file bnx2.h.

#define BNX2_L2CTX_HOST_BDIDX   0x00000004

Definition at line 361 of file bnx2.h.

#define BNX2_L2CTX_HOST_BSEQ   0x00000008

Definition at line 368 of file bnx2.h.

#define BNX2_L2CTX_HOST_PG_BDIDX   0x00000044

Definition at line 374 of file bnx2.h.

#define BNX2_L2CTX_L2_STATUSB_NUM (   sb_id)    (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT) : 0)

Definition at line 366 of file bnx2.h.

#define BNX2_L2CTX_L2_STATUSB_NUM_SHIFT   24

Definition at line 363 of file bnx2.h.

#define BNX2_L2CTX_L5_STATUSB_NUM (   sb_id)    (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L5_STATUSB_NUM_SHIFT) : 0)

Definition at line 364 of file bnx2.h.

#define BNX2_L2CTX_L5_STATUSB_NUM_SHIFT   16

Definition at line 362 of file bnx2.h.

#define BNX2_L2CTX_NX_BDHADDR_HI   0x00000010

Definition at line 370 of file bnx2.h.

#define BNX2_L2CTX_NX_BDHADDR_LO   0x00000014

Definition at line 371 of file bnx2.h.

#define BNX2_L2CTX_NX_BDIDX   0x00000018

Definition at line 372 of file bnx2.h.

#define BNX2_L2CTX_NX_BSEQ   0x0000000c

Definition at line 369 of file bnx2.h.

#define BNX2_L2CTX_NX_PG_BDHADDR_HI   0x00000050

Definition at line 378 of file bnx2.h.

#define BNX2_L2CTX_NX_PG_BDHADDR_LO   0x00000054

Definition at line 379 of file bnx2.h.

#define BNX2_L2CTX_PG_BUF_SIZE   0x00000048

Definition at line 375 of file bnx2.h.

#define BNX2_L2CTX_RBDC_JUMBO_KEY   0x3ffe

Definition at line 377 of file bnx2.h.

#define BNX2_L2CTX_RBDC_KEY   0x0000004c

Definition at line 376 of file bnx2.h.

#define BNX2_L2CTX_TBDR_BHADDR_HI   0x000000a0

Definition at line 338 of file bnx2.h.

#define BNX2_L2CTX_TBDR_BHADDR_HI_XI   0x00000258

Definition at line 346 of file bnx2.h.

#define BNX2_L2CTX_TBDR_BHADDR_LO   0x000000a4

Definition at line 339 of file bnx2.h.

#define BNX2_L2CTX_TBDR_BHADDR_LO_XI   0x0000025c

Definition at line 347 of file bnx2.h.

#define BNX2_L2CTX_TBDR_BIDX   0x0000009c

Definition at line 337 of file bnx2.h.

#define BNX2_L2CTX_TBDR_BOFF   0x0000009c

Definition at line 336 of file bnx2.h.

#define BNX2_L2CTX_TBDR_BSEQ   0x00000098

Definition at line 335 of file bnx2.h.

#define BNX2_L2CTX_TSCH_BSEQ   0x00000094

Definition at line 334 of file bnx2.h.

#define BNX2_L2CTX_TX_HOST_BIDX   0x00000088

Definition at line 326 of file bnx2.h.

#define BNX2_L2CTX_TX_HOST_BSEQ   0x00000090

Definition at line 333 of file bnx2.h.

#define BNX2_L2CTX_TXP_BIDX   0x000000a8

Definition at line 341 of file bnx2.h.

#define BNX2_L2CTX_TXP_BOFF   0x000000a8

Definition at line 340 of file bnx2.h.

#define BNX2_L2CTX_TXP_BSEQ   0x000000ac

Definition at line 342 of file bnx2.h.

#define BNX2_L2CTX_TYPE   0x00000000

Definition at line 320 of file bnx2.h.

#define BNX2_L2CTX_TYPE_SIZE_L2   ((0xc0/0x20)<<16)

Definition at line 321 of file bnx2.h.

#define BNX2_L2CTX_TYPE_TYPE   (0xf<<28)

Definition at line 322 of file bnx2.h.

#define BNX2_L2CTX_TYPE_TYPE_EMPTY   (0<<28)

Definition at line 323 of file bnx2.h.

#define BNX2_L2CTX_TYPE_TYPE_L2   (1<<28)

Definition at line 324 of file bnx2.h.

#define BNX2_L2CTX_TYPE_XI   0x00000080

Definition at line 344 of file bnx2.h.

#define BNX2_LINK_STATUS   0x0000000c

Definition at line 7106 of file bnx2.h.

#define BNX2_LINK_STATUS_1000FULL   (7<<1)

Definition at line 7118 of file bnx2.h.

#define BNX2_LINK_STATUS_1000HALF   (6<<1)

Definition at line 7117 of file bnx2.h.

#define BNX2_LINK_STATUS_100BASE_T4   (4<<1)

Definition at line 7115 of file bnx2.h.

#define BNX2_LINK_STATUS_100FULL   (5<<1)

Definition at line 7116 of file bnx2.h.

#define BNX2_LINK_STATUS_100HALF   (3<<1)

Definition at line 7114 of file bnx2.h.

#define BNX2_LINK_STATUS_10FULL   (2<<1)

Definition at line 7113 of file bnx2.h.

#define BNX2_LINK_STATUS_10HALF   (1<<1)

Definition at line 7112 of file bnx2.h.

#define BNX2_LINK_STATUS_2500FULL   (9<<1)

Definition at line 7120 of file bnx2.h.

#define BNX2_LINK_STATUS_2500HALF   (8<<1)

Definition at line 7119 of file bnx2.h.

#define BNX2_LINK_STATUS_AN_COMPLETE   (1<<6)

Definition at line 7122 of file bnx2.h.

#define BNX2_LINK_STATUS_AN_ENABLED   (1<<5)

Definition at line 7121 of file bnx2.h.

#define BNX2_LINK_STATUS_AN_INCOMPLETE   (0<<1)

Definition at line 7111 of file bnx2.h.

#define BNX2_LINK_STATUS_HEART_BEAT_EXPIRED   (1<<31)

Definition at line 7139 of file bnx2.h.

#define BNX2_LINK_STATUS_INIT_VALUE   0xffffffff

Definition at line 7107 of file bnx2.h.

#define BNX2_LINK_STATUS_LINK_DOWN   0x0

Definition at line 7109 of file bnx2.h.

#define BNX2_LINK_STATUS_LINK_UP   0x1

Definition at line 7108 of file bnx2.h.

#define BNX2_LINK_STATUS_PARALLEL_DET   (1<<7)

Definition at line 7123 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_1000FULL   (1<<9)

Definition at line 7125 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_1000HALF   (1<<10)

Definition at line 7126 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_100BT4   (1<<11)

Definition at line 7127 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_100FULL   (1<<12)

Definition at line 7128 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_100HALF   (1<<13)

Definition at line 7129 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_10FULL   (1<<14)

Definition at line 7130 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_10HALF   (1<<15)

Definition at line 7131 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_2500FULL   (1<<21)

Definition at line 7137 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_AD_2500HALF   (1<<22)

Definition at line 7138 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_ASYM_PAUSE_CAP   (1<<19)

Definition at line 7135 of file bnx2.h.

#define BNX2_LINK_STATUS_PARTNER_SYM_PAUSE_CAP   (1<<18)

Definition at line 7134 of file bnx2.h.

#define BNX2_LINK_STATUS_RESERVED   (1<<8)

Definition at line 7124 of file bnx2.h.

#define BNX2_LINK_STATUS_RX_FC_ENABLED   (1<<17)

Definition at line 7133 of file bnx2.h.

#define BNX2_LINK_STATUS_SERDES_LINK   (1<<20)

Definition at line 7136 of file bnx2.h.

#define BNX2_LINK_STATUS_SPEED_MASK   0x1e

Definition at line 7110 of file bnx2.h.

#define BNX2_LINK_STATUS_TX_FC_ENABLED   (1<<16)

Definition at line 7132 of file bnx2.h.

#define BNX2_MAX_MSIX_HW_VEC   9

Definition at line 6701 of file bnx2.h.

#define BNX2_MAX_MSIX_VEC   9

Definition at line 6702 of file bnx2.h.

#define BNX2_MAX_UNICAST_ADDRESSES
Value:
(BNX2_END_UNICAST_ADDRESS_INDEX - \
BNX2_START_UNICAST_ADDRESS_INDEX + 1)

Definition at line 6533 of file bnx2.h.

#define BNX2_MCP_ACCESS_LOCK   0x0014009c

Definition at line 6288 of file bnx2.h.

#define BNX2_MCP_ACCESS_LOCK_LOCK   (1L<<31)

Definition at line 6289 of file bnx2.h.

#define BNX2_MCP_CPU_DATA_ACCESS   0x00145024

Definition at line 6355 of file bnx2.h.

#define BNX2_MCP_CPU_DEBUG_VECT_PEEK   0x00145038

Definition at line 6363 of file bnx2.h.

#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 6365 of file bnx2.h.

#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 6366 of file bnx2.h.

#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 6364 of file bnx2.h.

#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 6368 of file bnx2.h.

#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 6369 of file bnx2.h.

#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 6367 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK   0x00145008

Definition at line 6340 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)

Definition at line 6347 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)

Definition at line 6345 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)

Definition at line 6342 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)

Definition at line 6346 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)

Definition at line 6341 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)

Definition at line 6348 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)

Definition at line 6351 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)

Definition at line 6343 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)

Definition at line 6344 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)

Definition at line 6349 of file bnx2.h.

#define BNX2_MCP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)

Definition at line 6350 of file bnx2.h.

#define BNX2_MCP_CPU_HW_BREAKPOINT   0x00145034

Definition at line 6359 of file bnx2.h.

#define BNX2_MCP_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)

Definition at line 6361 of file bnx2.h.

#define BNX2_MCP_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)

Definition at line 6360 of file bnx2.h.

#define BNX2_MCP_CPU_INSTRUCTION   0x00145020

Definition at line 6354 of file bnx2.h.

#define BNX2_MCP_CPU_INTERRUPT_ENABLE   0x00145028

Definition at line 6356 of file bnx2.h.

#define BNX2_MCP_CPU_INTERRUPT_SAVED_PC   0x00145030

Definition at line 6358 of file bnx2.h.

#define BNX2_MCP_CPU_INTERRUPT_VECTOR   0x0014502c

Definition at line 6357 of file bnx2.h.

#define BNX2_MCP_CPU_LAST_BRANCH_ADDR   0x00145048

Definition at line 6371 of file bnx2.h.

#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)

Definition at line 6375 of file bnx2.h.

#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)

Definition at line 6372 of file bnx2.h.

#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)

Definition at line 6374 of file bnx2.h.

#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)

Definition at line 6373 of file bnx2.h.

#define BNX2_MCP_CPU_MODE   0x00145000

Definition at line 6311 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)

Definition at line 6319 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)

Definition at line 6320 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)

Definition at line 6321 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_INTERRUPT_ENA   (1L<<7)

Definition at line 6317 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_LOCAL_RST   (1L<<0)

Definition at line 6312 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_MSG_BIT1   (1L<<6)

Definition at line 6316 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)

Definition at line 6314 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)

Definition at line 6315 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_SOFT_HALT   (1L<<10)

Definition at line 6318 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)

Definition at line 6322 of file bnx2.h.

#define BNX2_MCP_CPU_MODE_STEP_ENA   (1L<<1)

Definition at line 6313 of file bnx2.h.

#define BNX2_MCP_CPU_PROGRAM_COUNTER   0x0014501c

Definition at line 6353 of file bnx2.h.

#define BNX2_MCP_CPU_REG_FILE   0x00145200

Definition at line 6377 of file bnx2.h.

#define BNX2_MCP_CPU_STATE   0x00145004

Definition at line 6324 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_ALIGN_HALTED   (1L<<7)

Definition at line 6331 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)

Definition at line 6329 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_BAD_INST_HALTED   (1L<<2)

Definition at line 6326 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_BAD_PC_HALTED   (1L<<6)

Definition at line 6330 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_BLOCKED_READ   (1L<<31)

Definition at line 6338 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_BREAKPOINT   (1L<<0)

Definition at line 6325 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)

Definition at line 6336 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)

Definition at line 6332 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_INST_FETCH_STALL   (1L<<15)

Definition at line 6337 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_INTERRUPT   (1L<<12)

Definition at line 6335 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)

Definition at line 6327 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)

Definition at line 6328 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_SOFT_HALTED   (1L<<10)

Definition at line 6333 of file bnx2.h.

#define BNX2_MCP_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)

Definition at line 6334 of file bnx2.h.

#define BNX2_MCP_DRIVER_DOORBELL   0x001400b0

Definition at line 6305 of file bnx2.h.

#define BNX2_MCP_DRIVER_DOORBELL_DRIVER_DOORBELL   (1L<<31)

Definition at line 6306 of file bnx2.h.

#define BNX2_MCP_DRIVER_DOORBELL_OTHER_FUNC   0x001400b4

Definition at line 6308 of file bnx2.h.

#define BNX2_MCP_DRIVER_DOORBELL_OTHER_FUNC_DRIVER_DOORBELL   (1L<<31)

Definition at line 6309 of file bnx2.h.

#define BNX2_MCP_MAILBOX_CFG   0x001400a4

Definition at line 6294 of file bnx2.h.

#define BNX2_MCP_MAILBOX_CFG_MAILBOX_OFFSET   (0x3fffL<<0)

Definition at line 6295 of file bnx2.h.

#define BNX2_MCP_MAILBOX_CFG_MAILBOX_SIZE   (0xfffL<<20)

Definition at line 6296 of file bnx2.h.

#define BNX2_MCP_MAILBOX_CFG_OTHER_FUNC   0x001400a8

Definition at line 6298 of file bnx2.h.

#define BNX2_MCP_MAILBOX_CFG_OTHER_FUNC_MAILBOX_OFFSET   (0x3fffL<<0)

Definition at line 6299 of file bnx2.h.

#define BNX2_MCP_MAILBOX_CFG_OTHER_FUNC_MAILBOX_SIZE   (0xfffL<<20)

Definition at line 6300 of file bnx2.h.

#define BNX2_MCP_MCP_ATTENTION_STATUS   0x00140084

Definition at line 6262 of file bnx2.h.

#define BNX2_MCP_MCP_ATTENTION_STATUS_CPU_EVENT   (1L<<31)

Definition at line 6265 of file bnx2.h.

#define BNX2_MCP_MCP_ATTENTION_STATUS_DRV_DOORBELL   (1L<<29)

Definition at line 6263 of file bnx2.h.

#define BNX2_MCP_MCP_ATTENTION_STATUS_WATCHDOG_TIMEOUT   (1L<<30)

Definition at line 6264 of file bnx2.h.

#define BNX2_MCP_MCP_CONTROL   0x00140080

Definition at line 6258 of file bnx2.h.

#define BNX2_MCP_MCP_CONTROL_MCP_ISOLATE   (1L<<31)

Definition at line 6260 of file bnx2.h.

#define BNX2_MCP_MCP_CONTROL_SMBUS_SEL   (1L<<30)

Definition at line 6259 of file bnx2.h.

#define BNX2_MCP_MCP_DOORBELL   0x001400ac

Definition at line 6302 of file bnx2.h.

#define BNX2_MCP_MCP_DOORBELL_MCP_DOORBELL   (1L<<31)

Definition at line 6303 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT   0x00140090

Definition at line 6274 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT_CONTROL   0x00140088

Definition at line 6267 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT_CONTROL_MCP_HEARTBEAT_ENABLE   (1L<<31)

Definition at line 6268 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT_MCP_HEARTBEAT_COUNT   (0x3fffffffL<<0)

Definition at line 6275 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT_MCP_HEARTBEAT_INC   (1L<<30)

Definition at line 6276 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT_MCP_HEARTBEAT_RESET   (1L<<31)

Definition at line 6277 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT_STATUS   0x0014008c

Definition at line 6270 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT_STATUS_MCP_HEARTBEAT_PERIOD   (0x7ffL<<0)

Definition at line 6271 of file bnx2.h.

#define BNX2_MCP_MCP_HEARTBEAT_STATUS_VALID   (1L<<31)

Definition at line 6272 of file bnx2.h.

#define BNX2_MCP_MCPQ   0x001453c0

Definition at line 6378 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD   0x001453f8

Definition at line 6379 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 6387 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 6386 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_BUSY   (1L<<31)

Definition at line 6390 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 6388 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 6380 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_POP   (1L<<30)

Definition at line 6389 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 6385 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 6384 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 6381 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 6382 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 6383 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CTL   0x001453fc

Definition at line 6392 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 6397 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 6395 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 6393 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 6396 of file bnx2.h.

#define BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 6394 of file bnx2.h.

#define BNX2_MCP_ROM   0x00150000

Definition at line 6399 of file bnx2.h.

#define BNX2_MCP_SCRATCH   0x00160000

Definition at line 6400 of file bnx2.h.

#define BNX2_MCP_STATE_P0   0x0016fdc8

Definition at line 6402 of file bnx2.h.

#define BNX2_MCP_STATE_P0_5708   0x00169dc8

Definition at line 6404 of file bnx2.h.

#define BNX2_MCP_STATE_P1   0x0016f9c8

Definition at line 6401 of file bnx2.h.

#define BNX2_MCP_STATE_P1_5708   0x001699c8

Definition at line 6403 of file bnx2.h.

#define BNX2_MCP_TOE_ID   0x001400a0

Definition at line 6291 of file bnx2.h.

#define BNX2_MCP_TOE_ID_FUNCTION_ID   (1L<<31)

Definition at line 6292 of file bnx2.h.

#define BNX2_MCP_WATCHDOG_CONTROL   0x00140098

Definition at line 6282 of file bnx2.h.

#define BNX2_MCP_WATCHDOG_CONTROL_MCP_RST_ENABLE   (1L<<30)

Definition at line 6285 of file bnx2.h.

#define BNX2_MCP_WATCHDOG_CONTROL_WATCHDOG_ATTN   (1L<<29)

Definition at line 6284 of file bnx2.h.

#define BNX2_MCP_WATCHDOG_CONTROL_WATCHDOG_ENABLE   (1L<<31)

Definition at line 6286 of file bnx2.h.

#define BNX2_MCP_WATCHDOG_CONTROL_WATCHDOG_TIMEOUT   (0xfffffffL<<0)

Definition at line 6283 of file bnx2.h.

#define BNX2_MCP_WATCHDOG_RESET   0x00140094

Definition at line 6279 of file bnx2.h.

#define BNX2_MCP_WATCHDOG_RESET_WATCHDOG_RESET   (1L<<31)

Definition at line 6280 of file bnx2.h.

#define BNX2_MFW_VER_PTR   0x00000014c

Definition at line 7335 of file bnx2.h.

#define BNX2_MIN_MSIX_VEC   1

Definition at line 6706 of file bnx2.h.

#define BNX2_MISC_ARB_FREE0   0x00000840

Definition at line 1017 of file bnx2.h.

#define BNX2_MISC_ARB_FREE1   0x00000844

Definition at line 1018 of file bnx2.h.

#define BNX2_MISC_ARB_FREE2   0x00000848

Definition at line 1019 of file bnx2.h.

#define BNX2_MISC_ARB_FREE3   0x0000084c

Definition at line 1020 of file bnx2.h.

#define BNX2_MISC_ARB_FREE4   0x00000850

Definition at line 1021 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0   0x00000868

Definition at line 1027 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0_0   (0x7L<<0)

Definition at line 1028 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0_1   (0x7L<<4)

Definition at line 1029 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0_2   (0x7L<<8)

Definition at line 1030 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0_3   (0x7L<<12)

Definition at line 1031 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0_4   (0x7L<<16)

Definition at line 1032 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0_5   (0x7L<<20)

Definition at line 1033 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0_6   (0x7L<<24)

Definition at line 1034 of file bnx2.h.

#define BNX2_MISC_ARB_GNT0_7   (0x7L<<28)

Definition at line 1035 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1   0x0000086c

Definition at line 1037 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1_10   (0x7L<<8)

Definition at line 1040 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1_11   (0x7L<<12)

Definition at line 1041 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1_12   (0x7L<<16)

Definition at line 1042 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1_13   (0x7L<<20)

Definition at line 1043 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1_14   (0x7L<<24)

Definition at line 1044 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1_15   (0x7L<<28)

Definition at line 1045 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1_8   (0x7L<<0)

Definition at line 1038 of file bnx2.h.

#define BNX2_MISC_ARB_GNT1_9   (0x7L<<4)

Definition at line 1039 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2   0x00000870

Definition at line 1047 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2_16   (0x7L<<0)

Definition at line 1048 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2_17   (0x7L<<4)

Definition at line 1049 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2_18   (0x7L<<8)

Definition at line 1050 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2_19   (0x7L<<12)

Definition at line 1051 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2_20   (0x7L<<16)

Definition at line 1052 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2_21   (0x7L<<20)

Definition at line 1053 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2_22   (0x7L<<24)

Definition at line 1054 of file bnx2.h.

#define BNX2_MISC_ARB_GNT2_23   (0x7L<<28)

Definition at line 1055 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3   0x00000874

Definition at line 1057 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3_24   (0x7L<<0)

Definition at line 1058 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3_25   (0x7L<<4)

Definition at line 1059 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3_26   (0x7L<<8)

Definition at line 1060 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3_27   (0x7L<<12)

Definition at line 1061 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3_28   (0x7L<<16)

Definition at line 1062 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3_29   (0x7L<<20)

Definition at line 1063 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3_30   (0x7L<<24)

Definition at line 1064 of file bnx2.h.

#define BNX2_MISC_ARB_GNT3_31   (0x7L<<28)

Definition at line 1065 of file bnx2.h.

#define BNX2_MISC_ARB_REQ0   0x0000082c

Definition at line 1012 of file bnx2.h.

#define BNX2_MISC_ARB_REQ1   0x00000830

Definition at line 1013 of file bnx2.h.

#define BNX2_MISC_ARB_REQ2   0x00000834

Definition at line 1014 of file bnx2.h.

#define BNX2_MISC_ARB_REQ3   0x00000838

Definition at line 1015 of file bnx2.h.

#define BNX2_MISC_ARB_REQ4   0x0000083c

Definition at line 1016 of file bnx2.h.

#define BNX2_MISC_ARB_REQ_STATUS0   0x00000854

Definition at line 1022 of file bnx2.h.

#define BNX2_MISC_ARB_REQ_STATUS1   0x00000858

Definition at line 1023 of file bnx2.h.

#define BNX2_MISC_ARB_REQ_STATUS2   0x0000085c

Definition at line 1024 of file bnx2.h.

#define BNX2_MISC_ARB_REQ_STATUS3   0x00000860

Definition at line 1025 of file bnx2.h.

#define BNX2_MISC_ARB_REQ_STATUS4   0x00000864

Definition at line 1026 of file bnx2.h.

#define BNX2_MISC_BIST_CS0   0x0000090c

Definition at line 1565 of file bnx2.h.

#define BNX2_MISC_BIST_CS0_BIST_OVERRIDE   (1L<<31)

Definition at line 1571 of file bnx2.h.

#define BNX2_MISC_BIST_CS0_BIST_SETUP   (0x3L<<1)

Definition at line 1567 of file bnx2.h.

#define BNX2_MISC_BIST_CS0_MBIST_ASYNC_RESET   (1L<<3)

Definition at line 1568 of file bnx2.h.

#define BNX2_MISC_BIST_CS0_MBIST_DONE   (1L<<8)

Definition at line 1569 of file bnx2.h.

#define BNX2_MISC_BIST_CS0_MBIST_EN   (1L<<0)

Definition at line 1566 of file bnx2.h.

#define BNX2_MISC_BIST_CS0_MBIST_GO   (1L<<9)

Definition at line 1570 of file bnx2.h.

#define BNX2_MISC_BIST_CS1   0x00000914

Definition at line 1574 of file bnx2.h.

#define BNX2_MISC_BIST_CS1_BIST_SETUP   (0x3L<<1)

Definition at line 1576 of file bnx2.h.

#define BNX2_MISC_BIST_CS1_MBIST_ASYNC_RESET   (1L<<3)

Definition at line 1577 of file bnx2.h.

#define BNX2_MISC_BIST_CS1_MBIST_DONE   (1L<<8)

Definition at line 1578 of file bnx2.h.

#define BNX2_MISC_BIST_CS1_MBIST_EN   (1L<<0)

Definition at line 1575 of file bnx2.h.

#define BNX2_MISC_BIST_CS1_MBIST_GO   (1L<<9)

Definition at line 1579 of file bnx2.h.

#define BNX2_MISC_BIST_CS2   0x0000091c

Definition at line 1582 of file bnx2.h.

#define BNX2_MISC_BIST_CS2_BIST_SETUP   (0x3L<<1)

Definition at line 1584 of file bnx2.h.

#define BNX2_MISC_BIST_CS2_MBIST_ASYNC_RESET   (1L<<3)

Definition at line 1585 of file bnx2.h.

#define BNX2_MISC_BIST_CS2_MBIST_DONE   (1L<<8)

Definition at line 1586 of file bnx2.h.

#define BNX2_MISC_BIST_CS2_MBIST_EN   (1L<<0)

Definition at line 1583 of file bnx2.h.

#define BNX2_MISC_BIST_CS2_MBIST_GO   (1L<<9)

Definition at line 1587 of file bnx2.h.

#define BNX2_MISC_BIST_CS3   0x00000924

Definition at line 1590 of file bnx2.h.

#define BNX2_MISC_BIST_CS3_BIST_SETUP   (0x3L<<1)

Definition at line 1592 of file bnx2.h.

#define BNX2_MISC_BIST_CS3_MBIST_ASYNC_RESET   (1L<<3)

Definition at line 1593 of file bnx2.h.

#define BNX2_MISC_BIST_CS3_MBIST_DONE   (1L<<8)

Definition at line 1594 of file bnx2.h.

#define BNX2_MISC_BIST_CS3_MBIST_EN   (1L<<0)

Definition at line 1591 of file bnx2.h.

#define BNX2_MISC_BIST_CS3_MBIST_GO   (1L<<9)

Definition at line 1595 of file bnx2.h.

#define BNX2_MISC_BIST_CS4   0x0000092c

Definition at line 1598 of file bnx2.h.

#define BNX2_MISC_BIST_CS4_BIST_SETUP   (0x3L<<1)

Definition at line 1600 of file bnx2.h.

#define BNX2_MISC_BIST_CS4_MBIST_ASYNC_RESET   (1L<<3)

Definition at line 1601 of file bnx2.h.

#define BNX2_MISC_BIST_CS4_MBIST_DONE   (1L<<8)

Definition at line 1602 of file bnx2.h.

#define BNX2_MISC_BIST_CS4_MBIST_EN   (1L<<0)

Definition at line 1599 of file bnx2.h.

#define BNX2_MISC_BIST_CS4_MBIST_GO   (1L<<9)

Definition at line 1603 of file bnx2.h.

#define BNX2_MISC_BIST_CS5   0x00000934

Definition at line 1606 of file bnx2.h.

#define BNX2_MISC_BIST_CS5_BIST_SETUP   (0x3L<<1)

Definition at line 1608 of file bnx2.h.

#define BNX2_MISC_BIST_CS5_MBIST_ASYNC_RESET   (1L<<3)

Definition at line 1609 of file bnx2.h.

#define BNX2_MISC_BIST_CS5_MBIST_DONE   (1L<<8)

Definition at line 1610 of file bnx2.h.

#define BNX2_MISC_BIST_CS5_MBIST_EN   (1L<<0)

Definition at line 1607 of file bnx2.h.

#define BNX2_MISC_BIST_CS5_MBIST_GO   (1L<<9)

Definition at line 1611 of file bnx2.h.

#define BNX2_MISC_BIST_MEMSTATUS0   0x00000910

Definition at line 1573 of file bnx2.h.

#define BNX2_MISC_BIST_MEMSTATUS1   0x00000918

Definition at line 1581 of file bnx2.h.

#define BNX2_MISC_BIST_MEMSTATUS2   0x00000920

Definition at line 1589 of file bnx2.h.

#define BNX2_MISC_BIST_MEMSTATUS3   0x00000928

Definition at line 1597 of file bnx2.h.

#define BNX2_MISC_BIST_MEMSTATUS4   0x00000930

Definition at line 1605 of file bnx2.h.

#define BNX2_MISC_BIST_MEMSTATUS5   0x00000938

Definition at line 1613 of file bnx2.h.

#define BNX2_MISC_CFG   0x00000804

Definition at line 775 of file bnx2.h.

#define BNX2_MISC_CFG_BIST_EN   (1L<<3)

Definition at line 782 of file bnx2.h.

#define BNX2_MISC_CFG_CK25_OUT_ALT_SRC   (1L<<4)

Definition at line 783 of file bnx2.h.

#define BNX2_MISC_CFG_CLK_CTL_OVERRIDE   (1L<<7)

Definition at line 786 of file bnx2.h.

#define BNX2_MISC_CFG_DBU_GRC_TMOUT_TE   (1L<<12)

Definition at line 797 of file bnx2.h.

#define BNX2_MISC_CFG_GRC_TMOUT   (1L<<0)

Definition at line 776 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE   (0x7L<<8)

Definition at line 787 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_MAC   (0L<<8)

Definition at line 788 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_MAC2_XI   (4L<<8)

Definition at line 803 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_MAC3_XI   (8L<<8)

Definition at line 807 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_MAC4_XI   (12L<<8)

Definition at line 811 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_MAC_XI   (0L<<8)

Definition at line 799 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY10_XI   (13L<<8)

Definition at line 812 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY11_XI   (14L<<8)

Definition at line 813 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY1_TE   (1L<<8)

Definition at line 789 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY1_XI   (1L<<8)

Definition at line 800 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY2_TE   (2L<<8)

Definition at line 790 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY2_XI   (2L<<8)

Definition at line 801 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY3_TE   (3L<<8)

Definition at line 791 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY3_XI   (3L<<8)

Definition at line 802 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY4_TE   (4L<<8)

Definition at line 792 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY4_XI   (5L<<8)

Definition at line 804 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY5_TE   (5L<<8)

Definition at line 793 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY5_XI   (6L<<8)

Definition at line 805 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY6_TE   (6L<<8)

Definition at line 794 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY6_XI   (7L<<8)

Definition at line 806 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY7_TE   (7L<<8)

Definition at line 795 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY7_XI   (9L<<8)

Definition at line 808 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY8_XI   (10L<<8)

Definition at line 809 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_PHY9_XI   (11L<<8)

Definition at line 810 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_UNUSED_XI   (15L<<8)

Definition at line 814 of file bnx2.h.

#define BNX2_MISC_CFG_LEDMODE_XI   (0xfL<<8)

Definition at line 798 of file bnx2.h.

#define BNX2_MISC_CFG_MCP_GRC_TMOUT_TE   (1L<<11)

Definition at line 796 of file bnx2.h.

#define BNX2_MISC_CFG_NVM_WR_EN   (0x3L<<1)

Definition at line 777 of file bnx2.h.

#define BNX2_MISC_CFG_NVM_WR_EN_ALLOW   (2L<<1)

Definition at line 780 of file bnx2.h.

#define BNX2_MISC_CFG_NVM_WR_EN_ALLOW2   (3L<<1)

Definition at line 781 of file bnx2.h.

#define BNX2_MISC_CFG_NVM_WR_EN_PCI   (1L<<1)

Definition at line 779 of file bnx2.h.

#define BNX2_MISC_CFG_NVM_WR_EN_PROTECT   (0L<<1)

Definition at line 778 of file bnx2.h.

#define BNX2_MISC_CFG_PARITY_MODE_XI   (1L<<14)

Definition at line 816 of file bnx2.h.

#define BNX2_MISC_CFG_PORT_SELECT_XI   (1L<<13)

Definition at line 815 of file bnx2.h.

#define BNX2_MISC_CFG_RESERVED5_TE   (1L<<5)

Definition at line 784 of file bnx2.h.

#define BNX2_MISC_CFG_RESERVED6_TE   (1L<<6)

Definition at line 785 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS   0x00000818

Definition at line 923 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT   (1L<<7)

Definition at line 935 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_MGMT_XI   (1L<<17)

Definition at line 955 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC   (0x7L<<8)

Definition at line 936 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12   (1L<<8)

Definition at line 938 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6   (2L<<8)

Definition at line 939 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62   (4L<<8)

Definition at line 940 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF   (0L<<8)

Definition at line 937 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE   (1L<<6)

Definition at line 934 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED   (0xfL<<12)

Definition at line 943 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100   (0L<<12)

Definition at line 944 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25   (8L<<12)

Definition at line 948 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40   (4L<<12)

Definition at line 947 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50   (2L<<12)

Definition at line 946 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80   (1L<<12)

Definition at line 945 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_XI   (0xfL<<28)

Definition at line 959 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP   (1L<<16)

Definition at line 950 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_VCO_XI   (0x7L<<24)

Definition at line 957 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_MIN_POWER   (1L<<11)

Definition at line 942 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET   (0xfL<<0)

Definition at line 924 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ   (7L<<0)

Definition at line 932 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ   (0L<<0)

Definition at line 925 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ   (1L<<0)

Definition at line 926 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ   (2L<<0)

Definition at line 927 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ   (3L<<0)

Definition at line 928 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ   (4L<<0)

Definition at line 929 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ   (5L<<0)

Definition at line 930 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ   (6L<<0)

Definition at line 931 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW   (0xfL<<0)

Definition at line 933 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED0_XI   (0x7L<<8)

Definition at line 941 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED1_XI   (0xfL<<12)

Definition at line 949 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED2_XI   (0x3fL<<18)

Definition at line 956 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED3_XI   (1L<<27)

Definition at line 958 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_17_TE   (1L<<17)

Definition at line 951 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_18_TE   (1L<<18)

Definition at line 952 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_19_TE   (1L<<19)

Definition at line 953 of file bnx2.h.

#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_TE   (0xfffL<<20)

Definition at line 954 of file bnx2.h.

#define BNX2_MISC_COMMAND   0x00000800

Definition at line 757 of file bnx2.h.

#define BNX2_MISC_COMMAND_CMN_SW_RESET   (1L<<7)

Definition at line 763 of file bnx2.h.

#define BNX2_MISC_COMMAND_CS16_ERR   (1L<<9)

Definition at line 765 of file bnx2.h.

#define BNX2_MISC_COMMAND_CS16_ERR_LOC   (0xfL<<12)

Definition at line 766 of file bnx2.h.

#define BNX2_MISC_COMMAND_DINTEG_ATTN_EN   (1L<<26)

Definition at line 771 of file bnx2.h.

#define BNX2_MISC_COMMAND_DISABLE_ALL   (1L<<1)

Definition at line 759 of file bnx2.h.

#define BNX2_MISC_COMMAND_ENABLE_ALL   (1L<<0)

Definition at line 758 of file bnx2.h.

#define BNX2_MISC_COMMAND_HD_RESET   (1L<<6)

Definition at line 762 of file bnx2.h.

#define BNX2_MISC_COMMAND_PAR_ERR_RAM   (0x7fL<<16)

Definition at line 767 of file bnx2.h.

#define BNX2_MISC_COMMAND_PAR_ERROR   (1L<<8)

Definition at line 764 of file bnx2.h.

#define BNX2_MISC_COMMAND_PCIE_DIS   (1L<<28)

Definition at line 773 of file bnx2.h.

#define BNX2_MISC_COMMAND_PCIE_LINK_IN_L23   (1L<<27)

Definition at line 772 of file bnx2.h.

#define BNX2_MISC_COMMAND_POR_RESET   (1L<<5)

Definition at line 761 of file bnx2.h.

#define BNX2_MISC_COMMAND_POWERDOWN_EVENT   (1L<<23)

Definition at line 768 of file bnx2.h.

#define BNX2_MISC_COMMAND_SHUTDOWN_EN   (1L<<25)

Definition at line 770 of file bnx2.h.

#define BNX2_MISC_COMMAND_SW_RESET   (1L<<4)

Definition at line 760 of file bnx2.h.

#define BNX2_MISC_COMMAND_SW_SHUTDOWN   (1L<<24)

Definition at line 769 of file bnx2.h.

#define BNX2_MISC_CONFIG_LFSR   0x00000824

Definition at line 977 of file bnx2.h.

#define BNX2_MISC_CONFIG_LFSR_DIV   (0xffffL<<0)

Definition at line 978 of file bnx2.h.

#define BNX2_MISC_CS16_ERR   0x000008e0

Definition at line 1464 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_COM   (1L<<7)

Definition at line 1472 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_CP   (1L<<8)

Definition at line 1473 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_CTX   (1L<<4)

Definition at line 1469 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_EMAC   (1L<<3)

Definition at line 1468 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_PCI   (1L<<0)

Definition at line 1465 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_RBDC   (1L<<6)

Definition at line 1471 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_RDMA   (1L<<1)

Definition at line 1466 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_TBDR   (1L<<5)

Definition at line 1470 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_ENA_TDMA   (1L<<2)

Definition at line 1467 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_COM   (1L<<23)

Definition at line 1481 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_CP   (1L<<24)

Definition at line 1482 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_CTX   (1L<<20)

Definition at line 1478 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_EMAC   (1L<<19)

Definition at line 1477 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_PCI   (1L<<16)

Definition at line 1474 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_RBDC   (1L<<22)

Definition at line 1480 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_RDMA   (1L<<17)

Definition at line 1475 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_TBDR   (1L<<21)

Definition at line 1479 of file bnx2.h.

#define BNX2_MISC_CS16_ERR_STA_TDMA   (1L<<18)

Definition at line 1476 of file bnx2.h.

#define BNX2_MISC_DEBUG_VECTOR_SEL   0x000008b0

Definition at line 1297 of file bnx2.h.

#define BNX2_MISC_DEBUG_VECTOR_SEL_0   (0xfffL<<0)

Definition at line 1298 of file bnx2.h.

#define BNX2_MISC_DEBUG_VECTOR_SEL_1   (0xfffL<<12)

Definition at line 1299 of file bnx2.h.

#define BNX2_MISC_DEBUG_VECTOR_SEL_1_XI   (0xfffL<<15)

Definition at line 1300 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL   0x000008ec

Definition at line 1490 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID   (0xffL<<0)

Definition at line 1491 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_C   (3L<<0)

Definition at line 1493 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_S   (12L<<0)

Definition at line 1494 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_X   (0L<<0)

Definition at line 1492 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_LCPLL_RST   (1L<<16)

Definition at line 1501 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY0_RST   (1L<<20)

Definition at line 1505 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY0_SIGDET   (1L<<15)

Definition at line 1500 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY1_RST   (1L<<19)

Definition at line 1504 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY1_SIGDET   (1L<<14)

Definition at line 1499 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_CTRL   (0x7L<<21)

Definition at line 1506 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_CTRL_STRAP   (0x7L<<8)

Definition at line 1495 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ   (0xfL<<26)

Definition at line 1509 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ_PHY0_IDDQ   (8L<<26)

Definition at line 1513 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ_PHY1_IDDQ   (4L<<26)

Definition at line 1512 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ_SER0_IDDQ   (2L<<26)

Definition at line 1511 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PHY_SERDES_IDDQ_SER1_IDDQ   (1L<<26)

Definition at line 1510 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PORT_SWAP   (1L<<24)

Definition at line 1507 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_PORT_SWAP_PIN   (1L<<11)

Definition at line 1496 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_SERDES0_RST   (1L<<18)

Definition at line 1503 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_SERDES0_SIGDET   (1L<<13)

Definition at line 1498 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_SERDES1_RST   (1L<<17)

Definition at line 1502 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_SERDES1_SIGDET   (1L<<12)

Definition at line 1497 of file bnx2.h.

#define BNX2_MISC_DUAL_MEDIA_CTRL_STRAP_OVERRIDE   (1L<<25)

Definition at line 1508 of file bnx2.h.

#define BNX2_MISC_ECO_CORE_CTL   0x000008d0

Definition at line 1441 of file bnx2.h.

#define BNX2_MISC_ECO_CORE_CTL_RESERVED_HARD   (0xffffL<<16)

Definition at line 1443 of file bnx2.h.

#define BNX2_MISC_ECO_CORE_CTL_RESERVED_SOFT   (0xffffL<<0)

Definition at line 1442 of file bnx2.h.

#define BNX2_MISC_ECO_HW_CTL   0x000008cc

Definition at line 1436 of file bnx2.h.

#define BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN   (1L<<0)

Definition at line 1437 of file bnx2.h.

#define BNX2_MISC_ECO_HW_CTL_RESERVED_HARD   (0xffffL<<16)

Definition at line 1439 of file bnx2.h.

#define BNX2_MISC_ECO_HW_CTL_RESERVED_SOFT   (0x7fffL<<1)

Definition at line 1438 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS   0x00000814

Definition at line 891 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)

Definition at line 915 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)

Definition at line 914 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_COMPLETION_ENABLE   (1L<<18)

Definition at line 910 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_CONTEXT_ENABLE   (1L<<21)

Definition at line 913 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_DMA_ENGINE_ENABLE   (1L<<26)

Definition at line 918 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_EMAC_ENABLE   (1L<<9)

Definition at line 901 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_HOST_COALESCE_ENABLE   (1L<<19)

Definition at line 911 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)

Definition at line 912 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)

Definition at line 916 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RSVD_FUTURE_ENABLE   (0x7L<<29)

Definition at line 921 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RV2P_CMD_SCHEDULER_ENABLE   (1L<<28)

Definition at line 920 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RX_BD_CACHE_ENABLE   (1L<<16)

Definition at line 908 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RX_DMA_ENABLE   (1L<<17)

Definition at line 909 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RX_LOOKUP_ENABLE   (1L<<13)

Definition at line 905 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RX_MBUF_ENABLE   (1L<<12)

Definition at line 904 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RX_PARSER_CATCHUP_ENABLE   (1L<<11)

Definition at line 903 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)

Definition at line 902 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RX_PROCESSOR_ENABLE   (1L<<14)

Definition at line 906 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_RX_V2P_ENABLE   (1L<<15)

Definition at line 907 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TIMER_ENABLE   (1L<<25)

Definition at line 917 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_ASSEMBLER_ENABLE   (1L<<8)

Definition at line 900 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_BD_CACHE_ENABLE   (1L<<2)

Definition at line 894 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_BD_READ_ENABLE   (1L<<1)

Definition at line 893 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_DMA_ENABLE   (1L<<4)

Definition at line 896 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_HEADER_Q_ENABLE   (1L<<7)

Definition at line 899 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_PATCHUP_ENABLE   (1L<<5)

Definition at line 897 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_PAYLOAD_Q_ENABLE   (1L<<6)

Definition at line 898 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_PROCESSOR_ENABLE   (1L<<3)

Definition at line 895 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_TX_SCHEDULER_ENABLE   (1L<<0)

Definition at line 892 of file bnx2.h.

#define BNX2_MISC_ENABLE_CLR_BITS_UMP_ENABLE   (1L<<27)

Definition at line 919 of file bnx2.h.

#define BNX2_MISC_ENABLE_DEFAULT   0x17ffffff

Definition at line 6529 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS   0x00000810

Definition at line 859 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)

Definition at line 883 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)

Definition at line 882 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_COMPLETION_ENABLE   (1L<<18)

Definition at line 878 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_CONTEXT_ENABLE   (1L<<21)

Definition at line 881 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_DMA_ENGINE_ENABLE   (1L<<26)

Definition at line 886 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_EMAC_ENABLE   (1L<<9)

Definition at line 869 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE   (1L<<19)

Definition at line 879 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)

Definition at line 880 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)

Definition at line 884 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RSVD_FUTURE_ENABLE   (0x7L<<29)

Definition at line 889 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RV2P_CMD_SCHEDULER_ENABLE   (1L<<28)

Definition at line 888 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RX_BD_CACHE_ENABLE   (1L<<16)

Definition at line 876 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RX_DMA_ENABLE   (1L<<17)

Definition at line 877 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RX_LOOKUP_ENABLE   (1L<<13)

Definition at line 873 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RX_MBUF_ENABLE   (1L<<12)

Definition at line 872 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_CATCHUP_ENABLE   (1L<<11)

Definition at line 871 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)

Definition at line 870 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RX_PROCESSOR_ENABLE   (1L<<14)

Definition at line 874 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_RX_V2P_ENABLE   (1L<<15)

Definition at line 875 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TIMER_ENABLE   (1L<<25)

Definition at line 885 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_ASSEMBLER_ENABLE   (1L<<8)

Definition at line 868 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_BD_CACHE_ENABLE   (1L<<2)

Definition at line 862 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_BD_READ_ENABLE   (1L<<1)

Definition at line 861 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_DMA_ENABLE   (1L<<4)

Definition at line 864 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_HEADER_Q_ENABLE   (1L<<7)

Definition at line 867 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_PATCHUP_ENABLE   (1L<<5)

Definition at line 865 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_PAYLOAD_Q_ENABLE   (1L<<6)

Definition at line 866 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_PROCESSOR_ENABLE   (1L<<3)

Definition at line 863 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_TX_SCHEDULER_ENABLE   (1L<<0)

Definition at line 860 of file bnx2.h.

#define BNX2_MISC_ENABLE_SET_BITS_UMP_ENABLE   (1L<<27)

Definition at line 887 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS   0x0000080c

Definition at line 827 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)

Definition at line 851 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)

Definition at line 850 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_COMPLETION_ENABLE   (1L<<18)

Definition at line 846 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE   (1L<<21)

Definition at line 849 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_DMA_ENGINE_ENABLE   (1L<<26)

Definition at line 854 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_EMAC_ENABLE   (1L<<9)

Definition at line 837 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_HOST_COALESCE_ENABLE   (1L<<19)

Definition at line 847 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)

Definition at line 848 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)

Definition at line 852 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RSVD_FUTURE_ENABLE   (0x7L<<29)

Definition at line 857 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RV2P_CMD_SCHEDULER_ENABLE   (1L<<28)

Definition at line 856 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RX_BD_CACHE_ENABLE   (1L<<16)

Definition at line 844 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RX_DMA_ENABLE   (1L<<17)

Definition at line 845 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RX_LOOKUP_ENABLE   (1L<<13)

Definition at line 841 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RX_MBUF_ENABLE   (1L<<12)

Definition at line 840 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PARSER_CATCHUP_ENABLE   (1L<<11)

Definition at line 839 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)

Definition at line 838 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PROCESSOR_ENABLE   (1L<<14)

Definition at line 842 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE   (1L<<15)

Definition at line 843 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TIMER_ENABLE   (1L<<25)

Definition at line 853 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_ASSEMBLER_ENABLE   (1L<<8)

Definition at line 836 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_BD_CACHE_ENABLE   (1L<<2)

Definition at line 830 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_BD_READ_ENABLE   (1L<<1)

Definition at line 829 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_DMA_ENABLE   (1L<<4)

Definition at line 832 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_HEADER_Q_ENABLE   (1L<<7)

Definition at line 835 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PATCHUP_ENABLE   (1L<<5)

Definition at line 833 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PAYLOAD_Q_ENABLE   (1L<<6)

Definition at line 834 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PROCESSOR_ENABLE   (1L<<3)

Definition at line 831 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_TX_SCHEDULER_ENABLE   (1L<<0)

Definition at line 828 of file bnx2.h.

#define BNX2_MISC_ENABLE_STATUS_BITS_UMP_ENABLE   (1L<<27)

Definition at line 855 of file bnx2.h.

#define BNX2_MISC_FINAL_CLK_CTL_VAL   0x000008b8

Definition at line 1356 of file bnx2.h.

#define BNX2_MISC_FINAL_CLK_CTL_VAL_MISC_FINAL_CLK_CTL_VAL   (0x3ffffffL<<6)

Definition at line 1357 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0   0x000008bc

Definition at line 1359 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_AUTODETECT_DIS_DEF   (1L<<14)

Definition at line 1376 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_ENA_CORE_RST_ON_MAIN_PWR_GOING_AWAY   (1L<<7)

Definition at line 1368 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_ENA_SEL_VAUX_B_IN_L2_TE   (1L<<8)

Definition at line 1369 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_FIBER_MODE_DIS_DEF   (1L<<12)

Definition at line 1374 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_FLASH_SAMP_SCLK_NEGEDGE_TE   (1L<<4)

Definition at line 1364 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_FORCE2500_DEF   (1L<<13)

Definition at line 1375 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_GRC_BNK_FREE_FIX_TE   (1L<<9)

Definition at line 1370 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_HC_CNTL_TMOUT_CTR_RST_TE   (1L<<6)

Definition at line 1366 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_HIDDEN_REVISION_ID_TE   (1L<<5)

Definition at line 1365 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_LED_ACT_SEL_TE   (1L<<10)

Definition at line 1371 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT   (0x3L<<22)

Definition at line 1387 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT_M0P   (1L<<22)

Definition at line 1389 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT_M6P   (0L<<22)

Definition at line 1388 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT_P0P   (2L<<22)

Definition at line 1390 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_CTAT_P6P   (3L<<22)

Definition at line 1391 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI   (0xfL<<16)

Definition at line 1378 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_1P0MA   (7L<<16)

Definition at line 1383 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_1P5MA   (5L<<16)

Definition at line 1382 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_2P0MA   (3L<<16)

Definition at line 1381 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_2P5MA   (1L<<16)

Definition at line 1380 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_3MA   (0L<<16)

Definition at line 1379 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_DAI_PWRDN   (15L<<16)

Definition at line 1384 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ   (0x3L<<26)

Definition at line 1397 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ_160UA   (1L<<26)

Definition at line 1399 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ_240UA   (0L<<26)

Definition at line 1398 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ_320UA   (3L<<26)

Definition at line 1401 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_IAMP_ADJ_400UA   (2L<<26)

Definition at line 1400 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ   (0x3L<<28)

Definition at line 1402 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ_160UA   (1L<<28)

Definition at line 1404 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ_240UA   (0L<<28)

Definition at line 1403 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ_320UA   (3L<<28)

Definition at line 1406 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_ICBUF_ADJ_400UA   (2L<<28)

Definition at line 1405 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PRE1DIS   (1L<<21)

Definition at line 1386 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PRE2DIS   (1L<<20)

Definition at line 1385 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT   (0x3L<<24)

Definition at line 1392 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT_M0P   (1L<<24)

Definition at line 1394 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT_M6P   (0L<<24)

Definition at line 1393 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT_P0P   (2L<<24)

Definition at line 1395 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_PTAT_P6P   (3L<<24)

Definition at line 1396 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ   (0x3L<<30)

Definition at line 1407 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ_1P45   (1L<<30)

Definition at line 1409 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ_1P57   (0L<<30)

Definition at line 1408 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ_1P62   (2L<<30)

Definition at line 1410 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_OSCCTRL_XTAL_ADJ_1P66   (3L<<30)

Definition at line 1411 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_PARALLEL_DETECT_DEF   (1L<<15)

Definition at line 1377 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_RESERVED1_XI   (0x7L<<4)

Definition at line 1367 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_RESERVED2_XI   (0x7L<<8)

Definition at line 1372 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_RMII_CRSDV_SEL   (1L<<2)

Definition at line 1362 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_RMII_MODE   (1L<<1)

Definition at line 1361 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_RVMII_MODE   (1L<<3)

Definition at line 1363 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_TX_DRIVE   (1L<<0)

Definition at line 1360 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL0_UP1_DEF0   (1L<<11)

Definition at line 1373 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL1   0x000008c0

Definition at line 1413 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL1_0_PCIE_LOOPBACK_TE   (1L<<3)

Definition at line 1417 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL1_1_ATTN_BTN_PRSNT_TE   (1L<<0)

Definition at line 1414 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL1_1_ATTN_IND_PRSNT_TE   (1L<<1)

Definition at line 1415 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL1_1_PWR_IND_PRSNT_TE   (1L<<2)

Definition at line 1416 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL1_RESERVED_HARD_XI   (0xffffL<<16)

Definition at line 1419 of file bnx2.h.

#define BNX2_MISC_GP_HW_CTL1_RESERVED_SOFT_XI   (0xffffL<<0)

Definition at line 1418 of file bnx2.h.

#define BNX2_MISC_ID   0x00000808

Definition at line 818 of file bnx2.h.

#define BNX2_MISC_ID_BOND_ID   (0xfL<<0)

Definition at line 819 of file bnx2.h.

#define BNX2_MISC_ID_BOND_ID_C   (3L<<0)

Definition at line 821 of file bnx2.h.

#define BNX2_MISC_ID_BOND_ID_S   (12L<<0)

Definition at line 822 of file bnx2.h.

#define BNX2_MISC_ID_BOND_ID_X   (0L<<0)

Definition at line 820 of file bnx2.h.

#define BNX2_MISC_ID_CHIP_METAL   (0xffL<<4)

Definition at line 823 of file bnx2.h.

#define BNX2_MISC_ID_CHIP_NUM   (0xffffL<<16)

Definition at line 825 of file bnx2.h.

#define BNX2_MISC_ID_CHIP_REV   (0xfL<<12)

Definition at line 824 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0   0x00000950

Definition at line 1712 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_BIAS_CTRL   (0x3L<<6)

Definition at line 1723 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_CAPRESTART   (1L<<26)

Definition at line 1742 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_CAPRETRY_EN   (1L<<15)

Definition at line 1731 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_CAPSELECTM_EN   (1L<<27)

Definition at line 1743 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_FREQDETRESTART_EN   (1L<<17)

Definition at line 1733 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_FREQDETRETRY_EN   (1L<<18)

Definition at line 1734 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_FREQMONITOR_EN   (1L<<16)

Definition at line 1732 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL   (0x7L<<3)

Definition at line 1718 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL_360   (0L<<3)

Definition at line 1719 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL_480   (1L<<3)

Definition at line 1720 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL_600   (3L<<3)

Definition at line 1721 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_ICP_CTRL_720   (7L<<3)

Definition at line 1722 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_OAC   (0x7L<<0)

Definition at line 1713 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_OAC_FORTY   (7L<<0)

Definition at line 1717 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_OAC_NEGTWENTY   (0L<<0)

Definition at line 1714 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_OAC_TWENTY   (3L<<0)

Definition at line 1716 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_OAC_ZERO   (1L<<0)

Definition at line 1715 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLL_OBSERVE   (0x7L<<8)

Definition at line 1724 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLLFORCECAPDONE   (1L<<23)

Definition at line 1739 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLLFORCECAPDONE_EN   (1L<<22)

Definition at line 1738 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLLFORCECAPPASS   (1L<<25)

Definition at line 1741 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLLFORCECAPPASS_EN   (1L<<24)

Definition at line 1740 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLLFORCEFDONE   (1L<<20)

Definition at line 1736 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLLFORCEFDONE_EN   (1L<<19)

Definition at line 1735 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLLFORCEFPASS   (1L<<21)

Definition at line 1737 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_PLLSEQSTART   (1L<<13)

Definition at line 1729 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_RESERVED   (1L<<14)

Definition at line 1730 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_VTH_CTRL   (0x3L<<11)

Definition at line 1725 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_VTH_CTRL_0   (0L<<11)

Definition at line 1726 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_VTH_CTRL_1   (1L<<11)

Definition at line 1727 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL0_VTH_CTRL_2   (2L<<11)

Definition at line 1728 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL1   0x00000954

Definition at line 1745 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL1_CAPFORCESLOWDOWN   (1L<<6)

Definition at line 1748 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL1_CAPFORCESLOWDOWN_EN   (1L<<5)

Definition at line 1747 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL1_CAPSELECTM   (0x1fL<<0)

Definition at line 1746 of file bnx2.h.

#define BNX2_MISC_LCPLL_CTRL1_SLOWDN_XOR   (1L<<7)

Definition at line 1749 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS   0x00000958

Definition at line 1751 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_CAPSELECT   (0x1fL<<10)

Definition at line 1758 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_CAPSTATE   (0x7L<<7)

Definition at line 1757 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_FREQDONE_SM   (1L<<0)

Definition at line 1752 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_FREQPASS_SM   (1L<<1)

Definition at line 1753 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_PLLSEQDONE   (1L<<2)

Definition at line 1754 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_PLLSEQPASS   (1L<<3)

Definition at line 1755 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_PLLSTATE   (0x7L<<4)

Definition at line 1756 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_SLOWDN_INDICATOR   (1L<<15)

Definition at line 1759 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_SLOWDN_INDICATOR_0   (0L<<15)

Definition at line 1760 of file bnx2.h.

#define BNX2_MISC_LCPLL_STATUS_SLOWDN_INDICATOR_1   (1L<<15)

Definition at line 1761 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS   0x00000828

Definition at line 980 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)

Definition at line 1004 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)

Definition at line 1003 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_COMPLETION_ENABLE   (1L<<18)

Definition at line 999 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_CONTEXT_ENABLE   (1L<<21)

Definition at line 1002 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_DMA_ENGINE_ENABLE   (1L<<26)

Definition at line 1007 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_EMAC_ENABLE   (1L<<9)

Definition at line 990 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_HOST_COALESCE_ENABLE   (1L<<19)

Definition at line 1000 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)

Definition at line 1001 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)

Definition at line 1005 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RSVD_FUTURE_ENABLE   (0x7L<<29)

Definition at line 1010 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RV2P_CMD_SCHEDULER_ENABLE   (1L<<28)

Definition at line 1009 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RX_BD_CACHE_ENABLE   (1L<<16)

Definition at line 997 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RX_DMA_ENABLE   (1L<<17)

Definition at line 998 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RX_LOOKUP_ENABLE   (1L<<13)

Definition at line 994 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RX_MBUF_ENABLE   (1L<<12)

Definition at line 993 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RX_PARSER_CATCHUP_ENABLE   (1L<<11)

Definition at line 992 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)

Definition at line 991 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RX_PROCESSOR_ENABLE   (1L<<14)

Definition at line 995 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_RX_V2P_ENABLE   (1L<<15)

Definition at line 996 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TIMER_ENABLE   (1L<<25)

Definition at line 1006 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_ASSEMBLER_ENABLE   (1L<<8)

Definition at line 989 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_BD_CACHE_ENABLE   (1L<<2)

Definition at line 983 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_BD_READ_ENABLE   (1L<<1)

Definition at line 982 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_DMA_ENABLE   (1L<<4)

Definition at line 985 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_HEADER_Q_ENABLE   (1L<<7)

Definition at line 988 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_PATCHUP_ENABLE   (1L<<5)

Definition at line 986 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_PAYLOAD_Q_ENABLE   (1L<<6)

Definition at line 987 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_PROCESSOR_ENABLE   (1L<<3)

Definition at line 984 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_TX_SCHEDULER_ENABLE   (1L<<0)

Definition at line 981 of file bnx2.h.

#define BNX2_MISC_LFSR_MASK_BITS_UMP_ENABLE   (1L<<27)

Definition at line 1008 of file bnx2.h.

#define BNX2_MISC_MEM_TM0   0x0000093c

Definition at line 1614 of file bnx2.h.

#define BNX2_MISC_MEM_TM0_HB_MEM_TM   (0xfL<<24)

Definition at line 1618 of file bnx2.h.

#define BNX2_MISC_MEM_TM0_MCP_SCPAD   (0xfL<<8)

Definition at line 1616 of file bnx2.h.

#define BNX2_MISC_MEM_TM0_PCIE_REPLAY_TM   (0xfL<<0)

Definition at line 1615 of file bnx2.h.

#define BNX2_MISC_MEM_TM0_UMP_TM   (0xffL<<16)

Definition at line 1617 of file bnx2.h.

#define BNX2_MISC_NEW_CORE_CTL   0x000008c8

Definition at line 1429 of file bnx2.h.

#define BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE   (1L<<16)

Definition at line 1432 of file bnx2.h.

#define BNX2_MISC_NEW_CORE_CTL_LINK_HOLDOFF_REQ   (1L<<1)

Definition at line 1431 of file bnx2.h.

#define BNX2_MISC_NEW_CORE_CTL_LINK_HOLDOFF_SUCCESS   (1L<<0)

Definition at line 1430 of file bnx2.h.

#define BNX2_MISC_NEW_CORE_CTL_RESERVED_CMN   (0x3fffL<<2)

Definition at line 1433 of file bnx2.h.

#define BNX2_MISC_NEW_CORE_CTL_RESERVED_TC   (0xffffL<<16)

Definition at line 1434 of file bnx2.h.

#define BNX2_MISC_NEW_HW_CTL   0x000008c4

Definition at line 1421 of file bnx2.h.

#define BNX2_MISC_NEW_HW_CTL_MAIN_POR_BYPASS   (1L<<0)

Definition at line 1422 of file bnx2.h.

#define BNX2_MISC_NEW_HW_CTL_RESERVED_SHARED   (0xfffL<<4)

Definition at line 1426 of file bnx2.h.

#define BNX2_MISC_NEW_HW_CTL_RESERVED_SPLIT   (0xffffL<<16)

Definition at line 1427 of file bnx2.h.

#define BNX2_MISC_NEW_HW_CTL_RINGOSC_ENABLE   (1L<<1)

Definition at line 1423 of file bnx2.h.

#define BNX2_MISC_NEW_HW_CTL_RINGOSC_SEL0   (1L<<2)

Definition at line 1424 of file bnx2.h.

#define BNX2_MISC_NEW_HW_CTL_RINGOSC_SEL1   (1L<<3)

Definition at line 1425 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL   0x0000095c

Definition at line 1763 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_FREQ_MON   (1L<<5)

Definition at line 1764 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_FREQ_MON_OFF   (0L<<5)

Definition at line 1765 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_FREQ_MON_ON   (1L<<5)

Definition at line 1766 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ   (0x3L<<10)

Definition at line 1777 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ_0   (0L<<10)

Definition at line 1778 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ_1   (1L<<10)

Definition at line 1779 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ_2   (2L<<10)

Definition at line 1780 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_IAMP_ADJ_3   (3L<<10)

Definition at line 1781 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ   (0x3L<<8)

Definition at line 1772 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ_0   (0L<<8)

Definition at line 1773 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ_1   (1L<<8)

Definition at line 1774 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ_2   (2L<<8)

Definition at line 1775 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_ICBUF_ADJ_3   (3L<<8)

Definition at line 1776 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM   (0x3L<<6)

Definition at line 1767 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM_0   (0L<<6)

Definition at line 1768 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM_1   (1L<<6)

Definition at line 1769 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM_2   (2L<<6)

Definition at line 1770 of file bnx2.h.

#define BNX2_MISC_OSCFUNDS_CTRL_XTAL_ADJCM_3   (3L<<6)

Definition at line 1771 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1   0x000008f0

Definition at line 1515 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_DEBUG   (1L<<31)

Definition at line 1533 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE   (0x7L<<0)

Definition at line 1516 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE_IDLE   (0L<<0)

Definition at line 1517 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE_INIT   (2L<<0)

Definition at line 1519 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE_RESERVED0   (6L<<0)

Definition at line 1523 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE_RESERVED1   (7L<<0)

Definition at line 1524 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE_RST   (4L<<0)

Definition at line 1521 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE_SET   (3L<<0)

Definition at line 1520 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE_VERIFY   (5L<<0)

Definition at line 1522 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_FMODE_WRITE   (1L<<0)

Definition at line 1518 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_PBYP   (1L<<19)

Definition at line 1529 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_PCOUNT   (0x7L<<16)

Definition at line 1528 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_PROGSEL   (1L<<9)

Definition at line 1526 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_PROGSTART   (1L<<10)

Definition at line 1527 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_SADBYP   (1L<<30)

Definition at line 1532 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_TM   (0x7L<<27)

Definition at line 1531 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_USEPINS   (1L<<8)

Definition at line 1525 of file bnx2.h.

#define BNX2_MISC_OTP_CMD1_VSEL   (0xfL<<20)

Definition at line 1530 of file bnx2.h.

#define BNX2_MISC_OTP_CMD2   0x000008f4

Definition at line 1535 of file bnx2.h.

#define BNX2_MISC_OTP_CMD2_DOSEL   (0x7fL<<16)

Definition at line 1537 of file bnx2.h.

#define BNX2_MISC_OTP_CMD2_DOSEL_0   (0L<<16)

Definition at line 1538 of file bnx2.h.

#define BNX2_MISC_OTP_CMD2_DOSEL_1   (1L<<16)

Definition at line 1539 of file bnx2.h.

#define BNX2_MISC_OTP_CMD2_DOSEL_127   (127L<<16)

Definition at line 1540 of file bnx2.h.

#define BNX2_MISC_OTP_CMD2_OTP_ROM_ADDR   (0x3ffL<<0)

Definition at line 1536 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT1_CMD   0x000008fc

Definition at line 1549 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT1_CMD_LOAD_DATA   (1L<<3)

Definition at line 1553 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT1_CMD_RESET_MODE_N   (1L<<0)

Definition at line 1550 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT1_CMD_SHIFT_DONE   (1L<<1)

Definition at line 1551 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT1_CMD_SHIFT_SELECT   (0x1fL<<8)

Definition at line 1554 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT1_CMD_SHIFT_START   (1L<<2)

Definition at line 1552 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT1_DATA   0x00000900

Definition at line 1556 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT2_CMD   0x00000904

Definition at line 1557 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT2_CMD_LOAD_DATA   (1L<<3)

Definition at line 1561 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT2_CMD_RESET_MODE_N   (1L<<0)

Definition at line 1558 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT2_CMD_SHIFT_DONE   (1L<<1)

Definition at line 1559 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT2_CMD_SHIFT_SELECT   (0x1fL<<8)

Definition at line 1562 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT2_CMD_SHIFT_START   (1L<<2)

Definition at line 1560 of file bnx2.h.

#define BNX2_MISC_OTP_SHIFT2_DATA   0x00000908

Definition at line 1564 of file bnx2.h.

#define BNX2_MISC_OTP_STATUS   0x000008f8

Definition at line 1542 of file bnx2.h.

#define BNX2_MISC_OTP_STATUS_BUSY   (1L<<9)

Definition at line 1545 of file bnx2.h.

#define BNX2_MISC_OTP_STATUS_BUSYSM   (1L<<10)

Definition at line 1546 of file bnx2.h.

#define BNX2_MISC_OTP_STATUS_DATA   (0xffL<<0)

Definition at line 1543 of file bnx2.h.

#define BNX2_MISC_OTP_STATUS_DONE   (1L<<11)

Definition at line 1547 of file bnx2.h.

#define BNX2_MISC_OTP_STATUS_VALID   (1L<<8)

Definition at line 1544 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0   0x000008a4

Definition at line 1150 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_COM_CTXC_PERR_EN_XI   (1L<<7)

Definition at line 1190 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_COM_DMAE_PERR_EN_XI   (1L<<0)

Definition at line 1183 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_COM_MISC_CTXC   (1L<<0)

Definition at line 1151 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_COM_MISC_REGF   (1L<<1)

Definition at line 1152 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_COM_MISC_SCPAD   (1L<<2)

Definition at line 1153 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_COM_SCPAD_PERR_EN_XI   (1L<<8)

Definition at line 1191 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CP_CTXC_PERR_EN_XI   (1L<<9)

Definition at line 1192 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CP_DMAE_PERR_EN_XI   (1L<<1)

Definition at line 1184 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CP_MISC_CTXC   (1L<<3)

Definition at line 1154 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CP_MISC_REGF   (1L<<4)

Definition at line 1155 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CP_MISC_SCPAD   (1L<<5)

Definition at line 1156 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CP_SCPAD_PERR_EN_XI   (1L<<10)

Definition at line 1193 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CS_MISC_TMEM   (1L<<6)

Definition at line 1157 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CS_TMEM_PERR_EN_XI   (1L<<17)

Definition at line 1200 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_CACHE_PERR_EN_XI   (1L<<5)

Definition at line 1188 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_MIRROR_PERR_EN_XI   (1L<<6)

Definition at line 1189 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM0   (1L<<7)

Definition at line 1158 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM1   (1L<<8)

Definition at line 1159 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM2   (1L<<9)

Definition at line 1160 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM3   (1L<<10)

Definition at line 1161 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM4   (1L<<11)

Definition at line 1162 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM5   (1L<<12)

Definition at line 1163 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_MISC_PGTBL   (1L<<13)

Definition at line 1164 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_PGTBL_PERR_EN_XI   (1L<<4)

Definition at line 1187 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_CTX_USAGE_CNT_PERR_EN_XI   (1L<<3)

Definition at line 1186 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR0   (1L<<14)

Definition at line 1165 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR1   (1L<<15)

Definition at line 1166 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR2   (1L<<16)

Definition at line 1167 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR3   (1L<<17)

Definition at line 1168 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR4   (1L<<18)

Definition at line 1169 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW0   (1L<<19)

Definition at line 1170 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW1   (1L<<20)

Definition at line 1171 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW2   (1L<<21)

Definition at line 1172 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_HC_MISC_DMA   (1L<<22)

Definition at line 1173 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_MCP_MISC_REGF   (1L<<23)

Definition at line 1174 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_MCP_MISC_SCPAD   (1L<<24)

Definition at line 1175 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_MQ_CTX_PERR_EN_XI   (1L<<18)

Definition at line 1201 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_MQ_MISC_CTX   (1L<<25)

Definition at line 1176 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RBDC_MISC   (1L<<26)

Definition at line 1177 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RBUF_DATAMEM_PERR_EN_XI   (1L<<22)

Definition at line 1205 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RBUF_MISC_MB   (1L<<27)

Definition at line 1178 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RBUF_MISC_PTR   (1L<<28)

Definition at line 1179 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RBUF_PTRMEM_PERR_EN_XI   (1L<<21)

Definition at line 1204 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RDE_MISC_RPC   (1L<<29)

Definition at line 1180 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RDE_MISC_RPM   (1L<<30)

Definition at line 1181 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RPC_DFIFOMEM_PERR_EN_XI   (1L<<20)

Definition at line 1203 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RPM_ACPIBEMEM_PERR_EN_XI   (1L<<2)

Definition at line 1185 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RPM_DFIFOMEM_PERR_EN_XI   (1L<<19)

Definition at line 1202 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RV2P_CB0REGS_PERR_EN_XI   (1L<<26)

Definition at line 1209 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RV2P_CB1REGS_PERR_EN_XI   (1L<<25)

Definition at line 1208 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RV2P_MISC_CB0REGS   (1L<<31)

Definition at line 1182 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RV2P_P1IRAM_PERR_EN_XI   (1L<<24)

Definition at line 1207 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RV2P_P2IRAM_PERR_EN_XI   (1L<<23)

Definition at line 1206 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RXP_CTXC_PERR_EN_XI   (1L<<12)

Definition at line 1195 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RXP_RBUFC_PERR_EN_XI   (1L<<11)

Definition at line 1194 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_RXP_SCPAD_PERR_EN_XI   (1L<<13)

Definition at line 1196 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_TBDC_PERR_EN_XI   (1L<<30)

Definition at line 1213 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_TDMA_PERR_EN_XI   (1L<<29)

Definition at line 1212 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_THBUF_PERR_EN_XI   (1L<<28)

Definition at line 1211 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_TPAT_SCPAD_PERR_EN_XI   (1L<<14)

Definition at line 1197 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_TPBUF_PERR_EN_XI   (1L<<27)

Definition at line 1210 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_TSCH_LR_PERR_EN_XI   (1L<<31)

Definition at line 1214 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_TXP_CTXC_PERR_EN_XI   (1L<<15)

Definition at line 1198 of file bnx2.h.

#define BNX2_MISC_PERR_ENA0_TXP_SCPAD_PERR_EN_XI   (1L<<16)

Definition at line 1199 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1   0x000008a8

Definition at line 1216 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_COMQ_PERR_EN_XI   (1L<<12)

Definition at line 1260 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_COMTQ_PERR_EN_XI   (1L<<11)

Definition at line 1259 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_COMXQ_PERR_EN_XI   (1L<<20)

Definition at line 1268 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_CPQ_MISC   (1L<<24)

Definition at line 1241 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_CPQ_PERR_EN_XI   (1L<<24)

Definition at line 1272 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_CSQ_MISC   (1L<<23)

Definition at line 1240 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_CSQ_PERR_EN_XI   (1L<<25)

Definition at line 1273 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_HC_CONSUMSTB_PERR_EN_XI   (1L<<6)

Definition at line 1254 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_HC_MSIX_PERR_EN_XI   (1L<<4)

Definition at line 1252 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_HC_PRODUCSTB_PERR_EN_XI   (1L<<5)

Definition at line 1253 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_HC_STATS_PERR_EN_XI   (1L<<3)

Definition at line 1251 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_MCPQ_MISC   (1L<<25)

Definition at line 1242 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_MCPQ_PERR_EN_XI   (1L<<8)

Definition at line 1256 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_MQ_IDX_PERR_EN_XI   (1L<<29)

Definition at line 1277 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RBDC_PERR_EN_XI   (1L<<0)

Definition at line 1249 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RDMA_DFIFO_PERR_EN_XI   (1L<<2)

Definition at line 1250 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RDMAQ_MISC   (1L<<22)

Definition at line 1239 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RDMAQ_PERR_EN_XI   (1L<<16)

Definition at line 1264 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RLUP_CID_PERR_EN_XI   (1L<<26)

Definition at line 1274 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RLUPQ_MISC   (1L<<31)

Definition at line 1248 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RLUPQ_PERR_EN_XI   (1L<<13)

Definition at line 1261 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2P_MISC_CB1REGS   (1L<<0)

Definition at line 1217 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2P_MISC_P1IRAM   (1L<<1)

Definition at line 1218 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2P_MISC_P2IRAM   (1L<<2)

Definition at line 1219 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2PCS_TMEM_PERR_EN_XI   (1L<<27)

Definition at line 1275 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2PCSQ_PERR_EN_XI   (1L<<28)

Definition at line 1276 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2PMQ_MISC   (1L<<26)

Definition at line 1243 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2PMQ_PERR_EN_XI   (1L<<23)

Definition at line 1271 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2PPQ_MISC   (1L<<27)

Definition at line 1244 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2PPQ_PERR_EN_XI   (1L<<15)

Definition at line 1263 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2PTQ_MISC   (1L<<28)

Definition at line 1245 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RV2PTQ_PERR_EN_XI   (1L<<22)

Definition at line 1270 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RXP_MISC_CTXC   (1L<<3)

Definition at line 1220 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RXP_MISC_RBUFC   (1L<<6)

Definition at line 1223 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RXP_MISC_REGF   (1L<<4)

Definition at line 1221 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RXP_MISC_SCPAD   (1L<<5)

Definition at line 1222 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RXPCQ_MISC   (1L<<30)

Definition at line 1247 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RXPCQ_PERR_EN_XI   (1L<<21)

Definition at line 1269 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RXPQ_MISC   (1L<<29)

Definition at line 1246 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_RXPQ_PERR_EN_XI   (1L<<14)

Definition at line 1262 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TASQ_PERR_EN_XI   (1L<<17)

Definition at line 1265 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TBDC_MISC   (1L<<7)

Definition at line 1224 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TBDRQ_PERR_EN_XI   (1L<<18)

Definition at line 1266 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TDMA_MISC   (1L<<8)

Definition at line 1225 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TDMAQ_PERR_EN_XI   (1L<<9)

Definition at line 1257 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_THBUF_MISC_MB0   (1L<<9)

Definition at line 1226 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_THBUF_MISC_MB1   (1L<<10)

Definition at line 1227 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TPAT_MISC_REGF   (1L<<11)

Definition at line 1228 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TPAT_MISC_SCPAD   (1L<<12)

Definition at line 1229 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TPATQ_PERR_EN_XI   (1L<<7)

Definition at line 1255 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TPBUF_MISC_MB   (1L<<13)

Definition at line 1230 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TSCH_MISC_LR   (1L<<14)

Definition at line 1231 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TSCHQ_PERR_EN_XI   (1L<<19)

Definition at line 1267 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TXP_MISC_CTXC   (1L<<15)

Definition at line 1232 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TXP_MISC_REGF   (1L<<16)

Definition at line 1233 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TXP_MISC_SCPAD   (1L<<17)

Definition at line 1234 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_TXPQ_PERR_EN_XI   (1L<<10)

Definition at line 1258 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_UMP_MISC_FIORX   (1L<<18)

Definition at line 1235 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_UMP_MISC_FIOTX   (1L<<19)

Definition at line 1236 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_UMP_MISC_RX   (1L<<20)

Definition at line 1237 of file bnx2.h.

#define BNX2_MISC_PERR_ENA1_UMP_MISC_TX   (1L<<21)

Definition at line 1238 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2   0x000008ac

Definition at line 1279 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_COMQ_MISC   (1L<<0)

Definition at line 1280 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_COMTQ_MISC   (1L<<2)

Definition at line 1282 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_COMXQ_MISC   (1L<<1)

Definition at line 1281 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_HB_MEM_PERR_EN_XI   (1L<<5)

Definition at line 1294 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_MCP_ROM_PERR_EN_XI   (1L<<3)

Definition at line 1292 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_MCP_SCPAD_PERR_EN_XI   (1L<<4)

Definition at line 1293 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_PCIE_REPLAY_PERR_EN_XI   (1L<<6)

Definition at line 1295 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_TASQ_MISC   (1L<<8)

Definition at line 1288 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_TBDRQ_MISC   (1L<<4)

Definition at line 1284 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_TDMAQ_MISC   (1L<<6)

Definition at line 1286 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_TGT_FIFO_PERR_EN_XI   (1L<<0)

Definition at line 1289 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_TPATQ_MISC   (1L<<7)

Definition at line 1287 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_TSCHQ_MISC   (1L<<3)

Definition at line 1283 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_TXPQ_MISC   (1L<<5)

Definition at line 1285 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_UMP_RX_PERR_EN_XI   (1L<<2)

Definition at line 1291 of file bnx2.h.

#define BNX2_MISC_PERR_ENA2_UMP_TX_PERR_EN_XI   (1L<<1)

Definition at line 1290 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0   0x00000944

Definition at line 1638 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_COM_CTXC_PERR   (1L<<7)

Definition at line 1646 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_COM_DMAE_PERR   (1L<<0)

Definition at line 1639 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_COM_SCPAD_PERR   (1L<<8)

Definition at line 1647 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_CP_CTXC_PERR   (1L<<9)

Definition at line 1648 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_CP_DMAE_PERR   (1L<<1)

Definition at line 1640 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_CP_SCPAD_PERR   (1L<<10)

Definition at line 1649 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_CS_TMEM_PERR   (1L<<17)

Definition at line 1656 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_CTX_CACHE_PERR   (1L<<5)

Definition at line 1644 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_CTX_MIRROR_PERR   (1L<<6)

Definition at line 1645 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_CTX_PGTBL_PERR   (1L<<4)

Definition at line 1643 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_CTX_USAGE_CNT_PERR   (1L<<3)

Definition at line 1642 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_MQ_CTX_PERR   (1L<<18)

Definition at line 1657 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RBUF_DATAMEM_PERR   (1L<<22)

Definition at line 1661 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RBUF_PTRMEM_PERR   (1L<<21)

Definition at line 1660 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RPC_DFIFOMEM_PERR   (1L<<20)

Definition at line 1659 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RPM_ACPIBEMEM_PERR   (1L<<2)

Definition at line 1641 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RPM_DFIFOMEM_PERR   (1L<<19)

Definition at line 1658 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RV2P_CB0REGS_PERR   (1L<<26)

Definition at line 1665 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RV2P_CB1REGS_PERR   (1L<<25)

Definition at line 1664 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RV2P_P1IRAM_PERR   (1L<<24)

Definition at line 1663 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RV2P_P2IRAM_PERR   (1L<<23)

Definition at line 1662 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RXP_CTXC_PERR   (1L<<12)

Definition at line 1651 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RXP_RBUFC_PERR   (1L<<11)

Definition at line 1650 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_RXP_SCPAD_PERR   (1L<<13)

Definition at line 1652 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_TBDC_PERR   (1L<<30)

Definition at line 1669 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_TDMA_PERR   (1L<<29)

Definition at line 1668 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_THBUF_PERR   (1L<<28)

Definition at line 1667 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_TPAT_SCPAD_PERR   (1L<<14)

Definition at line 1653 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_TPBUF_PERR   (1L<<27)

Definition at line 1666 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_TSCH_LR_PERR   (1L<<31)

Definition at line 1670 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_TXP_CTXC_PERR   (1L<<15)

Definition at line 1654 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS0_TXP_SCPAD_PERR   (1L<<16)

Definition at line 1655 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1   0x00000948

Definition at line 1672 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_COMQ_PERR   (1L<<12)

Definition at line 1684 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_COMTQ_PERR   (1L<<11)

Definition at line 1683 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_COMXQ_PERR   (1L<<20)

Definition at line 1692 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_CPQ_PERR   (1L<<24)

Definition at line 1696 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_CSQ_PERR   (1L<<25)

Definition at line 1697 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_HC_CONSUMSTB_PERR   (1L<<6)

Definition at line 1678 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_HC_MSIX_PERR   (1L<<4)

Definition at line 1676 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_HC_PRODUCSTB_PERR   (1L<<5)

Definition at line 1677 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_HC_STATS_PERR   (1L<<3)

Definition at line 1675 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_MCPQ_PERR   (1L<<8)

Definition at line 1680 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_MQ_IDX_PERR   (1L<<29)

Definition at line 1701 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RBDC_PERR   (1L<<0)

Definition at line 1673 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RDMA_DFIFO_PERR   (1L<<2)

Definition at line 1674 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RDMAQ_PERR   (1L<<16)

Definition at line 1688 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RLUP_CID_PERR   (1L<<26)

Definition at line 1698 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RLUPQ_PERR   (1L<<13)

Definition at line 1685 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RV2PCS_TMEM_PERR   (1L<<27)

Definition at line 1699 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RV2PCSQ_PERR   (1L<<28)

Definition at line 1700 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RV2PMQ_PERR   (1L<<23)

Definition at line 1695 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RV2PPQ_PERR   (1L<<15)

Definition at line 1687 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RV2PTQ_PERR   (1L<<22)

Definition at line 1694 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RXPCQ_PERR   (1L<<21)

Definition at line 1693 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_RXPQ_PERR   (1L<<14)

Definition at line 1686 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_TASQ_PERR   (1L<<17)

Definition at line 1689 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_TBDRQ_PERR   (1L<<18)

Definition at line 1690 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_TDMAQ_PERR   (1L<<9)

Definition at line 1681 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_TPATQ_PERR   (1L<<7)

Definition at line 1679 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_TSCHQ_PERR   (1L<<19)

Definition at line 1691 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS1_TXPQ_PERR   (1L<<10)

Definition at line 1682 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS2   0x0000094c

Definition at line 1703 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS2_HB_MEM_PERR   (1L<<5)

Definition at line 1709 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS2_MCP_ROM_PERR   (1L<<3)

Definition at line 1707 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS2_MCP_SCPAD_PERR   (1L<<4)

Definition at line 1708 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS2_PCIE_REPLAY_PERR   (1L<<6)

Definition at line 1710 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS2_TGT_FIFO_PERR   (1L<<0)

Definition at line 1704 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS2_UMP_RX_PERR   (1L<<2)

Definition at line 1706 of file bnx2.h.

#define BNX2_MISC_PERR_STATUS2_UMP_TX_PERR   (1L<<1)

Definition at line 1705 of file bnx2.h.

#define BNX2_MISC_PPIO   0x000008d4

Definition at line 1445 of file bnx2.h.

#define BNX2_MISC_PPIO_CLR   (0xfL<<16)

Definition at line 1448 of file bnx2.h.

#define BNX2_MISC_PPIO_EVENT   0x000008e8

Definition at line 1487 of file bnx2.h.

#define BNX2_MISC_PPIO_EVENT_ENABLE   (0xfL<<0)

Definition at line 1488 of file bnx2.h.

#define BNX2_MISC_PPIO_FLOAT   (0xfL<<24)

Definition at line 1449 of file bnx2.h.

#define BNX2_MISC_PPIO_INT   0x000008d8

Definition at line 1451 of file bnx2.h.

#define BNX2_MISC_PPIO_INT_INT_STATE   (0xfL<<0)

Definition at line 1452 of file bnx2.h.

#define BNX2_MISC_PPIO_INT_OLD_CLR   (0xfL<<24)

Definition at line 1455 of file bnx2.h.

#define BNX2_MISC_PPIO_INT_OLD_SET   (0xfL<<16)

Definition at line 1454 of file bnx2.h.

#define BNX2_MISC_PPIO_INT_OLD_VALUE   (0xfL<<8)

Definition at line 1453 of file bnx2.h.

#define BNX2_MISC_PPIO_SET   (0xfL<<8)

Definition at line 1447 of file bnx2.h.

#define BNX2_MISC_PPIO_VALUE   (0xfL<<0)

Definition at line 1446 of file bnx2.h.

#define BNX2_MISC_RESERVED1   0x00000878

Definition at line 1067 of file bnx2.h.

#define BNX2_MISC_RESERVED1_MISC_RESERVED1_VALUE   (0x3fL<<0)

Definition at line 1068 of file bnx2.h.

#define BNX2_MISC_RESERVED2   0x0000087c

Definition at line 1070 of file bnx2.h.

#define BNX2_MISC_RESERVED2_LINK_IN_L23   (1L<<1)

Definition at line 1072 of file bnx2.h.

#define BNX2_MISC_RESERVED2_PCIE_DIS   (1L<<0)

Definition at line 1071 of file bnx2.h.

#define BNX2_MISC_RESET_NUMS   0x000008dc

Definition at line 1457 of file bnx2.h.

#define BNX2_MISC_RESET_NUMS_NUM_CMN_RESETS   (0x7L<<12)

Definition at line 1461 of file bnx2.h.

#define BNX2_MISC_RESET_NUMS_NUM_HARD_RESETS   (0x7L<<0)

Definition at line 1458 of file bnx2.h.

#define BNX2_MISC_RESET_NUMS_NUM_PCIE_RESETS   (0x7L<<4)

Definition at line 1459 of file bnx2.h.

#define BNX2_MISC_RESET_NUMS_NUM_PERSTB_RESETS   (0x7L<<8)

Definition at line 1460 of file bnx2.h.

#define BNX2_MISC_RESET_NUMS_NUM_PORT_RESETS   (0x7L<<16)

Definition at line 1462 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL   0x00000880

Definition at line 1074 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_ASF_RST   (1L<<0)

Definition at line 1075 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_EN_NIC_SMB_ADDR_0   (1L<<30)

Definition at line 1092 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_HB_TO   (1L<<3)

Definition at line 1078 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR1   (0x7fL<<16)

Definition at line 1090 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR2   (0x7fL<<23)

Definition at line 1091 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_PA_TO   (1L<<4)

Definition at line 1079 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_PL_TO   (1L<<5)

Definition at line 1080 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_RES   (0x3L<<10)

Definition at line 1085 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_RT_TO   (1L<<6)

Definition at line 1081 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_SMB_AUTOREAD   (1L<<15)

Definition at line 1089 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_SMB_BB_EN   (1L<<13)

Definition at line 1087 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_SMB_EARLY_ATTN   (1L<<31)

Definition at line 1093 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_SMB_EN   (1L<<12)

Definition at line 1086 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_SMB_EVENT   (1L<<7)

Definition at line 1082 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_SMB_NO_ADDR_FILT   (1L<<14)

Definition at line 1088 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_STRETCH_EN   (1L<<8)

Definition at line 1083 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_STRETCH_PULSE   (1L<<9)

Definition at line 1084 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_TSC_EN   (1L<<1)

Definition at line 1076 of file bnx2.h.

#define BNX2_MISC_SM_ASF_CONTROL_WG_TO   (1L<<2)

Definition at line 1077 of file bnx2.h.

#define BNX2_MISC_SMB_HEARTBEAT   0x00000890

Definition at line 1135 of file bnx2.h.

#define BNX2_MISC_SMB_HEARTBEAT_HEARTBEAT   (0xffffL<<0)

Definition at line 1136 of file bnx2.h.

#define BNX2_MISC_SMB_IN   0x00000884

Definition at line 1095 of file bnx2.h.

#define BNX2_MISC_SMB_IN_DAT_IN   (0xffL<<0)

Definition at line 1096 of file bnx2.h.

#define BNX2_MISC_SMB_IN_DONE   (1L<<9)

Definition at line 1098 of file bnx2.h.

#define BNX2_MISC_SMB_IN_FIRSTBYTE   (1L<<10)

Definition at line 1099 of file bnx2.h.

#define BNX2_MISC_SMB_IN_RDY   (1L<<8)

Definition at line 1097 of file bnx2.h.

#define BNX2_MISC_SMB_IN_STATUS   (0x7L<<11)

Definition at line 1100 of file bnx2.h.

#define BNX2_MISC_SMB_IN_STATUS_OFLOW   (0x2L<<11)

Definition at line 1103 of file bnx2.h.

#define BNX2_MISC_SMB_IN_STATUS_OK   (0x0L<<11)

Definition at line 1101 of file bnx2.h.

#define BNX2_MISC_SMB_IN_STATUS_PEC   (0x1L<<11)

Definition at line 1102 of file bnx2.h.

#define BNX2_MISC_SMB_IN_STATUS_STOP   (0x3L<<11)

Definition at line 1104 of file bnx2.h.

#define BNX2_MISC_SMB_IN_STATUS_TIMEOUT   (0x4L<<11)

Definition at line 1105 of file bnx2.h.

#define BNX2_MISC_SMB_OUT   0x00000888

Definition at line 1107 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_ACC_TYPE   (1L<<11)

Definition at line 1112 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_DAT_OUT   (0xffL<<0)

Definition at line 1108 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_ENB_PEC   (1L<<12)

Definition at line 1113 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_GET_RX_LEN   (1L<<13)

Definition at line 1114 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_LAST   (1L<<10)

Definition at line 1111 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_RDY   (1L<<8)

Definition at line 1109 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_CLK_EN   (1L<<27)

Definition at line 1129 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_CLK_IN   (1L<<28)

Definition at line 1130 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_DAT_EN   (1L<<25)

Definition at line 1127 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_DAT_IN   (1L<<26)

Definition at line 1128 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_SLAVEMODE   (1L<<24)

Definition at line 1126 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS   (0xfL<<20)

Definition at line 1116 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_BADACK   (6L<<20)

Definition at line 1123 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_LOST   (5L<<20)

Definition at line 1122 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_NACK   (1L<<20)

Definition at line 1118 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_OK   (0L<<20)

Definition at line 1117 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_STOP   (3L<<20)

Definition at line 1120 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_LOST   (0xdL<<20)

Definition at line 1125 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_NACK   (9L<<20)

Definition at line 1124 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_TIMEOUT   (4L<<20)

Definition at line 1121 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_UFLOW   (2L<<20)

Definition at line 1119 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_SMB_READ_LEN   (0x3fL<<14)

Definition at line 1115 of file bnx2.h.

#define BNX2_MISC_SMB_OUT_START   (1L<<9)

Definition at line 1110 of file bnx2.h.

#define BNX2_MISC_SMB_POLL_ASF   0x00000894

Definition at line 1138 of file bnx2.h.

#define BNX2_MISC_SMB_POLL_ASF_POLL_ASF   (0xffffL<<0)

Definition at line 1139 of file bnx2.h.

#define BNX2_MISC_SMB_POLL_LEGACY   0x00000898

Definition at line 1141 of file bnx2.h.

#define BNX2_MISC_SMB_POLL_LEGACY_POLL_LEGACY   (0xffffL<<0)

Definition at line 1142 of file bnx2.h.

#define BNX2_MISC_SMB_RETRAN   0x0000089c

Definition at line 1144 of file bnx2.h.

#define BNX2_MISC_SMB_RETRAN_RETRAN   (0xffL<<0)

Definition at line 1145 of file bnx2.h.

#define BNX2_MISC_SMB_TIMESTAMP   0x000008a0

Definition at line 1147 of file bnx2.h.

#define BNX2_MISC_SMB_TIMESTAMP_TIMESTAMP   (0xffffffffL<<0)

Definition at line 1148 of file bnx2.h.

#define BNX2_MISC_SMB_WATCHDOG   0x0000088c

Definition at line 1132 of file bnx2.h.

#define BNX2_MISC_SMB_WATCHDOG_WATCHDOG   (0xffffL<<0)

Definition at line 1133 of file bnx2.h.

#define BNX2_MISC_SPIO   0x0000081c

Definition at line 961 of file bnx2.h.

#define BNX2_MISC_SPIO_CLR   (0xffL<<16)

Definition at line 964 of file bnx2.h.

#define BNX2_MISC_SPIO_EVENT   0x000008e4

Definition at line 1484 of file bnx2.h.

#define BNX2_MISC_SPIO_EVENT_ENABLE   (0xffL<<0)

Definition at line 1485 of file bnx2.h.

#define BNX2_MISC_SPIO_FLOAT   (0xffL<<24)

Definition at line 965 of file bnx2.h.

#define BNX2_MISC_SPIO_INT   0x00000820

Definition at line 967 of file bnx2.h.

#define BNX2_MISC_SPIO_INT_INT_STATE_TE   (0xfL<<0)

Definition at line 968 of file bnx2.h.

#define BNX2_MISC_SPIO_INT_INT_STATE_XI   (0xffL<<0)

Definition at line 972 of file bnx2.h.

#define BNX2_MISC_SPIO_INT_OLD_CLR_TE   (0xfL<<24)

Definition at line 971 of file bnx2.h.

#define BNX2_MISC_SPIO_INT_OLD_CLR_XI   (0xffL<<24)

Definition at line 975 of file bnx2.h.

#define BNX2_MISC_SPIO_INT_OLD_SET_TE   (0xfL<<16)

Definition at line 970 of file bnx2.h.

#define BNX2_MISC_SPIO_INT_OLD_SET_XI   (0xffL<<16)

Definition at line 974 of file bnx2.h.

#define BNX2_MISC_SPIO_INT_OLD_VALUE_TE   (0xfL<<8)

Definition at line 969 of file bnx2.h.

#define BNX2_MISC_SPIO_INT_OLD_VALUE_XI   (0xffL<<8)

Definition at line 973 of file bnx2.h.

#define BNX2_MISC_SPIO_SET   (0xffL<<8)

Definition at line 963 of file bnx2.h.

#define BNX2_MISC_SPIO_VALUE   (0xffL<<0)

Definition at line 962 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL   0x00000940

Definition at line 1620 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_ANALOG_RST   (1L<<28)

Definition at line 1635 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_ATTEN_FREF   (1L<<26)

Definition at line 1633 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_DIGITAL_RST   (1L<<27)

Definition at line 1634 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_FREQ_DET_DIS   (1L<<1)

Definition at line 1622 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_KVCO_XF   (0x7L<<13)

Definition at line 1627 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_KVCO_XS   (0x7L<<16)

Definition at line 1628 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_LCPX   (0x3fL<<2)

Definition at line 1623 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_LOCK   (1L<<29)

Definition at line 1636 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_PH_DET_DIS   (1L<<0)

Definition at line 1621 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_RX   (0x3L<<8)

Definition at line 1624 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_TESTA_EN   (1L<<23)

Definition at line 1631 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_TESTA_SEL   (0x3L<<24)

Definition at line 1632 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_TESTD_EN   (1L<<19)

Definition at line 1629 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_TESTD_SEL   (0x7L<<20)

Definition at line 1630 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_VC_EN   (1L<<10)

Definition at line 1625 of file bnx2.h.

#define BNX2_MISC_USPLL_CTRL_VCO_MG   (0x3L<<11)

Definition at line 1626 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL   0x000008b4

Definition at line 1302 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS10_XI   (12L<<0)

Definition at line 1317 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS12_XI   (13L<<0)

Definition at line 1318 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS14_XI   (14L<<0)

Definition at line 1319 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS16_XI   (15L<<0)

Definition at line 1320 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS2_XI   (8L<<0)

Definition at line 1313 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS4_XI   (9L<<0)

Definition at line 1314 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS6_XI   (10L<<0)

Definition at line 1315 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_MINUS8_XI   (11L<<0)

Definition at line 1316 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_NOM_XI   (7L<<0)

Definition at line 1312 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS10_XI   (2L<<0)

Definition at line 1307 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS12_XI   (1L<<0)

Definition at line 1306 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS14_XI   (0L<<0)

Definition at line 1305 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS2_XI   (6L<<0)

Definition at line 1311 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS4_XI   (5L<<0)

Definition at line 1310 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS6_XI   (4L<<0)

Definition at line 1309 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_PLUS8_XI   (3L<<0)

Definition at line 1308 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MAIN_XI   (0xfL<<0)

Definition at line 1304 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT   (0xfL<<8)

Definition at line 1338 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS10   (12L<<8)

Definition at line 1351 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS12   (13L<<8)

Definition at line 1352 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS14   (14L<<8)

Definition at line 1353 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS16   (15L<<8)

Definition at line 1354 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS2   (8L<<8)

Definition at line 1347 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS4   (9L<<8)

Definition at line 1348 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS6   (10L<<8)

Definition at line 1349 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_MINUS8   (11L<<8)

Definition at line 1350 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_NOM   (7L<<8)

Definition at line 1346 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS10   (2L<<8)

Definition at line 1341 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS12   (1L<<8)

Definition at line 1340 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS14   (0L<<8)

Definition at line 1339 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS2   (6L<<8)

Definition at line 1345 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS4   (5L<<8)

Definition at line 1344 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS6   (4L<<8)

Definition at line 1343 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_0_MGMT_PLUS8   (3L<<8)

Definition at line 1342 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_1_2   (0xfL<<0)

Definition at line 1303 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5   (0xfL<<4)

Definition at line 1321 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_MINUS10   (12L<<4)

Definition at line 1334 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_MINUS12   (13L<<4)

Definition at line 1335 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_MINUS14   (14L<<4)

Definition at line 1336 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_MINUS16   (15L<<4)

Definition at line 1337 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_MINUS2   (8L<<4)

Definition at line 1330 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_MINUS4   (9L<<4)

Definition at line 1331 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_MINUS6   (10L<<4)

Definition at line 1332 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_MINUS8   (11L<<4)

Definition at line 1333 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_NOM   (7L<<4)

Definition at line 1329 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_PLUS10   (2L<<4)

Definition at line 1324 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_PLUS12   (1L<<4)

Definition at line 1323 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_PLUS14   (0L<<4)

Definition at line 1322 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_PLUS2   (6L<<4)

Definition at line 1328 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_PLUS4   (5L<<4)

Definition at line 1327 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_PLUS6   (4L<<4)

Definition at line 1326 of file bnx2.h.

#define BNX2_MISC_VREG_CONTROL_2_5_PLUS8   (3L<<4)

Definition at line 1325 of file bnx2.h.

#define BNX2_MQ_BAD_RD_ADDR   0x00003c18

Definition at line 4498 of file bnx2.h.

#define BNX2_MQ_BAD_WR_ADDR   0x00003c14

Definition at line 4497 of file bnx2.h.

#define BNX2_MQ_COMMAND   0x00003c00

Definition at line 4459 of file bnx2.h.

#define BNX2_MQ_COMMAND_ENABLED   (1L<<0)

Definition at line 4460 of file bnx2.h.

#define BNX2_MQ_COMMAND_IDB_CFG_ERROR   (1L<<7)

Definition at line 4465 of file bnx2.h.

#define BNX2_MQ_COMMAND_IDB_OVERFLOW   (1L<<10)

Definition at line 4466 of file bnx2.h.

#define BNX2_MQ_COMMAND_INIT   (1L<<1)

Definition at line 4461 of file bnx2.h.

#define BNX2_MQ_COMMAND_NO_BIN_ERROR   (1L<<11)

Definition at line 4467 of file bnx2.h.

#define BNX2_MQ_COMMAND_NO_MAP_ERROR   (1L<<12)

Definition at line 4468 of file bnx2.h.

#define BNX2_MQ_COMMAND_OVERFLOW   (1L<<4)

Definition at line 4462 of file bnx2.h.

#define BNX2_MQ_COMMAND_RD_ERROR   (1L<<6)

Definition at line 4464 of file bnx2.h.

#define BNX2_MQ_COMMAND_WR_ERROR   (1L<<5)

Definition at line 4463 of file bnx2.h.

#define BNX2_MQ_CONFIG   0x00003c08

Definition at line 4476 of file bnx2.h.

#define BNX2_MQ_CONFIG_BIN_MQ_MODE   (1L<<2)

Definition at line 4479 of file bnx2.h.

#define BNX2_MQ_CONFIG_CUR_DEPTH   (0x7fL<<20)

Definition at line 4488 of file bnx2.h.

#define BNX2_MQ_CONFIG_DIS_IDB_DROP   (1L<<3)

Definition at line 4480 of file bnx2.h.

#define BNX2_MQ_CONFIG_HALT_DIS   (1L<<1)

Definition at line 4478 of file bnx2.h.

#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE   (0x7L<<4)

Definition at line 4481 of file bnx2.h.

#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_1K   (2L<<4)

Definition at line 4484 of file bnx2.h.

#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256   (0L<<4)

Definition at line 4482 of file bnx2.h.

#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_2K   (3L<<4)

Definition at line 4485 of file bnx2.h.

#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_4K   (4L<<4)

Definition at line 4486 of file bnx2.h.

#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_512   (1L<<4)

Definition at line 4483 of file bnx2.h.

#define BNX2_MQ_CONFIG_MAX_DEPTH   (0x7fL<<8)

Definition at line 4487 of file bnx2.h.

#define BNX2_MQ_CONFIG_TX_HIGH_PRI   (1L<<0)

Definition at line 4477 of file bnx2.h.

#define BNX2_MQ_ENQUEUE1   0x00003c0c

Definition at line 4490 of file bnx2.h.

#define BNX2_MQ_ENQUEUE1_BYTE_MASK   (0xfL<<24)

Definition at line 4493 of file bnx2.h.

#define BNX2_MQ_ENQUEUE1_CID   (0x3fffL<<8)

Definition at line 4492 of file bnx2.h.

#define BNX2_MQ_ENQUEUE1_KNL_MODE   (1L<<28)

Definition at line 4494 of file bnx2.h.

#define BNX2_MQ_ENQUEUE1_OFFSET   (0x3fL<<2)

Definition at line 4491 of file bnx2.h.

#define BNX2_MQ_ENQUEUE2   0x00003c10

Definition at line 4496 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_CMD_MASK1   0x00003c54

Definition at line 4517 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_CMD_MASK2   0x00003c68

Definition at line 4522 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_COND_ENQUEUE_MASK1   0x00003c58

Definition at line 4518 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_COND_ENQUEUE_MASK2   0x00003c6c

Definition at line 4523 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_RX_V2P_MASK1   0x00003c5c

Definition at line 4519 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_RX_V2P_MASK2   0x00003c70

Definition at line 4524 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_TX_MASK1   0x00003c50

Definition at line 4516 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_TX_MASK2   0x00003c64

Definition at line 4521 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_WIND_START   0x00003c1c

Definition at line 4499 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_WIND_START_VALUE   (0xfffffL<<12)

Definition at line 4500 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_WRITE_MASK1   0x00003c4c

Definition at line 4515 of file bnx2.h.

#define BNX2_MQ_KNL_BYP_WRITE_MASK2   0x00003c60

Definition at line 4520 of file bnx2.h.

#define BNX2_MQ_KNL_CMD_MASK1   0x00003c2c

Definition at line 4507 of file bnx2.h.

#define BNX2_MQ_KNL_CMD_MASK2   0x00003c40

Definition at line 4512 of file bnx2.h.

#define BNX2_MQ_KNL_COND_ENQUEUE_MASK1   0x00003c30

Definition at line 4508 of file bnx2.h.

#define BNX2_MQ_KNL_COND_ENQUEUE_MASK2   0x00003c44

Definition at line 4513 of file bnx2.h.

#define BNX2_MQ_KNL_RX_V2P_MASK1   0x00003c34

Definition at line 4509 of file bnx2.h.

#define BNX2_MQ_KNL_RX_V2P_MASK2   0x00003c48

Definition at line 4514 of file bnx2.h.

#define BNX2_MQ_KNL_TX_MASK1   0x00003c28

Definition at line 4506 of file bnx2.h.

#define BNX2_MQ_KNL_TX_MASK2   0x00003c3c

Definition at line 4511 of file bnx2.h.

#define BNX2_MQ_KNL_WIND_END   0x00003c20

Definition at line 4502 of file bnx2.h.

#define BNX2_MQ_KNL_WIND_END_VALUE   (0xffffffL<<8)

Definition at line 4503 of file bnx2.h.

#define BNX2_MQ_KNL_WRITE_MASK1   0x00003c24

Definition at line 4505 of file bnx2.h.

#define BNX2_MQ_KNL_WRITE_MASK2   0x00003c38

Definition at line 4510 of file bnx2.h.

#define BNX2_MQ_MAP_L2_3   0x00003d2c

Definition at line 4551 of file bnx2.h.

#define BNX2_MQ_MAP_L2_3_ARM   (0x3L<<26)

Definition at line 4556 of file bnx2.h.

#define BNX2_MQ_MAP_L2_3_BIN_OFFSET   (0x7L<<23)

Definition at line 4555 of file bnx2.h.

#define BNX2_MQ_MAP_L2_3_CTX_OFFSET   (0x2ffL<<10)

Definition at line 4554 of file bnx2.h.

#define BNX2_MQ_MAP_L2_3_DEFAULT   0x82004646

Definition at line 4558 of file bnx2.h.

#define BNX2_MQ_MAP_L2_3_ENA   (0x1L<<31)

Definition at line 4557 of file bnx2.h.

#define BNX2_MQ_MAP_L2_3_MQ_OFFSET   (0xffL<<0)

Definition at line 4552 of file bnx2.h.

#define BNX2_MQ_MAP_L2_3_SZ   (0x3L<<8)

Definition at line 4553 of file bnx2.h.

#define BNX2_MQ_MAP_L2_5   0x00003d34

Definition at line 4560 of file bnx2.h.

#define BNX2_MQ_MAP_L2_5_ARM   (0x3L<<26)

Definition at line 4561 of file bnx2.h.

#define BNX2_MQ_MEM_RD_ADDR   0x00003c84

Definition at line 4538 of file bnx2.h.

#define BNX2_MQ_MEM_RD_ADDR_VALUE   (0x3fL<<0)

Definition at line 4539 of file bnx2.h.

#define BNX2_MQ_MEM_RD_DATA0   0x00003c88

Definition at line 4541 of file bnx2.h.

#define BNX2_MQ_MEM_RD_DATA0_VALUE   (0xffffffffL<<0)

Definition at line 4542 of file bnx2.h.

#define BNX2_MQ_MEM_RD_DATA1   0x00003c8c

Definition at line 4544 of file bnx2.h.

#define BNX2_MQ_MEM_RD_DATA1_VALUE   (0xffffffffL<<0)

Definition at line 4545 of file bnx2.h.

#define BNX2_MQ_MEM_RD_DATA2   0x00003c90

Definition at line 4547 of file bnx2.h.

#define BNX2_MQ_MEM_RD_DATA2_VALUE   (0x3fffffffL<<0)

Definition at line 4548 of file bnx2.h.

#define BNX2_MQ_MEM_RD_DATA2_VALUE_XI   (0x7fffffffL<<0)

Definition at line 4549 of file bnx2.h.

#define BNX2_MQ_MEM_WR_ADDR   0x00003c74

Definition at line 4525 of file bnx2.h.

#define BNX2_MQ_MEM_WR_ADDR_VALUE   (0x3fL<<0)

Definition at line 4526 of file bnx2.h.

#define BNX2_MQ_MEM_WR_DATA0   0x00003c78

Definition at line 4528 of file bnx2.h.

#define BNX2_MQ_MEM_WR_DATA0_VALUE   (0xffffffffL<<0)

Definition at line 4529 of file bnx2.h.

#define BNX2_MQ_MEM_WR_DATA1   0x00003c7c

Definition at line 4531 of file bnx2.h.

#define BNX2_MQ_MEM_WR_DATA1_VALUE   (0xffffffffL<<0)

Definition at line 4532 of file bnx2.h.

#define BNX2_MQ_MEM_WR_DATA2   0x00003c80

Definition at line 4534 of file bnx2.h.

#define BNX2_MQ_MEM_WR_DATA2_VALUE   (0x3fffffffL<<0)

Definition at line 4535 of file bnx2.h.

#define BNX2_MQ_MEM_WR_DATA2_VALUE_XI   (0x7fffffffL<<0)

Definition at line 4536 of file bnx2.h.

#define BNX2_MQ_STATUS   0x00003c04

Definition at line 4470 of file bnx2.h.

#define BNX2_MQ_STATUS_CTX_ACCESS64_STAT   (1L<<17)

Definition at line 4472 of file bnx2.h.

#define BNX2_MQ_STATUS_CTX_ACCESS_STAT   (1L<<16)

Definition at line 4471 of file bnx2.h.

#define BNX2_MQ_STATUS_IDB_OFLOW_STAT   (1L<<19)

Definition at line 4474 of file bnx2.h.

#define BNX2_MQ_STATUS_PCI_STALL_STAT   (1L<<18)

Definition at line 4473 of file bnx2.h.

#define BNX2_MSIX_PBA_ADDR   0x31c000

Definition at line 751 of file bnx2.h.

#define BNX2_MSIX_TABLE_ADDR   0x318000

Definition at line 750 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_ENABLE_AUTONEG   (1<<10)

Definition at line 7166 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_ETH_AT_WIRESPEED   (1<<14)

Definition at line 7170 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_FC_ASYM_PAUSE   (1<<13)

Definition at line 7169 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_FC_SYM_PAUSE   (1<<12)

Definition at line 7168 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_PHY_APP_REMOTE   (1<<11)

Definition at line 7167 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_PHY_RESET   (1<<15)

Definition at line 7171 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_10
Value:
(BNX2_NETLINK_SET_LINK_SPEED_10HALF | \
BNX2_NETLINK_SET_LINK_SPEED_10FULL)

Definition at line 7152 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_100
Value:
(BNX2_NETLINK_SET_LINK_SPEED_100HALF | \
BNX2_NETLINK_SET_LINK_SPEED_100FULL)

Definition at line 7157 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_100FULL   (1<<3)

Definition at line 7156 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_100HALF   (1<<2)

Definition at line 7155 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_10FULL   (1<<1)

Definition at line 7151 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_10GFULL   (1<<9)

Definition at line 7165 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_10GHALF   (1<<8)

Definition at line 7164 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_10HALF   (1<<0)

Definition at line 7150 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_1GFULL   (1<<5)

Definition at line 7161 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_1GHALF   (1<<4)

Definition at line 7160 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_2G5FULL   (1<<7)

Definition at line 7163 of file bnx2.h.

#define BNX2_NETLINK_SET_LINK_SPEED_2G5HALF   (1<<6)

Definition at line 7162 of file bnx2.h.

#define BNX2_NV_BUFFERED   0x00000001

Definition at line 6691 of file bnx2.h.

#define BNX2_NV_TRANSLATE   0x00000002

Definition at line 6692 of file bnx2.h.

#define BNX2_NV_WREN   0x00000004

Definition at line 6693 of file bnx2.h.

#define BNX2_NVM_ACCESS_ENABLE   0x00006424

Definition at line 1922 of file bnx2.h.

#define BNX2_NVM_ACCESS_ENABLE_EN   (1L<<0)

Definition at line 1923 of file bnx2.h.

#define BNX2_NVM_ACCESS_ENABLE_WR_EN   (1L<<1)

Definition at line 1924 of file bnx2.h.

#define BNX2_NVM_ADDR   0x0000640c

Definition at line 1844 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE   (0xffffffL<<0)

Definition at line 1845 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_BIT_BANG   (0L<<0)

Definition at line 1846 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS_B   (8L<<0)

Definition at line 1850 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS_B_XI   (4L<<0)

Definition at line 1855 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_EECLK   (1L<<0)

Definition at line 1847 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_EEDATA   (2L<<0)

Definition at line 1848 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SCLK   (4L<<0)

Definition at line 1849 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SCLK_XI   (8L<<0)

Definition at line 1856 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI   (32L<<0)

Definition at line 1852 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI_XI   (1L<<0)

Definition at line 1853 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO   (16L<<0)

Definition at line 1851 of file bnx2.h.

#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO_XI   (2L<<0)

Definition at line 1854 of file bnx2.h.

#define BNX2_NVM_CFG1   0x00006414

Definition at line 1872 of file bnx2.h.

#define BNX2_NVM_CFG1_BITBANG_MODE   (1L<<3)

Definition at line 1876 of file bnx2.h.

#define BNX2_NVM_CFG1_BUFFER_MODE   (1L<<1)

Definition at line 1874 of file bnx2.h.

#define BNX2_NVM_CFG1_COMPAT_BYPASSS   (1L<<31)

Definition at line 1890 of file bnx2.h.

#define BNX2_NVM_CFG1_FLASH_MODE   (1L<<0)

Definition at line 1873 of file bnx2.h.

#define BNX2_NVM_CFG1_FLASH_SIZE   (1L<<25)

Definition at line 1884 of file bnx2.h.

#define BNX2_NVM_CFG1_FW_FLASH_TYPE_EN   (1L<<30)

Definition at line 1889 of file bnx2.h.

#define BNX2_NVM_CFG1_FW_USTRAP_0   (1L<<27)

Definition at line 1886 of file bnx2.h.

#define BNX2_NVM_CFG1_FW_USTRAP_1   (1L<<26)

Definition at line 1885 of file bnx2.h.

#define BNX2_NVM_CFG1_FW_USTRAP_2   (1L<<28)

Definition at line 1887 of file bnx2.h.

#define BNX2_NVM_CFG1_FW_USTRAP_3   (1L<<29)

Definition at line 1888 of file bnx2.h.

#define BNX2_NVM_CFG1_PASS_MODE   (1L<<2)

Definition at line 1875 of file bnx2.h.

#define BNX2_NVM_CFG1_PROTECT_MODE   (1L<<24)

Definition at line 1883 of file bnx2.h.

#define BNX2_NVM_CFG1_SEE_CLK_DIV   (0x7ffL<<11)

Definition at line 1881 of file bnx2.h.

#define BNX2_NVM_CFG1_SPI_CLK_DIV   (0xfL<<7)

Definition at line 1880 of file bnx2.h.

#define BNX2_NVM_CFG1_STATUS_BIT   (0x7L<<4)

Definition at line 1877 of file bnx2.h.

#define BNX2_NVM_CFG1_STATUS_BIT_BUFFER_RDY   (7L<<4)

Definition at line 1879 of file bnx2.h.

#define BNX2_NVM_CFG1_STATUS_BIT_FLASH_RDY   (0L<<4)

Definition at line 1878 of file bnx2.h.

#define BNX2_NVM_CFG1_STRAP_CONTROL_0   (1L<<23)

Definition at line 1882 of file bnx2.h.

#define BNX2_NVM_CFG2   0x00006418

Definition at line 1892 of file bnx2.h.

#define BNX2_NVM_CFG2_DUMMY   (0xffL<<8)

Definition at line 1894 of file bnx2.h.

#define BNX2_NVM_CFG2_ERASE_CMD   (0xffL<<0)

Definition at line 1893 of file bnx2.h.

#define BNX2_NVM_CFG2_READ_ID   (0xffL<<24)

Definition at line 1896 of file bnx2.h.

#define BNX2_NVM_CFG2_STATUS_CMD   (0xffL<<16)

Definition at line 1895 of file bnx2.h.

#define BNX2_NVM_CFG3   0x0000641c

Definition at line 1898 of file bnx2.h.

#define BNX2_NVM_CFG3_BUFFER_RD_CMD   (0xffL<<0)

Definition at line 1899 of file bnx2.h.

#define BNX2_NVM_CFG3_BUFFER_WRITE_CMD   (0xffL<<16)

Definition at line 1901 of file bnx2.h.

#define BNX2_NVM_CFG3_READ_CMD   (0xffL<<24)

Definition at line 1902 of file bnx2.h.

#define BNX2_NVM_CFG3_WRITE_CMD   (0xffL<<8)

Definition at line 1900 of file bnx2.h.

#define BNX2_NVM_CFG4   0x0000642c

Definition at line 1931 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE   (0x7L<<0)

Definition at line 1932 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE_128MBIT   (7L<<0)

Definition at line 1940 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE_16MBIT   (4L<<0)

Definition at line 1937 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE_1MBIT   (0L<<0)

Definition at line 1933 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE_2MBIT   (1L<<0)

Definition at line 1934 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE_32MBIT   (5L<<0)

Definition at line 1938 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE_4MBIT   (2L<<0)

Definition at line 1935 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE_64MBIT   (6L<<0)

Definition at line 1939 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_SIZE_8MBIT   (3L<<0)

Definition at line 1936 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_VENDOR   (1L<<3)

Definition at line 1941 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_VENDOR_ATMEL   (1L<<3)

Definition at line 1943 of file bnx2.h.

#define BNX2_NVM_CFG4_FLASH_VENDOR_ST   (0L<<3)

Definition at line 1942 of file bnx2.h.

#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC   (0x3L<<4)

Definition at line 1944 of file bnx2.h.

#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT10   (2L<<4)

Definition at line 1947 of file bnx2.h.

#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT11   (3L<<4)

Definition at line 1948 of file bnx2.h.

#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT8   (0L<<4)

Definition at line 1945 of file bnx2.h.

#define BNX2_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT9   (1L<<4)

Definition at line 1946 of file bnx2.h.

#define BNX2_NVM_CFG4_RESERVED   (0x1ffffffL<<7)

Definition at line 1950 of file bnx2.h.

#define BNX2_NVM_CFG4_STATUS_BIT_POLARITY   (1L<<6)

Definition at line 1949 of file bnx2.h.

#define BNX2_NVM_COMMAND   0x00006400

Definition at line 1788 of file bnx2.h.

#define BNX2_NVM_COMMAND_DOIT   (1L<<4)

Definition at line 1791 of file bnx2.h.

#define BNX2_NVM_COMMAND_DONE   (1L<<3)

Definition at line 1790 of file bnx2.h.

#define BNX2_NVM_COMMAND_ERASE   (1L<<6)

Definition at line 1793 of file bnx2.h.

#define BNX2_NVM_COMMAND_EWSR   (1L<<18)

Definition at line 1798 of file bnx2.h.

#define BNX2_NVM_COMMAND_FIRST   (1L<<7)

Definition at line 1794 of file bnx2.h.

#define BNX2_NVM_COMMAND_LAST   (1L<<8)

Definition at line 1795 of file bnx2.h.

#define BNX2_NVM_COMMAND_MODE_256   (1L<<22)

Definition at line 1802 of file bnx2.h.

#define BNX2_NVM_COMMAND_RD_ID   (1L<<20)

Definition at line 1800 of file bnx2.h.

#define BNX2_NVM_COMMAND_RD_STATUS   (1L<<21)

Definition at line 1801 of file bnx2.h.

#define BNX2_NVM_COMMAND_RST   (1L<<0)

Definition at line 1789 of file bnx2.h.

#define BNX2_NVM_COMMAND_WR   (1L<<5)

Definition at line 1792 of file bnx2.h.

#define BNX2_NVM_COMMAND_WRDI   (1L<<17)

Definition at line 1797 of file bnx2.h.

#define BNX2_NVM_COMMAND_WREN   (1L<<16)

Definition at line 1796 of file bnx2.h.

#define BNX2_NVM_COMMAND_WRSR   (1L<<19)

Definition at line 1799 of file bnx2.h.

#define BNX2_NVM_READ   0x00006410

Definition at line 1858 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE   (0xffffffffL<<0)

Definition at line 1859 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_BIT_BANG   (0L<<0)

Definition at line 1860 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_CS_B   (8L<<0)

Definition at line 1864 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_CS_B_XI   (4L<<0)

Definition at line 1869 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_EECLK   (1L<<0)

Definition at line 1861 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_EEDATA   (2L<<0)

Definition at line 1862 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_SCLK   (4L<<0)

Definition at line 1863 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_SCLK_XI   (8L<<0)

Definition at line 1870 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_SI   (32L<<0)

Definition at line 1866 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_SI_XI   (1L<<0)

Definition at line 1867 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_SO   (16L<<0)

Definition at line 1865 of file bnx2.h.

#define BNX2_NVM_READ_NVM_READ_VALUE_SO_XI   (2L<<0)

Definition at line 1868 of file bnx2.h.

#define BNX2_NVM_RECONFIG   0x00006430

Definition at line 1952 of file bnx2.h.

#define BNX2_NVM_RECONFIG_ORIG_STRAP_VALUE   (0xfL<<0)

Definition at line 1953 of file bnx2.h.

#define BNX2_NVM_RECONFIG_ORIG_STRAP_VALUE_ATMEL   (1L<<0)

Definition at line 1955 of file bnx2.h.

#define BNX2_NVM_RECONFIG_ORIG_STRAP_VALUE_ST   (0L<<0)

Definition at line 1954 of file bnx2.h.

#define BNX2_NVM_RECONFIG_RECONFIG_DONE   (1L<<31)

Definition at line 1958 of file bnx2.h.

#define BNX2_NVM_RECONFIG_RECONFIG_STRAP_VALUE   (0xfL<<4)

Definition at line 1956 of file bnx2.h.

#define BNX2_NVM_RECONFIG_RESERVED   (0x7fffffL<<8)

Definition at line 1957 of file bnx2.h.

#define BNX2_NVM_STATUS   0x00006404

Definition at line 1804 of file bnx2.h.

#define BNX2_NVM_STATUS_EE_FSM_STATE   (0xfL<<4)

Definition at line 1806 of file bnx2.h.

#define BNX2_NVM_STATUS_EQ_FSM_STATE   (0xfL<<8)

Definition at line 1807 of file bnx2.h.

#define BNX2_NVM_STATUS_PI_FSM_STATE   (0xfL<<0)

Definition at line 1805 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_ADDR0_XI   (5L<<0)

Definition at line 1814 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CHECK_BUSY0_XI   (17L<<0)

Definition at line 1826 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CMD0_XI   (1L<<0)

Definition at line 1810 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CMD1_XI   (2L<<0)

Definition at line 1811 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CMD_FINISH0_XI   (3L<<0)

Definition at line 1812 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_CMD_FINISH1_XI   (4L<<0)

Definition at line 1813 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_IDLE_XI   (0L<<0)

Definition at line 1809 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA0_XI   (9L<<0)

Definition at line 1818 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA1_XI   (10L<<0)

Definition at line 1819 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA2_XI   (11L<<0)

Definition at line 1820 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID0_XI   (12L<<0)

Definition at line 1821 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID1_XI   (13L<<0)

Definition at line 1822 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID2_XI   (14L<<0)

Definition at line 1823 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID3_XI   (15L<<0)

Definition at line 1824 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID4_XI   (16L<<0)

Definition at line 1825 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_ST_WREN_XI   (18L<<0)

Definition at line 1827 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_WAIT_XI   (19L<<0)

Definition at line 1828 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA0_XI   (6L<<0)

Definition at line 1815 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA1_XI   (7L<<0)

Definition at line 1816 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA2_XI   (8L<<0)

Definition at line 1817 of file bnx2.h.

#define BNX2_NVM_STATUS_SPI_FSM_STATE_XI   (0x1fL<<0)

Definition at line 1808 of file bnx2.h.

#define BNX2_NVM_SW_ARB   0x00006420

Definition at line 1904 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_ARB0   (1L<<8)

Definition at line 1913 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_ARB1   (1L<<9)

Definition at line 1914 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_ARB2   (1L<<10)

Definition at line 1915 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_ARB3   (1L<<11)

Definition at line 1916 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_REQ_CLR0   (1L<<4)

Definition at line 1909 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_REQ_CLR1   (1L<<5)

Definition at line 1910 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_REQ_CLR2   (1L<<6)

Definition at line 1911 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_REQ_CLR3   (1L<<7)

Definition at line 1912 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_REQ_SET0   (1L<<0)

Definition at line 1905 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_REQ_SET1   (1L<<1)

Definition at line 1906 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_REQ_SET2   (1L<<2)

Definition at line 1907 of file bnx2.h.

#define BNX2_NVM_SW_ARB_ARB_REQ_SET3   (1L<<3)

Definition at line 1908 of file bnx2.h.

#define BNX2_NVM_SW_ARB_REQ0   (1L<<12)

Definition at line 1917 of file bnx2.h.

#define BNX2_NVM_SW_ARB_REQ1   (1L<<13)

Definition at line 1918 of file bnx2.h.

#define BNX2_NVM_SW_ARB_REQ2   (1L<<14)

Definition at line 1919 of file bnx2.h.

#define BNX2_NVM_SW_ARB_REQ3   (1L<<15)

Definition at line 1920 of file bnx2.h.

#define BNX2_NVM_WRITE   0x00006408

Definition at line 1830 of file bnx2.h.

#define BNX2_NVM_WRITE1   0x00006428

Definition at line 1926 of file bnx2.h.

#define BNX2_NVM_WRITE1_SR_DATA   (0xffL<<16)

Definition at line 1929 of file bnx2.h.

#define BNX2_NVM_WRITE1_WRDI_CMD   (0xffL<<8)

Definition at line 1928 of file bnx2.h.

#define BNX2_NVM_WRITE1_WREN_CMD   (0xffL<<0)

Definition at line 1927 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE   (0xffffffffL<<0)

Definition at line 1831 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_BIT_BANG   (0L<<0)

Definition at line 1832 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_CS_B   (8L<<0)

Definition at line 1836 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_CS_B_XI   (4L<<0)

Definition at line 1841 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_EECLK   (1L<<0)

Definition at line 1833 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_EEDATA   (2L<<0)

Definition at line 1834 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SCLK   (4L<<0)

Definition at line 1835 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SCLK_XI   (8L<<0)

Definition at line 1842 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SI   (32L<<0)

Definition at line 1838 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SI_XI   (1L<<0)

Definition at line 1839 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SO   (16L<<0)

Definition at line 1837 of file bnx2.h.

#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SO_XI   (2L<<0)

Definition at line 1840 of file bnx2.h.

#define BNX2_PCI_CFG_ACCESS_CMD   0x0000045c

Definition at line 673 of file bnx2.h.

#define BNX2_PCI_CFG_ACCESS_CMD_ADR   (0x3fL<<2)

Definition at line 674 of file bnx2.h.

#define BNX2_PCI_CFG_ACCESS_CMD_RD_REQ   (1L<<27)

Definition at line 675 of file bnx2.h.

#define BNX2_PCI_CFG_ACCESS_CMD_WR_REQ   (0xfL<<28)

Definition at line 676 of file bnx2.h.

#define BNX2_PCI_CFG_ACCESS_DATA   0x00000460

Definition at line 678 of file bnx2.h.

#define BNX2_PCI_CONFIG_1   0x00000404

Definition at line 478 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY   (0x7L<<8)

Definition at line 480 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_1024   (7L<<8)

Definition at line 488 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_128   (4L<<8)

Definition at line 485 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_16   (1L<<8)

Definition at line 482 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_256   (5L<<8)

Definition at line 486 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_32   (2L<<8)

Definition at line 483 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_512   (6L<<8)

Definition at line 487 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_64   (3L<<8)

Definition at line 484 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_OFF   (0L<<8)

Definition at line 481 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_RESERVED0   (0xffL<<0)

Definition at line 479 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_RESERVED1   (0x3ffffL<<14)

Definition at line 498 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY   (0x7L<<11)

Definition at line 489 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_1024   (7L<<11)

Definition at line 497 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_128   (4L<<11)

Definition at line 494 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_16   (1L<<11)

Definition at line 491 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_256   (5L<<11)

Definition at line 495 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_32   (2L<<11)

Definition at line 492 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_512   (6L<<11)

Definition at line 496 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_64   (3L<<11)

Definition at line 493 of file bnx2.h.

#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_OFF   (0L<<11)

Definition at line 490 of file bnx2.h.

#define BNX2_PCI_CONFIG_2   0x00000408

Definition at line 500 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_64ENA   (1L<<4)

Definition at line 518 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE   (0xfL<<0)

Definition at line 501 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_128K   (2L<<0)

Definition at line 504 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_128M   (12L<<0)

Definition at line 514 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_16M   (9L<<0)

Definition at line 511 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_1G   (15L<<0)

Definition at line 517 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_1M   (5L<<0)

Definition at line 507 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_256K   (3L<<0)

Definition at line 505 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_256M   (13L<<0)

Definition at line 515 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_2M   (6L<<0)

Definition at line 508 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_32M   (10L<<0)

Definition at line 512 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_4M   (7L<<0)

Definition at line 509 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_512K   (4L<<0)

Definition at line 506 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_512M   (14L<<0)

Definition at line 516 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_64K   (1L<<0)

Definition at line 503 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_64M   (11L<<0)

Definition at line 513 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_8M   (8L<<0)

Definition at line 510 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR1_SIZE_DISABLED   (0L<<0)

Definition at line 502 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_BAR_PREFETCH_XI   (1L<<16)

Definition at line 549 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_CFG_CYCLE_RETRY   (1L<<6)

Definition at line 520 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_RETRY   (1L<<5)

Definition at line 519 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE   (0xffL<<8)

Definition at line 522 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_128K   (8L<<8)

Definition at line 531 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_16K   (5L<<8)

Definition at line 528 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_16M   (15L<<8)

Definition at line 538 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_1K   (1L<<8)

Definition at line 524 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_1M   (11L<<8)

Definition at line 534 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_256K   (9L<<8)

Definition at line 532 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_2K   (2L<<8)

Definition at line 525 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_2M   (12L<<8)

Definition at line 535 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_32K   (6L<<8)

Definition at line 529 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_4K   (3L<<8)

Definition at line 526 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_4M   (13L<<8)

Definition at line 536 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_512K   (10L<<8)

Definition at line 533 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_64K   (7L<<8)

Definition at line 530 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_8K   (4L<<8)

Definition at line 527 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_8M   (14L<<8)

Definition at line 537 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_DISABLED   (0L<<8)

Definition at line 523 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_FIRST_CFG_DONE   (1L<<7)

Definition at line 521 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_FORCE_32_BIT_MSTR   (1L<<23)

Definition at line 545 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_FORCE_32_BIT_TGT   (1L<<24)

Definition at line 546 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_KEEP_REQ_ASSERT   (1L<<25)

Definition at line 547 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT   (0x3L<<21)

Definition at line 540 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_1K   (1L<<21)

Definition at line 542 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_2K   (2L<<21)

Definition at line 543 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_4K   (3L<<21)

Definition at line 544 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_512   (0L<<21)

Definition at line 541 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_MAX_SPLIT_LIMIT   (0x1fL<<16)

Definition at line 539 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_RESERVED0   (0x3fL<<26)

Definition at line 548 of file bnx2.h.

#define BNX2_PCI_CONFIG_2_RESERVED0_XI   (0x7fffL<<17)

Definition at line 550 of file bnx2.h.

#define BNX2_PCI_CONFIG_3   0x0000040c

Definition at line 552 of file bnx2.h.

#define BNX2_PCI_CONFIG_3_FORCE_PME   (1L<<24)

Definition at line 555 of file bnx2.h.

#define BNX2_PCI_CONFIG_3_PCI_POWER   (1L<<31)

Definition at line 560 of file bnx2.h.

#define BNX2_PCI_CONFIG_3_PM_STATE   (0x3L<<27)

Definition at line 558 of file bnx2.h.

#define BNX2_PCI_CONFIG_3_PME_ENABLE   (1L<<26)

Definition at line 557 of file bnx2.h.

#define BNX2_PCI_CONFIG_3_PME_STATUS   (1L<<25)

Definition at line 556 of file bnx2.h.

#define BNX2_PCI_CONFIG_3_REG_STICKY_BYTE   (0xffL<<8)

Definition at line 554 of file bnx2.h.

#define BNX2_PCI_CONFIG_3_STICKY_BYTE   (0xffL<<0)

Definition at line 553 of file bnx2.h.

#define BNX2_PCI_CONFIG_3_VAUX_PRESET   (1L<<30)

Definition at line 559 of file bnx2.h.

#define BNX2_PCI_DEVICE_CAPABILITY   0x000004d4

Definition at line 705 of file bnx2.h.

#define BNX2_PCI_DEVICE_CAPABILITY_EXTENDED_TAG_SUPPORT   (1L<<5)

Definition at line 707 of file bnx2.h.

#define BNX2_PCI_DEVICE_CAPABILITY_L0S_ACCEPTABLE_LATENCY   (0x7L<<6)

Definition at line 708 of file bnx2.h.

#define BNX2_PCI_DEVICE_CAPABILITY_L1_ACCEPTABLE_LATENCY   (0x7L<<9)

Definition at line 709 of file bnx2.h.

#define BNX2_PCI_DEVICE_CAPABILITY_MAX_PL_SIZ_SUPPORTED   (0x7L<<0)

Definition at line 706 of file bnx2.h.

#define BNX2_PCI_DEVICE_CAPABILITY_ROLE_BASED_ERR_RPT   (1L<<15)

Definition at line 710 of file bnx2.h.

#define BNX2_PCI_EXP_ROM_ADDR   0x00000420

Definition at line 576 of file bnx2.h.

#define BNX2_PCI_EXP_ROM_ADDR_ADDRESS   (0x3fffffL<<2)

Definition at line 577 of file bnx2.h.

#define BNX2_PCI_EXP_ROM_ADDR_REQ   (1L<<31)

Definition at line 578 of file bnx2.h.

#define BNX2_PCI_EXP_ROM_DATA   0x00000424

Definition at line 580 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW1_ADDR   0x00000610

Definition at line 741 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW1_ADDR_VALUE   (0x1ffL<<13)

Definition at line 742 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW2_ADDR   0x00000614

Definition at line 744 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW2_ADDR_VALUE   (0x1ffL<<13)

Definition at line 745 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW2_BASE   0xc000

Definition at line 475 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW3_ADDR   0x00000618

Definition at line 747 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW3_ADDR_VALUE   (0x1ffL<<13)

Definition at line 748 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW3_BASE   0xe000

Definition at line 476 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW_ADDR   0x00000400

Definition at line 471 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW_ADDR_SEP_WIN   (1L<<31)

Definition at line 473 of file bnx2.h.

#define BNX2_PCI_GRC_WINDOW_ADDR_VALUE   (0x1ffL<<13)

Definition at line 472 of file bnx2.h.

#define BNX2_PCI_ID_VAL1   0x00000434

Definition at line 591 of file bnx2.h.

#define BNX2_PCI_ID_VAL1_DEVICE_ID   (0xffffL<<0)

Definition at line 592 of file bnx2.h.

#define BNX2_PCI_ID_VAL1_VENDOR_ID   (0xffffL<<16)

Definition at line 593 of file bnx2.h.

#define BNX2_PCI_ID_VAL2   0x00000438

Definition at line 595 of file bnx2.h.

#define BNX2_PCI_ID_VAL2_SUBSYSTEM_ID   (0xffffL<<16)

Definition at line 597 of file bnx2.h.

#define BNX2_PCI_ID_VAL2_SUBSYSTEM_VENDOR_ID   (0xffffL<<0)

Definition at line 596 of file bnx2.h.

#define BNX2_PCI_ID_VAL3   0x0000043c

Definition at line 599 of file bnx2.h.

#define BNX2_PCI_ID_VAL3_CLASS_CODE   (0xffffffL<<0)

Definition at line 600 of file bnx2.h.

#define BNX2_PCI_ID_VAL3_REVISION_ID   (0xffL<<24)

Definition at line 601 of file bnx2.h.

#define BNX2_PCI_ID_VAL4   0x00000440

Definition at line 603 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA   (0xfL<<0)

Definition at line 604 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_0   (0L<<0)

Definition at line 605 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_1   (1L<<0)

Definition at line 606 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_10   (10L<<0)

Definition at line 615 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_11   (11L<<0)

Definition at line 616 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_12   (12L<<0)

Definition at line 617 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_13   (13L<<0)

Definition at line 618 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_14   (14L<<0)

Definition at line 619 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_15   (15L<<0)

Definition at line 620 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_2   (2L<<0)

Definition at line 607 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_3   (3L<<0)

Definition at line 608 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_4   (4L<<0)

Definition at line 609 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_5   (5L<<0)

Definition at line 610 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_6   (6L<<0)

Definition at line 611 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_7   (7L<<0)

Definition at line 612 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_8   (8L<<0)

Definition at line 613 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_CAP_ENA_9   (9L<<0)

Definition at line 614 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MAX_133_ADVERTIZE   (1L<<17)

Definition at line 632 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MAX_64_ADVERTIZE   (1L<<16)

Definition at line 631 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MAX_CUMULATIVE_SIZE_B0   (1L<<25)

Definition at line 636 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MAX_CUMULATIVE_SIZE_B21   (0x3L<<21)

Definition at line 634 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MAX_MEM_READ_SIZE_B10   (0x3L<<26)

Definition at line 637 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE_B0   (1L<<28)

Definition at line 638 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE_B21   (0x3L<<23)

Definition at line 635 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MSI_ENABLE   (1L<<15)

Definition at line 630 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MSI_LIMIT   (0x7L<<9)

Definition at line 628 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MSI_PV_MASK_CAP   (1L<<8)

Definition at line 627 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_MULTI_MSG_CAP   (0x7L<<12)

Definition at line 629 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG   (0x3L<<6)

Definition at line 622 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0   (0L<<6)

Definition at line 623 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1   (1L<<6)

Definition at line 624 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2   (2L<<6)

Definition at line 625 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3   (3L<<6)

Definition at line 626 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_RESERVED0   (0x3L<<4)

Definition at line 621 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_RESERVED2   (0x7L<<18)

Definition at line 633 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_RESERVED3   (0x7L<<29)

Definition at line 639 of file bnx2.h.

#define BNX2_PCI_ID_VAL4_RESERVED3_XI   (0xffffL<<16)

Definition at line 640 of file bnx2.h.

#define BNX2_PCI_ID_VAL5   0x00000444

Definition at line 642 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_D1_SUPPORT   (1L<<0)

Definition at line 643 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_D2_SUPPORT   (1L<<1)

Definition at line 644 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_NO_SOFT_RESET_XI   (1L<<9)

Definition at line 651 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_PM_VERSION_XI   (0x7L<<6)

Definition at line 650 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_PME_IN_D0   (1L<<2)

Definition at line 645 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_PME_IN_D1   (1L<<3)

Definition at line 646 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_PME_IN_D2   (1L<<4)

Definition at line 647 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_PME_IN_D3_HOT   (1L<<5)

Definition at line 648 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_RESERVED0_TE   (0x3ffffffL<<6)

Definition at line 649 of file bnx2.h.

#define BNX2_PCI_ID_VAL5_RESERVED0_XI   (0x3fffffL<<10)

Definition at line 652 of file bnx2.h.

#define BNX2_PCI_ID_VAL6   0x0000044c

Definition at line 660 of file bnx2.h.

#define BNX2_PCI_ID_VAL6_BIST   (0xffL<<16)

Definition at line 663 of file bnx2.h.

#define BNX2_PCI_ID_VAL6_MAX_LAT   (0xffL<<0)

Definition at line 661 of file bnx2.h.

#define BNX2_PCI_ID_VAL6_MIN_GNT   (0xffL<<8)

Definition at line 662 of file bnx2.h.

#define BNX2_PCI_ID_VAL6_RESERVED0   (0xffL<<24)

Definition at line 664 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY   0x000004dc

Definition at line 712 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_ASPM_SUPPORT   (0x3L<<10)

Definition at line 718 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_CLK_POWER_MGMT   (1L<<9)

Definition at line 717 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_COMM_LAT   (0x7L<<18)

Definition at line 725 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_COMM_LAT_101   (5L<<18)

Definition at line 726 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_COMM_LAT_110   (6L<<18)

Definition at line 727 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_LAT   (0x7L<<12)

Definition at line 719 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_LAT_101   (5L<<12)

Definition at line 720 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L0S_EXIT_LAT_110   (6L<<12)

Definition at line 721 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_COMM_LAT   (0x7L<<21)

Definition at line 728 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_COMM_LAT_001   (1L<<21)

Definition at line 729 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_COMM_LAT_010   (2L<<21)

Definition at line 730 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_LAT   (0x7L<<15)

Definition at line 722 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_LAT_001   (1L<<15)

Definition at line 723 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_L1_EXIT_LAT_010   (2L<<15)

Definition at line 724 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_MAX_LINK_SPEED   (0xfL<<0)

Definition at line 713 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_MAX_LINK_SPEED_0001   (1L<<0)

Definition at line 714 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_MAX_LINK_SPEED_0010   (1L<<0)

Definition at line 715 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_MAX_LINK_WIDTH   (0x1fL<<4)

Definition at line 716 of file bnx2.h.

#define BNX2_PCI_LINK_CAPABILITY_PORT_NUM   (0xffL<<24)

Definition at line 731 of file bnx2.h.

#define BNX2_PCI_MSI_ADDR_H   0x00000454

Definition at line 669 of file bnx2.h.

#define BNX2_PCI_MSI_ADDR_L   0x00000458

Definition at line 670 of file bnx2.h.

#define BNX2_PCI_MSI_ADDR_L_VAL   (0x3fffffffL<<2)

Definition at line 671 of file bnx2.h.

#define BNX2_PCI_MSI_DATA   0x00000450

Definition at line 666 of file bnx2.h.

#define BNX2_PCI_MSI_DATA_MSI_DATA   (0xffffL<<0)

Definition at line 667 of file bnx2.h.

#define BNX2_PCI_MSI_MASK   0x00000464

Definition at line 679 of file bnx2.h.

#define BNX2_PCI_MSI_MASK_MSI_MASK   (0xffffffffL<<0)

Definition at line 680 of file bnx2.h.

#define BNX2_PCI_MSI_PEND   0x00000468

Definition at line 682 of file bnx2.h.

#define BNX2_PCI_MSI_PEND_MSI_PEND   (0xffffffffL<<0)

Definition at line 683 of file bnx2.h.

#define BNX2_PCI_MSIX_CONTROL   0x000004c0

Definition at line 689 of file bnx2.h.

#define BNX2_PCI_MSIX_CONTROL_MSIX_TBL_SIZ   (0x7ffL<<0)

Definition at line 690 of file bnx2.h.

#define BNX2_PCI_MSIX_CONTROL_RESERVED0   (0x1fffffL<<11)

Definition at line 691 of file bnx2.h.

#define BNX2_PCI_MSIX_PBA_OFF_BIT   0x000004c8

Definition at line 697 of file bnx2.h.

#define BNX2_PCI_MSIX_PBA_OFF_BIT_MSIX_PBA_BIR   (0x7L<<0)

Definition at line 698 of file bnx2.h.

#define BNX2_PCI_MSIX_PBA_OFF_BIT_MSIX_PBA_OFF   (0x1fffffffL<<3)

Definition at line 699 of file bnx2.h.

#define BNX2_PCI_MSIX_TBL_OFF_BIR   0x000004c4

Definition at line 693 of file bnx2.h.

#define BNX2_PCI_MSIX_TBL_OFF_BIR_MSIX_TBL_BIR   (0x7L<<0)

Definition at line 694 of file bnx2.h.

#define BNX2_PCI_MSIX_TBL_OFF_BIR_MSIX_TBL_OFF   (0x1fffffffL<<3)

Definition at line 695 of file bnx2.h.

#define BNX2_PCI_PCIE_CAPABILITY   0x000004d0

Definition at line 701 of file bnx2.h.

#define BNX2_PCI_PCIE_CAPABILITY_COMPLY_PCIE_1_1   (1L<<5)

Definition at line 703 of file bnx2.h.

#define BNX2_PCI_PCIE_CAPABILITY_INTERRUPT_MSG_NUM   (0x1fL<<0)

Definition at line 702 of file bnx2.h.

#define BNX2_PCI_PCIE_DEVICE_CAPABILITY_2   0x000004e4

Definition at line 733 of file bnx2.h.

#define BNX2_PCI_PCIE_DEVICE_CAPABILITY_2_CMPL_TO_DISABL_SUPP   (1L<<4)

Definition at line 735 of file bnx2.h.

#define BNX2_PCI_PCIE_DEVICE_CAPABILITY_2_CMPL_TO_RANGE_SUPP   (0xfL<<0)

Definition at line 734 of file bnx2.h.

#define BNX2_PCI_PCIE_DEVICE_CAPABILITY_2_RESERVED   (0x7ffffffL<<5)

Definition at line 736 of file bnx2.h.

#define BNX2_PCI_PCIE_LINK_CAPABILITY_2   0x000004e8

Definition at line 738 of file bnx2.h.

#define BNX2_PCI_PCIE_LINK_CAPABILITY_2_RESERVED   (0xffffffffL<<0)

Definition at line 739 of file bnx2.h.

#define BNX2_PCI_PCIX_EXTENDED_STATUS   0x00000448

Definition at line 654 of file bnx2.h.

#define BNX2_PCI_PCIX_EXTENDED_STATUS_LONG_BURST   (1L<<9)

Definition at line 656 of file bnx2.h.

#define BNX2_PCI_PCIX_EXTENDED_STATUS_NO_SNOOP   (1L<<8)

Definition at line 655 of file bnx2.h.

#define BNX2_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_CLASS   (0xfL<<16)

Definition at line 657 of file bnx2.h.

#define BNX2_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_IDX   (0xffL<<24)

Definition at line 658 of file bnx2.h.

#define BNX2_PCI_PM_DATA_A   0x00000410

Definition at line 562 of file bnx2.h.

#define BNX2_PCI_PM_DATA_A_PM_DATA_0_PRG   (0xffL<<0)

Definition at line 563 of file bnx2.h.

#define BNX2_PCI_PM_DATA_A_PM_DATA_1_PRG   (0xffL<<8)

Definition at line 564 of file bnx2.h.

#define BNX2_PCI_PM_DATA_A_PM_DATA_2_PRG   (0xffL<<16)

Definition at line 565 of file bnx2.h.

#define BNX2_PCI_PM_DATA_A_PM_DATA_3_PRG   (0xffL<<24)

Definition at line 566 of file bnx2.h.

#define BNX2_PCI_PM_DATA_B   0x00000414

Definition at line 568 of file bnx2.h.

#define BNX2_PCI_PM_DATA_B_PM_DATA_4_PRG   (0xffL<<0)

Definition at line 569 of file bnx2.h.

#define BNX2_PCI_PM_DATA_B_PM_DATA_5_PRG   (0xffL<<8)

Definition at line 570 of file bnx2.h.

#define BNX2_PCI_PM_DATA_B_PM_DATA_6_PRG   (0xffL<<16)

Definition at line 571 of file bnx2.h.

#define BNX2_PCI_PM_DATA_B_PM_DATA_7_PRG   (0xffL<<24)

Definition at line 572 of file bnx2.h.

#define BNX2_PCI_PM_DATA_C   0x0000046c

Definition at line 685 of file bnx2.h.

#define BNX2_PCI_PM_DATA_C_PM_DATA_8_PRG   (0xffL<<0)

Definition at line 686 of file bnx2.h.

#define BNX2_PCI_PM_DATA_C_RESERVED0   (0xffffffL<<8)

Definition at line 687 of file bnx2.h.

#define BNX2_PCI_SWAP_DIAG0   0x00000418

Definition at line 574 of file bnx2.h.

#define BNX2_PCI_SWAP_DIAG1   0x0000041c

Definition at line 575 of file bnx2.h.

#define BNX2_PCI_VPD_ADDR_FLAG   0x0000042c

Definition at line 584 of file bnx2.h.

#define BNX2_PCI_VPD_ADDR_FLAG_ADDRESS   (0x1fffL<<2)

Definition at line 587 of file bnx2.h.

#define BNX2_PCI_VPD_ADDR_FLAG_MSK   0x0000ffff

Definition at line 585 of file bnx2.h.

#define BNX2_PCI_VPD_ADDR_FLAG_SL   0L

Definition at line 586 of file bnx2.h.

#define BNX2_PCI_VPD_ADDR_FLAG_WR   (1L<<15)

Definition at line 588 of file bnx2.h.

#define BNX2_PCI_VPD_DATA   0x00000430

Definition at line 590 of file bnx2.h.

#define BNX2_PCI_VPD_INTF   0x00000428

Definition at line 581 of file bnx2.h.

#define BNX2_PCI_VPD_INTF_INTF_REQ   (1L<<0)

Definition at line 582 of file bnx2.h.

#define BNX2_PCICFG_DEVICE_CONTROL   0x000000b4

Definition at line 464 of file bnx2.h.

#define BNX2_PCICFG_DEVICE_STATUS_NO_PEND   ((1L<<5)<<16)

Definition at line 465 of file bnx2.h.

#define BNX2_PCICFG_INT_ACK_CMD   0x00000084

Definition at line 451 of file bnx2.h.

#define BNX2_PCICFG_INT_ACK_CMD_INDEX   (0xffffL<<0)

Definition at line 452 of file bnx2.h.

#define BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID   (1L<<16)

Definition at line 453 of file bnx2.h.

#define BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT   24

Definition at line 457 of file bnx2.h.

#define BNX2_PCICFG_INT_ACK_CMD_INTERRUPT_NUM   (0xfL<<24)

Definition at line 456 of file bnx2.h.

#define BNX2_PCICFG_INT_ACK_CMD_MASK_INT   (1L<<18)

Definition at line 455 of file bnx2.h.

#define BNX2_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM   (1L<<17)

Definition at line 454 of file bnx2.h.

#define BNX2_PCICFG_MAILBOX_QUEUE_ADDR   0x00000090

Definition at line 461 of file bnx2.h.

#define BNX2_PCICFG_MAILBOX_QUEUE_DATA   0x00000094

Definition at line 462 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG   0x00000068

Definition at line 388 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_ASIC_BASE_REV   (0xfL<<24)

Definition at line 401 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_ASIC_ID   (0xfL<<28)

Definition at line 402 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_ASIC_METAL_REV   (0xffL<<16)

Definition at line 400 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_CLOCK_CTL_ENA   (1L<<5)

Definition at line 392 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY   (1L<<9)

Definition at line 396 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ   (1L<<8)

Definition at line 395 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_GRC_WIN1_SWAP_EN   (1L<<10)

Definition at line 397 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_GRC_WIN2_SWAP_EN   (1L<<11)

Definition at line 398 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_GRC_WIN3_SWAP_EN   (1L<<12)

Definition at line 399 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA   (1L<<7)

Definition at line 394 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_RESERVED1   (1L<<4)

Definition at line 391 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_TARGET_BYTE_SWAP   (1L<<2)

Definition at line 389 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_TARGET_GRC_WORD_SWAP   (1L<<6)

Definition at line 393 of file bnx2.h.

#define BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP   (1L<<3)

Definition at line 390 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS   0x0000006c

Definition at line 404 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_32BIT_DET   (1L<<1)

Definition at line 406 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_BAD_MEM_WRITE_BE   (1L<<8)

Definition at line 414 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_INTA_VALUE   (1L<<0)

Definition at line 405 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_M66EN   (1L<<2)

Definition at line 407 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_PCIX_DET   (1L<<3)

Definition at line 408 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED   (0x3L<<4)

Definition at line 409 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_100   (1L<<4)

Definition at line 411 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_133   (2L<<4)

Definition at line 412 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_66   (0L<<4)

Definition at line 410 of file bnx2.h.

#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_PCI_MODE   (3L<<4)

Definition at line 413 of file bnx2.h.

#define BNX2_PCICFG_MSI_CONTROL   0x00000058

Definition at line 385 of file bnx2.h.

#define BNX2_PCICFG_MSI_CONTROL_ENABLE   (1L<<16)

Definition at line 386 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS   0x00000070

Definition at line 416 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT   (1L<<7)

Definition at line 428 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC   (0x7L<<8)

Definition at line 429 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12   (1L<<8)

Definition at line 431 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6   (2L<<8)

Definition at line 432 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62   (4L<<8)

Definition at line 433 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF   (0L<<8)

Definition at line 430 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE   (1L<<6)

Definition at line 427 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED   (0xfL<<12)

Definition at line 435 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100   (0L<<12)

Definition at line 436 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25   (8L<<12)

Definition at line 440 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40   (4L<<12)

Definition at line 439 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50   (2L<<12)

Definition at line 438 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80   (1L<<12)

Definition at line 437 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP   (1L<<16)

Definition at line 441 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_MIN_POWER   (1L<<11)

Definition at line 434 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET   (0xfL<<0)

Definition at line 417 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ   (7L<<0)

Definition at line 425 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ   (0L<<0)

Definition at line 418 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ   (1L<<0)

Definition at line 419 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ   (2L<<0)

Definition at line 420 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ   (3L<<0)

Definition at line 421 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ   (4L<<0)

Definition at line 422 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ   (5L<<0)

Definition at line 423 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ   (6L<<0)

Definition at line 424 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW   (0xfL<<0)

Definition at line 426 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED   (0xfffL<<20)

Definition at line 445 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_17   (1L<<17)

Definition at line 442 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_18   (1L<<18)

Definition at line 443 of file bnx2.h.

#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_19   (1L<<19)

Definition at line 444 of file bnx2.h.

#define BNX2_PCICFG_REG_WINDOW   0x00000080

Definition at line 450 of file bnx2.h.

#define BNX2_PCICFG_REG_WINDOW_ADDRESS   0x00000078

Definition at line 447 of file bnx2.h.

#define BNX2_PCICFG_REG_WINDOW_ADDRESS_VAL   (0xfffffL<<2)

Definition at line 448 of file bnx2.h.

#define BNX2_PCICFG_STATUS_BIT_CLEAR_CMD   0x0000008c

Definition at line 460 of file bnx2.h.

#define BNX2_PCICFG_STATUS_BIT_SET_CMD   0x00000088

Definition at line 459 of file bnx2.h.

#define BNX2_PHY_FLAG_2_5G_CAPABLE   0x00000008

Definition at line 6838 of file bnx2.h.

#define BNX2_PHY_FLAG_CRC_FIX   0x00000002

Definition at line 6836 of file bnx2.h.

#define BNX2_PHY_FLAG_DIS_EARLY_DAC   0x00000400

Definition at line 6842 of file bnx2.h.

#define BNX2_PHY_FLAG_FORCED_DOWN   0x00001000

Definition at line 6844 of file bnx2.h.

#define BNX2_PHY_FLAG_INT_MODE_AUTO_POLLING   0x00000100

Definition at line 6840 of file bnx2.h.

#define BNX2_PHY_FLAG_INT_MODE_LINK_READY   0x00000200

Definition at line 6841 of file bnx2.h.

#define BNX2_PHY_FLAG_INT_MODE_MASK   0x00000300

Definition at line 6839 of file bnx2.h.

#define BNX2_PHY_FLAG_NO_PARALLEL   0x00002000

Definition at line 6845 of file bnx2.h.

#define BNX2_PHY_FLAG_PARALLEL_DETECT   0x00000004

Definition at line 6837 of file bnx2.h.

#define BNX2_PHY_FLAG_REMOTE_PHY_CAP   0x00000800

Definition at line 6843 of file bnx2.h.

#define BNX2_PHY_FLAG_SERDES   0x00000001

Definition at line 6835 of file bnx2.h.

#define BNX2_PORT2_FEATURE   0x00000014c

Definition at line 7236 of file bnx2.h.

#define BNX2_PORT2_FEATURE_IMD   0x158

Definition at line 7326 of file bnx2.h.

#define BNX2_PORT2_FEATURE_MBA   0x154

Definition at line 7280 of file bnx2.h.

#define BNX2_PORT2_FEATURE_VLAN   0x15c

Definition at line 7331 of file bnx2.h.

#define BNX2_PORT2_FEATURE_WOL   0x150

Definition at line 7260 of file bnx2.h.

#define BNX2_PORT_FEATURE   0x000000d8

Definition at line 7235 of file bnx2.h.

#define BNX2_PORT_FEATURE_ASF_ENABLED   0x04000000

Definition at line 7239 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_128K   0x2

Definition at line 7244 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_128M   0xc

Definition at line 7254 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_16M   0x9

Definition at line 7251 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_1G   0xf

Definition at line 7257 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_1M   0x5

Definition at line 7247 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_256K   0x3

Definition at line 7245 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_256M   0xd

Definition at line 7255 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_2M   0x6

Definition at line 7248 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_32M   0xa

Definition at line 7252 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_4M   0x7

Definition at line 7249 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_512K   0x4

Definition at line 7246 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_512M   0xe

Definition at line 7256 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_64K   0x1

Definition at line 7243 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_64M   0xb

Definition at line 7253 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_8M   0x8

Definition at line 7250 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_DISABLED   0x0

Definition at line 7242 of file bnx2.h.

#define BNX2_PORT_FEATURE_BAR1_SIZE_MASK   0xf

Definition at line 7241 of file bnx2.h.

#define BNX2_PORT_FEATURE_IMD   0xe4

Definition at line 7325 of file bnx2.h.

#define BNX2_PORT_FEATURE_IMD_ENABLED   0x08000000

Definition at line 7240 of file bnx2.h.

#define BNX2_PORT_FEATURE_IMD_LINK_OVERRIDE_DEFAULT   0

Definition at line 7327 of file bnx2.h.

#define BNX2_PORT_FEATURE_IMD_LINK_OVERRIDE_ENABLE   1

Definition at line 7328 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA   0xe0

Definition at line 7279 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_AUTO   0

Definition at line 7320 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_BBS   0x100000

Definition at line 7321 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT18H   0x200000

Definition at line 7322 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT19H   0x300000

Definition at line 7323 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_MASK   0x300000

Definition at line 7319 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_SHIFT_BITS   20

Definition at line 7318 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_BOOTP   2

Definition at line 7285 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_MASK   0x3

Definition at line 7282 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_PXE   0

Definition at line 7283 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_RPL   1

Definition at line 7284 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_SHIFT_BITS   0

Definition at line 7281 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_ENABLED   0x02000000

Definition at line 7238 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_128K   0x800

Definition at line 7308 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_16K   0x500

Definition at line 7305 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_16M   0xf00

Definition at line 7315 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_1K   0x100

Definition at line 7301 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_1M   0xb00

Definition at line 7311 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_256K   0x900

Definition at line 7309 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_2K   0x200

Definition at line 7302 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_2M   0xc00

Definition at line 7312 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_32K   0x600

Definition at line 7306 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_4K   0x300

Definition at line 7303 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_4M   0xd00

Definition at line 7313 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_512K   0xa00

Definition at line 7310 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_64K   0x700

Definition at line 7307 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_8K   0x400

Definition at line 7304 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_8M   0xe00

Definition at line 7314 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_DISABLED   0

Definition at line 7300 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_MASK   0xff00

Definition at line 7299 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_SHIFT_BITS   8

Definition at line 7298 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_HOTKEY_CTRL_B   0x80

Definition at line 7297 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_HOTKEY_CTRL_S   0

Definition at line 7296 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_1000FULL   0x18

Definition at line 7294 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_1000HALF   0x14

Definition at line 7293 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_100FULL   0x10

Definition at line 7292 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_100HALF   0xc

Definition at line 7291 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_10FULL   0x8

Definition at line 7290 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_10HALF   0x4

Definition at line 7289 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_AUTONEG   0

Definition at line 7288 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_MASK   0x3c

Definition at line 7287 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_SHIFT_BITS   2

Definition at line 7286 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_MSG_TIMEOUT_MASK   0xf0000

Definition at line 7317 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_MSG_TIMEOUT_SHIFT_BITS   16

Definition at line 7316 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_SETUP_PROMPT_ENABLE   0x40

Definition at line 7295 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_VLAN_ENABLE   0x10000

Definition at line 7333 of file bnx2.h.

#define BNX2_PORT_FEATURE_MBA_VLAN_TAG_MASK   0xffff

Definition at line 7332 of file bnx2.h.

#define BNX2_PORT_FEATURE_VLAN   0xe8

Definition at line 7330 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL   0xdc

Definition at line 7259 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_AUTONEG_ADVERTISE_1000   0x40

Definition at line 7275 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_DEFAULT_ACPI   0x20

Definition at line 7265 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_DEFAULT_DISABLE   0

Definition at line 7263 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_DEFAULT_MAGIC   0x10

Definition at line 7264 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_DEFAULT_MAGIC_AND_ACPI   0x30

Definition at line 7266 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_DEFAULT_MASK   0x30

Definition at line 7262 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_DEFAULT_SHIFT_BITS   4

Definition at line 7261 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_ENABLED   0x01000000

Definition at line 7237 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_1000FULL   6

Definition at line 7274 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_1000HALF   5

Definition at line 7273 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_100FULL   4

Definition at line 7272 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_100HALF   3

Definition at line 7271 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_10FULL   2

Definition at line 7270 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_10HALF   1

Definition at line 7269 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_AUTONEG   0

Definition at line 7268 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_MASK   0xf

Definition at line 7267 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_RESERVED_ASYM_PAUSE_CAP   0x800

Definition at line 7277 of file bnx2.h.

#define BNX2_PORT_FEATURE_WOL_RESERVED_PAUSE_CAP   0x400

Definition at line 7276 of file bnx2.h.

#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_1G   0x00030000

Definition at line 7216 of file bnx2.h.

#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_2_5G   0x00040000

Definition at line 7217 of file bnx2.h.

#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_AN   0x00000000

Definition at line 7215 of file bnx2.h.

#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_MASK   0x001f0000

Definition at line 7214 of file bnx2.h.

#define BNX2_PORT_HW_CFG_CFG_TXCTL3_MASK   0x0000ffff

Definition at line 7213 of file bnx2.h.

#define BNX2_PORT_HW_CFG_CONFIG   0x00000058

Definition at line 7212 of file bnx2.h.

#define BNX2_PORT_HW_CFG_IMD_MAC_A_LOWER   0x0000006c

Definition at line 7220 of file bnx2.h.

#define BNX2_PORT_HW_CFG_IMD_MAC_A_UPPER   0x00000068

Definition at line 7219 of file bnx2.h.

#define BNX2_PORT_HW_CFG_IMD_MAC_B_LOWER   0x00000074

Definition at line 7222 of file bnx2.h.

#define BNX2_PORT_HW_CFG_IMD_MAC_B_UPPER   0x00000070

Definition at line 7221 of file bnx2.h.

#define BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER   0x0000007c

Definition at line 7224 of file bnx2.h.

#define BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER   0x00000078

Definition at line 7223 of file bnx2.h.

#define BNX2_PORT_HW_CFG_MAC_LOWER   0x00000054

Definition at line 7211 of file bnx2.h.

#define BNX2_PORT_HW_CFG_MAC_UPPER   0x00000050

Definition at line 7208 of file bnx2.h.

#define BNX2_PORT_HW_CFG_UPPERMAC_MASK   0xffff

Definition at line 7209 of file bnx2.h.

#define BNX2_RBUF_BUF_DATA   0x00220000

Definition at line 4271 of file bnx2.h.

#define BNX2_RBUF_CLIST_DATA   0x00210000

Definition at line 4270 of file bnx2.h.

#define BNX2_RBUF_COMMAND   0x00200000

Definition at line 4199 of file bnx2.h.

#define BNX2_RBUF_COMMAND_ALLOC_REQ   (1L<<5)

Definition at line 4205 of file bnx2.h.

#define BNX2_RBUF_COMMAND_CU_ISOLATE_XI   (1L<<5)

Definition at line 4207 of file bnx2.h.

#define BNX2_RBUF_COMMAND_EN_PRI_CHANGE_XI   (1L<<6)

Definition at line 4208 of file bnx2.h.

#define BNX2_RBUF_COMMAND_EN_PRI_CHNGE_TE   (1L<<6)

Definition at line 4206 of file bnx2.h.

#define BNX2_RBUF_COMMAND_ENABLED   (1L<<0)

Definition at line 4200 of file bnx2.h.

#define BNX2_RBUF_COMMAND_FREE_INIT   (1L<<1)

Definition at line 4201 of file bnx2.h.

#define BNX2_RBUF_COMMAND_GRC_ENDIAN_CONV_DIS_XI   (1L<<7)

Definition at line 4209 of file bnx2.h.

#define BNX2_RBUF_COMMAND_OVER_FREE   (1L<<4)

Definition at line 4204 of file bnx2.h.

#define BNX2_RBUF_COMMAND_PKT_OFFSET_OVFL   (1L<<3)

Definition at line 4203 of file bnx2.h.

#define BNX2_RBUF_COMMAND_RAM_INIT   (1L<<2)

Definition at line 4202 of file bnx2.h.

#define BNX2_RBUF_CONFIG   0x0020000c

Definition at line 4218 of file bnx2.h.

#define BNX2_RBUF_CONFIG2   0x0020001c

Definition at line 4247 of file bnx2.h.

#define BNX2_RBUF_CONFIG2_MAC_DROP_TRIP   (0x3ffL<<0)

Definition at line 4248 of file bnx2.h.

#define BNX2_RBUF_CONFIG2_MAC_DROP_TRIP_VAL (   mtu)    ((((mtu) - 1500) * 4 / 1000) + 5)

Definition at line 4249 of file bnx2.h.

#define BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP   (0x3ffL<<16)

Definition at line 4251 of file bnx2.h.

#define BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP_VAL (   mtu)    ((((mtu) - 1500) * 2 / 100) + 30)

Definition at line 4252 of file bnx2.h.

#define BNX2_RBUF_CONFIG2_VAL (   mtu)
Value:
(BNX2_RBUF_CONFIG2_MAC_DROP_TRIP_VAL(mtu) | \
(BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP_VAL(mtu) << 16))

Definition at line 4254 of file bnx2.h.

#define BNX2_RBUF_CONFIG3   0x00200020

Definition at line 4258 of file bnx2.h.

#define BNX2_RBUF_CONFIG3_CU_DROP_TRIP   (0x3ffL<<0)

Definition at line 4259 of file bnx2.h.

#define BNX2_RBUF_CONFIG3_CU_DROP_TRIP_VAL (   mtu)    ((((mtu) - 1500) * 12 / 1000) + 18)

Definition at line 4260 of file bnx2.h.

#define BNX2_RBUF_CONFIG3_CU_KEEP_TRIP   (0x3ffL<<16)

Definition at line 4262 of file bnx2.h.

#define BNX2_RBUF_CONFIG3_CU_KEEP_TRIP_VAL (   mtu)    ((((mtu) - 1500) * 2 / 100) + 30)

Definition at line 4263 of file bnx2.h.

#define BNX2_RBUF_CONFIG3_VAL (   mtu)
Value:
(BNX2_RBUF_CONFIG3_CU_DROP_TRIP_VAL(mtu) | \
(BNX2_RBUF_CONFIG3_CU_KEEP_TRIP_VAL(mtu) << 16))

Definition at line 4265 of file bnx2.h.

#define BNX2_RBUF_CONFIG_VAL (   mtu)
Value:
(BNX2_RBUF_CONFIG_XOFF_TRIP_VAL(mtu) | \
(BNX2_RBUF_CONFIG_XON_TRIP_VAL(mtu) << 16))

Definition at line 4225 of file bnx2.h.

#define BNX2_RBUF_CONFIG_XOFF_TRIP   (0x3ffL<<0)

Definition at line 4219 of file bnx2.h.

#define BNX2_RBUF_CONFIG_XOFF_TRIP_VAL (   mtu)    ((((mtu) - 1500) * 31 / 1000) + 54)

Definition at line 4220 of file bnx2.h.

#define BNX2_RBUF_CONFIG_XON_TRIP   (0x3ffL<<16)

Definition at line 4222 of file bnx2.h.

#define BNX2_RBUF_CONFIG_XON_TRIP_VAL (   mtu)    ((((mtu) - 1500) * 39 / 1000) + 66)

Definition at line 4223 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_ALLOC   0x00200010

Definition at line 4229 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_ALLOC_ALLOC_REQ   (1L<<31)

Definition at line 4232 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_ALLOC_TYPE   (1L<<16)

Definition at line 4231 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_ALLOC_VALUE   (0x1ffL<<7)

Definition at line 4230 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_FREE   0x00200014

Definition at line 4234 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_FREE_COUNT   (0x7fL<<0)

Definition at line 4235 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_FREE_FREE_REQ   (1L<<31)

Definition at line 4239 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_FREE_HEAD   (0x1ffL<<16)

Definition at line 4237 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_FREE_TAIL   (0x1ffL<<7)

Definition at line 4236 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_FREE_TYPE   (1L<<25)

Definition at line 4238 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_SEL   0x00200018

Definition at line 4241 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_SEL_COUNT   (0x7fL<<0)

Definition at line 4242 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_SEL_HEAD   (0x1ffL<<16)

Definition at line 4244 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_SEL_SEL_REQ   (1L<<31)

Definition at line 4245 of file bnx2.h.

#define BNX2_RBUF_FW_BUF_SEL_TAIL   (0x1ffL<<7)

Definition at line 4243 of file bnx2.h.

#define BNX2_RBUF_PKT_DATA   0x00208000

Definition at line 4269 of file bnx2.h.

#define BNX2_RBUF_STATUS1   0x00200004

Definition at line 4211 of file bnx2.h.

#define BNX2_RBUF_STATUS1_FREE_COUNT   (0x3ffL<<0)

Definition at line 4212 of file bnx2.h.

#define BNX2_RBUF_STATUS2   0x00200008

Definition at line 4214 of file bnx2.h.

#define BNX2_RBUF_STATUS2_FREE_HEAD   (0x1ffL<<16)

Definition at line 4216 of file bnx2.h.

#define BNX2_RBUF_STATUS2_FREE_TAIL   (0x1ffL<<0)

Definition at line 4215 of file bnx2.h.

#define BNX2_RLUP_RSS_COMMAND   0x00002048

Definition at line 4185 of file bnx2.h.

#define BNX2_RLUP_RSS_COMMAND_HASH_MASK   (0x7UL<<14)

Definition at line 4190 of file bnx2.h.

#define BNX2_RLUP_RSS_COMMAND_READ   (1UL<<13)

Definition at line 4189 of file bnx2.h.

#define BNX2_RLUP_RSS_COMMAND_RSS_IND_TABLE_ADDR   (0xfUL<<0)

Definition at line 4186 of file bnx2.h.

#define BNX2_RLUP_RSS_COMMAND_RSS_WRITE_MASK   (0xffUL<<4)

Definition at line 4187 of file bnx2.h.

#define BNX2_RLUP_RSS_COMMAND_WRITE   (1UL<<12)

Definition at line 4188 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG   0x0000201c

Definition at line 4173 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_ALL_XI   (1L<<0)

Definition at line 4176 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_IP_ONLY_XI   (2L<<0)

Definition at line 4177 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_OFF_XI   (0L<<0)

Definition at line 4175 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_RES_XI   (3L<<0)

Definition at line 4178 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_XI   (0x3L<<0)

Definition at line 4174 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_ALL_XI   (1L<<2)

Definition at line 4181 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_IP_ONLY_XI   (2L<<2)

Definition at line 4182 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_OFF_XI   (0L<<2)

Definition at line 4180 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_RES_XI   (3L<<2)

Definition at line 4183 of file bnx2.h.

#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_XI   (0x3L<<2)

Definition at line 4179 of file bnx2.h.

#define BNX2_RLUP_RSS_DATA   0x0000204c

Definition at line 4192 of file bnx2.h.

#define BNX2_RPHY_COPPER_LINK   0x378

Definition at line 7430 of file bnx2.h.

#define BNX2_RPHY_FLAGS   0x370

Definition at line 7428 of file bnx2.h.

#define BNX2_RPHY_LOAD_SIGNATURE   0x5a5a5a5a

Definition at line 7426 of file bnx2.h.

#define BNX2_RPHY_SERDES_LINK   0x374

Definition at line 7429 of file bnx2.h.

#define BNX2_RPHY_SIGNATURE   0x36c

Definition at line 7425 of file bnx2.h.

#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL   0x00001a00

Definition at line 4117 of file bnx2.h.

#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_BYTE_ADDRESS   (0xffffL<<0)

Definition at line 4118 of file bnx2.h.

#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_DEBUGRD   (1L<<28)

Definition at line 4119 of file bnx2.h.

#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_INIT   (1L<<30)

Definition at line 4121 of file bnx2.h.

#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_MODE   (1L<<29)

Definition at line 4120 of file bnx2.h.

#define BNX2_RPM_ACPI_BYTE_ENABLE_CTRL_WR   (1L<<31)

Definition at line 4122 of file bnx2.h.

#define BNX2_RPM_ACPI_DATA   0x00001a08

Definition at line 4129 of file bnx2.h.

#define BNX2_RPM_ACPI_DATA_PATTERN_BE   (0xffffffffL<<0)

Definition at line 4130 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W00   0x000019c0

Definition at line 4101 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W01   0x000019c4

Definition at line 4102 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W02   0x000019c8

Definition at line 4103 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W03   0x000019cc

Definition at line 4104 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W10   0x000019d0

Definition at line 4105 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W11   0x000019d4

Definition at line 4106 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W12   0x000019d8

Definition at line 4107 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W13   0x000019dc

Definition at line 4108 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W20   0x000019e0

Definition at line 4109 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W21   0x000019e4

Definition at line 4110 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W22   0x000019e8

Definition at line 4111 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W23   0x000019ec

Definition at line 4112 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W30   0x000019f0

Definition at line 4113 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W31   0x000019f4

Definition at line 4114 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W32   0x000019f8

Definition at line 4115 of file bnx2.h.

#define BNX2_RPM_ACPI_DBG_BUF_W33   0x000019fc

Definition at line 4116 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC0   0x00001a18

Definition at line 4144 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC0_PATTERN_CRC0   (0xffffffffL<<0)

Definition at line 4145 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC1   0x00001a1c

Definition at line 4147 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC1_PATTERN_CRC1   (0xffffffffL<<0)

Definition at line 4148 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC2   0x00001a20

Definition at line 4150 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC2_PATTERN_CRC2   (0xffffffffL<<0)

Definition at line 4151 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC3   0x00001a24

Definition at line 4153 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC3_PATTERN_CRC3   (0xffffffffL<<0)

Definition at line 4154 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC4   0x00001a28

Definition at line 4156 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC4_PATTERN_CRC4   (0xffffffffL<<0)

Definition at line 4157 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC5   0x00001a2c

Definition at line 4159 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC5_PATTERN_CRC5   (0xffffffffL<<0)

Definition at line 4160 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC6   0x00001a30

Definition at line 4162 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC6_PATTERN_CRC6   (0xffffffffL<<0)

Definition at line 4163 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC7   0x00001a34

Definition at line 4165 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CRC7_PATTERN_CRC7   (0xffffffffL<<0)

Definition at line 4166 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CTRL   0x00001a04

Definition at line 4124 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CTRL_CRC_SM_CLR   (1L<<30)

Definition at line 4126 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CTRL_PATTERN_ID   (0xfL<<0)

Definition at line 4125 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_CTRL_WR   (1L<<31)

Definition at line 4127 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN0   0x00001a0c

Definition at line 4132 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN0_PATTERN_LEN0   (0xffL<<24)

Definition at line 4136 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN0_PATTERN_LEN1   (0xffL<<16)

Definition at line 4135 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN0_PATTERN_LEN2   (0xffL<<8)

Definition at line 4134 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN0_PATTERN_LEN3   (0xffL<<0)

Definition at line 4133 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN1   0x00001a10

Definition at line 4138 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN1_PATTERN_LEN4   (0xffL<<24)

Definition at line 4142 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN1_PATTERN_LEN5   (0xffL<<16)

Definition at line 4141 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN1_PATTERN_LEN6   (0xffL<<8)

Definition at line 4140 of file bnx2.h.

#define BNX2_RPM_ACPI_PATTERN_LEN1_PATTERN_LEN7   (0xffL<<0)

Definition at line 4139 of file bnx2.h.

#define BNX2_RPM_COMMAND   0x00001800

Definition at line 3124 of file bnx2.h.

#define BNX2_RPM_COMMAND_ENABLED   (1L<<0)

Definition at line 3125 of file bnx2.h.

#define BNX2_RPM_COMMAND_OVERRUN_ABORT   (1L<<4)

Definition at line 3126 of file bnx2.h.

#define BNX2_RPM_CONFIG   0x00001808

Definition at line 3132 of file bnx2.h.

#define BNX2_RPM_CONFIG_ACPI_ENA   (1L<<1)

Definition at line 3134 of file bnx2.h.

#define BNX2_RPM_CONFIG_ACPI_KEEP   (1L<<2)

Definition at line 3135 of file bnx2.h.

#define BNX2_RPM_CONFIG_DISABLE_WOL_ASSERT   (1L<<30)

Definition at line 3138 of file bnx2.h.

#define BNX2_RPM_CONFIG_IGNORE_VLAN   (1L<<31)

Definition at line 3139 of file bnx2.h.

#define BNX2_RPM_CONFIG_MP_KEEP   (1L<<3)

Definition at line 3136 of file bnx2.h.

#define BNX2_RPM_CONFIG_NO_PSD_HDR_CKSUM   (1L<<0)

Definition at line 3133 of file bnx2.h.

#define BNX2_RPM_CONFIG_SORT_VECT_VAL   (0xfL<<4)

Definition at line 3137 of file bnx2.h.

#define BNX2_RPM_DEBUG0   0x00001984

Definition at line 3936 of file bnx2.h.

#define BNX2_RPM_DEBUG0_DONE   (1L<<24)

Definition at line 3946 of file bnx2.h.

#define BNX2_RPM_DEBUG0_FM_BCNT   (0xffffL<<0)

Definition at line 3937 of file bnx2.h.

#define BNX2_RPM_DEBUG0_FM_STARTED   (1L<<23)

Definition at line 3945 of file bnx2.h.

#define BNX2_RPM_DEBUG0_IGNORE_VLAN   (1L<<28)

Definition at line 3950 of file bnx2.h.

#define BNX2_RPM_DEBUG0_IP_MORE_FRGMT   (1L<<20)

Definition at line 3942 of file bnx2.h.

#define BNX2_RPM_DEBUG0_LLC_SNAP   (1L<<22)

Definition at line 3944 of file bnx2.h.

#define BNX2_RPM_DEBUG0_RP_ENA_ACTIVE   (1L<<31)

Definition at line 3951 of file bnx2.h.

#define BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_CKSUM   (1L<<27)

Definition at line 3949 of file bnx2.h.

#define BNX2_RPM_DEBUG0_T_DATA_OFST_VLD   (1L<<16)

Definition at line 3938 of file bnx2.h.

#define BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP_HDR   (1L<<21)

Definition at line 3943 of file bnx2.h.

#define BNX2_RPM_DEBUG0_T_IP_OFST_VLD   (1L<<19)

Definition at line 3941 of file bnx2.h.

#define BNX2_RPM_DEBUG0_T_TCP_OFST_VLD   (1L<<18)

Definition at line 3940 of file bnx2.h.

#define BNX2_RPM_DEBUG0_T_UDP_OFST_VLD   (1L<<17)

Definition at line 3939 of file bnx2.h.

#define BNX2_RPM_DEBUG0_USE_TPBUF_CKSUM   (1L<<26)

Definition at line 3948 of file bnx2.h.

#define BNX2_RPM_DEBUG0_WAIT_4_DONE   (1L<<25)

Definition at line 3947 of file bnx2.h.

#define BNX2_RPM_DEBUG1   0x00001988

Definition at line 3953 of file bnx2.h.

#define BNX2_RPM_DEBUG1_EOF_0XTRA_WD   (1L<<31)

Definition at line 3975 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST   (0xffffL<<0)

Definition at line 3954 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRY   (0x2000L<<0)

Definition at line 3968 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRYOUT   (0x4000L<<0)

Definition at line 3969 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_AH   (256L<<0)

Definition at line 3964 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_DATA   (2048L<<0)

Definition at line 3967 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP   (512L<<0)

Definition at line 3965 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_PAYLOAD   (1024L<<0)

Definition at line 3966 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IP   (8L<<0)

Definition at line 3959 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IPLLC   (2L<<0)

Definition at line 3957 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_ALL   (1L<<0)

Definition at line 3956 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_IP   (4L<<0)

Definition at line 3958 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE   (0L<<0)

Definition at line 3955 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IP   (32L<<0)

Definition at line 3961 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_START   (16L<<0)

Definition at line 3960 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_LATCH_RESULT   (0x8000L<<0)

Definition at line 3970 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_TCP   (64L<<0)

Definition at line 3962 of file bnx2.h.

#define BNX2_RPM_DEBUG1_FSM_CUR_ST_UDP   (128L<<0)

Definition at line 3963 of file bnx2.h.

#define BNX2_RPM_DEBUG1_HDR_BCNT   (0x7ffL<<16)

Definition at line 3971 of file bnx2.h.

#define BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D   (1L<<28)

Definition at line 3972 of file bnx2.h.

#define BNX2_RPM_DEBUG1_VLAN_REMOVED_D1   (1L<<30)

Definition at line 3974 of file bnx2.h.

#define BNX2_RPM_DEBUG1_VLAN_REMOVED_D2   (1L<<29)

Definition at line 3973 of file bnx2.h.

#define BNX2_RPM_DEBUG2   0x0000198c

Definition at line 3977 of file bnx2.h.

#define BNX2_RPM_DEBUG2_CMD_HIT_VEC   (0xffffL<<0)

Definition at line 3978 of file bnx2.h.

#define BNX2_RPM_DEBUG2_FM_DISCARD   (1L<<29)

Definition at line 3985 of file bnx2.h.

#define BNX2_RPM_DEBUG2_IP_BCNT   (0xffL<<16)

Definition at line 3979 of file bnx2.h.

#define BNX2_RPM_DEBUG2_IPIPE_EMPTY   (1L<<28)

Definition at line 3984 of file bnx2.h.

#define BNX2_RPM_DEBUG2_LAST_RULE_IN_FM_D1   (1L<<31)

Definition at line 3987 of file bnx2.h.

#define BNX2_RPM_DEBUG2_LAST_RULE_IN_FM_D2   (1L<<30)

Definition at line 3986 of file bnx2.h.

#define BNX2_RPM_DEBUG2_THIS_CMD_M1   (1L<<27)

Definition at line 3983 of file bnx2.h.

#define BNX2_RPM_DEBUG2_THIS_CMD_M2   (1L<<26)

Definition at line 3982 of file bnx2.h.

#define BNX2_RPM_DEBUG2_THIS_CMD_M3   (1L<<25)

Definition at line 3981 of file bnx2.h.

#define BNX2_RPM_DEBUG2_THIS_CMD_M4   (1L<<24)

Definition at line 3980 of file bnx2.h.

#define BNX2_RPM_DEBUG3   0x00001990

Definition at line 3989 of file bnx2.h.

#define BNX2_RPM_DEBUG3_AVAIL_MBUF_PTR   (0x1ffL<<0)

Definition at line 3990 of file bnx2.h.

#define BNX2_RPM_DEBUG3_CCODE_EOF_ERROR   (1L<<31)

Definition at line 4021 of file bnx2.h.

#define BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY_CT   (0xfL<<16)

Definition at line 3998 of file bnx2.h.

#define BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAVAIL   (1L<<14)

Definition at line 3996 of file bnx2.h.

#define BNX2_RPM_DEBUG3_DROP_NXT   (1L<<23)

Definition at line 4001 of file bnx2.h.

#define BNX2_RPM_DEBUG3_DROP_NXT_VLD   (1L<<22)

Definition at line 4000 of file bnx2.h.

#define BNX2_RPM_DEBUG3_FTQ_FSM   (0x3L<<24)

Definition at line 4002 of file bnx2.h.

#define BNX2_RPM_DEBUG3_FTQ_FSM_IDLE   (0x0L<<24)

Definition at line 4003 of file bnx2.h.

#define BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_ACK   (0x1L<<24)

Definition at line 4004 of file bnx2.h.

#define BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FREE   (0x2L<<24)

Definition at line 4005 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBALLOC_FSM   (1L<<30)

Definition at line 4018 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_MBUF   (0x0L<<30)

Definition at line 4019 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBALLOC_FSM_IVE_MBUF   (0x1L<<30)

Definition at line 4020 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBFREE_FSM   (1L<<29)

Definition at line 4015 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBFREE_FSM_IDLE   (0L<<29)

Definition at line 4016 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBFREE_FSM_WAIT_ACK   (1L<<29)

Definition at line 4017 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM   (0x3L<<26)

Definition at line 4006 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM_DMA_DATA   (0x2L<<26)

Definition at line 4009 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM_DONE   (0x7L<<26)

Definition at line 4014 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM_GET_MBUF   (0x1L<<26)

Definition at line 4008 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_DATA   (0x3L<<26)

Definition at line 4010 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_DROP_NXT_VLD   (0x6L<<26)

Definition at line 4013 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_EOF   (0x4L<<26)

Definition at line 4011 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_MF_ACK   (0x5L<<26)

Definition at line 4012 of file bnx2.h.

#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_SOF   (0x0L<<26)

Definition at line 4007 of file bnx2.h.

#define BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DROP   (1L<<15)

Definition at line 3997 of file bnx2.h.

#define BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_REQ   (1L<<13)

Definition at line 3995 of file bnx2.h.

#define BNX2_RPM_DEBUG3_RDE_RBUF_FREE_REQ   (1L<<12)

Definition at line 3994 of file bnx2.h.

#define BNX2_RPM_DEBUG3_RDE_RBUF_WR_LAST_INT   (1L<<10)

Definition at line 3992 of file bnx2.h.

#define BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ_INT   (1L<<11)

Definition at line 3993 of file bnx2.h.

#define BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_REQ_INT   (1L<<9)

Definition at line 3991 of file bnx2.h.

#define BNX2_RPM_DEBUG3_RDE_SRC_FIFO_ALMFULL   (1L<<21)

Definition at line 3999 of file bnx2.h.

#define BNX2_RPM_DEBUG4   0x00001994

Definition at line 4023 of file bnx2.h.

#define BNX2_RPM_DEBUG4_DFIFO_CUR_CCODE   (0x7L<<25)

Definition at line 4025 of file bnx2.h.

#define BNX2_RPM_DEBUG4_DFIFO_EMPTY   (1L<<31)

Definition at line 4027 of file bnx2.h.

#define BNX2_RPM_DEBUG4_DFSM_MBUF_CLUSTER   (0x1ffffffL<<0)

Definition at line 4024 of file bnx2.h.

#define BNX2_RPM_DEBUG4_MBWRITE_FSM   (0x7L<<28)

Definition at line 4026 of file bnx2.h.

#define BNX2_RPM_DEBUG5   0x00001998

Definition at line 4029 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_ACPI_EMPTY   (1L<<29)

Definition at line 4043 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_DISCARD   (1L<<24)

Definition at line 4038 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_FC_EMPTY   (1L<<28)

Definition at line 4042 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_FULL_T   (1L<<30)

Definition at line 4044 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_MBUF_NOTAVAIL   (1L<<25)

Definition at line 4039 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_MC_EMPTY   (1L<<26)

Definition at line 4040 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_RC_EMPTY   (1L<<27)

Definition at line 4041 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_RD   (1L<<31)

Definition at line 4045 of file bnx2.h.

#define BNX2_RPM_DEBUG5_HOLDREG_WOL_DROP_INT   (1L<<23)

Definition at line 4037 of file bnx2.h.

#define BNX2_RPM_DEBUG5_RDROP_ACPI_EMPTY   (1L<<20)

Definition at line 4034 of file bnx2.h.

#define BNX2_RPM_DEBUG5_RDROP_ACPI_RPTR   (0x1fL<<5)

Definition at line 4031 of file bnx2.h.

#define BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_AT_RDROP_MC_RPTR   (1L<<22)

Definition at line 4036 of file bnx2.h.

#define BNX2_RPM_DEBUG5_RDROP_MC_EMPTY   (1L<<21)

Definition at line 4035 of file bnx2.h.

#define BNX2_RPM_DEBUG5_RDROP_MC_RPTR   (0x1fL<<10)

Definition at line 4032 of file bnx2.h.

#define BNX2_RPM_DEBUG5_RDROP_RC_RPTR   (0x1fL<<15)

Definition at line 4033 of file bnx2.h.

#define BNX2_RPM_DEBUG5_RDROP_WPTR   (0x1fL<<0)

Definition at line 4030 of file bnx2.h.

#define BNX2_RPM_DEBUG6   0x0000199c

Definition at line 4047 of file bnx2.h.

#define BNX2_RPM_DEBUG6_ACPI_VEC   (0xffffL<<0)

Definition at line 4048 of file bnx2.h.

#define BNX2_RPM_DEBUG6_VEC   (0xffffL<<16)

Definition at line 4049 of file bnx2.h.

#define BNX2_RPM_DEBUG7   0x000019a0

Definition at line 4051 of file bnx2.h.

#define BNX2_RPM_DEBUG7_RPM_DBG7_LAST_CRC   (0xffffffffL<<0)

Definition at line 4052 of file bnx2.h.

#define BNX2_RPM_DEBUG8   0x000019a4

Definition at line 4054 of file bnx2.h.

#define BNX2_RPM_DEBUG8_ALL_DONE   (1L<<15)

Definition at line 4078 of file bnx2.h.

#define BNX2_RPM_DEBUG8_BYTE_CTR   (0xffL<<24)

Definition at line 4080 of file bnx2.h.

#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_W2   (1L<<8)

Definition at line 4071 of file bnx2.h.

#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_W3   (1L<<7)

Definition at line 4070 of file bnx2.h.

#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_WAIT   (1L<<6)

Definition at line 4069 of file bnx2.h.

#define BNX2_RPM_DEBUG8_COMPARE_AT_W0   (1L<<4)

Definition at line 4067 of file bnx2.h.

#define BNX2_RPM_DEBUG8_COMPARE_AT_W3_DATA   (1L<<5)

Definition at line 4068 of file bnx2.h.

#define BNX2_RPM_DEBUG8_EOF_DET   (1L<<12)

Definition at line 4075 of file bnx2.h.

#define BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLDBYTES   (1L<<10)

Definition at line 4073 of file bnx2.h.

#define BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLDBYTES   (1L<<9)

Definition at line 4072 of file bnx2.h.

#define BNX2_RPM_DEBUG8_NXT_EOF_W_12_VLDBYTES   (1L<<11)

Definition at line 4074 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM   (0xfL<<0)

Definition at line 4055 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDLE   (0L<<0)

Definition at line 4056 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W1_ADDR   (1L<<0)

Definition at line 4057 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W2_ADDR   (2L<<0)

Definition at line 4058 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W3_ADDR   (3L<<0)

Definition at line 4059 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_WAIT_THBUF   (4L<<0)

Definition at line 4060 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_ADDR   (6L<<0)

Definition at line 4062 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_ADDR   (7L<<0)

Definition at line 4063 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_ADDR   (8L<<0)

Definition at line 4064 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_ADDR   (9L<<0)

Definition at line 4065 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_DATA   (5L<<0)

Definition at line 4061 of file bnx2.h.

#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAIT_THBUF   (10L<<0)

Definition at line 4066 of file bnx2.h.

#define BNX2_RPM_DEBUG8_SOF_DET   (1L<<13)

Definition at line 4076 of file bnx2.h.

#define BNX2_RPM_DEBUG8_THBUF_ADDR   (0x7fL<<16)

Definition at line 4079 of file bnx2.h.

#define BNX2_RPM_DEBUG8_WAIT_4_SOF   (1L<<14)

Definition at line 4077 of file bnx2.h.

#define BNX2_RPM_DEBUG9   0x000019a8

Definition at line 4082 of file bnx2.h.

#define BNX2_RPM_DEBUG9_ACPI_ENABLE_SYN   (1L<<31)

Definition at line 4089 of file bnx2.h.

#define BNX2_RPM_DEBUG9_ACPI_MATCH_INT   (1L<<30)

Definition at line 4088 of file bnx2.h.

#define BNX2_RPM_DEBUG9_ACPI_RDE_PAT_ID_XI   (0xfL<<16)

Definition at line 4096 of file bnx2.h.

#define BNX2_RPM_DEBUG9_AEOF_DE_XI   (1L<<6)

Definition at line 4092 of file bnx2.h.

#define BNX2_RPM_DEBUG9_BEMEM_R_XI   (0x1fL<<0)

Definition at line 4090 of file bnx2.h.

#define BNX2_RPM_DEBUG9_CALCRC_BUFFER_VLD_XI   (1L<<31)

Definition at line 4099 of file bnx2.h.

#define BNX2_RPM_DEBUG9_CALCRC_RESULT_XI   (0x3ffL<<20)

Definition at line 4097 of file bnx2.h.

#define BNX2_RPM_DEBUG9_DATA_IN_VL_XI   (1L<<30)

Definition at line 4098 of file bnx2.h.

#define BNX2_RPM_DEBUG9_EO_XI   (1L<<5)

Definition at line 4091 of file bnx2.h.

#define BNX2_RPM_DEBUG9_EOF_VLDBYTE_XI   (0x7L<<13)

Definition at line 4095 of file bnx2.h.

#define BNX2_RPM_DEBUG9_INFIFO_OVERRUN_OCCURRED   (1L<<29)

Definition at line 4087 of file bnx2.h.

#define BNX2_RPM_DEBUG9_OUTFIFO_COUNT   (0x7L<<0)

Definition at line 4083 of file bnx2.h.

#define BNX2_RPM_DEBUG9_OUTFIFO_OVERRUN_OCCURRED   (1L<<28)

Definition at line 4086 of file bnx2.h.

#define BNX2_RPM_DEBUG9_RDE_ACPI_RDY   (1L<<3)

Definition at line 4084 of file bnx2.h.

#define BNX2_RPM_DEBUG9_SO_XI   (1L<<7)

Definition at line 4093 of file bnx2.h.

#define BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT   (0x7L<<4)

Definition at line 4085 of file bnx2.h.

#define BNX2_RPM_DEBUG9_WD64_CT_XI   (0x1fL<<8)

Definition at line 4094 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0   0x00001854

Definition at line 3205 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0_NEXT_HEADER   (0xffL<<16)

Definition at line 3207 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0_NEXT_HEADER_EN   (1L<<31)

Definition at line 3209 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0_NEXT_HEADER_LEN   (0xffL<<0)

Definition at line 3206 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION0_NEXT_HEADER_LEN_TYPE   (1L<<30)

Definition at line 3208 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1   0x00001858

Definition at line 3211 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1_NEXT_HEADER   (0xffL<<16)

Definition at line 3213 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1_NEXT_HEADER_EN   (1L<<31)

Definition at line 3215 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1_NEXT_HEADER_LEN   (0xffL<<0)

Definition at line 3212 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION1_NEXT_HEADER_LEN_TYPE   (1L<<30)

Definition at line 3214 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2   0x0000185c

Definition at line 3217 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2_NEXT_HEADER   (0xffL<<16)

Definition at line 3219 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2_NEXT_HEADER_EN   (1L<<31)

Definition at line 3221 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2_NEXT_HEADER_LEN   (0xffL<<0)

Definition at line 3218 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION2_NEXT_HEADER_LEN_TYPE   (1L<<30)

Definition at line 3220 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3   0x00001860

Definition at line 3223 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3_NEXT_HEADER   (0xffL<<16)

Definition at line 3225 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3_NEXT_HEADER_EN   (1L<<31)

Definition at line 3227 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3_NEXT_HEADER_LEN   (0xffL<<0)

Definition at line 3224 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION3_NEXT_HEADER_LEN_TYPE   (1L<<30)

Definition at line 3226 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4   0x00001864

Definition at line 3229 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4_NEXT_HEADER   (0xffL<<16)

Definition at line 3231 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4_NEXT_HEADER_EN   (1L<<31)

Definition at line 3233 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4_NEXT_HEADER_LEN   (0xffL<<0)

Definition at line 3230 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION4_NEXT_HEADER_LEN_TYPE   (1L<<30)

Definition at line 3232 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5   0x00001868

Definition at line 3235 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5_NEXT_HEADER   (0xffL<<16)

Definition at line 3237 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5_NEXT_HEADER_EN   (1L<<31)

Definition at line 3239 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5_NEXT_HEADER_LEN   (0xffL<<0)

Definition at line 3236 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION5_NEXT_HEADER_LEN_TYPE   (1L<<30)

Definition at line 3238 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6   0x0000186c

Definition at line 3241 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6_NEXT_HEADER   (0xffL<<16)

Definition at line 3243 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6_NEXT_HEADER_EN   (1L<<31)

Definition at line 3245 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6_NEXT_HEADER_LEN   (0xffL<<0)

Definition at line 3242 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION6_NEXT_HEADER_LEN_TYPE   (1L<<30)

Definition at line 3244 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7   0x00001870

Definition at line 3247 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7_NEXT_HEADER   (0xffL<<16)

Definition at line 3249 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7_NEXT_HEADER_EN   (1L<<31)

Definition at line 3251 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7_NEXT_HEADER_LEN   (0xffL<<0)

Definition at line 3248 of file bnx2.h.

#define BNX2_RPM_IPV6_PROGRAMMABLE_EXTENSION7_NEXT_HEADER_LEN_TYPE   (1L<<30)

Definition at line 3250 of file bnx2.h.

#define BNX2_RPM_MGMT_PKT_CTRL   0x0000180c

Definition at line 3141 of file bnx2.h.

#define BNX2_RPM_MGMT_PKT_CTRL_MGMT_DISCARD_EN   (1L<<30)

Definition at line 3144 of file bnx2.h.

#define BNX2_RPM_MGMT_PKT_CTRL_MGMT_EN   (1L<<31)

Definition at line 3145 of file bnx2.h.

#define BNX2_RPM_MGMT_PKT_CTRL_MGMT_RULE   (0xfL<<4)

Definition at line 3143 of file bnx2.h.

#define BNX2_RPM_MGMT_PKT_CTRL_MGMT_SORT   (0xfL<<0)

Definition at line 3142 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0   0x00001900

Definition at line 3386 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_CLASS   (0x7L<<8)

Definition at line 3388 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_CMDSEL   (0xfL<<20)

Definition at line 3406 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_CMDSEL_XI   (0x1fL<<20)

Definition at line 3408 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_COMP   (0x3L<<16)

Definition at line 3399 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_COMP_EQUAL   (0L<<16)

Definition at line 3400 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_COMP_GREATER   (2L<<16)

Definition at line 3402 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_COMP_LESS   (3L<<16)

Definition at line 3403 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_COMP_NEQUAL   (1L<<16)

Definition at line 3401 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_DISCARD   (1L<<25)

Definition at line 3409 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_HDR_TYPE   (0x7L<<13)

Definition at line 3391 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_DATA   (4L<<13)

Definition at line 3396 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_ICMPV6   (6L<<13)

Definition at line 3398 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_IP   (1L<<13)

Definition at line 3393 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_START   (0L<<13)

Definition at line 3392 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP   (2L<<13)

Definition at line 3394 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP_UDP   (5L<<13)

Definition at line 3397 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP   (3L<<13)

Definition at line 3395 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_MAP   (1L<<24)

Definition at line 3407 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_MAP_XI   (1L<<18)

Definition at line 3404 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_MASK   (1L<<26)

Definition at line 3410 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_NBIT   (1L<<30)

Definition at line 3414 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_OFFSET   (0xffL<<0)

Definition at line 3387 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_P1   (1L<<27)

Definition at line 3411 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_P2   (1L<<28)

Definition at line 3412 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_P3   (1L<<29)

Definition at line 3413 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_P4   (1L<<12)

Definition at line 3390 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_PRIORITY   (1L<<11)

Definition at line 3389 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_0_SBIT   (1L<<19)

Definition at line 3405 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1   0x00001908

Definition at line 3420 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10   0x00001950

Definition at line 3726 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_A   (0x3ffffL<<0)

Definition at line 3727 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_B   (0xfffL<<19)

Definition at line 3728 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_CLASS_XI   (0x7L<<8)

Definition at line 3730 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_CMDSEL_XI   (0x1fL<<20)

Definition at line 3748 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_COMP_EQUAL_XI   (0L<<16)

Definition at line 3742 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_COMP_GREATER_XI   (2L<<16)

Definition at line 3744 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_COMP_LESS_XI   (3L<<16)

Definition at line 3745 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3743 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_COMP_XI   (0x3L<<16)

Definition at line 3741 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_DISCARD_XI   (1L<<25)

Definition at line 3749 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3738 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3740 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3735 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3734 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3739 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3736 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3737 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3733 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_MAP_XI   (1L<<18)

Definition at line 3746 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_MASK_XI   (1L<<26)

Definition at line 3750 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_NBIT_XI   (1L<<30)

Definition at line 3754 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_OFFSET_XI   (0xffL<<0)

Definition at line 3729 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_P1_XI   (1L<<27)

Definition at line 3751 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_P2_XI   (1L<<28)

Definition at line 3752 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_P3_XI   (1L<<29)

Definition at line 3753 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_P4_XI   (1L<<12)

Definition at line 3732 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_PRIORITY_XI   (1L<<11)

Definition at line 3731 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_10_SBIT_XI   (1L<<19)

Definition at line 3747 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11   0x00001958

Definition at line 3760 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_A   (0x3ffffL<<0)

Definition at line 3761 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_B   (0xfffL<<19)

Definition at line 3762 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_CLASS_XI   (0x7L<<8)

Definition at line 3764 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_CMDSEL_XI   (0x1fL<<20)

Definition at line 3782 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_COMP_EQUAL_XI   (0L<<16)

Definition at line 3776 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_COMP_GREATER_XI   (2L<<16)

Definition at line 3778 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_COMP_LESS_XI   (3L<<16)

Definition at line 3779 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3777 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_COMP_XI   (0x3L<<16)

Definition at line 3775 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_DISCARD_XI   (1L<<25)

Definition at line 3783 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3772 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3774 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3769 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3768 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3773 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3770 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3771 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3767 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_MAP_XI   (1L<<18)

Definition at line 3780 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_MASK_XI   (1L<<26)

Definition at line 3784 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_NBIT_XI   (1L<<30)

Definition at line 3788 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_OFFSET_XI   (0xffL<<0)

Definition at line 3763 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_P1_XI   (1L<<27)

Definition at line 3785 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_P2_XI   (1L<<28)

Definition at line 3786 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_P3_XI   (1L<<29)

Definition at line 3787 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_P4_XI   (1L<<12)

Definition at line 3766 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_PRIORITY_XI   (1L<<11)

Definition at line 3765 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_11_SBIT_XI   (1L<<19)

Definition at line 3781 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12   0x00001960

Definition at line 3794 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_A   (0x3ffffL<<0)

Definition at line 3795 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_B   (0xfffL<<19)

Definition at line 3796 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_CLASS_XI   (0x7L<<8)

Definition at line 3798 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_CMDSEL_XI   (0x1fL<<20)

Definition at line 3816 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_COMP_EQUAL_XI   (0L<<16)

Definition at line 3810 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_COMP_GREATER_XI   (2L<<16)

Definition at line 3812 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_COMP_LESS_XI   (3L<<16)

Definition at line 3813 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3811 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_COMP_XI   (0x3L<<16)

Definition at line 3809 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_DISCARD_XI   (1L<<25)

Definition at line 3817 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3806 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3808 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3803 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3802 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3807 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3804 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3805 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3801 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_MAP_XI   (1L<<18)

Definition at line 3814 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_MASK_XI   (1L<<26)

Definition at line 3818 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_NBIT_XI   (1L<<30)

Definition at line 3822 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_OFFSET_XI   (0xffL<<0)

Definition at line 3797 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_P1_XI   (1L<<27)

Definition at line 3819 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_P2_XI   (1L<<28)

Definition at line 3820 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_P3_XI   (1L<<29)

Definition at line 3821 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_P4_XI   (1L<<12)

Definition at line 3800 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_PRIORITY_XI   (1L<<11)

Definition at line 3799 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_12_SBIT_XI   (1L<<19)

Definition at line 3815 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13   0x00001968

Definition at line 3828 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_A   (0x3ffffL<<0)

Definition at line 3829 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_B   (0xfffL<<19)

Definition at line 3830 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_CLASS_XI   (0x7L<<8)

Definition at line 3832 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_CMDSEL_XI   (0x1fL<<20)

Definition at line 3850 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_COMP_EQUAL_XI   (0L<<16)

Definition at line 3844 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_COMP_GREATER_XI   (2L<<16)

Definition at line 3846 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_COMP_LESS_XI   (3L<<16)

Definition at line 3847 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3845 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_COMP_XI   (0x3L<<16)

Definition at line 3843 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_DISCARD_XI   (1L<<25)

Definition at line 3851 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3840 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3842 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3837 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3836 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3841 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3838 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3839 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3835 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_MAP_XI   (1L<<18)

Definition at line 3848 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_MASK_XI   (1L<<26)

Definition at line 3852 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_NBIT_XI   (1L<<30)

Definition at line 3856 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_OFFSET_XI   (0xffL<<0)

Definition at line 3831 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_P1_XI   (1L<<27)

Definition at line 3853 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_P2_XI   (1L<<28)

Definition at line 3854 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_P3_XI   (1L<<29)

Definition at line 3855 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_P4_XI   (1L<<12)

Definition at line 3834 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_PRIORITY_XI   (1L<<11)

Definition at line 3833 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_13_SBIT_XI   (1L<<19)

Definition at line 3849 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14   0x00001970

Definition at line 3862 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_A   (0x3ffffL<<0)

Definition at line 3863 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_B   (0xfffL<<19)

Definition at line 3864 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_CLASS_XI   (0x7L<<8)

Definition at line 3866 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_CMDSEL_XI   (0x1fL<<20)

Definition at line 3884 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_COMP_EQUAL_XI   (0L<<16)

Definition at line 3878 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_COMP_GREATER_XI   (2L<<16)

Definition at line 3880 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_COMP_LESS_XI   (3L<<16)

Definition at line 3881 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3879 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_COMP_XI   (0x3L<<16)

Definition at line 3877 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_DISCARD_XI   (1L<<25)

Definition at line 3885 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3874 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3876 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3871 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3870 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3875 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3872 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3873 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3869 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_MAP_XI   (1L<<18)

Definition at line 3882 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_MASK_XI   (1L<<26)

Definition at line 3886 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_NBIT_XI   (1L<<30)

Definition at line 3890 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_OFFSET_XI   (0xffL<<0)

Definition at line 3865 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_P1_XI   (1L<<27)

Definition at line 3887 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_P2_XI   (1L<<28)

Definition at line 3888 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_P3_XI   (1L<<29)

Definition at line 3889 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_P4_XI   (1L<<12)

Definition at line 3868 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_PRIORITY_XI   (1L<<11)

Definition at line 3867 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_14_SBIT_XI   (1L<<19)

Definition at line 3883 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15   0x00001978

Definition at line 3896 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_A   (0x3ffffL<<0)

Definition at line 3897 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_B   (0xfffL<<19)

Definition at line 3898 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_CLASS_XI   (0x7L<<8)

Definition at line 3900 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_CMDSEL_XI   (0x1fL<<20)

Definition at line 3918 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_COMP_EQUAL_XI   (0L<<16)

Definition at line 3912 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_COMP_GREATER_XI   (2L<<16)

Definition at line 3914 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_COMP_LESS_XI   (3L<<16)

Definition at line 3915 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3913 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_COMP_XI   (0x3L<<16)

Definition at line 3911 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_DISCARD_XI   (1L<<25)

Definition at line 3919 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3908 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3910 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3905 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3904 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3909 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3906 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3907 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3903 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_MAP_XI   (1L<<18)

Definition at line 3916 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_MASK_XI   (1L<<26)

Definition at line 3920 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_NBIT_XI   (1L<<30)

Definition at line 3924 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_OFFSET_XI   (0xffL<<0)

Definition at line 3899 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_P1_XI   (1L<<27)

Definition at line 3921 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_P2_XI   (1L<<28)

Definition at line 3922 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_P3_XI   (1L<<29)

Definition at line 3923 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_P4_XI   (1L<<12)

Definition at line 3902 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_PRIORITY_XI   (1L<<11)

Definition at line 3901 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_15_SBIT_XI   (1L<<19)

Definition at line 3917 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16   0x000018e0

Definition at line 3258 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_CLASS   (0x7L<<8)

Definition at line 3260 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_CMDSEL   (0x1fL<<20)

Definition at line 3278 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_COMP   (0x3L<<16)

Definition at line 3271 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_COMP_EQUAL   (0L<<16)

Definition at line 3272 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_COMP_GREATER   (2L<<16)

Definition at line 3274 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_COMP_LESS   (3L<<16)

Definition at line 3275 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_COMP_NEQUAL   (1L<<16)

Definition at line 3273 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_DISCARD   (1L<<25)

Definition at line 3279 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_HDR_TYPE   (0x7L<<13)

Definition at line 3263 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_DATA   (4L<<13)

Definition at line 3268 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_ICMPV6   (6L<<13)

Definition at line 3270 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_IP   (1L<<13)

Definition at line 3265 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_START   (0L<<13)

Definition at line 3264 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_TCP   (2L<<13)

Definition at line 3266 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_TCP_UDP   (5L<<13)

Definition at line 3269 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_HDR_TYPE_UDP   (3L<<13)

Definition at line 3267 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_MAP   (1L<<18)

Definition at line 3276 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_MASK   (1L<<26)

Definition at line 3280 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_NBIT   (1L<<30)

Definition at line 3284 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_OFFSET   (0xffL<<0)

Definition at line 3259 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_P1   (1L<<27)

Definition at line 3281 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_P2   (1L<<28)

Definition at line 3282 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_P3   (1L<<29)

Definition at line 3283 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_P4   (1L<<12)

Definition at line 3262 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_PRIORITY   (1L<<11)

Definition at line 3261 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_16_SBIT   (1L<<19)

Definition at line 3277 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17   0x000018e8

Definition at line 3290 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_CLASS   (0x7L<<8)

Definition at line 3292 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_CMDSEL   (0x1fL<<20)

Definition at line 3310 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_COMP   (0x3L<<16)

Definition at line 3303 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_COMP_EQUAL   (0L<<16)

Definition at line 3304 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_COMP_GREATER   (2L<<16)

Definition at line 3306 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_COMP_LESS   (3L<<16)

Definition at line 3307 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_COMP_NEQUAL   (1L<<16)

Definition at line 3305 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_DISCARD   (1L<<25)

Definition at line 3311 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_HDR_TYPE   (0x7L<<13)

Definition at line 3295 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_DATA   (4L<<13)

Definition at line 3300 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_ICMPV6   (6L<<13)

Definition at line 3302 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_IP   (1L<<13)

Definition at line 3297 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_START   (0L<<13)

Definition at line 3296 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_TCP   (2L<<13)

Definition at line 3298 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_TCP_UDP   (5L<<13)

Definition at line 3301 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_HDR_TYPE_UDP   (3L<<13)

Definition at line 3299 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_MAP   (1L<<18)

Definition at line 3308 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_MASK   (1L<<26)

Definition at line 3312 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_NBIT   (1L<<30)

Definition at line 3316 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_OFFSET   (0xffL<<0)

Definition at line 3291 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_P1   (1L<<27)

Definition at line 3313 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_P2   (1L<<28)

Definition at line 3314 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_P3   (1L<<29)

Definition at line 3315 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_P4   (1L<<12)

Definition at line 3294 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_PRIORITY   (1L<<11)

Definition at line 3293 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_17_SBIT   (1L<<19)

Definition at line 3309 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18   0x000018f0

Definition at line 3322 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_CLASS   (0x7L<<8)

Definition at line 3324 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_CMDSEL   (0x1fL<<20)

Definition at line 3342 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_COMP   (0x3L<<16)

Definition at line 3335 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_COMP_EQUAL   (0L<<16)

Definition at line 3336 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_COMP_GREATER   (2L<<16)

Definition at line 3338 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_COMP_LESS   (3L<<16)

Definition at line 3339 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_COMP_NEQUAL   (1L<<16)

Definition at line 3337 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_DISCARD   (1L<<25)

Definition at line 3343 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_HDR_TYPE   (0x7L<<13)

Definition at line 3327 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_DATA   (4L<<13)

Definition at line 3332 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_ICMPV6   (6L<<13)

Definition at line 3334 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_IP   (1L<<13)

Definition at line 3329 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_START   (0L<<13)

Definition at line 3328 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_TCP   (2L<<13)

Definition at line 3330 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_TCP_UDP   (5L<<13)

Definition at line 3333 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_HDR_TYPE_UDP   (3L<<13)

Definition at line 3331 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_MAP   (1L<<18)

Definition at line 3340 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_MASK   (1L<<26)

Definition at line 3344 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_NBIT   (1L<<30)

Definition at line 3348 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_OFFSET   (0xffL<<0)

Definition at line 3323 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_P1   (1L<<27)

Definition at line 3345 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_P2   (1L<<28)

Definition at line 3346 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_P3   (1L<<29)

Definition at line 3347 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_P4   (1L<<12)

Definition at line 3326 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_PRIORITY   (1L<<11)

Definition at line 3325 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_18_SBIT   (1L<<19)

Definition at line 3341 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19   0x000018f8

Definition at line 3354 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_CLASS   (0x7L<<8)

Definition at line 3356 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_CMDSEL   (0x1fL<<20)

Definition at line 3374 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_COMP   (0x3L<<16)

Definition at line 3367 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_COMP_EQUAL   (0L<<16)

Definition at line 3368 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_COMP_GREATER   (2L<<16)

Definition at line 3370 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_COMP_LESS   (3L<<16)

Definition at line 3371 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_COMP_NEQUAL   (1L<<16)

Definition at line 3369 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_DISCARD   (1L<<25)

Definition at line 3375 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_HDR_TYPE   (0x7L<<13)

Definition at line 3359 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_DATA   (4L<<13)

Definition at line 3364 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_ICMPV6   (6L<<13)

Definition at line 3366 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_IP   (1L<<13)

Definition at line 3361 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_START   (0L<<13)

Definition at line 3360 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_TCP   (2L<<13)

Definition at line 3362 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_TCP_UDP   (5L<<13)

Definition at line 3365 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_HDR_TYPE_UDP   (3L<<13)

Definition at line 3363 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_MAP   (1L<<18)

Definition at line 3372 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_MASK   (1L<<26)

Definition at line 3376 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_NBIT   (1L<<30)

Definition at line 3380 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_OFFSET   (0xffL<<0)

Definition at line 3355 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_P1   (1L<<27)

Definition at line 3377 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_P2   (1L<<28)

Definition at line 3378 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_P3   (1L<<29)

Definition at line 3379 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_P4   (1L<<12)

Definition at line 3358 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_PRIORITY   (1L<<11)

Definition at line 3357 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_19_SBIT   (1L<<19)

Definition at line 3373 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_A   (0x3ffffL<<0)

Definition at line 3421 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_B   (0xfffL<<19)

Definition at line 3422 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_CLASS_XI   (0x7L<<8)

Definition at line 3424 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_CMDSEL_XI   (0x1fL<<20)

Definition at line 3442 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_COMP_EQUAL_XI   (0L<<16)

Definition at line 3436 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_COMP_GREATER_XI   (2L<<16)

Definition at line 3438 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_COMP_LESS_XI   (3L<<16)

Definition at line 3439 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3437 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_COMP_XI   (0x3L<<16)

Definition at line 3435 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_DISCARD_XI   (1L<<25)

Definition at line 3443 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3432 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3434 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3429 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3428 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3433 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3430 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3431 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3427 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_MAP_XI   (1L<<18)

Definition at line 3440 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_MASK_XI   (1L<<26)

Definition at line 3444 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_NBIT_XI   (1L<<30)

Definition at line 3448 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_OFFSET_XI   (0xffL<<0)

Definition at line 3423 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_P1_XI   (1L<<27)

Definition at line 3445 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_P2_XI   (1L<<28)

Definition at line 3446 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_P3_XI   (1L<<29)

Definition at line 3447 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_P4_XI   (1L<<12)

Definition at line 3426 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_PRIORITY_XI   (1L<<11)

Definition at line 3425 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_1_SBIT_XI   (1L<<19)

Definition at line 3441 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2   0x00001910

Definition at line 3454 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_A   (0x3ffffL<<0)

Definition at line 3455 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_B   (0xfffL<<19)

Definition at line 3456 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_CLASS_XI   (0x7L<<8)

Definition at line 3458 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_CMDSEL_XI   (0x1fL<<20)

Definition at line 3476 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_COMP_EQUAL_XI   (0L<<16)

Definition at line 3470 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_COMP_GREATER_XI   (2L<<16)

Definition at line 3472 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_COMP_LESS_XI   (3L<<16)

Definition at line 3473 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3471 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_COMP_XI   (0x3L<<16)

Definition at line 3469 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_DISCARD_XI   (1L<<25)

Definition at line 3477 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3466 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3468 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3463 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3462 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3467 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3464 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3465 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3461 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_MAP_XI   (1L<<18)

Definition at line 3474 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_MASK_XI   (1L<<26)

Definition at line 3478 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_NBIT_XI   (1L<<30)

Definition at line 3482 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_OFFSET_XI   (0xffL<<0)

Definition at line 3457 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_P1_XI   (1L<<27)

Definition at line 3479 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_P2_XI   (1L<<28)

Definition at line 3480 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_P3_XI   (1L<<29)

Definition at line 3481 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_P4_XI   (1L<<12)

Definition at line 3460 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_PRIORITY_XI   (1L<<11)

Definition at line 3459 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_2_SBIT_XI   (1L<<19)

Definition at line 3475 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3   0x00001918

Definition at line 3488 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_A   (0x3ffffL<<0)

Definition at line 3489 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_B   (0xfffL<<19)

Definition at line 3490 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_CLASS_XI   (0x7L<<8)

Definition at line 3492 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_CMDSEL_XI   (0x1fL<<20)

Definition at line 3510 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_COMP_EQUAL_XI   (0L<<16)

Definition at line 3504 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_COMP_GREATER_XI   (2L<<16)

Definition at line 3506 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_COMP_LESS_XI   (3L<<16)

Definition at line 3507 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3505 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_COMP_XI   (0x3L<<16)

Definition at line 3503 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_DISCARD_XI   (1L<<25)

Definition at line 3511 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3500 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3502 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3497 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3496 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3501 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3498 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3499 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3495 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_MAP_XI   (1L<<18)

Definition at line 3508 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_MASK_XI   (1L<<26)

Definition at line 3512 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_NBIT_XI   (1L<<30)

Definition at line 3516 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_OFFSET_XI   (0xffL<<0)

Definition at line 3491 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_P1_XI   (1L<<27)

Definition at line 3513 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_P2_XI   (1L<<28)

Definition at line 3514 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_P3_XI   (1L<<29)

Definition at line 3515 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_P4_XI   (1L<<12)

Definition at line 3494 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_PRIORITY_XI   (1L<<11)

Definition at line 3493 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_3_SBIT_XI   (1L<<19)

Definition at line 3509 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4   0x00001920

Definition at line 3522 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_A   (0x3ffffL<<0)

Definition at line 3523 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_B   (0xfffL<<19)

Definition at line 3524 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_CLASS_XI   (0x7L<<8)

Definition at line 3526 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_CMDSEL_XI   (0x1fL<<20)

Definition at line 3544 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_COMP_EQUAL_XI   (0L<<16)

Definition at line 3538 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_COMP_GREATER_XI   (2L<<16)

Definition at line 3540 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_COMP_LESS_XI   (3L<<16)

Definition at line 3541 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3539 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_COMP_XI   (0x3L<<16)

Definition at line 3537 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_DISCARD_XI   (1L<<25)

Definition at line 3545 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3534 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3536 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3531 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3530 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3535 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3532 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3533 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3529 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_MAP_XI   (1L<<18)

Definition at line 3542 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_MASK_XI   (1L<<26)

Definition at line 3546 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_NBIT_XI   (1L<<30)

Definition at line 3550 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_OFFSET_XI   (0xffL<<0)

Definition at line 3525 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_P1_XI   (1L<<27)

Definition at line 3547 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_P2_XI   (1L<<28)

Definition at line 3548 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_P3_XI   (1L<<29)

Definition at line 3549 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_P4_XI   (1L<<12)

Definition at line 3528 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_PRIORITY_XI   (1L<<11)

Definition at line 3527 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_4_SBIT_XI   (1L<<19)

Definition at line 3543 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5   0x00001928

Definition at line 3556 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_A   (0x3ffffL<<0)

Definition at line 3557 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_B   (0xfffL<<19)

Definition at line 3558 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_CLASS_XI   (0x7L<<8)

Definition at line 3560 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_CMDSEL_XI   (0x1fL<<20)

Definition at line 3578 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_COMP_EQUAL_XI   (0L<<16)

Definition at line 3572 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_COMP_GREATER_XI   (2L<<16)

Definition at line 3574 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_COMP_LESS_XI   (3L<<16)

Definition at line 3575 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3573 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_COMP_XI   (0x3L<<16)

Definition at line 3571 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_DISCARD_XI   (1L<<25)

Definition at line 3579 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3568 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3570 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3565 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3564 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3569 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3566 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3567 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3563 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_MAP_XI   (1L<<18)

Definition at line 3576 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_MASK_XI   (1L<<26)

Definition at line 3580 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_NBIT_XI   (1L<<30)

Definition at line 3584 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_OFFSET_XI   (0xffL<<0)

Definition at line 3559 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_P1_XI   (1L<<27)

Definition at line 3581 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_P2_XI   (1L<<28)

Definition at line 3582 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_P3_XI   (1L<<29)

Definition at line 3583 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_P4_XI   (1L<<12)

Definition at line 3562 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_PRIORITY_XI   (1L<<11)

Definition at line 3561 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_5_SBIT_XI   (1L<<19)

Definition at line 3577 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6   0x00001930

Definition at line 3590 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_A   (0x3ffffL<<0)

Definition at line 3591 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_B   (0xfffL<<19)

Definition at line 3592 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_CLASS_XI   (0x7L<<8)

Definition at line 3594 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_CMDSEL_XI   (0x1fL<<20)

Definition at line 3612 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_COMP_EQUAL_XI   (0L<<16)

Definition at line 3606 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_COMP_GREATER_XI   (2L<<16)

Definition at line 3608 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_COMP_LESS_XI   (3L<<16)

Definition at line 3609 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3607 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_COMP_XI   (0x3L<<16)

Definition at line 3605 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_DISCARD_XI   (1L<<25)

Definition at line 3613 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3602 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3604 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3599 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3598 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3603 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3600 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3601 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3597 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_MAP_XI   (1L<<18)

Definition at line 3610 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_MASK_XI   (1L<<26)

Definition at line 3614 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_NBIT_XI   (1L<<30)

Definition at line 3618 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_OFFSET_XI   (0xffL<<0)

Definition at line 3593 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_P1_XI   (1L<<27)

Definition at line 3615 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_P2_XI   (1L<<28)

Definition at line 3616 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_P3_XI   (1L<<29)

Definition at line 3617 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_P4_XI   (1L<<12)

Definition at line 3596 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_PRIORITY_XI   (1L<<11)

Definition at line 3595 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_6_SBIT_XI   (1L<<19)

Definition at line 3611 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7   0x00001938

Definition at line 3624 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_A   (0x3ffffL<<0)

Definition at line 3625 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_B   (0xfffL<<19)

Definition at line 3626 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_CLASS_XI   (0x7L<<8)

Definition at line 3628 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_CMDSEL_XI   (0x1fL<<20)

Definition at line 3646 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_COMP_EQUAL_XI   (0L<<16)

Definition at line 3640 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_COMP_GREATER_XI   (2L<<16)

Definition at line 3642 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_COMP_LESS_XI   (3L<<16)

Definition at line 3643 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3641 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_COMP_XI   (0x3L<<16)

Definition at line 3639 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_DISCARD_XI   (1L<<25)

Definition at line 3647 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3636 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3638 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3633 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3632 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3637 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3634 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3635 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3631 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_MAP_XI   (1L<<18)

Definition at line 3644 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_MASK_XI   (1L<<26)

Definition at line 3648 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_NBIT_XI   (1L<<30)

Definition at line 3652 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_OFFSET_XI   (0xffL<<0)

Definition at line 3627 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_P1_XI   (1L<<27)

Definition at line 3649 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_P2_XI   (1L<<28)

Definition at line 3650 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_P3_XI   (1L<<29)

Definition at line 3651 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_P4_XI   (1L<<12)

Definition at line 3630 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_PRIORITY_XI   (1L<<11)

Definition at line 3629 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_7_SBIT_XI   (1L<<19)

Definition at line 3645 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8   0x00001940

Definition at line 3658 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_A   (0x3ffffL<<0)

Definition at line 3659 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_B   (0xfffL<<19)

Definition at line 3660 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_CLASS_XI   (0x7L<<8)

Definition at line 3662 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_CMDSEL_XI   (0x1fL<<20)

Definition at line 3680 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_COMP_EQUAL_XI   (0L<<16)

Definition at line 3674 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_COMP_GREATER_XI   (2L<<16)

Definition at line 3676 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_COMP_LESS_XI   (3L<<16)

Definition at line 3677 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3675 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_COMP_XI   (0x3L<<16)

Definition at line 3673 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_DISCARD_XI   (1L<<25)

Definition at line 3681 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3670 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3672 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3667 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3666 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3671 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3668 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3669 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3665 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_MAP_XI   (1L<<18)

Definition at line 3678 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_MASK_XI   (1L<<26)

Definition at line 3682 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_NBIT_XI   (1L<<30)

Definition at line 3686 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_OFFSET_XI   (0xffL<<0)

Definition at line 3661 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_P1_XI   (1L<<27)

Definition at line 3683 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_P2_XI   (1L<<28)

Definition at line 3684 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_P3_XI   (1L<<29)

Definition at line 3685 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_P4_XI   (1L<<12)

Definition at line 3664 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_PRIORITY_XI   (1L<<11)

Definition at line 3663 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_8_SBIT_XI   (1L<<19)

Definition at line 3679 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9   0x00001948

Definition at line 3692 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_A   (0x3ffffL<<0)

Definition at line 3693 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_B   (0xfffL<<19)

Definition at line 3694 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_CLASS_XI   (0x7L<<8)

Definition at line 3696 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_CMDSEL_XI   (0x1fL<<20)

Definition at line 3714 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_COMP_EQUAL_XI   (0L<<16)

Definition at line 3708 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_COMP_GREATER_XI   (2L<<16)

Definition at line 3710 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_COMP_LESS_XI   (3L<<16)

Definition at line 3711 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_COMP_NEQUAL_XI   (1L<<16)

Definition at line 3709 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_COMP_XI   (0x3L<<16)

Definition at line 3707 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_DISCARD_XI   (1L<<25)

Definition at line 3715 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_DATA_XI   (4L<<13)

Definition at line 3704 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_ICMPV6_XI   (6L<<13)

Definition at line 3706 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_IP_XI   (1L<<13)

Definition at line 3701 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_START_XI   (0L<<13)

Definition at line 3700 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_TCP_UDP_XI   (5L<<13)

Definition at line 3705 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_TCP_XI   (2L<<13)

Definition at line 3702 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_UDP_XI   (3L<<13)

Definition at line 3703 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_HDR_TYPE_XI   (0x7L<<13)

Definition at line 3699 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_MAP_XI   (1L<<18)

Definition at line 3712 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_MASK_XI   (1L<<26)

Definition at line 3716 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_NBIT_XI   (1L<<30)

Definition at line 3720 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_OFFSET_XI   (0xffL<<0)

Definition at line 3695 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_P1_XI   (1L<<27)

Definition at line 3717 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_P2_XI   (1L<<28)

Definition at line 3718 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_P3_XI   (1L<<29)

Definition at line 3719 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_P4_XI   (1L<<12)

Definition at line 3698 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_PRIORITY_XI   (1L<<11)

Definition at line 3697 of file bnx2.h.

#define BNX2_RPM_RC_CNTL_9_SBIT_XI   (1L<<19)

Definition at line 3713 of file bnx2.h.

#define BNX2_RPM_RC_CONFIG   0x00001980

Definition at line 3930 of file bnx2.h.

#define BNX2_RPM_RC_CONFIG_DEF_CLASS   (0x7L<<24)

Definition at line 3933 of file bnx2.h.

#define BNX2_RPM_RC_CONFIG_KNUM_OVERWRITE   (1L<<31)

Definition at line 3934 of file bnx2.h.

#define BNX2_RPM_RC_CONFIG_RULE_ENABLE   (0xffffL<<0)

Definition at line 3931 of file bnx2.h.

#define BNX2_RPM_RC_CONFIG_RULE_ENABLE_XI   (0xfffffL<<0)

Definition at line 3932 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_0   0x00001904

Definition at line 3416 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_0_MASK   (0xffffL<<16)

Definition at line 3418 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_0_VALUE   (0xffffL<<0)

Definition at line 3417 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_1   0x0000190c

Definition at line 3450 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_10   0x00001954

Definition at line 3756 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_10_MASK   (0xffffL<<16)

Definition at line 3758 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_10_VALUE   (0xffffL<<0)

Definition at line 3757 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_11   0x0000195c

Definition at line 3790 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_11_MASK   (0xffffL<<16)

Definition at line 3792 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_11_VALUE   (0xffffL<<0)

Definition at line 3791 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_12   0x00001964

Definition at line 3824 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_12_MASK   (0xffffL<<16)

Definition at line 3826 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_12_VALUE   (0xffffL<<0)

Definition at line 3825 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_13   0x0000196c

Definition at line 3858 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_13_MASK   (0xffffL<<16)

Definition at line 3860 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_13_VALUE   (0xffffL<<0)

Definition at line 3859 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_14   0x00001974

Definition at line 3892 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_14_MASK   (0xffffL<<16)

Definition at line 3894 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_14_VALUE   (0xffffL<<0)

Definition at line 3893 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_15   0x0000197c

Definition at line 3926 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_15_MASK   (0xffffL<<16)

Definition at line 3928 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_15_VALUE   (0xffffL<<0)

Definition at line 3927 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_16   0x000018e4

Definition at line 3286 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_16_MASK   (0xffffL<<16)

Definition at line 3288 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_16_VALUE   (0xffffL<<0)

Definition at line 3287 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_17   0x000018ec

Definition at line 3318 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_17_MASK   (0xffffL<<16)

Definition at line 3320 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_17_VALUE   (0xffffL<<0)

Definition at line 3319 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_18   0x000018f4

Definition at line 3350 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_18_MASK   (0xffffL<<16)

Definition at line 3352 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_18_VALUE   (0xffffL<<0)

Definition at line 3351 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_19   0x000018fc

Definition at line 3382 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_19_MASK   (0xffffL<<16)

Definition at line 3384 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_19_VALUE   (0xffffL<<0)

Definition at line 3383 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_1_MASK   (0xffffL<<16)

Definition at line 3452 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_1_VALUE   (0xffffL<<0)

Definition at line 3451 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_2   0x00001914

Definition at line 3484 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_2_MASK   (0xffffL<<16)

Definition at line 3486 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_2_VALUE   (0xffffL<<0)

Definition at line 3485 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_3   0x0000191c

Definition at line 3518 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_3_MASK   (0xffffL<<16)

Definition at line 3520 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_3_VALUE   (0xffffL<<0)

Definition at line 3519 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_4   0x00001924

Definition at line 3552 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_4_MASK   (0xffffL<<16)

Definition at line 3554 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_4_VALUE   (0xffffL<<0)

Definition at line 3553 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_5   0x0000192c

Definition at line 3586 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_5_MASK   (0xffffL<<16)

Definition at line 3588 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_5_VALUE   (0xffffL<<0)

Definition at line 3587 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_6   0x00001934

Definition at line 3620 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_6_MASK   (0xffffL<<16)

Definition at line 3622 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_6_VALUE   (0xffffL<<0)

Definition at line 3621 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_7   0x0000193c

Definition at line 3654 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_7_MASK   (0xffffL<<16)

Definition at line 3656 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_7_VALUE   (0xffffL<<0)

Definition at line 3655 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_8   0x00001944

Definition at line 3688 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_8_MASK   (0xffffL<<16)

Definition at line 3690 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_8_VALUE   (0xffffL<<0)

Definition at line 3689 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_9   0x0000194c

Definition at line 3722 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_9_MASK   (0xffffL<<16)

Definition at line 3724 of file bnx2.h.

#define BNX2_RPM_RC_VALUE_MASK_9_VALUE   (0xffffL<<0)

Definition at line 3723 of file bnx2.h.

#define BNX2_RPM_SORT_USER0   0x00001820

Definition at line 3159 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_BC_EN   (1L<<16)

Definition at line 3161 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_ENA   (1L<<31)

Definition at line 3168 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_MC_EN   (1L<<17)

Definition at line 3162 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_MC_HSH_EN   (1L<<18)

Definition at line 3163 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_PM_EN   (0xffffL<<0)

Definition at line 3160 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_PROM_EN   (1L<<19)

Definition at line 3164 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_PROM_VLAN   (1L<<24)

Definition at line 3166 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_VLAN_EN   (0xfL<<20)

Definition at line 3165 of file bnx2.h.

#define BNX2_RPM_SORT_USER0_VLAN_NOTMATCH   (1L<<25)

Definition at line 3167 of file bnx2.h.

#define BNX2_RPM_SORT_USER1   0x00001824

Definition at line 3170 of file bnx2.h.

#define BNX2_RPM_SORT_USER1_BC_EN   (1L<<16)

Definition at line 3172 of file bnx2.h.

#define BNX2_RPM_SORT_USER1_ENA   (1L<<31)

Definition at line 3178 of file bnx2.h.

#define BNX2_RPM_SORT_USER1_MC_EN   (1L<<17)

Definition at line 3173 of file bnx2.h.

#define BNX2_RPM_SORT_USER1_MC_HSH_EN   (1L<<18)

Definition at line 3174 of file bnx2.h.

#define BNX2_RPM_SORT_USER1_PM_EN   (0xffffL<<0)

Definition at line 3171 of file bnx2.h.

#define BNX2_RPM_SORT_USER1_PROM_EN   (1L<<19)

Definition at line 3175 of file bnx2.h.

#define BNX2_RPM_SORT_USER1_PROM_VLAN   (1L<<24)

Definition at line 3177 of file bnx2.h.

#define BNX2_RPM_SORT_USER1_VLAN_EN   (0xfL<<20)

Definition at line 3176 of file bnx2.h.

#define BNX2_RPM_SORT_USER2   0x00001828

Definition at line 3180 of file bnx2.h.

#define BNX2_RPM_SORT_USER2_BC_EN   (1L<<16)

Definition at line 3182 of file bnx2.h.

#define BNX2_RPM_SORT_USER2_ENA   (1L<<31)

Definition at line 3188 of file bnx2.h.

#define BNX2_RPM_SORT_USER2_MC_EN   (1L<<17)

Definition at line 3183 of file bnx2.h.

#define BNX2_RPM_SORT_USER2_MC_HSH_EN   (1L<<18)

Definition at line 3184 of file bnx2.h.

#define BNX2_RPM_SORT_USER2_PM_EN   (0xffffL<<0)

Definition at line 3181 of file bnx2.h.

#define BNX2_RPM_SORT_USER2_PROM_EN   (1L<<19)

Definition at line 3185 of file bnx2.h.

#define BNX2_RPM_SORT_USER2_PROM_VLAN   (1L<<24)

Definition at line 3187 of file bnx2.h.

#define BNX2_RPM_SORT_USER2_VLAN_EN   (0xfL<<20)

Definition at line 3186 of file bnx2.h.

#define BNX2_RPM_SORT_USER3   0x0000182c

Definition at line 3190 of file bnx2.h.

#define BNX2_RPM_SORT_USER3_BC_EN   (1L<<16)

Definition at line 3192 of file bnx2.h.

#define BNX2_RPM_SORT_USER3_ENA   (1L<<31)

Definition at line 3198 of file bnx2.h.

#define BNX2_RPM_SORT_USER3_MC_EN   (1L<<17)

Definition at line 3193 of file bnx2.h.

#define BNX2_RPM_SORT_USER3_MC_HSH_EN   (1L<<18)

Definition at line 3194 of file bnx2.h.

#define BNX2_RPM_SORT_USER3_PM_EN   (0xffffL<<0)

Definition at line 3191 of file bnx2.h.

#define BNX2_RPM_SORT_USER3_PROM_EN   (1L<<19)

Definition at line 3195 of file bnx2.h.

#define BNX2_RPM_SORT_USER3_PROM_VLAN   (1L<<24)

Definition at line 3197 of file bnx2.h.

#define BNX2_RPM_SORT_USER3_VLAN_EN   (0xfL<<20)

Definition at line 3196 of file bnx2.h.

#define BNX2_RPM_STAT_AC0   0x00001880

Definition at line 3253 of file bnx2.h.

#define BNX2_RPM_STAT_AC1   0x00001884

Definition at line 3254 of file bnx2.h.

#define BNX2_RPM_STAT_AC2   0x00001888

Definition at line 3255 of file bnx2.h.

#define BNX2_RPM_STAT_AC3   0x0000188c

Definition at line 3256 of file bnx2.h.

#define BNX2_RPM_STAT_AC4   0x00001890

Definition at line 3257 of file bnx2.h.

#define BNX2_RPM_STAT_IFINFTQDISCARDS   0x00001848

Definition at line 3202 of file bnx2.h.

#define BNX2_RPM_STAT_IFINMBUFDISCARD   0x0000184c

Definition at line 3203 of file bnx2.h.

#define BNX2_RPM_STAT_L2_FILTER_DISCARDS   0x00001840

Definition at line 3200 of file bnx2.h.

#define BNX2_RPM_STAT_RULE_CHECKER_DISCARDS   0x00001844

Definition at line 3201 of file bnx2.h.

#define BNX2_RPM_STAT_RULE_CHECKER_P4_HIT   0x00001850

Definition at line 3204 of file bnx2.h.

#define BNX2_RPM_STATUS   0x00001804

Definition at line 3128 of file bnx2.h.

#define BNX2_RPM_STATUS_FREE_WAIT   (1L<<1)

Definition at line 3130 of file bnx2.h.

#define BNX2_RPM_STATUS_MBUF_WAIT   (1L<<0)

Definition at line 3129 of file bnx2.h.

#define BNX2_RPM_VLAN_MATCH0   0x00001810

Definition at line 3147 of file bnx2.h.

#define BNX2_RPM_VLAN_MATCH0_RPM_VLAN_MTCH0_VALUE   (0xfffL<<0)

Definition at line 3148 of file bnx2.h.

#define BNX2_RPM_VLAN_MATCH1   0x00001814

Definition at line 3150 of file bnx2.h.

#define BNX2_RPM_VLAN_MATCH1_RPM_VLAN_MTCH1_VALUE   (0xfffL<<0)

Definition at line 3151 of file bnx2.h.

#define BNX2_RPM_VLAN_MATCH2   0x00001818

Definition at line 3153 of file bnx2.h.

#define BNX2_RPM_VLAN_MATCH2_RPM_VLAN_MTCH2_VALUE   (0xfffL<<0)

Definition at line 3154 of file bnx2.h.

#define BNX2_RPM_VLAN_MATCH3   0x0000181c

Definition at line 3156 of file bnx2.h.

#define BNX2_RPM_VLAN_MATCH3_RPM_VLAN_MTCH3_VALUE   (0xfffL<<0)

Definition at line 3157 of file bnx2.h.

#define BNX2_RV2P_COMMAND   0x00002800

Definition at line 4278 of file bnx2.h.

#define BNX2_RV2P_COMMAND_ABORT0   (1L<<4)

Definition at line 4282 of file bnx2.h.

#define BNX2_RV2P_COMMAND_ABORT1   (1L<<5)

Definition at line 4283 of file bnx2.h.

#define BNX2_RV2P_COMMAND_ABORT2   (1L<<6)

Definition at line 4284 of file bnx2.h.

#define BNX2_RV2P_COMMAND_ABORT3   (1L<<7)

Definition at line 4285 of file bnx2.h.

#define BNX2_RV2P_COMMAND_ABORT4   (1L<<8)

Definition at line 4286 of file bnx2.h.

#define BNX2_RV2P_COMMAND_ABORT5   (1L<<9)

Definition at line 4287 of file bnx2.h.

#define BNX2_RV2P_COMMAND_CTXIF_RESET   (1L<<18)

Definition at line 4290 of file bnx2.h.

#define BNX2_RV2P_COMMAND_ENABLED   (1L<<0)

Definition at line 4279 of file bnx2.h.

#define BNX2_RV2P_COMMAND_PROC1_INTRPT   (1L<<1)

Definition at line 4280 of file bnx2.h.

#define BNX2_RV2P_COMMAND_PROC1_RESET   (1L<<16)

Definition at line 4288 of file bnx2.h.

#define BNX2_RV2P_COMMAND_PROC2_INTRPT   (1L<<2)

Definition at line 4281 of file bnx2.h.

#define BNX2_RV2P_COMMAND_PROC2_RESET   (1L<<17)

Definition at line 4289 of file bnx2.h.

#define BNX2_RV2P_CONFIG   0x00002808

Definition at line 4301 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE   (0xfL<<24)

Definition at line 4316 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_128K   (9L<<24)

Definition at line 4326 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_16K   (6L<<24)

Definition at line 4323 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_1K   (2L<<24)

Definition at line 4319 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_1M   (12L<<24)

Definition at line 4329 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_256   (0L<<24)

Definition at line 4317 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_256K   (10L<<24)

Definition at line 4327 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_2K   (3L<<24)

Definition at line 4320 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_32K   (7L<<24)

Definition at line 4324 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_4K   (4L<<24)

Definition at line 4321 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_512   (1L<<24)

Definition at line 4318 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_512K   (11L<<24)

Definition at line 4328 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_64K   (8L<<24)

Definition at line 4325 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PAGE_SIZE_8K   (5L<<24)

Definition at line 4322 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT0   (1L<<8)

Definition at line 4304 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT1   (1L<<9)

Definition at line 4305 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT2   (1L<<10)

Definition at line 4306 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT3   (1L<<11)

Definition at line 4307 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT4   (1L<<12)

Definition at line 4308 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT5   (1L<<13)

Definition at line 4309 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT0   (1L<<16)

Definition at line 4310 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT1   (1L<<17)

Definition at line 4311 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT2   (1L<<18)

Definition at line 4312 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT3   (1L<<19)

Definition at line 4313 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT4   (1L<<20)

Definition at line 4314 of file bnx2.h.

#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT5   (1L<<21)

Definition at line 4315 of file bnx2.h.

#define BNX2_RV2P_CONFIG_STALL_PROC1   (1L<<0)

Definition at line 4302 of file bnx2.h.

#define BNX2_RV2P_CONFIG_STALL_PROC2   (1L<<1)

Definition at line 4303 of file bnx2.h.

#define BNX2_RV2P_DEBUG_VECT_PEEK   0x0000284c

Definition at line 4360 of file bnx2.h.

#define BNX2_RV2P_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 4362 of file bnx2.h.

#define BNX2_RV2P_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 4363 of file bnx2.h.

#define BNX2_RV2P_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 4361 of file bnx2.h.

#define BNX2_RV2P_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 4365 of file bnx2.h.

#define BNX2_RV2P_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 4366 of file bnx2.h.

#define BNX2_RV2P_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 4364 of file bnx2.h.

#define BNX2_RV2P_GEN_BFR_ADDR_0   0x00002810

Definition at line 4331 of file bnx2.h.

#define BNX2_RV2P_GEN_BFR_ADDR_0_VALUE   (0xffffL<<16)

Definition at line 4332 of file bnx2.h.

#define BNX2_RV2P_GEN_BFR_ADDR_1   0x00002814

Definition at line 4334 of file bnx2.h.

#define BNX2_RV2P_GEN_BFR_ADDR_1_VALUE   (0xffffL<<16)

Definition at line 4335 of file bnx2.h.

#define BNX2_RV2P_GEN_BFR_ADDR_2   0x00002818

Definition at line 4337 of file bnx2.h.

#define BNX2_RV2P_GEN_BFR_ADDR_2_VALUE   (0xffffL<<16)

Definition at line 4338 of file bnx2.h.

#define BNX2_RV2P_GEN_BFR_ADDR_3   0x0000281c

Definition at line 4340 of file bnx2.h.

#define BNX2_RV2P_GEN_BFR_ADDR_3_VALUE   (0xffffL<<16)

Definition at line 4341 of file bnx2.h.

#define BNX2_RV2P_GRC_PROC_DEBUG   0x00002848

Definition at line 4359 of file bnx2.h.

#define BNX2_RV2P_INSTR_HIGH   0x00002830

Definition at line 4343 of file bnx2.h.

#define BNX2_RV2P_INSTR_HIGH_HIGH   (0x1fL<<0)

Definition at line 4344 of file bnx2.h.

#define BNX2_RV2P_INSTR_LOW   0x00002834

Definition at line 4346 of file bnx2.h.

#define BNX2_RV2P_INSTR_LOW_LOW   (0xffffffffL<<0)

Definition at line 4347 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD   0x00002bf8

Definition at line 4433 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 4441 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 4440 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_BUSY   (1L<<31)

Definition at line 4444 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 4442 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 4434 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_POP   (1L<<30)

Definition at line 4443 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_RD_DATA   (1L<<26)

Definition at line 4439 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 4438 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_WR_TOP   (1L<<10)

Definition at line 4435 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 4436 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 4437 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CTL   0x00002bfc

Definition at line 4446 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 4451 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 4449 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CTL_INTERVENE   (1L<<0)

Definition at line 4447 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 4450 of file bnx2.h.

#define BNX2_RV2P_MFTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 4448 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL   0x00002afc

Definition at line 4368 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_INC_USAGE_CNT   (1L<<0)

Definition at line 4369 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_OFFSET   (0x1ffL<<16)

Definition at line 4388 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_COUNT   (0xfL<<12)

Definition at line 4387 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE   (0xfL<<4)

Definition at line 4370 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_0   (0L<<4)

Definition at line 4371 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_1   (1L<<4)

Definition at line 4372 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_10   (10L<<4)

Definition at line 4381 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_11   (11L<<4)

Definition at line 4382 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_12   (12L<<4)

Definition at line 4383 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_13   (13L<<4)

Definition at line 4384 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_14   (14L<<4)

Definition at line 4385 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_15   (15L<<4)

Definition at line 4386 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_2   (2L<<4)

Definition at line 4373 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_3   (3L<<4)

Definition at line 4374 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_4   (4L<<4)

Definition at line 4375 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_5   (5L<<4)

Definition at line 4376 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_6   (6L<<4)

Definition at line 4377 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_7   (7L<<4)

Definition at line 4378 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_8   (8L<<4)

Definition at line 4379 of file bnx2.h.

#define BNX2_RV2P_MPFE_PFE_CTL_PFE_SIZE_9   (9L<<4)

Definition at line 4380 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD   0x00002b78

Definition at line 4391 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 4399 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 4398 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_BUSY   (1L<<31)

Definition at line 4402 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 4400 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 4392 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_POP   (1L<<30)

Definition at line 4401 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_RD_DATA   (1L<<26)

Definition at line 4397 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 4396 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_WR_TOP   (1L<<10)

Definition at line 4393 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 4394 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 4395 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CTL   0x00002b7c

Definition at line 4404 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 4409 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 4407 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CTL_INTERVENE   (1L<<0)

Definition at line 4405 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 4408 of file bnx2.h.

#define BNX2_RV2P_PFTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 4406 of file bnx2.h.

#define BNX2_RV2P_PROC1_ADDR_CMD   0x00002838

Definition at line 4349 of file bnx2.h.

#define BNX2_RV2P_PROC1_ADDR_CMD_ADD   (0x3ffL<<0)

Definition at line 4350 of file bnx2.h.

#define BNX2_RV2P_PROC1_ADDR_CMD_RDWR   (1L<<31)

Definition at line 4351 of file bnx2.h.

#define BNX2_RV2P_PROC1_GRC_DEBUG   0x00002840

Definition at line 4357 of file bnx2.h.

#define BNX2_RV2P_PROC2_ADDR_CMD   0x0000283c

Definition at line 4353 of file bnx2.h.

#define BNX2_RV2P_PROC2_ADDR_CMD_ADD   (0x3ffL<<0)

Definition at line 4354 of file bnx2.h.

#define BNX2_RV2P_PROC2_ADDR_CMD_RDWR   (1L<<31)

Definition at line 4355 of file bnx2.h.

#define BNX2_RV2P_PROC2_GRC_DEBUG   0x00002844

Definition at line 4358 of file bnx2.h.

#define BNX2_RV2P_RV2PMQ   0x00002bc0

Definition at line 4432 of file bnx2.h.

#define BNX2_RV2P_RV2PPQ   0x00002b40

Definition at line 4390 of file bnx2.h.

#define BNX2_RV2P_RV2PTQ   0x00002b80

Definition at line 4411 of file bnx2.h.

#define BNX2_RV2P_STATUS   0x00002804

Definition at line 4292 of file bnx2.h.

#define BNX2_RV2P_STATUS_ALWAYS_0   (1L<<0)

Definition at line 4293 of file bnx2.h.

#define BNX2_RV2P_STATUS_RV2P_GEN_STAT0_CNT   (1L<<8)

Definition at line 4294 of file bnx2.h.

#define BNX2_RV2P_STATUS_RV2P_GEN_STAT1_CNT   (1L<<9)

Definition at line 4295 of file bnx2.h.

#define BNX2_RV2P_STATUS_RV2P_GEN_STAT2_CNT   (1L<<10)

Definition at line 4296 of file bnx2.h.

#define BNX2_RV2P_STATUS_RV2P_GEN_STAT3_CNT   (1L<<11)

Definition at line 4297 of file bnx2.h.

#define BNX2_RV2P_STATUS_RV2P_GEN_STAT4_CNT   (1L<<12)

Definition at line 4298 of file bnx2.h.

#define BNX2_RV2P_STATUS_RV2P_GEN_STAT5_CNT   (1L<<13)

Definition at line 4299 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD   0x00002bb8

Definition at line 4412 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 4420 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 4419 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_BUSY   (1L<<31)

Definition at line 4423 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 4421 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 4413 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_POP   (1L<<30)

Definition at line 4422 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_RD_DATA   (1L<<26)

Definition at line 4418 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 4417 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_WR_TOP   (1L<<10)

Definition at line 4414 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 4415 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 4416 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CTL   0x00002bbc

Definition at line 4425 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 4430 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 4428 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CTL_INTERVENE   (1L<<0)

Definition at line 4426 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 4429 of file bnx2.h.

#define BNX2_RV2P_TFTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 4427 of file bnx2.h.

#define BNX2_RX_ALIGN   16

Definition at line 63 of file bnx2.h.

#define BNX2_RX_COPY_THRESH   128

Definition at line 6527 of file bnx2.h.

#define BNX2_RX_OFFSET   (sizeof(struct l2_fhdr) + 2)

Definition at line 315 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD   0x000c53b8

Definition at line 5917 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 5925 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 5924 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_BUSY   (1L<<31)

Definition at line 5928 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 5926 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 5918 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_POP   (1L<<30)

Definition at line 5927 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_RD_DATA   (1L<<26)

Definition at line 5923 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 5922 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_WR_TOP   (1L<<10)

Definition at line 5919 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 5920 of file bnx2.h.

#define BNX2_RXP_CFTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 5921 of file bnx2.h.

#define BNX2_RXP_CFTQ_CTL   0x000c53bc

Definition at line 5930 of file bnx2.h.

#define BNX2_RXP_CFTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 5935 of file bnx2.h.

#define BNX2_RXP_CFTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 5933 of file bnx2.h.

#define BNX2_RXP_CFTQ_CTL_INTERVENE   (1L<<0)

Definition at line 5931 of file bnx2.h.

#define BNX2_RXP_CFTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 5934 of file bnx2.h.

#define BNX2_RXP_CFTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 5932 of file bnx2.h.

#define BNX2_RXP_CPU_DATA_ACCESS   0x000c5024

Definition at line 5871 of file bnx2.h.

#define BNX2_RXP_CPU_DEBUG_VECT_PEEK   0x000c5038

Definition at line 5879 of file bnx2.h.

#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 5881 of file bnx2.h.

#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 5882 of file bnx2.h.

#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 5880 of file bnx2.h.

#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 5884 of file bnx2.h.

#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 5885 of file bnx2.h.

#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 5883 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK   0x000c5008

Definition at line 5856 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)

Definition at line 5863 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)

Definition at line 5861 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)

Definition at line 5858 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)

Definition at line 5862 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)

Definition at line 5857 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)

Definition at line 5864 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)

Definition at line 5867 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)

Definition at line 5859 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)

Definition at line 5860 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)

Definition at line 5865 of file bnx2.h.

#define BNX2_RXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)

Definition at line 5866 of file bnx2.h.

#define BNX2_RXP_CPU_HW_BREAKPOINT   0x000c5034

Definition at line 5875 of file bnx2.h.

#define BNX2_RXP_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)

Definition at line 5877 of file bnx2.h.

#define BNX2_RXP_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)

Definition at line 5876 of file bnx2.h.

#define BNX2_RXP_CPU_INSTRUCTION   0x000c5020

Definition at line 5870 of file bnx2.h.

#define BNX2_RXP_CPU_INTERRUPT_ENABLE   0x000c5028

Definition at line 5872 of file bnx2.h.

#define BNX2_RXP_CPU_INTERRUPT_SAVED_PC   0x000c5030

Definition at line 5874 of file bnx2.h.

#define BNX2_RXP_CPU_INTERRUPT_VECTOR   0x000c502c

Definition at line 5873 of file bnx2.h.

#define BNX2_RXP_CPU_LAST_BRANCH_ADDR   0x000c5048

Definition at line 5887 of file bnx2.h.

#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)

Definition at line 5891 of file bnx2.h.

#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)

Definition at line 5888 of file bnx2.h.

#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)

Definition at line 5890 of file bnx2.h.

#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)

Definition at line 5889 of file bnx2.h.

#define BNX2_RXP_CPU_MODE   0x000c5000

Definition at line 5827 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)

Definition at line 5835 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)

Definition at line 5836 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)

Definition at line 5837 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_INTERRUPT_ENA   (1L<<7)

Definition at line 5833 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_LOCAL_RST   (1L<<0)

Definition at line 5828 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_MSG_BIT1   (1L<<6)

Definition at line 5832 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)

Definition at line 5830 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)

Definition at line 5831 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_SOFT_HALT   (1L<<10)

Definition at line 5834 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)

Definition at line 5838 of file bnx2.h.

#define BNX2_RXP_CPU_MODE_STEP_ENA   (1L<<1)

Definition at line 5829 of file bnx2.h.

#define BNX2_RXP_CPU_PROGRAM_COUNTER   0x000c501c

Definition at line 5869 of file bnx2.h.

#define BNX2_RXP_CPU_REG_FILE   0x000c5200

Definition at line 5893 of file bnx2.h.

#define BNX2_RXP_CPU_STATE   0x000c5004

Definition at line 5840 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_ALIGN_HALTED   (1L<<7)

Definition at line 5847 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)

Definition at line 5845 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_BAD_INST_HALTED   (1L<<2)

Definition at line 5842 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_BAD_PC_HALTED   (1L<<6)

Definition at line 5846 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_BLOCKED_READ   (1L<<31)

Definition at line 5854 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_BREAKPOINT   (1L<<0)

Definition at line 5841 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)

Definition at line 5852 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)

Definition at line 5848 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_INST_FETCH_STALL   (1L<<15)

Definition at line 5853 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_INTERRUPT   (1L<<12)

Definition at line 5851 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)

Definition at line 5843 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)

Definition at line 5844 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_SOFT_HALTED   (1L<<10)

Definition at line 5849 of file bnx2.h.

#define BNX2_RXP_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)

Definition at line 5850 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD   0x000c53f8

Definition at line 5938 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 5946 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 5945 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_BUSY   (1L<<31)

Definition at line 5949 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 5947 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 5939 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_POP   (1L<<30)

Definition at line 5948 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 5944 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 5943 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 5940 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 5941 of file bnx2.h.

#define BNX2_RXP_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 5942 of file bnx2.h.

#define BNX2_RXP_FTQ_CTL   0x000c53fc

Definition at line 5951 of file bnx2.h.

#define BNX2_RXP_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 5956 of file bnx2.h.

#define BNX2_RXP_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 5954 of file bnx2.h.

#define BNX2_RXP_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 5952 of file bnx2.h.

#define BNX2_RXP_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 5955 of file bnx2.h.

#define BNX2_RXP_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 5953 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL   0x000c537c

Definition at line 5894 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_INC_USAGE_CNT   (1L<<0)

Definition at line 5895 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_OFFSET   (0x1ffL<<16)

Definition at line 5914 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_COUNT   (0xfL<<12)

Definition at line 5913 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE   (0xfL<<4)

Definition at line 5896 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_0   (0L<<4)

Definition at line 5897 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_1   (1L<<4)

Definition at line 5898 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_10   (10L<<4)

Definition at line 5907 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_11   (11L<<4)

Definition at line 5908 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_12   (12L<<4)

Definition at line 5909 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_13   (13L<<4)

Definition at line 5910 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_14   (14L<<4)

Definition at line 5911 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_15   (15L<<4)

Definition at line 5912 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_2   (2L<<4)

Definition at line 5899 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_3   (3L<<4)

Definition at line 5900 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_4   (4L<<4)

Definition at line 5901 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_5   (5L<<4)

Definition at line 5902 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_6   (6L<<4)

Definition at line 5903 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_7   (7L<<4)

Definition at line 5904 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_8   (8L<<4)

Definition at line 5905 of file bnx2.h.

#define BNX2_RXP_PFE_PFE_CTL_PFE_SIZE_9   (9L<<4)

Definition at line 5906 of file bnx2.h.

#define BNX2_RXP_RXPCQ   0x000c5380

Definition at line 5916 of file bnx2.h.

#define BNX2_RXP_RXPQ   0x000c53c0

Definition at line 5937 of file bnx2.h.

#define BNX2_RXP_SCRATCH   0x000e0000

Definition at line 5958 of file bnx2.h.

#define BNX2_RXP_SCRATCH_RSS_TBL   0x000e003c

Definition at line 5961 of file bnx2.h.

#define BNX2_RXP_SCRATCH_RSS_TBL_MAX_ENTRIES   128

Definition at line 5962 of file bnx2.h.

#define BNX2_RXP_SCRATCH_RSS_TBL_SZ   0x000e0038

Definition at line 5960 of file bnx2.h.

#define BNX2_RXP_SCRATCH_RXP_FLOOD   0x000e0024

Definition at line 5959 of file bnx2.h.

#define BNX2_SBLK_MSIX_ALIGN_SIZE   128

Definition at line 182 of file bnx2.h.

#define BNX2_SERDES_AN_TIMEOUT   (HZ / 3)

Definition at line 6824 of file bnx2.h.

#define BNX2_SERDES_FORCED_TIMEOUT   (HZ / 10)

Definition at line 6825 of file bnx2.h.

#define BNX2_SHARED_FEATURE   0x000000c8

Definition at line 7232 of file bnx2.h.

#define BNX2_SHARED_FEATURE_MASK   0xffffffff

Definition at line 7233 of file bnx2.h.

#define BNX2_SHARED_HW_CFG   POWER_CONSUMED 0x00000038

Definition at line 7188 of file bnx2.h.

#define BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK   0x00fff000

Definition at line 7204 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_CONFIG   0x0000003c

Definition at line 7189 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_CONFIG2   0x00000040

Definition at line 7203 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_DESIGN_LOM   0x1

Definition at line 7191 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_DESIGN_NIC   0

Definition at line 7190 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_GIG_LINK_ON_VAUX   0x8000

Definition at line 7201 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1   0x100

Definition at line 7199 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2   0x200

Definition at line 7200 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_LED_MODE_MAC   0

Definition at line 7198 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_LED_MODE_MASK   0x300

Definition at line 7197 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_LED_MODE_SHIFT_BITS   8

Definition at line 7196 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_PART_NUM   0x00000024

Definition at line 7180 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_PHY_2_5G   0x20

Definition at line 7194 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_PHY_BACKPLANE   0x40

Definition at line 7195 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_PHY_COPPER   0

Definition at line 7192 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_PHY_FIBER   0x2

Definition at line 7193 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_POWER_DISSIPATED   0x00000034

Definition at line 7182 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_POWER_STATE_D0_MASK   0xff

Definition at line 7186 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_POWER_STATE_D1_MASK   0xff00

Definition at line 7185 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_POWER_STATE_D2_MASK   0xff0000

Definition at line 7184 of file bnx2.h.

#define BNX2_SHARED_HW_CFG_POWER_STATE_D3_MASK   0xff000000

Definition at line 7183 of file bnx2.h.

#define BNX2_SHM_HDR_ADDR_0   BNX2_MCP_SCRATCH + 4

Definition at line 6412 of file bnx2.h.

#define BNX2_SHM_HDR_ADDR_1   BNX2_MCP_SCRATCH + 8

Definition at line 6413 of file bnx2.h.

#define BNX2_SHM_HDR_SIGNATURE   BNX2_MCP_SCRATCH

Definition at line 6406 of file bnx2.h.

#define BNX2_SHM_HDR_SIGNATURE_SIG   0x53530000

Definition at line 6408 of file bnx2.h.

#define BNX2_SHM_HDR_SIGNATURE_SIG_MASK   0xffff0000

Definition at line 6407 of file bnx2.h.

#define BNX2_SHM_HDR_SIGNATURE_VER_MASK   0x000000ff

Definition at line 6409 of file bnx2.h.

#define BNX2_SHM_HDR_SIGNATURE_VER_ONE   0x00000001

Definition at line 6410 of file bnx2.h.

#define BNX2_START_UNICAST_ADDRESS_INDEX   4

Definition at line 6531 of file bnx2.h.

#define BNX2_TBDC_BD_ADDR   0x5424

Definition at line 4663 of file bnx2.h.

#define BNX2_TBDC_BDIDX_BDIDX   (0xffffUL<<0)

Definition at line 4666 of file bnx2.h.

#define BNX2_TBDC_BDIDX_CMD   (0xffUL<<24)

Definition at line 4667 of file bnx2.h.

#define BNX2_TBDC_BIDX   0x542c

Definition at line 4665 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE   0x5434

Definition at line 4671 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_CAM_VALIDS   (0xffUL<<8)

Definition at line 4684 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_OPCODE   (0x7UL<<0)

Definition at line 4672 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_OPCODE_CACHE_WRITE   (1UL<<0)

Definition at line 4674 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_OPCODE_CAM_READ   (5UL<<0)

Definition at line 4677 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_OPCODE_CAM_WRITE   (4UL<<0)

Definition at line 4676 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_OPCODE_INVALIDATE   (2UL<<0)

Definition at line 4675 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_OPCODE_RAM_READ   (7UL<<0)

Definition at line 4679 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_OPCODE_RAM_WRITE   (6UL<<0)

Definition at line 4678 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_OPCODE_SEARCH   (0UL<<0)

Definition at line 4673 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_SMASK_BDIDX   (1UL<<4)

Definition at line 4680 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_SMASK_CID   (1UL<<5)

Definition at line 4681 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_SMASK_CMD   (1UL<<6)

Definition at line 4682 of file bnx2.h.

#define BNX2_TBDC_CAM_OPCODE_WMT_FAILED   (1UL<<7)

Definition at line 4683 of file bnx2.h.

#define BNX2_TBDC_CID   0x5430

Definition at line 4669 of file bnx2.h.

#define BNX2_TBDC_COMMAND   0x5400

Definition at line 4649 of file bnx2.h.

#define BNX2_TBDC_COMMAND_CMD_ENABLED   (1UL<<0)

Definition at line 4650 of file bnx2.h.

#define BNX2_TBDC_COMMAND_CMD_FLUSH   (1UL<<1)

Definition at line 4651 of file bnx2.h.

#define BNX2_TBDC_COMMAND_CMD_REG_ARB   (1UL<<3)

Definition at line 4653 of file bnx2.h.

#define BNX2_TBDC_COMMAND_CMD_SOFT_RST   (1UL<<2)

Definition at line 4652 of file bnx2.h.

#define BNX2_TBDC_COMMAND_WRCHK_ALL_ONES_ERROR   (1UL<<5)

Definition at line 4655 of file bnx2.h.

#define BNX2_TBDC_COMMAND_WRCHK_ALL_ZEROS_ERROR   (1UL<<6)

Definition at line 4656 of file bnx2.h.

#define BNX2_TBDC_COMMAND_WRCHK_ANY_ONES_ERROR   (1UL<<7)

Definition at line 4657 of file bnx2.h.

#define BNX2_TBDC_COMMAND_WRCHK_ANY_ZEROS_ERROR   (1UL<<8)

Definition at line 4658 of file bnx2.h.

#define BNX2_TBDC_COMMAND_WRCHK_RANGE_ERROR   (1UL<<4)

Definition at line 4654 of file bnx2.h.

#define BNX2_TBDC_STATUS   0x5404

Definition at line 4660 of file bnx2.h.

#define BNX2_TBDC_STATUS_FREE_CNT   (0x3fUL<<0)

Definition at line 4661 of file bnx2.h.

#define BNX2_TBDR_CKSUM_ERROR_STATUS   0x00005010

Definition at line 4619 of file bnx2.h.

#define BNX2_TBDR_CKSUM_ERROR_STATUS_CALCULATED   (0xffffL<<0)

Definition at line 4620 of file bnx2.h.

#define BNX2_TBDR_CKSUM_ERROR_STATUS_EXPECTED   (0xffffL<<16)

Definition at line 4621 of file bnx2.h.

#define BNX2_TBDR_COMMAND   0x00005000

Definition at line 4577 of file bnx2.h.

#define BNX2_TBDR_COMMAND_ENABLE   (1L<<0)

Definition at line 4578 of file bnx2.h.

#define BNX2_TBDR_COMMAND_MSTR_ABORT   (1L<<4)

Definition at line 4580 of file bnx2.h.

#define BNX2_TBDR_COMMAND_SOFT_RST   (1L<<1)

Definition at line 4579 of file bnx2.h.

#define BNX2_TBDR_CONFIG   0x00005008

Definition at line 4591 of file bnx2.h.

#define BNX2_TBDR_CONFIG_CACHE_NEXT_PAGE_PTRS   (1L<<10)

Definition at line 4595 of file bnx2.h.

#define BNX2_TBDR_CONFIG_MAX_BDS   (0xffL<<0)

Definition at line 4592 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE   (0xfL<<24)

Definition at line 4596 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_128K   (9L<<24)

Definition at line 4606 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_16K   (6L<<24)

Definition at line 4603 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_1K   (2L<<24)

Definition at line 4599 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_1M   (12L<<24)

Definition at line 4609 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_256   (0L<<24)

Definition at line 4597 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_256K   (10L<<24)

Definition at line 4607 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_2K   (3L<<24)

Definition at line 4600 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_32K   (7L<<24)

Definition at line 4604 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_4K   (4L<<24)

Definition at line 4601 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_512   (1L<<24)

Definition at line 4598 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_512K   (11L<<24)

Definition at line 4608 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_64K   (8L<<24)

Definition at line 4605 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PAGE_SIZE_8K   (5L<<24)

Definition at line 4602 of file bnx2.h.

#define BNX2_TBDR_CONFIG_PRIORITY   (1L<<9)

Definition at line 4594 of file bnx2.h.

#define BNX2_TBDR_CONFIG_SWAP_MODE   (1L<<8)

Definition at line 4593 of file bnx2.h.

#define BNX2_TBDR_DEBUG_VECT_PEEK   0x0000500c

Definition at line 4611 of file bnx2.h.

#define BNX2_TBDR_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 4613 of file bnx2.h.

#define BNX2_TBDR_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 4614 of file bnx2.h.

#define BNX2_TBDR_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 4612 of file bnx2.h.

#define BNX2_TBDR_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 4616 of file bnx2.h.

#define BNX2_TBDR_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 4617 of file bnx2.h.

#define BNX2_TBDR_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 4615 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD   0x000053f8

Definition at line 4624 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 4632 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 4631 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_BUSY   (1L<<31)

Definition at line 4635 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 4633 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 4625 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_POP   (1L<<30)

Definition at line 4634 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 4630 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 4629 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 4626 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 4627 of file bnx2.h.

#define BNX2_TBDR_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 4628 of file bnx2.h.

#define BNX2_TBDR_FTQ_CTL   0x000053fc

Definition at line 4637 of file bnx2.h.

#define BNX2_TBDR_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 4642 of file bnx2.h.

#define BNX2_TBDR_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 4640 of file bnx2.h.

#define BNX2_TBDR_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 4638 of file bnx2.h.

#define BNX2_TBDR_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 4641 of file bnx2.h.

#define BNX2_TBDR_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 4639 of file bnx2.h.

#define BNX2_TBDR_STATUS   0x00005004

Definition at line 4582 of file bnx2.h.

#define BNX2_TBDR_STATUS_BURST_CNT   (1L<<6)

Definition at line 4589 of file bnx2.h.

#define BNX2_TBDR_STATUS_DMA_WAIT   (1L<<0)

Definition at line 4583 of file bnx2.h.

#define BNX2_TBDR_STATUS_FIFO_OVERFLOW   (1L<<2)

Definition at line 4585 of file bnx2.h.

#define BNX2_TBDR_STATUS_FIFO_UNDERFLOW   (1L<<3)

Definition at line 4586 of file bnx2.h.

#define BNX2_TBDR_STATUS_FTQ_ENTRY_CNT   (1L<<5)

Definition at line 4588 of file bnx2.h.

#define BNX2_TBDR_STATUS_FTQ_WAIT   (1L<<1)

Definition at line 4584 of file bnx2.h.

#define BNX2_TBDR_STATUS_SEARCHMISS_ERROR   (1L<<4)

Definition at line 4587 of file bnx2.h.

#define BNX2_TBDR_TBDRQ   0x000053c0

Definition at line 4623 of file bnx2.h.

#define BNX2_TDMA_BD_IF_DEBUG   0x00005c94

Definition at line 4800 of file bnx2.h.

#define BNX2_TDMA_COMMAND   0x00005c00

Definition at line 4691 of file bnx2.h.

#define BNX2_TDMA_COMMAND_BAD_L2_LENGTH_ABORT   (1L<<7)

Definition at line 4695 of file bnx2.h.

#define BNX2_TDMA_COMMAND_CS16_ERR   (1L<<5)

Definition at line 4694 of file bnx2.h.

#define BNX2_TDMA_COMMAND_ENABLED   (1L<<0)

Definition at line 4692 of file bnx2.h.

#define BNX2_TDMA_COMMAND_FORCE_ILOCK_CKERR   (1L<<24)

Definition at line 4700 of file bnx2.h.

#define BNX2_TDMA_COMMAND_IFIFO_CLR   (1L<<31)

Definition at line 4702 of file bnx2.h.

#define BNX2_TDMA_COMMAND_MASK_CS1   (1L<<20)

Definition at line 4696 of file bnx2.h.

#define BNX2_TDMA_COMMAND_MASK_CS2   (1L<<21)

Definition at line 4697 of file bnx2.h.

#define BNX2_TDMA_COMMAND_MASK_CS3   (1L<<22)

Definition at line 4698 of file bnx2.h.

#define BNX2_TDMA_COMMAND_MASK_CS4   (1L<<23)

Definition at line 4699 of file bnx2.h.

#define BNX2_TDMA_COMMAND_MASTER_ABORT   (1L<<4)

Definition at line 4693 of file bnx2.h.

#define BNX2_TDMA_COMMAND_OFIFO_CLR   (1L<<30)

Definition at line 4701 of file bnx2.h.

#define BNX2_TDMA_CONFIG   0x00005c08

Definition at line 4715 of file bnx2.h.

#define BNX2_TDMA_CONFIG_ALIGN_ENA   (1L<<15)

Definition at line 4733 of file bnx2.h.

#define BNX2_TDMA_CONFIG_BYTES_OST_1024_XI   (1L<<24)

Definition at line 4750 of file bnx2.h.

#define BNX2_TDMA_CONFIG_BYTES_OST_16384_XI   (5L<<24)

Definition at line 4754 of file bnx2.h.

#define BNX2_TDMA_CONFIG_BYTES_OST_2048_XI   (2L<<24)

Definition at line 4751 of file bnx2.h.

#define BNX2_TDMA_CONFIG_BYTES_OST_4096_XI   (3L<<24)

Definition at line 4752 of file bnx2.h.

#define BNX2_TDMA_CONFIG_BYTES_OST_512_XI   (0L<<24)

Definition at line 4749 of file bnx2.h.

#define BNX2_TDMA_CONFIG_BYTES_OST_8192_XI   (4L<<24)

Definition at line 4753 of file bnx2.h.

#define BNX2_TDMA_CONFIG_BYTES_OST_XI   (0x7L<<24)

Definition at line 4748 of file bnx2.h.

#define BNX2_TDMA_CONFIG_CHK_L2_BD   (1L<<16)

Definition at line 4734 of file bnx2.h.

#define BNX2_TDMA_CONFIG_CMPL_ENTRY   (1L<<17)

Definition at line 4735 of file bnx2.h.

#define BNX2_TDMA_CONFIG_FIFO_CMP   (0xfL<<20)

Definition at line 4739 of file bnx2.h.

#define BNX2_TDMA_CONFIG_FIFO_CMP_EN_XI   (1L<<23)

Definition at line 4747 of file bnx2.h.

#define BNX2_TDMA_CONFIG_HC_BYPASS_XI   (1L<<27)

Definition at line 4755 of file bnx2.h.

#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_0_XI   (0L<<20)

Definition at line 4741 of file bnx2.h.

#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_16_XI   (3L<<20)

Definition at line 4744 of file bnx2.h.

#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_32_XI   (4L<<20)

Definition at line 4745 of file bnx2.h.

#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_4_XI   (1L<<20)

Definition at line 4742 of file bnx2.h.

#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_64_XI   (5L<<20)

Definition at line 4746 of file bnx2.h.

#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_8_XI   (2L<<20)

Definition at line 4743 of file bnx2.h.

#define BNX2_TDMA_CONFIG_IFIFO_DEPTH_XI   (0x7L<<20)

Definition at line 4740 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LCL_MRRS_1024_XI   (3L<<28)

Definition at line 4760 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LCL_MRRS_128_XI   (0L<<28)

Definition at line 4757 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LCL_MRRS_2048_XI   (4L<<28)

Definition at line 4761 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LCL_MRRS_256_XI   (1L<<28)

Definition at line 4758 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LCL_MRRS_4096_XI   (5L<<28)

Definition at line 4762 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LCL_MRRS_512_XI   (2L<<28)

Definition at line 4759 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LCL_MRRS_EN_XI   (1L<<31)

Definition at line 4763 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LCL_MRRS_XI   (0x7L<<28)

Definition at line 4756 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LIMIT_SZ   (0xfL<<4)

Definition at line 4723 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LIMIT_SZ_128   (0x4L<<4)

Definition at line 4725 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LIMIT_SZ_256   (0x6L<<4)

Definition at line 4726 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LIMIT_SZ_512   (0x8L<<4)

Definition at line 4727 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LIMIT_SZ_64   (0L<<4)

Definition at line 4724 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LINE_SZ   (0xfL<<8)

Definition at line 4728 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LINE_SZ_128   (4L<<8)

Definition at line 4730 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LINE_SZ_256   (6L<<8)

Definition at line 4731 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LINE_SZ_512   (8L<<8)

Definition at line 4732 of file bnx2.h.

#define BNX2_TDMA_CONFIG_LINE_SZ_64   (0L<<8)

Definition at line 4729 of file bnx2.h.

#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN   (0x3L<<2)

Definition at line 4718 of file bnx2.h.

#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN_0   (0L<<2)

Definition at line 4719 of file bnx2.h.

#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN_1   (1L<<2)

Definition at line 4720 of file bnx2.h.

#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN_2   (2L<<2)

Definition at line 4721 of file bnx2.h.

#define BNX2_TDMA_CONFIG_NUM_DMA_CHAN_3   (3L<<2)

Definition at line 4722 of file bnx2.h.

#define BNX2_TDMA_CONFIG_OFIFO_CMP   (1L<<19)

Definition at line 4736 of file bnx2.h.

#define BNX2_TDMA_CONFIG_OFIFO_CMP_2   (1L<<19)

Definition at line 4738 of file bnx2.h.

#define BNX2_TDMA_CONFIG_OFIFO_CMP_3   (0L<<19)

Definition at line 4737 of file bnx2.h.

#define BNX2_TDMA_CONFIG_ONE_DMA   (1L<<0)

Definition at line 4716 of file bnx2.h.

#define BNX2_TDMA_CONFIG_ONE_RECORD   (1L<<1)

Definition at line 4717 of file bnx2.h.

#define BNX2_TDMA_CTX_IF_DEBUG   0x00005c9c

Definition at line 4802 of file bnx2.h.

#define BNX2_TDMA_DBG_TRIGGER   0x00005c14

Definition at line 4769 of file bnx2.h.

#define BNX2_TDMA_DBG_WATCHDOG   0x00005c10

Definition at line 4768 of file bnx2.h.

#define BNX2_TDMA_DMAD_FSM   0x00005c80

Definition at line 4770 of file bnx2.h.

#define BNX2_TDMA_DMAD_FSM_ARB_CTX   (1L<<12)

Definition at line 4774 of file bnx2.h.

#define BNX2_TDMA_DMAD_FSM_ARB_TBDC   (0x3L<<8)

Definition at line 4773 of file bnx2.h.

#define BNX2_TDMA_DMAD_FSM_BD   (0xfL<<24)

Definition at line 4777 of file bnx2.h.

#define BNX2_TDMA_DMAD_FSM_BD_INVLD   (1L<<0)

Definition at line 4771 of file bnx2.h.

#define BNX2_TDMA_DMAD_FSM_DMAD   (0x7L<<20)

Definition at line 4776 of file bnx2.h.

#define BNX2_TDMA_DMAD_FSM_DR_INTF   (1L<<16)

Definition at line 4775 of file bnx2.h.

#define BNX2_TDMA_DMAD_FSM_PUSH   (0xfL<<4)

Definition at line 4772 of file bnx2.h.

#define BNX2_TDMA_DMAD_IF_DEBUG   0x00005c98

Definition at line 4801 of file bnx2.h.

#define BNX2_TDMA_DMAD_STATUS   0x00005c84

Definition at line 4779 of file bnx2.h.

#define BNX2_TDMA_DMAD_STATUS_IFTQ_ENUM   (0xfL<<12)

Definition at line 4783 of file bnx2.h.

#define BNX2_TDMA_DMAD_STATUS_RHOLD_BD_ENTRY   (0x3L<<8)

Definition at line 4782 of file bnx2.h.

#define BNX2_TDMA_DMAD_STATUS_RHOLD_DMAD_ENTRY   (0x3L<<4)

Definition at line 4781 of file bnx2.h.

#define BNX2_TDMA_DMAD_STATUS_RHOLD_PUSH_ENTRY   (0x3L<<0)

Definition at line 4780 of file bnx2.h.

#define BNX2_TDMA_DR_IF_DEBUG   0x00005ca4

Definition at line 4804 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_FSM   0x00005c88

Definition at line 4785 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_FSM_DMAD   (0x7L<<16)

Definition at line 4790 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_FSM_DR_BUF   (0x7L<<12)

Definition at line 4789 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_FSM_L2_COMP   (0x3L<<0)

Definition at line 4786 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_FSM_TPATQ   (0x7L<<4)

Definition at line 4787 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_FSM_TPBUF   (0x3L<<8)

Definition at line 4788 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_STATUS   0x00005c8c

Definition at line 4792 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_STATUS_BYTE_COUNT   (0x7L<<16)

Definition at line 4797 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_STATUS_DATA_AVAIL   (0x3L<<4)

Definition at line 4794 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_STATUS_HOLE_PHASE   (0x7L<<0)

Definition at line 4793 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_STATUS_NXT_PNTR   (0xfL<<12)

Definition at line 4796 of file bnx2.h.

#define BNX2_TDMA_DR_INTF_STATUS_SHIFT_ADDR   (0x7L<<8)

Definition at line 4795 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD   0x00005ff8

Definition at line 4815 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 4823 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 4822 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_BUSY   (1L<<31)

Definition at line 4826 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 4824 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 4816 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_POP   (1L<<30)

Definition at line 4825 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 4821 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 4820 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 4817 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 4818 of file bnx2.h.

#define BNX2_TDMA_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 4819 of file bnx2.h.

#define BNX2_TDMA_FTQ_CTL   0x00005ffc

Definition at line 4828 of file bnx2.h.

#define BNX2_TDMA_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 4833 of file bnx2.h.

#define BNX2_TDMA_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 4831 of file bnx2.h.

#define BNX2_TDMA_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 4829 of file bnx2.h.

#define BNX2_TDMA_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 4832 of file bnx2.h.

#define BNX2_TDMA_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 4830 of file bnx2.h.

#define BNX2_TDMA_PAYLOAD_PROD   0x00005c0c

Definition at line 4765 of file bnx2.h.

#define BNX2_TDMA_PAYLOAD_PROD_VALUE   (0x1fffL<<3)

Definition at line 4766 of file bnx2.h.

#define BNX2_TDMA_PUSH_FSM   0x00005c90

Definition at line 4799 of file bnx2.h.

#define BNX2_TDMA_STATUS   0x00005c04

Definition at line 4704 of file bnx2.h.

#define BNX2_TDMA_STATUS_BURST_CNT   (1L<<17)

Definition at line 4710 of file bnx2.h.

#define BNX2_TDMA_STATUS_DMA_WAIT   (1L<<0)

Definition at line 4705 of file bnx2.h.

#define BNX2_TDMA_STATUS_FTQ_ENTRY_CNT   (1L<<16)

Definition at line 4709 of file bnx2.h.

#define BNX2_TDMA_STATUS_IFIFO_OVERFLOW   (1L<<31)

Definition at line 4713 of file bnx2.h.

#define BNX2_TDMA_STATUS_LOCK_WAIT   (1L<<3)

Definition at line 4708 of file bnx2.h.

#define BNX2_TDMA_STATUS_MAX_IFIFO_DEPTH   (0x3fL<<20)

Definition at line 4711 of file bnx2.h.

#define BNX2_TDMA_STATUS_OFIFO_OVERFLOW   (1L<<30)

Definition at line 4712 of file bnx2.h.

#define BNX2_TDMA_STATUS_PATCH_FTQ_WAIT   (1L<<2)

Definition at line 4707 of file bnx2.h.

#define BNX2_TDMA_STATUS_PAYLOAD_WAIT   (1L<<1)

Definition at line 4706 of file bnx2.h.

#define BNX2_TDMA_TDMA_ILOCK_CKSUM   0x00005cac

Definition at line 4806 of file bnx2.h.

#define BNX2_TDMA_TDMA_ILOCK_CKSUM_CALCULATED   (0xffffL<<0)

Definition at line 4807 of file bnx2.h.

#define BNX2_TDMA_TDMA_ILOCK_CKSUM_EXPECTED   (0xffffL<<16)

Definition at line 4808 of file bnx2.h.

#define BNX2_TDMA_TDMA_PCIE_CKSUM   0x00005cb0

Definition at line 4810 of file bnx2.h.

#define BNX2_TDMA_TDMA_PCIE_CKSUM_CALCULATED   (0xffffL<<0)

Definition at line 4811 of file bnx2.h.

#define BNX2_TDMA_TDMA_PCIE_CKSUM_EXPECTED   (0xffffL<<16)

Definition at line 4812 of file bnx2.h.

#define BNX2_TDMA_TDMAQ   0x00005fc0

Definition at line 4814 of file bnx2.h.

#define BNX2_TDMA_TPATQ_IF_DEBUG   0x00005ca8

Definition at line 4805 of file bnx2.h.

#define BNX2_TDMA_TPBUF_IF_DEBUG   0x00005ca0

Definition at line 4803 of file bnx2.h.

#define BNX2_TIMER_INTERVAL   HZ

Definition at line 6823 of file bnx2.h.

#define BNX2_TPAT_CPU_DATA_ACCESS   0x00085024

Definition at line 5776 of file bnx2.h.

#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK   0x00085038

Definition at line 5784 of file bnx2.h.

#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 5786 of file bnx2.h.

#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 5787 of file bnx2.h.

#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 5785 of file bnx2.h.

#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 5789 of file bnx2.h.

#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 5790 of file bnx2.h.

#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 5788 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK   0x00085008

Definition at line 5761 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)

Definition at line 5768 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)

Definition at line 5766 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)

Definition at line 5763 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)

Definition at line 5767 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)

Definition at line 5762 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)

Definition at line 5769 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)

Definition at line 5772 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)

Definition at line 5764 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)

Definition at line 5765 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)

Definition at line 5770 of file bnx2.h.

#define BNX2_TPAT_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)

Definition at line 5771 of file bnx2.h.

#define BNX2_TPAT_CPU_HW_BREAKPOINT   0x00085034

Definition at line 5780 of file bnx2.h.

#define BNX2_TPAT_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)

Definition at line 5782 of file bnx2.h.

#define BNX2_TPAT_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)

Definition at line 5781 of file bnx2.h.

#define BNX2_TPAT_CPU_INSTRUCTION   0x00085020

Definition at line 5775 of file bnx2.h.

#define BNX2_TPAT_CPU_INTERRUPT_ENABLE   0x00085028

Definition at line 5777 of file bnx2.h.

#define BNX2_TPAT_CPU_INTERRUPT_SAVED_PC   0x00085030

Definition at line 5779 of file bnx2.h.

#define BNX2_TPAT_CPU_INTERRUPT_VECTOR   0x0008502c

Definition at line 5778 of file bnx2.h.

#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR   0x00085048

Definition at line 5792 of file bnx2.h.

#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)

Definition at line 5796 of file bnx2.h.

#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)

Definition at line 5793 of file bnx2.h.

#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)

Definition at line 5795 of file bnx2.h.

#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)

Definition at line 5794 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE   0x00085000

Definition at line 5732 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)

Definition at line 5740 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)

Definition at line 5741 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)

Definition at line 5742 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_INTERRUPT_ENA   (1L<<7)

Definition at line 5738 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_LOCAL_RST   (1L<<0)

Definition at line 5733 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_MSG_BIT1   (1L<<6)

Definition at line 5737 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)

Definition at line 5735 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)

Definition at line 5736 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_SOFT_HALT   (1L<<10)

Definition at line 5739 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)

Definition at line 5743 of file bnx2.h.

#define BNX2_TPAT_CPU_MODE_STEP_ENA   (1L<<1)

Definition at line 5734 of file bnx2.h.

#define BNX2_TPAT_CPU_PROGRAM_COUNTER   0x0008501c

Definition at line 5774 of file bnx2.h.

#define BNX2_TPAT_CPU_REG_FILE   0x00085200

Definition at line 5798 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE   0x00085004

Definition at line 5745 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_ALIGN_HALTED   (1L<<7)

Definition at line 5752 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)

Definition at line 5750 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_BAD_INST_HALTED   (1L<<2)

Definition at line 5747 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_BAD_PC_HALTED   (1L<<6)

Definition at line 5751 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_BLOCKED_READ   (1L<<31)

Definition at line 5759 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_BREAKPOINT   (1L<<0)

Definition at line 5746 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)

Definition at line 5757 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)

Definition at line 5753 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_INST_FETCH_STALL   (1L<<15)

Definition at line 5758 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_INTERRUPT   (1L<<12)

Definition at line 5756 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)

Definition at line 5748 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)

Definition at line 5749 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_SOFT_HALTED   (1L<<10)

Definition at line 5754 of file bnx2.h.

#define BNX2_TPAT_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)

Definition at line 5755 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD   0x000853f8

Definition at line 5800 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 5808 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 5807 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_BUSY   (1L<<31)

Definition at line 5811 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 5809 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 5801 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_POP   (1L<<30)

Definition at line 5810 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 5806 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 5805 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 5802 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 5803 of file bnx2.h.

#define BNX2_TPAT_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 5804 of file bnx2.h.

#define BNX2_TPAT_FTQ_CTL   0x000853fc

Definition at line 5813 of file bnx2.h.

#define BNX2_TPAT_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 5818 of file bnx2.h.

#define BNX2_TPAT_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 5816 of file bnx2.h.

#define BNX2_TPAT_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 5814 of file bnx2.h.

#define BNX2_TPAT_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 5817 of file bnx2.h.

#define BNX2_TPAT_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 5815 of file bnx2.h.

#define BNX2_TPAT_SCRATCH   0x000a0000

Definition at line 5820 of file bnx2.h.

#define BNX2_TPAT_TPATQ   0x000853c0

Definition at line 5799 of file bnx2.h.

#define BNX2_TSCH_TSS_CFG   0x00004c1c

Definition at line 4567 of file bnx2.h.

#define BNX2_TSCH_TSS_CFG_NUM_OF_TSS_CON   (0xfL<<24)

Definition at line 4569 of file bnx2.h.

#define BNX2_TSCH_TSS_CFG_TSS_START_CID   (0x7ffL<<8)

Definition at line 4568 of file bnx2.h.

#define BNX2_TXP_CPU_DATA_ACCESS   0x00045024

Definition at line 5681 of file bnx2.h.

#define BNX2_TXP_CPU_DEBUG_VECT_PEEK   0x00045038

Definition at line 5689 of file bnx2.h.

#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN   (1L<<11)

Definition at line 5691 of file bnx2.h.

#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_SEL   (0xfL<<12)

Definition at line 5692 of file bnx2.h.

#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_VALUE   (0x7ffL<<0)

Definition at line 5690 of file bnx2.h.

#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN   (1L<<27)

Definition at line 5694 of file bnx2.h.

#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_SEL   (0xfL<<28)

Definition at line 5695 of file bnx2.h.

#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_VALUE   (0x7ffL<<16)

Definition at line 5693 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK   0x00045008

Definition at line 5666 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK   (1L<<7)

Definition at line 5673 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK   (1L<<5)

Definition at line 5671 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK   (1L<<2)

Definition at line 5668 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK   (1L<<6)

Definition at line 5672 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_BREAKPOINT_MASK   (1L<<0)

Definition at line 5667 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_FIO_ABORT_MASK   (1L<<8)

Definition at line 5674 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_INTERRUPT_MASK   (1L<<12)

Definition at line 5677 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)

Definition at line 5669 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)

Definition at line 5670 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_SOFT_HALTED_MASK   (1L<<10)

Definition at line 5675 of file bnx2.h.

#define BNX2_TXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK   (1L<<11)

Definition at line 5676 of file bnx2.h.

#define BNX2_TXP_CPU_HW_BREAKPOINT   0x00045034

Definition at line 5685 of file bnx2.h.

#define BNX2_TXP_CPU_HW_BREAKPOINT_ADDRESS   (0x3fffffffL<<2)

Definition at line 5687 of file bnx2.h.

#define BNX2_TXP_CPU_HW_BREAKPOINT_DISABLE   (1L<<0)

Definition at line 5686 of file bnx2.h.

#define BNX2_TXP_CPU_INSTRUCTION   0x00045020

Definition at line 5680 of file bnx2.h.

#define BNX2_TXP_CPU_INTERRUPT_ENABLE   0x00045028

Definition at line 5682 of file bnx2.h.

#define BNX2_TXP_CPU_INTERRUPT_SAVED_PC   0x00045030

Definition at line 5684 of file bnx2.h.

#define BNX2_TXP_CPU_INTERRUPT_VECTOR   0x0004502c

Definition at line 5683 of file bnx2.h.

#define BNX2_TXP_CPU_LAST_BRANCH_ADDR   0x00045048

Definition at line 5697 of file bnx2.h.

#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_LBA   (0x3fffffffL<<2)

Definition at line 5701 of file bnx2.h.

#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE   (1L<<1)

Definition at line 5698 of file bnx2.h.

#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH   (1L<<1)

Definition at line 5700 of file bnx2.h.

#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP   (0L<<1)

Definition at line 5699 of file bnx2.h.

#define BNX2_TXP_CPU_MODE   0x00045000

Definition at line 5637 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_BAD_DATA_HALT_ENA   (1L<<11)

Definition at line 5645 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_BAD_INST_HALT_ENA   (1L<<12)

Definition at line 5646 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_FIO_ABORT_HALT_ENA   (1L<<13)

Definition at line 5647 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_INTERRUPT_ENA   (1L<<7)

Definition at line 5643 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_LOCAL_RST   (1L<<0)

Definition at line 5638 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_MSG_BIT1   (1L<<6)

Definition at line 5642 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_PAGE_0_DATA_ENA   (1L<<2)

Definition at line 5640 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_PAGE_0_INST_ENA   (1L<<3)

Definition at line 5641 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_SOFT_HALT   (1L<<10)

Definition at line 5644 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA   (1L<<15)

Definition at line 5648 of file bnx2.h.

#define BNX2_TXP_CPU_MODE_STEP_ENA   (1L<<1)

Definition at line 5639 of file bnx2.h.

#define BNX2_TXP_CPU_PROGRAM_COUNTER   0x0004501c

Definition at line 5679 of file bnx2.h.

#define BNX2_TXP_CPU_REG_FILE   0x00045200

Definition at line 5703 of file bnx2.h.

#define BNX2_TXP_CPU_STATE   0x00045004

Definition at line 5650 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_ALIGN_HALTED   (1L<<7)

Definition at line 5657 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_BAD_DATA_ADDR_HALTED   (1L<<5)

Definition at line 5655 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_BAD_INST_HALTED   (1L<<2)

Definition at line 5652 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_BAD_PC_HALTED   (1L<<6)

Definition at line 5656 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_BLOCKED_READ   (1L<<31)

Definition at line 5664 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_BREAKPOINT   (1L<<0)

Definition at line 5651 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_DATA_ACCESS_STALL   (1L<<14)

Definition at line 5662 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_FIO_ABORT_HALTED   (1L<<8)

Definition at line 5658 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_INST_FETCH_STALL   (1L<<15)

Definition at line 5663 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_INTERRUPT   (1L<<12)

Definition at line 5661 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_PAGE_0_DATA_HALTED   (1L<<3)

Definition at line 5653 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_PAGE_0_INST_HALTED   (1L<<4)

Definition at line 5654 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_SOFT_HALTED   (1L<<10)

Definition at line 5659 of file bnx2.h.

#define BNX2_TXP_CPU_STATE_SPAD_UNDERFLOW   (1L<<11)

Definition at line 5660 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD   0x000453f8

Definition at line 5705 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_ADD_DATA   (1L<<28)

Definition at line 5713 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_ADD_INTERVEN   (1L<<27)

Definition at line 5712 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_BUSY   (1L<<31)

Definition at line 5716 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_INTERVENE_CLR   (1L<<29)

Definition at line 5714 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_OFFSET   (0x3ffL<<0)

Definition at line 5706 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_POP   (1L<<30)

Definition at line 5715 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_RD_DATA   (1L<<26)

Definition at line 5711 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_SFT_RESET   (1L<<25)

Definition at line 5710 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_WR_TOP   (1L<<10)

Definition at line 5707 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_WR_TOP_0   (0L<<10)

Definition at line 5708 of file bnx2.h.

#define BNX2_TXP_FTQ_CMD_WR_TOP_1   (1L<<10)

Definition at line 5709 of file bnx2.h.

#define BNX2_TXP_FTQ_CTL   0x000453fc

Definition at line 5718 of file bnx2.h.

#define BNX2_TXP_FTQ_CTL_CUR_DEPTH   (0x3ffL<<22)

Definition at line 5723 of file bnx2.h.

#define BNX2_TXP_FTQ_CTL_FORCE_INTERVENE   (1L<<2)

Definition at line 5721 of file bnx2.h.

#define BNX2_TXP_FTQ_CTL_INTERVENE   (1L<<0)

Definition at line 5719 of file bnx2.h.

#define BNX2_TXP_FTQ_CTL_MAX_DEPTH   (0x3ffL<<12)

Definition at line 5722 of file bnx2.h.

#define BNX2_TXP_FTQ_CTL_OVERFLOW   (1L<<1)

Definition at line 5720 of file bnx2.h.

#define BNX2_TXP_SCRATCH   0x00060000

Definition at line 5725 of file bnx2.h.

#define BNX2_TXP_TXPQ   0x000453c0

Definition at line 5704 of file bnx2.h.

#define BUFFERED_FLASH_BYTE_ADDR_MASK   (BUFFERED_FLASH_PHY_PAGE_SIZE-1)

Definition at line 6653 of file bnx2.h.

#define BUFFERED_FLASH_PAGE_BITS   9

Definition at line 6651 of file bnx2.h.

#define BUFFERED_FLASH_PAGE_SIZE   264

Definition at line 6654 of file bnx2.h.

#define BUFFERED_FLASH_PHY_PAGE_SIZE   (1 << BUFFERED_FLASH_PAGE_BITS)

Definition at line 6652 of file bnx2.h.

#define BUFFERED_FLASH_TOTAL_SIZE   0x21000

Definition at line 6655 of file bnx2.h.

#define CHIP_BOND_ID (   bp)    (((bp)->chip_id) & 0xf)

Definition at line 6879 of file bnx2.h.

#define CHIP_BOND_ID_SERDES_BIT   0x01

Definition at line 6882 of file bnx2.h.

#define CHIP_BONDING (   bp)    (((bp)->chip_id) & 0x0000000f)

Definition at line 6867 of file bnx2.h.

#define CHIP_ID (   bp)    (((bp)->chip_id) & 0xfffffff0)

Definition at line 6869 of file bnx2.h.

#define CHIP_ID_5706_A0   0x57060000

Definition at line 6870 of file bnx2.h.

#define CHIP_ID_5706_A1   0x57060010

Definition at line 6871 of file bnx2.h.

#define CHIP_ID_5706_A2   0x57060020

Definition at line 6872 of file bnx2.h.

#define CHIP_ID_5708_A0   0x57080000

Definition at line 6873 of file bnx2.h.

#define CHIP_ID_5708_B0   0x57081000

Definition at line 6874 of file bnx2.h.

#define CHIP_ID_5708_B1   0x57081010

Definition at line 6875 of file bnx2.h.

#define CHIP_ID_5709_A0   0x57090000

Definition at line 6876 of file bnx2.h.

#define CHIP_ID_5709_A1   0x57090010

Definition at line 6877 of file bnx2.h.

#define CHIP_METAL (   bp)    (((bp)->chip_id) & 0x00000ff0)

Definition at line 6866 of file bnx2.h.

#define CHIP_NUM (   bp)    (((bp)->chip_id) & 0xffff0000)

Definition at line 6856 of file bnx2.h.

#define CHIP_NUM_5706   0x57060000

Definition at line 6857 of file bnx2.h.

#define CHIP_NUM_5708   0x57080000

Definition at line 6858 of file bnx2.h.

#define CHIP_NUM_5709   0x57090000

Definition at line 6859 of file bnx2.h.

#define CHIP_REV (   bp)    (((bp)->chip_id) & 0x0000f000)

Definition at line 6861 of file bnx2.h.

#define CHIP_REV_Ax   0x00000000

Definition at line 6862 of file bnx2.h.

#define CHIP_REV_Bx   0x00001000

Definition at line 6863 of file bnx2.h.

#define CHIP_REV_Cx   0x00002000

Definition at line 6864 of file bnx2.h.

#define CTX_MASK   (CTX_SIZE - 1)

Definition at line 6576 of file bnx2.h.

#define CTX_SHIFT   7

Definition at line 6574 of file bnx2.h.

#define CTX_SIZE   (1 << CTX_SHIFT)

Definition at line 6575 of file bnx2.h.

#define DMA_READ_CHANS   5

Definition at line 6536 of file bnx2.h.

#define DMA_WRITE_CHANS   3

Definition at line 6537 of file bnx2.h.

#define DP_SHMEM_LINE (   bp,
  offset 
)
Value:
netdev_err(bp->dev, "DEBUG: %08x: %08x %08x %08x %08x\n", \
offset, \
bnx2_shmem_rd(bp, offset), \
bnx2_shmem_rd(bp, offset + 4), \
bnx2_shmem_rd(bp, offset + 8), \
bnx2_shmem_rd(bp, offset + 12))

Definition at line 7441 of file bnx2.h.

#define FLASH_BACKUP_STRAP_MASK   (0xf << 26)

Definition at line 6682 of file bnx2.h.

#define FLASH_STRAP_MASK
Value:
(BNX2_NVM_CFG1_FLASH_MODE | \
BNX2_NVM_CFG1_BUFFER_MODE | \
BNX2_NVM_CFG1_PROTECT_MODE | \
BNX2_NVM_CFG1_FLASH_SIZE)

Definition at line 6677 of file bnx2.h.

#define GET_CID (   _cid_addr)    ((_cid_addr) >> CTX_SHIFT)

Definition at line 6578 of file bnx2.h.

#define GET_CID_ADDR (   _cid)    ((_cid) << CTX_SHIFT)

Definition at line 6577 of file bnx2.h.

#define GET_PCID (   _pcid_addr)    ((_pcid_addr) >> PHY_CTX_SHIFT)

Definition at line 6584 of file bnx2.h.

#define GET_PCID_ADDR (   _pcid)    ((_pcid) << PHY_CTX_SHIFT)

Definition at line 6583 of file bnx2.h.

#define HOST_VIEW_SHMEM_BASE   0x167c00

Definition at line 7439 of file bnx2.h.

#define INVALID_CID_ADDR   0xffffffff

Definition at line 6593 of file bnx2.h.

#define L2_FHDR_ERRORS_ALIGNMENT   (1<<19)

Definition at line 292 of file bnx2.h.

#define L2_FHDR_ERRORS_BAD_CRC   (1<<17)

Definition at line 290 of file bnx2.h.

#define L2_FHDR_ERRORS_GIANT_FRAME   (1<<21)

Definition at line 294 of file bnx2.h.

#define L2_FHDR_ERRORS_PHY_DECODE   (1<<18)

Definition at line 291 of file bnx2.h.

#define L2_FHDR_ERRORS_TCP_XSUM   (1<<28)

Definition at line 295 of file bnx2.h.

#define L2_FHDR_ERRORS_TOO_SHORT   (1<<20)

Definition at line 293 of file bnx2.h.

#define L2_FHDR_ERRORS_UDP_XSUM   (1<<31)

Definition at line 296 of file bnx2.h.

#define L2_FHDR_STATUS_IP_DATAGRAM   (1<<13)

Definition at line 285 of file bnx2.h.

#define L2_FHDR_STATUS_L2_LLC_SNAP   (1<<7)

Definition at line 283 of file bnx2.h.

#define L2_FHDR_STATUS_L2_VLAN_TAG   (1<<6)

Definition at line 282 of file bnx2.h.

#define L2_FHDR_STATUS_RSS_HASH   (1<<8)

Definition at line 284 of file bnx2.h.

#define L2_FHDR_STATUS_RULE_CLASS   (0x7<<0)

Definition at line 278 of file bnx2.h.

#define L2_FHDR_STATUS_RULE_P2   (1<<3)

Definition at line 279 of file bnx2.h.

#define L2_FHDR_STATUS_RULE_P3   (1<<4)

Definition at line 280 of file bnx2.h.

#define L2_FHDR_STATUS_RULE_P4   (1<<5)

Definition at line 281 of file bnx2.h.

#define L2_FHDR_STATUS_SPLIT   (1<<16)

Definition at line 289 of file bnx2.h.

#define L2_FHDR_STATUS_TCP_SEGMENT   (1<<14)

Definition at line 286 of file bnx2.h.

#define L2_FHDR_STATUS_UDP_DATAGRAM   (1<<15)

Definition at line 287 of file bnx2.h.

#define L2_FHDR_STATUS_USE_RXHASH   (L2_FHDR_STATUS_TCP_SEGMENT | L2_FHDR_STATUS_RSS_HASH)

Definition at line 298 of file bnx2.h.

#define MAC_LOOPBACK   1

Definition at line 6952 of file bnx2.h.

#define MAX_CID_ADDR   (GET_CID_ADDR(MAX_CID_CNT))

Definition at line 6592 of file bnx2.h.

#define MAX_CID_CNT   0x4000

Definition at line 6591 of file bnx2.h.

#define MAX_ETHERNET_JUMBO_PACKET_SIZE   9014

Definition at line 6525 of file bnx2.h.

#define MAX_ETHERNET_PACKET_SIZE   1514

Definition at line 6524 of file bnx2.h.

#define MAX_RX_DESC_CNT   (RX_DESC_CNT - 1)

Definition at line 6553 of file bnx2.h.

#define MAX_RX_PG_RINGS   32

Definition at line 6551 of file bnx2.h.

#define MAX_RX_RINGS   8

Definition at line 6550 of file bnx2.h.

#define MAX_TOTAL_RX_DESC_CNT   (MAX_RX_DESC_CNT * MAX_RX_RINGS)

Definition at line 6554 of file bnx2.h.

#define MAX_TOTAL_RX_PG_DESC_CNT   (MAX_RX_DESC_CNT * MAX_RX_PG_RINGS)

Definition at line 6555 of file bnx2.h.

#define MAX_TX_DESC_CNT   (TX_DESC_CNT - 1)

Definition at line 6548 of file bnx2.h.

#define MB_GET_CID_ADDR (   _cid)    (0x10000 + ((_cid) << MB_KERNEL_CTX_SHIFT))

Definition at line 6589 of file bnx2.h.

#define MB_KERNEL_CTX_MASK   (MB_KERNEL_CTX_SIZE - 1)

Definition at line 6588 of file bnx2.h.

#define MB_KERNEL_CTX_SHIFT   8

Definition at line 6586 of file bnx2.h.

#define MB_KERNEL_CTX_SIZE   (1 << MB_KERNEL_CTX_SHIFT)

Definition at line 6587 of file bnx2.h.

#define MB_RX_CID_ADDR   MB_GET_CID_ADDR(RX_CID)

Definition at line 6605 of file bnx2.h.

#define MB_TX_CID_ADDR   MB_GET_CID_ADDR(TX_CID)

Definition at line 6604 of file bnx2.h.

#define MII_BNX2_AER_AER   0x1e

Definition at line 6519 of file bnx2.h.

#define MII_BNX2_AER_AER_AN_MMD   0x3800

Definition at line 6520 of file bnx2.h.

#define MII_BNX2_BAM_NXTPG_CTL   0x10

Definition at line 6510 of file bnx2.h.

#define MII_BNX2_BLK_ADDR   0x1f

Definition at line 6488 of file bnx2.h.

#define MII_BNX2_BLK_ADDR_AER   0xffd0

Definition at line 6518 of file bnx2.h.

#define MII_BNX2_BLK_ADDR_BAM_NXTPG   0x8350

Definition at line 6509 of file bnx2.h.

#define MII_BNX2_BLK_ADDR_CL73_USERB0   0x8370

Definition at line 6513 of file bnx2.h.

#define MII_BNX2_BLK_ADDR_COMBO_IEEEB0   0xffe0

Definition at line 6521 of file bnx2.h.

#define MII_BNX2_BLK_ADDR_GP_STATUS   0x8120

Definition at line 6490 of file bnx2.h.

#define MII_BNX2_BLK_ADDR_IEEE0   0x0000

Definition at line 6489 of file bnx2.h.

#define MII_BNX2_BLK_ADDR_OVER1G   0x8320

Definition at line 6507 of file bnx2.h.

#define MII_BNX2_BLK_ADDR_SERDES_DIG   0x8300

Definition at line 6499 of file bnx2.h.

#define MII_BNX2_CL73_BAM_CTL1   0x12

Definition at line 6514 of file bnx2.h.

#define MII_BNX2_CL73_BAM_EN   0x8000

Definition at line 6515 of file bnx2.h.

#define MII_BNX2_CL73_BAM_NP_AFT_BP_EN   0x2000

Definition at line 6517 of file bnx2.h.

#define MII_BNX2_CL73_BAM_STA_MGR_EN   0x4000

Definition at line 6516 of file bnx2.h.

#define MII_BNX2_DSP_ADDRESS   0x17

Definition at line 6475 of file bnx2.h.

#define MII_BNX2_DSP_EXPAND_REG   0x0f00

Definition at line 6476 of file bnx2.h.

#define MII_BNX2_DSP_RW_PORT   0x15

Definition at line 6474 of file bnx2.h.

#define MII_BNX2_GP_TOP_AN_FD   0x8

Definition at line 6498 of file bnx2.h.

#define MII_BNX2_GP_TOP_AN_SPEED_10   0x0000

Definition at line 6493 of file bnx2.h.

#define MII_BNX2_GP_TOP_AN_SPEED_100   0x0100

Definition at line 6494 of file bnx2.h.

#define MII_BNX2_GP_TOP_AN_SPEED_1G   0x0200

Definition at line 6495 of file bnx2.h.

#define MII_BNX2_GP_TOP_AN_SPEED_1GKV   0x0d00

Definition at line 6497 of file bnx2.h.

#define MII_BNX2_GP_TOP_AN_SPEED_2_5G   0x0300

Definition at line 6496 of file bnx2.h.

#define MII_BNX2_GP_TOP_AN_SPEED_MSK   0x3f00

Definition at line 6492 of file bnx2.h.

#define MII_BNX2_GP_TOP_AN_STATUS1   0x1b

Definition at line 6491 of file bnx2.h.

#define MII_BNX2_MISC_SHADOW   0x1c

Definition at line 6481 of file bnx2.h.

#define MII_BNX2_NXTPG_CTL_BAM   0x1

Definition at line 6511 of file bnx2.h.

#define MII_BNX2_NXTPG_CTL_T2   0x2

Definition at line 6512 of file bnx2.h.

#define MII_BNX2_OVER1G_UP1   0x19

Definition at line 6508 of file bnx2.h.

#define MII_BNX2_SD_1000XCTL1_AUTODET   0x10

Definition at line 6502 of file bnx2.h.

#define MII_BNX2_SD_1000XCTL1_FIBER   0x01

Definition at line 6501 of file bnx2.h.

#define MII_BNX2_SD_MISC1_FORCE   0x10

Definition at line 6506 of file bnx2.h.

#define MII_BNX2_SD_MISC1_FORCE_2_5G   0x0

Definition at line 6505 of file bnx2.h.

#define MII_BNX2_SD_MISC1_FORCE_MSK   0xf

Definition at line 6504 of file bnx2.h.

#define MII_BNX2_SERDES_DIG_1000XCTL1   0x10

Definition at line 6500 of file bnx2.h.

#define MII_BNX2_SERDES_DIG_MISC1   0x18

Definition at line 6503 of file bnx2.h.

#define MII_EXPAND_REG1   (MII_BNX2_DSP_EXPAND_REG | 1)

Definition at line 6477 of file bnx2.h.

#define MII_EXPAND_REG1_RUDI_C   0x20

Definition at line 6478 of file bnx2.h.

#define MII_EXPAND_SERDES_CTL   (MII_BNX2_DSP_EXPAND_REG | 3)

Definition at line 6479 of file bnx2.h.

#define MIN_ETHERNET_PACKET_SIZE   60

Definition at line 6523 of file bnx2.h.

#define MISC_SHDW_AN_DBG   0x6800

Definition at line 6482 of file bnx2.h.

#define MISC_SHDW_AN_DBG_NOSYNC   0x0002

Definition at line 6483 of file bnx2.h.

#define MISC_SHDW_AN_DBG_RUDI_INVALID   0x0100

Definition at line 6484 of file bnx2.h.

#define MISC_SHDW_MODE_CTL   0x7c00

Definition at line 6485 of file bnx2.h.

#define MISC_SHDW_MODE_CTL_SIG_DET   0x0010

Definition at line 6486 of file bnx2.h.

#define NEXT_RX_BD (   x)
Value:
(((x) & (MAX_RX_DESC_CNT - 1)) == \
(MAX_RX_DESC_CNT - 1)) ? \
(x) + 2 : (x) + 1

Definition at line 6563 of file bnx2.h.

#define NEXT_TX_BD (   x)
Value:
(((x) & (MAX_TX_DESC_CNT - 1)) == \
(MAX_TX_DESC_CNT - 1)) ? \
(x) + 2 : (x) + 1

Definition at line 6557 of file bnx2.h.

#define NUM_MC_HASH_REGISTERS   8

Definition at line 6416 of file bnx2.h.

#define NVRAM_TIMEOUT_COUNT   30000

Definition at line 6674 of file bnx2.h.

#define PHY_BCM5706_PHY_ID   0x00206160

Definition at line 6420 of file bnx2.h.

#define PHY_CTX_MASK   (PHY_CTX_SIZE - 1)

Definition at line 6582 of file bnx2.h.

#define PHY_CTX_SHIFT   6

Definition at line 6580 of file bnx2.h.

#define PHY_CTX_SIZE   (1 << PHY_CTX_SHIFT)

Definition at line 6581 of file bnx2.h.

#define PHY_ID (   id)    ((id) & 0xfffffff0)

Definition at line 6422 of file bnx2.h.

#define PHY_LOOPBACK   2

Definition at line 6953 of file bnx2.h.

#define PHY_REV_ID (   id)    ((id) & 0xf)

Definition at line 6423 of file bnx2.h.

#define REG_RD (   bp,
  offset 
)    readl(bp->regview + offset)

Definition at line 6994 of file bnx2.h.

#define REG_WR (   bp,
  offset,
  val 
)    writel(val, bp->regview + offset)

Definition at line 6997 of file bnx2.h.

#define REG_WR16 (   bp,
  offset,
  val 
)    writew(val, bp->regview + offset)

Definition at line 7000 of file bnx2.h.

#define RV2P_BD_PAGE_SIZE   ((BCM_PAGE_SIZE / 16) - 1)

Definition at line 7055 of file bnx2.h.

#define RV2P_BD_PAGE_SIZE_MSK   0xffff

Definition at line 7054 of file bnx2.h.

#define RV2P_P1_FIXUP_PAGE_SIZE_IDX   0

Definition at line 7053 of file bnx2.h.

#define RV2P_PROC1   0

Definition at line 7057 of file bnx2.h.

#define RV2P_PROC2   1

Definition at line 7058 of file bnx2.h.

#define RX_BD_FLAGS_DUMMY   (1<<1)

Definition at line 57 of file bnx2.h.

#define RX_BD_FLAGS_END   (1<<2)

Definition at line 58 of file bnx2.h.

#define RX_BD_FLAGS_NOPUSH   (1<<0)

Definition at line 56 of file bnx2.h.

#define RX_BD_FLAGS_START   (1<<3)

Definition at line 59 of file bnx2.h.

#define RX_CID   0

Definition at line 6597 of file bnx2.h.

#define RX_DESC_CNT   (BCM_PAGE_SIZE / sizeof(struct rx_bd))

Definition at line 6552 of file bnx2.h.

#define RX_IDX (   x)    ((x) & MAX_RX_DESC_CNT)

Definition at line 6571 of file bnx2.h.

#define RX_MAX_RINGS   (RX_MAX_RSS_RINGS + 1)

Definition at line 6600 of file bnx2.h.

#define RX_MAX_RSS_RINGS   7

Definition at line 6599 of file bnx2.h.

#define RX_PG_RING_IDX (   x)    ((x) & bp->rx_max_pg_ring_idx)

Definition at line 6568 of file bnx2.h.

#define RX_RING (   x)    (((x) & ~MAX_RX_DESC_CNT) >> (BCM_PAGE_BITS - 4))

Definition at line 6570 of file bnx2.h.

#define RX_RING_IDX (   x)    ((x) & bp->rx_max_ring_idx)

Definition at line 6567 of file bnx2.h.

#define RX_RSS_CID   4

Definition at line 6598 of file bnx2.h.

#define RXBD_RING_SIZE   (sizeof(struct rx_bd) * RX_DESC_CNT)

Definition at line 6640 of file bnx2.h.

#define SAIFUN_FLASH_BASE_TOTAL_SIZE   65536

Definition at line 6661 of file bnx2.h.

#define SAIFUN_FLASH_BYTE_ADDR_MASK   (SAIFUN_FLASH_PHY_PAGE_SIZE-1)

Definition at line 6659 of file bnx2.h.

#define SAIFUN_FLASH_PAGE_BITS   8

Definition at line 6657 of file bnx2.h.

#define SAIFUN_FLASH_PAGE_SIZE   256

Definition at line 6660 of file bnx2.h.

#define SAIFUN_FLASH_PHY_PAGE_SIZE   (1 << SAIFUN_FLASH_PAGE_BITS)

Definition at line 6658 of file bnx2.h.

#define SEEPROM_BYTE_ADDR_MASK   (SEEPROM_PHY_PAGE_SIZE-1)

Definition at line 6647 of file bnx2.h.

#define SEEPROM_PAGE_BITS   2

Definition at line 6645 of file bnx2.h.

#define SEEPROM_PAGE_SIZE   4

Definition at line 6648 of file bnx2.h.

#define SEEPROM_PHY_PAGE_SIZE   (1 << SEEPROM_PAGE_BITS)

Definition at line 6646 of file bnx2.h.

#define SEEPROM_TOTAL_SIZE   65536

Definition at line 6649 of file bnx2.h.

#define ST_MICRO_FLASH_BASE_TOTAL_SIZE   65536

Definition at line 6667 of file bnx2.h.

#define ST_MICRO_FLASH_BYTE_ADDR_MASK   (ST_MICRO_FLASH_PHY_PAGE_SIZE-1)

Definition at line 6665 of file bnx2.h.

#define ST_MICRO_FLASH_PAGE_BITS   8

Definition at line 6663 of file bnx2.h.

#define ST_MICRO_FLASH_PAGE_SIZE   256

Definition at line 6666 of file bnx2.h.

#define ST_MICRO_FLASH_PHY_PAGE_SIZE   (1 << ST_MICRO_FLASH_PAGE_BITS)

Definition at line 6664 of file bnx2.h.

#define STATUS_ATTN_BITS_CMD_PROCESSOR_ABORT   (1L<<21)

Definition at line 91 of file bnx2.h.

#define STATUS_ATTN_BITS_CMD_SCHEDULER_ABORT   (1L<<20)

Definition at line 90 of file bnx2.h.

#define STATUS_ATTN_BITS_COMPLETION_ABORT   (1L<<16)

Definition at line 86 of file bnx2.h.

#define STATUS_ATTN_BITS_CONTEXT_ABORT   (1L<<19)

Definition at line 89 of file bnx2.h.

#define STATUS_ATTN_BITS_DMAE_ABORT   (1L<<25)

Definition at line 95 of file bnx2.h.

#define STATUS_ATTN_BITS_EPB_ERROR   (1L<<30)

Definition at line 98 of file bnx2.h.

#define STATUS_ATTN_BITS_FLSH_ABORT   (1L<<26)

Definition at line 96 of file bnx2.h.

#define STATUS_ATTN_BITS_GRC_ABORT   (1L<<27)

Definition at line 97 of file bnx2.h.

#define STATUS_ATTN_BITS_HOST_COALESCE_ABORT   (1L<<17)

Definition at line 87 of file bnx2.h.

#define STATUS_ATTN_BITS_LINK_STATE   (1L<<0)

Definition at line 70 of file bnx2.h.

#define STATUS_ATTN_BITS_MAC_ABORT   (1L<<23)

Definition at line 93 of file bnx2.h.

#define STATUS_ATTN_BITS_MAILBOX_QUEUE_ABORT   (1L<<18)

Definition at line 88 of file bnx2.h.

#define STATUS_ATTN_BITS_MGMT_PROCESSOR_ABORT   (1L<<22)

Definition at line 92 of file bnx2.h.

#define STATUS_ATTN_BITS_PARITY_ERROR   (1L<<31)

Definition at line 99 of file bnx2.h.

#define STATUS_ATTN_BITS_RX_BD_CACHE_ABORT   (1L<<14)

Definition at line 84 of file bnx2.h.

#define STATUS_ATTN_BITS_RX_DMA_ABORT   (1L<<15)

Definition at line 85 of file bnx2.h.

#define STATUS_ATTN_BITS_RX_LOOKUP_ABORT   (1L<<11)

Definition at line 81 of file bnx2.h.

#define STATUS_ATTN_BITS_RX_MBUF_ABORT   (1L<<10)

Definition at line 80 of file bnx2.h.

#define STATUS_ATTN_BITS_RX_PARSER_CATCHUP_ABORT   (1L<<9)

Definition at line 79 of file bnx2.h.

#define STATUS_ATTN_BITS_RX_PARSER_MAC_ABORT   (1L<<8)

Definition at line 78 of file bnx2.h.

#define STATUS_ATTN_BITS_RX_PROCESSOR_ABORT   (1L<<12)

Definition at line 82 of file bnx2.h.

#define STATUS_ATTN_BITS_RX_V2P_ABORT   (1L<<13)

Definition at line 83 of file bnx2.h.

#define STATUS_ATTN_BITS_TIMER_ABORT   (1L<<24)

Definition at line 94 of file bnx2.h.

#define STATUS_ATTN_BITS_TX_ASSEMBLER_ABORT   (1L<<7)

Definition at line 77 of file bnx2.h.

#define STATUS_ATTN_BITS_TX_BD_CACHE_ABORT   (1L<<3)

Definition at line 73 of file bnx2.h.

#define STATUS_ATTN_BITS_TX_BD_READ_ABORT   (1L<<2)

Definition at line 72 of file bnx2.h.

#define STATUS_ATTN_BITS_TX_DMA_ABORT   (1L<<5)

Definition at line 75 of file bnx2.h.

#define STATUS_ATTN_BITS_TX_PATCHUP_ABORT   (1L<<6)

Definition at line 76 of file bnx2.h.

#define STATUS_ATTN_BITS_TX_PROCESSOR_ABORT   (1L<<4)

Definition at line 74 of file bnx2.h.

#define STATUS_ATTN_BITS_TX_SCHEDULER_ABORT   (1L<<1)

Definition at line 71 of file bnx2.h.

#define SW_RXBD_RING_SIZE   (sizeof(struct sw_bd) * RX_DESC_CNT)

Definition at line 6638 of file bnx2.h.

#define SW_RXPG_RING_SIZE   (sizeof(struct sw_pg) * RX_DESC_CNT)

Definition at line 6639 of file bnx2.h.

#define SW_TXBD_RING_SIZE   (sizeof(struct sw_tx_bd) * TX_DESC_CNT)

Definition at line 6641 of file bnx2.h.

#define TX_BD_FLAGS_COAL_NOW   (1<<4)

Definition at line 35 of file bnx2.h.

#define TX_BD_FLAGS_CONN_FAULT   (1<<0)

Definition at line 29 of file bnx2.h.

#define TX_BD_FLAGS_DONT_GEN_CRC   (1<<5)

Definition at line 36 of file bnx2.h.

#define TX_BD_FLAGS_END   (1<<6)

Definition at line 37 of file bnx2.h.

#define TX_BD_FLAGS_IP_CKSUM   (1<<2)

Definition at line 33 of file bnx2.h.

#define TX_BD_FLAGS_START   (1<<7)

Definition at line 38 of file bnx2.h.

#define TX_BD_FLAGS_SW_FLAGS   (1<<13)

Definition at line 41 of file bnx2.h.

#define TX_BD_FLAGS_SW_LSO   (1<<15)

Definition at line 43 of file bnx2.h.

#define TX_BD_FLAGS_SW_OPTION_WORD   (0x1f<<8)

Definition at line 39 of file bnx2.h.

#define TX_BD_FLAGS_SW_SNAP   (1<<14)

Definition at line 42 of file bnx2.h.

#define TX_BD_FLAGS_TCP6_OFF0_MSK   (3<<1)

Definition at line 30 of file bnx2.h.

#define TX_BD_FLAGS_TCP6_OFF0_SHL   (1)

Definition at line 31 of file bnx2.h.

#define TX_BD_FLAGS_TCP6_OFF4_SHL   (12)

Definition at line 40 of file bnx2.h.

#define TX_BD_FLAGS_TCP_UDP_CKSUM   (1<<1)

Definition at line 32 of file bnx2.h.

#define TX_BD_FLAGS_VLAN_TAG   (1<<3)

Definition at line 34 of file bnx2.h.

#define TX_BD_TCP6_OFF2_SHL   (14)

Definition at line 27 of file bnx2.h.

#define TX_CID   16

Definition at line 6595 of file bnx2.h.

#define TX_DESC_CNT   (BCM_PAGE_SIZE / sizeof(struct tx_bd))

Definition at line 6547 of file bnx2.h.

#define TX_MAX_RINGS   (TX_MAX_TSS_RINGS + 1)

Definition at line 6602 of file bnx2.h.

#define TX_MAX_TSS_RINGS   7

Definition at line 6601 of file bnx2.h.

#define TX_RING_IDX (   x)    ((x) & MAX_TX_DESC_CNT)

Definition at line 6561 of file bnx2.h.

#define TX_TSS_CID   32

Definition at line 6596 of file bnx2.h.

#define TXBD_RING_SIZE   (sizeof(struct tx_bd) * TX_DESC_CNT)

Definition at line 6642 of file bnx2.h.

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