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board-qsd8x50.c
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1 /* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10  * GNU General Public License for more details.
11  *
12  * You should have received a copy of the GNU General Public License
13  * along with this program; if not, write to the Free Software
14  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15  * 02110-1301, USA.
16  */
17 #include <linux/gpio.h>
18 #include <linux/kernel.h>
19 #include <linux/irq.h>
20 #include <linux/platform_device.h>
21 #include <linux/delay.h>
22 #include <linux/usb/msm_hsusb.h>
23 #include <linux/err.h>
24 #include <linux/clkdev.h>
25 
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/io.h>
29 #include <asm/setup.h>
30 
31 #include <mach/board.h>
32 #include <mach/irqs.h>
33 #include <mach/sirc.h>
34 #include <mach/vreg.h>
36 
37 #include "devices.h"
38 #include "common.h"
39 
40 static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300;
41 static const unsigned qsd8x50_surf_smc91x_gpio __initconst = 156;
42 
43 /* Leave smc91x resources empty here, as we'll fill them in
44  * at run-time: they vary from board to board, and the true
45  * configuration won't be known until boot.
46  */
47 static struct resource smc91x_resources[] = {
48  [0] = {
49  .flags = IORESOURCE_MEM,
50  },
51  [1] = {
52  .flags = IORESOURCE_IRQ,
53  },
54 };
55 
56 static struct platform_device smc91x_device = {
57  .name = "smc91x",
58  .id = 0,
59  .num_resources = ARRAY_SIZE(smc91x_resources),
60  .resource = smc91x_resources,
61 };
62 
63 static int __init msm_init_smc91x(void)
64 {
65  if (machine_is_qsd8x50_surf()) {
66  smc91x_resources[0].start = qsd8x50_surf_smc91x_base;
67  smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff;
68  smc91x_resources[1].start =
69  gpio_to_irq(qsd8x50_surf_smc91x_gpio);
70  smc91x_resources[1].end =
71  gpio_to_irq(qsd8x50_surf_smc91x_gpio);
72  platform_device_register(&smc91x_device);
73  }
74 
75  return 0;
76 }
77 module_init(msm_init_smc91x);
78 
79 static int hsusb_phy_init_seq[] = {
80  0x08, 0x31, /* Increase HS Driver Amplitude */
81  0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */
82  -1
83 };
84 
85 static struct msm_otg_platform_data msm_otg_pdata = {
86  .phy_init_seq = hsusb_phy_init_seq,
87  .mode = USB_PERIPHERAL,
88  .otg_control = OTG_PHY_CONTROL,
89 };
90 
91 static struct platform_device *devices[] __initdata = {
97 };
98 
99 static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
100  {51, "sdc1_dat_3"},
101  {52, "sdc1_dat_2"},
102  {53, "sdc1_dat_1"},
103  {54, "sdc1_dat_0"},
104  {55, "sdc1_cmd"},
105  {56, "sdc1_clk"}
106 };
107 
108 static struct vreg *vreg_mmc;
109 static unsigned long vreg_sts;
110 
111 static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
112 {
113  int rc = 0;
114  struct platform_device *pdev;
115 
116  pdev = container_of(dv, struct platform_device, dev);
117 
118  if (vdd == 0) {
119  if (!vreg_sts)
120  return 0;
121 
122  clear_bit(pdev->id, &vreg_sts);
123 
124  if (!vreg_sts) {
125  rc = vreg_disable(vreg_mmc);
126  if (rc)
127  pr_err("vreg_mmc disable failed for slot "
128  "%d: %d\n", pdev->id, rc);
129  }
130  return 0;
131  }
132 
133  if (!vreg_sts) {
134  rc = vreg_set_level(vreg_mmc, 2900);
135  if (rc)
136  pr_err("vreg_mmc set level failed for slot %d: %d\n",
137  pdev->id, rc);
138  rc = vreg_enable(vreg_mmc);
139  if (rc)
140  pr_err("vreg_mmc enable failed for slot %d: %d\n",
141  pdev->id, rc);
142  }
143  set_bit(pdev->id, &vreg_sts);
144  return 0;
145 }
146 
147 static struct msm_mmc_gpio_data sdc1_gpio = {
148  .gpio = sdc1_gpio_cfg,
149  .size = ARRAY_SIZE(sdc1_gpio_cfg),
150 };
151 
152 static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
153  .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
154  .translate_vdd = msm_sdcc_setup_power,
155  .gpio_data = &sdc1_gpio,
156 };
157 
158 static void __init qsd8x50_init_mmc(void)
159 {
160  vreg_mmc = vreg_get(NULL, "gp5");
161 
162  if (IS_ERR(vreg_mmc)) {
163  pr_err("vreg get for vreg_mmc failed (%ld)\n",
164  PTR_ERR(vreg_mmc));
165  return;
166  }
167 
168  msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
169 }
170 
171 static void __init qsd8x50_map_io(void)
172 {
175 }
176 
177 static void __init qsd8x50_init_irq(void)
178 {
179  msm_init_irq();
180  msm_init_sirc();
181 }
182 
183 static void __init qsd8x50_init(void)
184 {
185  msm_device_otg.dev.platform_data = &msm_otg_pdata;
186  msm_device_hsusb.dev.parent = &msm_device_otg.dev;
187  msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
188  platform_add_devices(devices, ARRAY_SIZE(devices));
189  qsd8x50_init_mmc();
190 }
191 
192 static void __init qsd8x50_init_late(void)
193 {
194  smd_debugfs_init();
195 }
196 
197 MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
198  .atag_offset = 0x100,
199  .map_io = qsd8x50_map_io,
200  .init_irq = qsd8x50_init_irq,
201  .init_machine = qsd8x50_init,
202  .init_late = qsd8x50_init_late,
203  .timer = &qsd8x50_timer,
205 
206 MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
207  .atag_offset = 0x100,
208  .map_io = qsd8x50_map_io,
209  .init_irq = qsd8x50_init_irq,
210  .init_machine = qsd8x50_init,
211  .init_late = qsd8x50_init_late,
212  .timer = &qsd8x50_timer,