#include "../comedidev.h"
#include <linux/delay.h>
#include <linux/interrupt.h>
#include "8253.h"
#include "8255.h"
#include "amcc_s5933.h"
#include "comedi_fc.h"

Data Structures
struct	cb_pcidas_board

struct	cb_pcidas_private

Macros
#define	PCI_VENDOR_ID_CB 0x1307

#define	TIMER_BASE 100 /* 10MHz master clock */

#define	AI_BUFFER_SIZE 1024 /* max ai fifo size */

#define	AO_BUFFER_SIZE 1024 /* max ao fifo size */

#define	NUM_CHANNELS_8800 8

#define	NUM_CHANNELS_7376 1

#define	NUM_CHANNELS_8402 2

#define	NUM_CHANNELS_DAC08 1

#define	INT_ADCFIFO 0 /* INTERRUPT / ADC FIFO register */

#define	INT_EOS 0x1 /* int end of scan */

#define	INT_FHF 0x2 /* int fifo half full */

#define	INT_FNE 0x3 /* int fifo not empty */

#define	INT_MASK 0x3 /* mask of int select bits */

#define	INTE 0x4 /* int enable */

#define	DAHFIE 0x8 /* dac half full int enable */

#define	EOAIE 0x10 /* end of acq. int enable */

#define	DAHFI 0x20 /* dac half full status / clear */

#define	EOAI 0x40 /* end of acq. int status / clear */

#define	INT 0x80 /* int status / clear */

#define	EOBI 0x200 /* end of burst int status */

#define	ADHFI 0x400 /* half-full int status */

#define	ADNEI 0x800 /* fifo not empty int status (latch) */

#define	ADNE 0x1000 /* fifo not empty status (realtime) */

#define	DAEMIE 0x1000 /* dac empty int enable */

#define	LADFUL 0x2000 /* fifo overflow / clear */

#define	DAEMI 0x4000 /* dac fifo empty int status / clear */

#define	ADCMUX_CONT 2 /* ADC CHANNEL MUX AND CONTROL reg */

#define	BEGIN_SCAN(x) ((x) & 0xf)

#define	END_SCAN(x) (((x) & 0xf) << 4)

#define	GAIN_BITS(x) (((x) & 0x3) << 8)

#define	UNIP 0x800 /* Analog front-end unipolar mode */

#define	SE 0x400 /* Inputs in single-ended mode */

#define	PACER_MASK 0x3000 /* pacer source bits */

#define	PACER_INT 0x1000 /* int. pacer */

#define	PACER_EXT_FALL 0x2000 /* ext. falling edge */

#define	PACER_EXT_RISE 0x3000 /* ext. rising edge */

#define	EOC 0x4000 /* adc not busy */

#define	TRIG_CONTSTAT 4 /* TRIGGER CONTROL/STATUS register */

#define	SW_TRIGGER 0x1 /* software start trigger */

#define	EXT_TRIGGER 0x2 /* ext. start trigger */

#define	ANALOG_TRIGGER 0x3 /* ext. analog trigger */

#define	TRIGGER_MASK 0x3 /* start trigger mask */

#define	TGPOL 0x04 /* invert trigger (1602 only) */

#define	TGSEL 0x08 /* edge/level trigerred (1602 only) */

#define	TGEN 0x10 /* enable external start trigger */

#define	BURSTE 0x20 /* burst mode enable */

#define	XTRCL 0x80 /* clear external trigger */

#define	CALIBRATION_REG 6 /* CALIBRATION register */

#define	SELECT_8800_BIT 0x100 /* select 8800 caldac */

#define	SELECT_TRIMPOT_BIT 0x200 /* select ad7376 trim pot */

#define	SELECT_DAC08_BIT 0x400 /* select dac08 caldac */

#define	CAL_SRC_BITS(x) (((x) & 0x7) << 11)

#define	CAL_EN_BIT 0x4000 /* calibration source enable */

#define	SERIAL_DATA_IN_BIT 0x8000 /* serial data bit going to caldac */

#define	DAC_CSR 0x8 /* dac control and status register */

#define	DACEN 0x02 /* dac enable */

#define	DAC_MODE_UPDATE_BOTH 0x80 /* update both dacs */

#define	DAC_EMPTY 0x1 /* fifo empty, read, write clear */

#define	DAC_START 0x4 /* start/arm fifo operations */

#define	DAC_PACER_MASK 0x18 /* bits that set pacer source */

#define	DAC_PACER_INT 0x8 /* int. pacing */

#define	DAC_PACER_EXT_FALL 0x10 /* ext. pacing, falling edge */

#define	DAC_PACER_EXT_RISE 0x18 /* ext. pacing, rising edge */

#define	ADCDATA 0 /* ADC DATA register */

#define	ADCFIFOCLR 2 /* ADC FIFO CLEAR */

#define	ADC8254 0

#define	DIO_8255 4

#define	DAC8254 8

#define	DACDATA 0 /* DAC DATA register */

#define	DACFIFOCLR 2 /* DAC FIFO CLEAR */

#define	IS_UNIPOLAR 0x4 /* unipolar range mask */

Enumerations
enum	trimpot_model { AD7376, AD8402 }

Functions
	MODULE_DEVICE_TABLE (pci, cb_pcidas_pci_table)

	module_comedi_pci_driver (cb_pcidas_driver, cb_pcidas_pci_driver)

	MODULE_AUTHOR ("Comedi http://www.comedi.org")

	MODULE_DESCRIPTION ("Comedi low-level driver")

	MODULE_LICENSE ("GPL")

Macro Definition Documentation

#define ADC8254 0

Definition at line 173 of file cb_pcidas.c.

#define ADCDATA 0 /* ADC DATA register */

Definition at line 169 of file cb_pcidas.c.

#define ADCFIFOCLR 2 /* ADC FIFO CLEAR */

Definition at line 170 of file cb_pcidas.c.

#define ADCMUX_CONT 2 /* ADC CHANNEL MUX AND CONTROL reg */

Definition at line 110 of file cb_pcidas.c.

#define ADHFI 0x400 /* half-full int status */

Definition at line 103 of file cb_pcidas.c.

#define ADNE 0x1000 /* fifo not empty status (realtime) */

Definition at line 105 of file cb_pcidas.c.

#define ADNEI 0x800 /* fifo not empty int status (latch) */

Definition at line 104 of file cb_pcidas.c.

#define AI_BUFFER_SIZE 1024 /* max ai fifo size */

Definition at line 83 of file cb_pcidas.c.

#define ANALOG_TRIGGER 0x3 /* ext. analog trigger */

Definition at line 125 of file cb_pcidas.c.

#define AO_BUFFER_SIZE 1024 /* max ao fifo size */

Definition at line 84 of file cb_pcidas.c.

#define BEGIN_SCAN ( x ) ((x) & 0xf)

Definition at line 111 of file cb_pcidas.c.

#define BURSTE 0x20 /* burst mode enable */

Definition at line 130 of file cb_pcidas.c.

#define CAL_EN_BIT 0x4000 /* calibration source enable */

Definition at line 138 of file cb_pcidas.c.

#define CAL_SRC_BITS ( x ) (((x) & 0x7) << 11)

Definition at line 137 of file cb_pcidas.c.

#define CALIBRATION_REG 6 /* CALIBRATION register */

Definition at line 133 of file cb_pcidas.c.

#define DAC8254 8

Definition at line 175 of file cb_pcidas.c.

#define DAC_CSR 0x8 /* dac control and status register */

Definition at line 141 of file cb_pcidas.c.

#define DAC_EMPTY 0x1 /* fifo empty, read, write clear */

Definition at line 156 of file cb_pcidas.c.

#define DAC_MODE_UPDATE_BOTH 0x80 /* update both dacs */

Definition at line 143 of file cb_pcidas.c.

#define DAC_PACER_EXT_FALL 0x10 /* ext. pacing, falling edge */

Definition at line 160 of file cb_pcidas.c.

#define DAC_PACER_EXT_RISE 0x18 /* ext. pacing, rising edge */

Definition at line 161 of file cb_pcidas.c.

#define DAC_PACER_INT 0x8 /* int. pacing */

Definition at line 159 of file cb_pcidas.c.

#define DAC_PACER_MASK 0x18 /* bits that set pacer source */

Definition at line 158 of file cb_pcidas.c.

#define DAC_START 0x4 /* start/arm fifo operations */

Definition at line 157 of file cb_pcidas.c.

#define DACDATA 0 /* DAC DATA register */

Definition at line 184 of file cb_pcidas.c.

#define DACEN 0x02 /* dac enable */

Definition at line 142 of file cb_pcidas.c.

#define DACFIFOCLR 2 /* DAC FIFO CLEAR */

Definition at line 185 of file cb_pcidas.c.

#define DAEMI 0x4000 /* dac fifo empty int status / clear */

Definition at line 108 of file cb_pcidas.c.

#define DAEMIE 0x1000 /* dac empty int enable */

Definition at line 106 of file cb_pcidas.c.

#define DAHFI 0x20 /* dac half full status / clear */

Definition at line 99 of file cb_pcidas.c.

#define DAHFIE 0x8 /* dac half full int enable */

Definition at line 97 of file cb_pcidas.c.

#define DIO_8255 4

Definition at line 174 of file cb_pcidas.c.

#define END_SCAN ( x ) (((x) & 0xf) << 4)

Definition at line 112 of file cb_pcidas.c.

#define EOAI 0x40 /* end of acq. int status / clear */

Definition at line 100 of file cb_pcidas.c.

#define EOAIE 0x10 /* end of acq. int enable */

Definition at line 98 of file cb_pcidas.c.

#define EOBI 0x200 /* end of burst int status */

Definition at line 102 of file cb_pcidas.c.

#define EOC 0x4000 /* adc not busy */

Definition at line 120 of file cb_pcidas.c.

#define EXT_TRIGGER 0x2 /* ext. start trigger */

Definition at line 124 of file cb_pcidas.c.

#define GAIN_BITS ( x ) (((x) & 0x3) << 8)

Definition at line 113 of file cb_pcidas.c.

#define INT 0x80 /* int status / clear */

Definition at line 101 of file cb_pcidas.c.

#define INT_ADCFIFO 0 /* INTERRUPT / ADC FIFO register */

Definition at line 91 of file cb_pcidas.c.

#define INT_EOS 0x1 /* int end of scan */

Definition at line 92 of file cb_pcidas.c.

#define INT_FHF 0x2 /* int fifo half full */

Definition at line 93 of file cb_pcidas.c.

#define INT_FNE 0x3 /* int fifo not empty */

Definition at line 94 of file cb_pcidas.c.

#define INT_MASK 0x3 /* mask of int select bits */

Definition at line 95 of file cb_pcidas.c.

#define INTE 0x4 /* int enable */

Definition at line 96 of file cb_pcidas.c.

#define IS_UNIPOLAR 0x4 /* unipolar range mask */

Definition at line 187 of file cb_pcidas.c.

#define LADFUL 0x2000 /* fifo overflow / clear */

Definition at line 107 of file cb_pcidas.c.

#define NUM_CHANNELS_7376 1

Definition at line 86 of file cb_pcidas.c.

#define NUM_CHANNELS_8402 2

Definition at line 87 of file cb_pcidas.c.

#define NUM_CHANNELS_8800 8

Definition at line 85 of file cb_pcidas.c.

#define NUM_CHANNELS_DAC08 1

Definition at line 88 of file cb_pcidas.c.

#define PACER_EXT_FALL 0x2000 /* ext. falling edge */

Definition at line 118 of file cb_pcidas.c.

#define PACER_EXT_RISE 0x3000 /* ext. rising edge */

Definition at line 119 of file cb_pcidas.c.

#define PACER_INT 0x1000 /* int. pacer */

Definition at line 117 of file cb_pcidas.c.

#define PACER_MASK 0x3000 /* pacer source bits */

Definition at line 116 of file cb_pcidas.c.

#define PCI_VENDOR_ID_CB 0x1307

Definition at line 80 of file cb_pcidas.c.

#define SE 0x400 /* Inputs in single-ended mode */

Definition at line 115 of file cb_pcidas.c.

#define SELECT_8800_BIT 0x100 /* select 8800 caldac */

Definition at line 134 of file cb_pcidas.c.

#define SELECT_DAC08_BIT 0x400 /* select dac08 caldac */

Definition at line 136 of file cb_pcidas.c.

#define SELECT_TRIMPOT_BIT 0x200 /* select ad7376 trim pot */

Definition at line 135 of file cb_pcidas.c.

#define SERIAL_DATA_IN_BIT 0x8000 /* serial data bit going to caldac */

Definition at line 139 of file cb_pcidas.c.

#define SW_TRIGGER 0x1 /* software start trigger */

Definition at line 123 of file cb_pcidas.c.

#define TGEN 0x10 /* enable external start trigger */

Definition at line 129 of file cb_pcidas.c.

#define TGPOL 0x04 /* invert trigger (1602 only) */

Definition at line 127 of file cb_pcidas.c.

#define TGSEL 0x08 /* edge/level trigerred (1602 only) */

Definition at line 128 of file cb_pcidas.c.

#define TIMER_BASE 100 /* 10MHz master clock */

Definition at line 82 of file cb_pcidas.c.

#define TRIG_CONTSTAT 4 /* TRIGGER CONTROL/STATUS register */

Definition at line 122 of file cb_pcidas.c.

#define TRIGGER_MASK 0x3 /* start trigger mask */

Definition at line 126 of file cb_pcidas.c.

#define UNIP 0x800 /* Analog front-end unipolar mode */

Definition at line 114 of file cb_pcidas.c.

#define XTRCL 0x80 /* clear external trigger */

Definition at line 131 of file cb_pcidas.c.

Enumeration Type Documentation

enum trimpot_model

Enumerator:

AD7376
AD8402

Definition at line 230 of file cb_pcidas.c.

Function Documentation

MODULE_AUTHOR ( "Comedi http://www.comedi.org" )

module_comedi_pci_driver	(	cb_pcidas_driver	,
		cb_pcidas_pci_driver
	)

MODULE_DESCRIPTION ( "Comedi low-level driver" )

MODULE_DEVICE_TABLE	(	pci	,
		cb_pcidas_pci_table
	)

MODULE_LICENSE ( "GPL" )

Data Structures

Macros

Enumerations

Functions

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation