16 #include <linux/kernel.h>
18 #include <linux/list.h>
34 #define OMAP_CM_REGADDR OMAP2430_CM_REGADDR
54 static struct clk func_32k_ck = {
55 .name =
"func_32k_ck",
58 .clkdm_name =
"wkup_clkdm",
61 static struct clk secure_32k_ck = {
62 .name =
"secure_32k_ck",
65 .clkdm_name =
"wkup_clkdm",
69 static struct clk osc_ck = {
72 .clkdm_name =
"wkup_clkdm",
81 .clkdm_name =
"wkup_clkdm",
85 static struct clk alt_ck = {
89 .clkdm_name =
"wkup_clkdm",
93 static struct clk mcbsp_clks = {
107 static struct dpll_data dpll_dd = {
115 .max_multiplier = 1023,
124 static struct clk dpll_ck = {
128 .dpll_data = &dpll_dd,
129 .clkdm_name =
"wkup_clkdm",
134 static struct clk apll96_ck = {
140 .clkdm_name =
"wkup_clkdm",
145 static struct clk apll54_ck = {
151 .clkdm_name =
"wkup_clkdm",
162 static const struct clksel_rate func_54m_apll54_rates[] = {
163 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
167 static const struct clksel_rate func_54m_alt_rates[] = {
168 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
172 static const struct clksel func_54m_clksel[] = {
173 { .parent = &apll54_ck, .
rates = func_54m_apll54_rates, },
174 { .parent = &alt_ck, .
rates = func_54m_alt_rates, },
178 static struct clk func_54m_ck = {
179 .name =
"func_54m_ck",
181 .parent = &apll54_ck,
182 .clkdm_name =
"wkup_clkdm",
186 .clksel = func_54m_clksel,
190 static struct clk core_ck = {
194 .clkdm_name =
"wkup_clkdm",
199 static const struct clksel_rate func_96m_apll96_rates[] = {
200 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
204 static const struct clksel_rate func_96m_alt_rates[] = {
205 { .div = 1, .val = 1, .flags = RATE_IN_243X },
209 static const struct clksel func_96m_clksel[] = {
210 { .parent = &apll96_ck, .
rates = func_96m_apll96_rates },
211 { .parent = &alt_ck, .
rates = func_96m_alt_rates },
215 static struct clk func_96m_ck = {
216 .name =
"func_96m_ck",
218 .parent = &apll96_ck,
219 .clkdm_name =
"wkup_clkdm",
223 .clksel = func_96m_clksel,
229 static const struct clksel_rate func_48m_apll96_rates[] = {
230 { .div = 2, .val = 0, .flags = RATE_IN_24XX },
234 static const struct clksel_rate func_48m_alt_rates[] = {
235 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
239 static const struct clksel func_48m_clksel[] = {
240 { .parent = &apll96_ck, .
rates = func_48m_apll96_rates },
241 { .parent = &alt_ck, .
rates = func_48m_alt_rates },
245 static struct clk func_48m_ck = {
246 .name =
"func_48m_ck",
248 .parent = &apll96_ck,
249 .clkdm_name =
"wkup_clkdm",
253 .clksel = func_48m_clksel,
259 static struct clk func_12m_ck = {
260 .name =
"func_12m_ck",
262 .parent = &func_48m_ck,
264 .clkdm_name =
"wkup_clkdm",
269 static struct clk wdt1_osc_ck = {
270 .name =
"ck_wdt1_osc",
284 static const struct clksel_rate common_clkout_src_core_rates[] = {
285 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
289 static const struct clksel_rate common_clkout_src_sys_rates[] = {
290 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
294 static const struct clksel_rate common_clkout_src_96m_rates[] = {
295 { .div = 1, .val = 2, .flags = RATE_IN_24XX },
299 static const struct clksel_rate common_clkout_src_54m_rates[] = {
300 { .div = 1, .val = 3, .flags = RATE_IN_24XX },
304 static const struct clksel common_clkout_src_clksel[] = {
305 { .parent = &core_ck, .
rates = common_clkout_src_core_rates },
306 { .parent = &
sys_ck, .rates = common_clkout_src_sys_rates },
307 { .parent = &func_96m_ck, .
rates = common_clkout_src_96m_rates },
308 { .parent = &func_54m_ck, .
rates = common_clkout_src_54m_rates },
312 static struct clk sys_clkout_src = {
313 .name =
"sys_clkout_src",
315 .parent = &func_54m_ck,
316 .clkdm_name =
"wkup_clkdm",
322 .clksel = common_clkout_src_clksel,
328 static const struct clksel_rate common_clkout_rates[] = {
329 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
330 { .div = 2, .val = 1, .flags = RATE_IN_24XX },
331 { .div = 4, .val = 2, .flags = RATE_IN_24XX },
332 { .div = 8, .val = 3, .flags = RATE_IN_24XX },
333 { .div = 16, .val = 4, .flags = RATE_IN_24XX },
337 static const struct clksel sys_clkout_clksel[] = {
338 { .parent = &sys_clkout_src, .
rates = common_clkout_rates },
342 static struct clk sys_clkout = {
343 .name =
"sys_clkout",
345 .parent = &sys_clkout_src,
346 .clkdm_name =
"wkup_clkdm",
349 .clksel = sys_clkout_clksel,
355 static struct clk emul_ck = {
358 .parent = &func_54m_ck,
359 .clkdm_name =
"wkup_clkdm",
376 static const struct clksel_rate mpu_core_rates[] = {
377 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
378 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
382 static const struct clksel mpu_clksel[] = {
383 { .parent = &core_ck, .
rates = mpu_core_rates },
387 static struct clk mpu_ck = {
391 .clkdm_name =
"mpu_clkdm",
395 .clksel = mpu_clksel,
409 static const struct clksel_rate dsp_fck_core_rates[] = {
410 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
411 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
412 { .div = 3, .val = 3, .flags = RATE_IN_24XX },
413 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
417 static const struct clksel dsp_fck_clksel[] = {
418 { .parent = &core_ck, .
rates = dsp_fck_core_rates },
422 static struct clk dsp_fck = {
426 .clkdm_name =
"dsp_clkdm",
431 .clksel = dsp_fck_clksel,
435 static const struct clksel dsp_ick_clksel[] = {
441 static struct clk iva2_1_ick = {
442 .name =
"iva2_1_ick",
445 .clkdm_name =
"dsp_clkdm",
450 .clksel = dsp_ick_clksel,
473 static const struct clksel_rate core_l3_core_rates[] = {
474 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
475 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
476 { .div = 6, .val = 6, .flags = RATE_IN_24XX },
480 static const struct clksel core_l3_clksel[] = {
481 { .parent = &core_ck, .
rates = core_l3_core_rates },
485 static struct clk core_l3_ck = {
486 .name =
"core_l3_ck",
489 .clkdm_name =
"core_l3_clkdm",
492 .clksel = core_l3_clksel,
497 static const struct clksel_rate usb_l4_ick_core_l3_rates[] = {
498 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
499 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
500 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
504 static const struct clksel usb_l4_ick_clksel[] = {
505 { .parent = &core_l3_ck, .
rates = usb_l4_ick_core_l3_rates },
510 static struct clk usb_l4_ick = {
511 .name =
"usb_l4_ick",
513 .parent = &core_l3_ck,
514 .clkdm_name =
"core_l4_clkdm",
519 .clksel = usb_l4_ick_clksel,
530 static const struct clksel_rate l4_core_l3_rates[] = {
531 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
532 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
536 static const struct clksel l4_clksel[] = {
537 { .parent = &core_l3_ck, .
rates = l4_core_l3_rates },
541 static struct clk l4_ck = {
544 .parent = &core_l3_ck,
545 .clkdm_name =
"core_l4_clkdm",
560 static const struct clksel_rate ssi_ssr_sst_fck_core_rates[] = {
561 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
562 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
563 { .div = 3, .val = 3, .flags = RATE_IN_24XX },
564 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
565 { .div = 5, .val = 5, .flags = RATE_IN_243X },
569 static const struct clksel ssi_ssr_sst_fck_clksel[] = {
570 { .parent = &core_ck, .
rates = ssi_ssr_sst_fck_core_rates },
574 static struct clk ssi_ssr_sst_fck = {
578 .clkdm_name =
"core_l3_clkdm",
583 .clksel = ssi_ssr_sst_fck_clksel,
591 static struct clk ssi_l4_ick = {
592 .name =
"ssi_l4_ick",
595 .clkdm_name =
"core_l4_clkdm",
615 static const struct clksel gfx_fck_clksel[] = {
620 static struct clk gfx_3d_fck = {
621 .name =
"gfx_3d_fck",
623 .parent = &core_l3_ck,
624 .clkdm_name =
"gfx_clkdm",
629 .clksel = gfx_fck_clksel,
635 static struct clk gfx_2d_fck = {
636 .name =
"gfx_2d_fck",
638 .parent = &core_l3_ck,
639 .clkdm_name =
"gfx_clkdm",
644 .clksel = gfx_fck_clksel,
649 static struct clk gfx_ick = {
652 .parent = &core_l3_ck,
653 .clkdm_name =
"gfx_clkdm",
666 static const struct clksel_rate mdm_ick_core_rates[] = {
667 { .div = 1, .val = 1, .flags = RATE_IN_243X },
668 { .div = 4, .val = 4, .flags = RATE_IN_243X },
669 { .div = 6, .val = 6, .flags = RATE_IN_243X },
670 { .div = 9, .val = 9, .flags = RATE_IN_243X },
674 static const struct clksel mdm_ick_clksel[] = {
675 { .parent = &core_ck, .
rates = mdm_ick_core_rates },
679 static struct clk mdm_ick = {
683 .clkdm_name =
"mdm_clkdm",
688 .clksel = mdm_ick_clksel,
692 static struct clk mdm_osc_ck = {
693 .name =
"mdm_osc_ck",
696 .clkdm_name =
"mdm_clkdm",
712 static const struct clksel_rate dss1_fck_sys_rates[] = {
713 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
717 static const struct clksel_rate dss1_fck_core_rates[] = {
718 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
719 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
720 { .div = 3, .val = 3, .flags = RATE_IN_24XX },
721 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
722 { .div = 5, .val = 5, .flags = RATE_IN_24XX },
723 { .div = 6, .val = 6, .flags = RATE_IN_24XX },
724 { .div = 8, .val = 8, .flags = RATE_IN_24XX },
725 { .div = 9, .val = 9, .flags = RATE_IN_24XX },
726 { .div = 12, .val = 12, .flags = RATE_IN_24XX },
727 { .div = 16, .val = 16, .flags = RATE_IN_24XX },
731 static const struct clksel dss1_fck_clksel[] = {
732 { .parent = &
sys_ck, .rates = dss1_fck_sys_rates },
733 { .parent = &core_ck, .
rates = dss1_fck_core_rates },
737 static struct clk dss_ick = {
741 .clkdm_name =
"dss_clkdm",
747 static struct clk dss1_fck = {
751 .clkdm_name =
"dss_clkdm",
757 .clksel = dss1_fck_clksel,
761 static const struct clksel_rate dss2_fck_sys_rates[] = {
762 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
766 static const struct clksel_rate dss2_fck_48m_rates[] = {
767 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
771 static const struct clksel dss2_fck_clksel[] = {
772 { .parent = &
sys_ck, .rates = dss2_fck_sys_rates },
773 { .parent = &func_48m_ck, .
rates = dss2_fck_48m_rates },
777 static struct clk dss2_fck = {
781 .clkdm_name =
"dss_clkdm",
787 .clksel = dss2_fck_clksel,
791 static struct clk dss_54m_fck = {
792 .name =
"dss_54m_fck",
794 .parent = &func_54m_ck,
795 .clkdm_name =
"dss_clkdm",
801 static struct clk wu_l4_ick = {
805 .clkdm_name =
"wkup_clkdm",
815 static const struct clksel_rate gpt_alt_rates[] = {
816 { .div = 1, .val = 2, .flags = RATE_IN_24XX },
820 static const struct clksel omap24xx_gpt_clksel[] = {
823 { .parent = &alt_ck, .
rates = gpt_alt_rates },
827 static struct clk gpt1_ick = {
830 .parent = &wu_l4_ick,
831 .clkdm_name =
"wkup_clkdm",
837 static struct clk gpt1_fck = {
840 .parent = &func_32k_ck,
841 .clkdm_name =
"core_l4_clkdm",
847 .clksel = omap24xx_gpt_clksel,
853 static struct clk gpt2_ick = {
857 .clkdm_name =
"core_l4_clkdm",
863 static struct clk gpt2_fck = {
866 .parent = &func_32k_ck,
867 .clkdm_name =
"core_l4_clkdm",
873 .clksel = omap24xx_gpt_clksel,
877 static struct clk gpt3_ick = {
881 .clkdm_name =
"core_l4_clkdm",
887 static struct clk gpt3_fck = {
890 .parent = &func_32k_ck,
891 .clkdm_name =
"core_l4_clkdm",
897 .clksel = omap24xx_gpt_clksel,
901 static struct clk gpt4_ick = {
905 .clkdm_name =
"core_l4_clkdm",
911 static struct clk gpt4_fck = {
914 .parent = &func_32k_ck,
915 .clkdm_name =
"core_l4_clkdm",
921 .clksel = omap24xx_gpt_clksel,
925 static struct clk gpt5_ick = {
929 .clkdm_name =
"core_l4_clkdm",
935 static struct clk gpt5_fck = {
938 .parent = &func_32k_ck,
939 .clkdm_name =
"core_l4_clkdm",
945 .clksel = omap24xx_gpt_clksel,
949 static struct clk gpt6_ick = {
953 .clkdm_name =
"core_l4_clkdm",
959 static struct clk gpt6_fck = {
962 .parent = &func_32k_ck,
963 .clkdm_name =
"core_l4_clkdm",
969 .clksel = omap24xx_gpt_clksel,
973 static struct clk gpt7_ick = {
977 .clkdm_name =
"core_l4_clkdm",
983 static struct clk gpt7_fck = {
986 .parent = &func_32k_ck,
987 .clkdm_name =
"core_l4_clkdm",
993 .clksel = omap24xx_gpt_clksel,
997 static struct clk gpt8_ick = {
1001 .clkdm_name =
"core_l4_clkdm",
1007 static struct clk gpt8_fck = {
1010 .parent = &func_32k_ck,
1011 .clkdm_name =
"core_l4_clkdm",
1017 .clksel = omap24xx_gpt_clksel,
1021 static struct clk gpt9_ick = {
1025 .clkdm_name =
"core_l4_clkdm",
1031 static struct clk gpt9_fck = {
1034 .parent = &func_32k_ck,
1035 .clkdm_name =
"core_l4_clkdm",
1041 .clksel = omap24xx_gpt_clksel,
1045 static struct clk gpt10_ick = {
1046 .name =
"gpt10_ick",
1049 .clkdm_name =
"core_l4_clkdm",
1055 static struct clk gpt10_fck = {
1056 .name =
"gpt10_fck",
1058 .parent = &func_32k_ck,
1059 .clkdm_name =
"core_l4_clkdm",
1065 .clksel = omap24xx_gpt_clksel,
1069 static struct clk gpt11_ick = {
1070 .name =
"gpt11_ick",
1073 .clkdm_name =
"core_l4_clkdm",
1079 static struct clk gpt11_fck = {
1080 .name =
"gpt11_fck",
1082 .parent = &func_32k_ck,
1083 .clkdm_name =
"core_l4_clkdm",
1089 .clksel = omap24xx_gpt_clksel,
1093 static struct clk gpt12_ick = {
1094 .name =
"gpt12_ick",
1097 .clkdm_name =
"core_l4_clkdm",
1103 static struct clk gpt12_fck = {
1104 .name =
"gpt12_fck",
1106 .parent = &secure_32k_ck,
1107 .clkdm_name =
"core_l4_clkdm",
1113 .clksel = omap24xx_gpt_clksel,
1117 static struct clk mcbsp1_ick = {
1118 .name =
"mcbsp1_ick",
1121 .clkdm_name =
"core_l4_clkdm",
1127 static const struct clksel_rate common_mcbsp_96m_rates[] = {
1128 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
1132 static const struct clksel_rate common_mcbsp_mcbsp_rates[] = {
1133 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
1137 static const struct clksel mcbsp_fck_clksel[] = {
1138 { .parent = &func_96m_ck, .
rates = common_mcbsp_96m_rates },
1139 { .parent = &mcbsp_clks, .
rates = common_mcbsp_mcbsp_rates },
1143 static struct clk mcbsp1_fck = {
1144 .name =
"mcbsp1_fck",
1146 .parent = &func_96m_ck,
1148 .clkdm_name =
"core_l4_clkdm",
1153 .clksel = mcbsp_fck_clksel,
1157 static struct clk mcbsp2_ick = {
1158 .name =
"mcbsp2_ick",
1161 .clkdm_name =
"core_l4_clkdm",
1167 static struct clk mcbsp2_fck = {
1168 .name =
"mcbsp2_fck",
1170 .parent = &func_96m_ck,
1172 .clkdm_name =
"core_l4_clkdm",
1177 .clksel = mcbsp_fck_clksel,
1181 static struct clk mcbsp3_ick = {
1182 .name =
"mcbsp3_ick",
1185 .clkdm_name =
"core_l4_clkdm",
1191 static struct clk mcbsp3_fck = {
1192 .name =
"mcbsp3_fck",
1194 .parent = &func_96m_ck,
1196 .clkdm_name =
"core_l4_clkdm",
1201 .clksel = mcbsp_fck_clksel,
1205 static struct clk mcbsp4_ick = {
1206 .name =
"mcbsp4_ick",
1209 .clkdm_name =
"core_l4_clkdm",
1215 static struct clk mcbsp4_fck = {
1216 .name =
"mcbsp4_fck",
1218 .parent = &func_96m_ck,
1220 .clkdm_name =
"core_l4_clkdm",
1225 .clksel = mcbsp_fck_clksel,
1229 static struct clk mcbsp5_ick = {
1230 .name =
"mcbsp5_ick",
1233 .clkdm_name =
"core_l4_clkdm",
1239 static struct clk mcbsp5_fck = {
1240 .name =
"mcbsp5_fck",
1242 .parent = &func_96m_ck,
1244 .clkdm_name =
"core_l4_clkdm",
1249 .clksel = mcbsp_fck_clksel,
1253 static struct clk mcspi1_ick = {
1254 .name =
"mcspi1_ick",
1257 .clkdm_name =
"core_l4_clkdm",
1263 static struct clk mcspi1_fck = {
1264 .name =
"mcspi1_fck",
1266 .parent = &func_48m_ck,
1267 .clkdm_name =
"core_l4_clkdm",
1273 static struct clk mcspi2_ick = {
1274 .name =
"mcspi2_ick",
1277 .clkdm_name =
"core_l4_clkdm",
1283 static struct clk mcspi2_fck = {
1284 .name =
"mcspi2_fck",
1286 .parent = &func_48m_ck,
1287 .clkdm_name =
"core_l4_clkdm",
1293 static struct clk mcspi3_ick = {
1294 .name =
"mcspi3_ick",
1297 .clkdm_name =
"core_l4_clkdm",
1303 static struct clk mcspi3_fck = {
1304 .name =
"mcspi3_fck",
1306 .parent = &func_48m_ck,
1307 .clkdm_name =
"core_l4_clkdm",
1313 static struct clk uart1_ick = {
1314 .name =
"uart1_ick",
1317 .clkdm_name =
"core_l4_clkdm",
1323 static struct clk uart1_fck = {
1324 .name =
"uart1_fck",
1326 .parent = &func_48m_ck,
1327 .clkdm_name =
"core_l4_clkdm",
1333 static struct clk uart2_ick = {
1334 .name =
"uart2_ick",
1337 .clkdm_name =
"core_l4_clkdm",
1343 static struct clk uart2_fck = {
1344 .name =
"uart2_fck",
1346 .parent = &func_48m_ck,
1347 .clkdm_name =
"core_l4_clkdm",
1353 static struct clk uart3_ick = {
1354 .name =
"uart3_ick",
1357 .clkdm_name =
"core_l4_clkdm",
1363 static struct clk uart3_fck = {
1364 .name =
"uart3_fck",
1366 .parent = &func_48m_ck,
1367 .clkdm_name =
"core_l4_clkdm",
1373 static struct clk gpios_ick = {
1374 .name =
"gpios_ick",
1376 .parent = &wu_l4_ick,
1377 .clkdm_name =
"wkup_clkdm",
1383 static struct clk gpios_fck = {
1384 .name =
"gpios_fck",
1386 .parent = &func_32k_ck,
1387 .clkdm_name =
"wkup_clkdm",
1393 static struct clk mpu_wdt_ick = {
1394 .name =
"mpu_wdt_ick",
1396 .parent = &wu_l4_ick,
1397 .clkdm_name =
"wkup_clkdm",
1403 static struct clk mpu_wdt_fck = {
1404 .name =
"mpu_wdt_fck",
1406 .parent = &func_32k_ck,
1407 .clkdm_name =
"wkup_clkdm",
1413 static struct clk sync_32k_ick = {
1414 .name =
"sync_32k_ick",
1417 .parent = &wu_l4_ick,
1418 .clkdm_name =
"wkup_clkdm",
1424 static struct clk wdt1_ick = {
1427 .parent = &wu_l4_ick,
1428 .clkdm_name =
"wkup_clkdm",
1434 static struct clk omapctrl_ick = {
1435 .name =
"omapctrl_ick",
1438 .parent = &wu_l4_ick,
1439 .clkdm_name =
"wkup_clkdm",
1445 static struct clk icr_ick = {
1448 .parent = &wu_l4_ick,
1449 .clkdm_name =
"wkup_clkdm",
1455 static struct clk cam_ick = {
1459 .clkdm_name =
"core_l4_clkdm",
1470 static struct clk cam_fck = {
1473 .parent = &func_96m_ck,
1474 .clkdm_name =
"core_l3_clkdm",
1480 static struct clk mailboxes_ick = {
1481 .name =
"mailboxes_ick",
1484 .clkdm_name =
"core_l4_clkdm",
1490 static struct clk wdt4_ick = {
1494 .clkdm_name =
"core_l4_clkdm",
1500 static struct clk wdt4_fck = {
1503 .parent = &func_32k_ck,
1504 .clkdm_name =
"core_l4_clkdm",
1510 static struct clk mspro_ick = {
1511 .name =
"mspro_ick",
1514 .clkdm_name =
"core_l4_clkdm",
1520 static struct clk mspro_fck = {
1521 .name =
"mspro_fck",
1523 .parent = &func_96m_ck,
1524 .clkdm_name =
"core_l4_clkdm",
1530 static struct clk fac_ick = {
1534 .clkdm_name =
"core_l4_clkdm",
1540 static struct clk fac_fck = {
1543 .parent = &func_12m_ck,
1544 .clkdm_name =
"core_l4_clkdm",
1550 static struct clk hdq_ick = {
1554 .clkdm_name =
"core_l4_clkdm",
1560 static struct clk hdq_fck = {
1563 .parent = &func_12m_ck,
1564 .clkdm_name =
"core_l4_clkdm",
1574 static struct clk i2c2_ick = {
1578 .clkdm_name =
"core_l4_clkdm",
1584 static struct clk i2chs2_fck = {
1585 .name =
"i2chs2_fck",
1587 .parent = &func_96m_ck,
1588 .clkdm_name =
"core_l4_clkdm",
1598 static struct clk i2c1_ick = {
1602 .clkdm_name =
"core_l4_clkdm",
1608 static struct clk i2chs1_fck = {
1609 .name =
"i2chs1_fck",
1611 .parent = &func_96m_ck,
1612 .clkdm_name =
"core_l4_clkdm",
1622 static struct clk gpmc_fck = {
1625 .parent = &core_l3_ck,
1627 .clkdm_name =
"core_l3_clkdm",
1633 static struct clk sdma_fck = {
1636 .parent = &core_l3_ck,
1637 .clkdm_name =
"core_l3_clkdm",
1645 static struct clk sdma_ick = {
1648 .parent = &core_l3_ck,
1649 .clkdm_name =
"core_l3_clkdm",
1655 static struct clk sdrc_ick = {
1658 .parent = &core_l3_ck,
1660 .clkdm_name =
"core_l3_clkdm",
1666 static struct clk des_ick = {
1670 .clkdm_name =
"core_l4_clkdm",
1676 static struct clk sha_ick = {
1680 .clkdm_name =
"core_l4_clkdm",
1686 static struct clk rng_ick = {
1690 .clkdm_name =
"core_l4_clkdm",
1696 static struct clk aes_ick = {
1700 .clkdm_name =
"core_l4_clkdm",
1706 static struct clk pka_ick = {
1710 .clkdm_name =
"core_l4_clkdm",
1716 static struct clk usb_fck = {
1719 .parent = &func_48m_ck,
1720 .clkdm_name =
"core_l3_clkdm",
1726 static struct clk usbhs_ick = {
1727 .name =
"usbhs_ick",
1729 .parent = &core_l3_ck,
1730 .clkdm_name =
"core_l3_clkdm",
1736 static struct clk mmchs1_ick = {
1737 .name =
"mmchs1_ick",
1740 .clkdm_name =
"core_l4_clkdm",
1746 static struct clk mmchs1_fck = {
1747 .name =
"mmchs1_fck",
1749 .parent = &func_96m_ck,
1750 .clkdm_name =
"core_l4_clkdm",
1756 static struct clk mmchs2_ick = {
1757 .name =
"mmchs2_ick",
1760 .clkdm_name =
"core_l4_clkdm",
1766 static struct clk mmchs2_fck = {
1767 .name =
"mmchs2_fck",
1769 .parent = &func_96m_ck,
1770 .clkdm_name =
"core_l4_clkdm",
1776 static struct clk gpio5_ick = {
1777 .name =
"gpio5_ick",
1780 .clkdm_name =
"core_l4_clkdm",
1786 static struct clk gpio5_fck = {
1787 .name =
"gpio5_fck",
1789 .parent = &func_32k_ck,
1790 .clkdm_name =
"core_l4_clkdm",
1796 static struct clk mdm_intc_ick = {
1797 .name =
"mdm_intc_ick",
1800 .clkdm_name =
"core_l4_clkdm",
1806 static struct clk mmchsdb1_fck = {
1807 .name =
"mmchsdb1_fck",
1809 .parent = &func_32k_ck,
1810 .clkdm_name =
"core_l4_clkdm",
1816 static struct clk mmchsdb2_fck = {
1817 .name =
"mmchsdb2_fck",
1819 .parent = &func_32k_ck,
1820 .clkdm_name =
"core_l4_clkdm",
1840 static struct clk virt_prcm_set = {
1841 .name =
"virt_prcm_set",
1854 static struct omap_clk omap2430_clks[] = {
1890 CLK(
"omapdss_dss",
"ick", &dss_ick,
CK_243X),
1930 CLK(
"omap-mcbsp.1",
"ick", &mcbsp1_ick,
CK_243X),
1933 CLK(
"omap-mcbsp.2",
"ick", &mcbsp2_ick,
CK_243X),
1936 CLK(
"omap-mcbsp.3",
"ick", &mcbsp3_ick,
CK_243X),
1939 CLK(
"omap-mcbsp.4",
"ick", &mcbsp4_ick,
CK_243X),
1942 CLK(
"omap-mcbsp.5",
"ick", &mcbsp5_ick,
CK_243X),
1945 CLK(
"omap2_mcspi.1",
"ick", &mcspi1_ick,
CK_243X),
1948 CLK(
"omap2_mcspi.2",
"ick", &mcspi2_ick,
CK_243X),
1951 CLK(
"omap2_mcspi.3",
"ick", &mcspi3_ick,
CK_243X),
1962 CLK(
"omap_wdt",
"ick", &mpu_wdt_ick,
CK_243X),
1969 CLK(
"omap24xxcam",
"fck", &cam_fck,
CK_243X),
1971 CLK(
"omap24xxcam",
"ick", &cam_ick,
CK_243X),
1984 CLK(
"omap_i2c.1",
"ick", &i2c1_ick,
CK_243X),
1987 CLK(
"omap_i2c.2",
"ick", &i2c2_ick,
CK_243X),
2001 CLK(
"musb-omap2430",
"ick", &usbhs_ick,
CK_243X),
2003 CLK(
"omap_hsmmc.0",
"ick", &mmchs1_ick,
CK_243X),
2006 CLK(
"omap_hsmmc.1",
"ick", &mmchs2_ick,
CK_243X),
2012 CLK(
"omap_hsmmc.0",
"mmchsdb_fck", &mmchsdb1_fck,
CK_243X),
2014 CLK(
"omap_hsmmc.1",
"mmchsdb_fck", &mmchsdb2_fck,
CK_243X),
2039 for (c = omap2430_clks; c < omap2430_clks +
ARRAY_SIZE(omap2430_clks);
2048 for (c = omap2430_clks; c < omap2430_clks +
ARRAY_SIZE(omap2430_clks);
2072 pr_info(
"Clocking rate (Crystal/DPLL/MPU): %ld.%01ld/%ld/%ld MHz\n",
2073 (sys_ck.
rate / 1000000), (sys_ck.
rate / 100000) % 10,
2074 (dpll_ck.
rate / 1000000), (mpu_ck.
rate / 1000000)) ;