Linux Kernel
3.7.1
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#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>
#include <asm/apollohw.h>
#include <linux/fb.h>
#include <linux/module.h>
Go to the source code of this file.
Macros | |
#define | AP_IOBASE 0x3b0 /* Base address of 1 plane board. */ |
#define | AP_STATUS isaIO2mem(AP_IOBASE+0) /* Status register. Read */ |
#define | AP_WRITE_ENABLE isaIO2mem(AP_IOBASE+0) /* Write Enable Register Write */ |
#define | AP_DEVICE_ID isaIO2mem(AP_IOBASE+1) /* Device ID Register. Read */ |
#define | AP_ROP_1 isaIO2mem(AP_IOBASE+2) /* Raster Operation reg. Write Word */ |
#define | AP_DIAG_MEM_REQ isaIO2mem(AP_IOBASE+4) /* Diagnostic Memory Request. Write Word */ |
#define | AP_CONTROL_0 isaIO2mem(AP_IOBASE+8) /* Control Register 0. Read/Write */ |
#define | AP_CONTROL_1 isaIO2mem(AP_IOBASE+0xa) /* Control Register 1. Read/Write */ |
#define | AP_CONTROL_3A isaIO2mem(AP_IOBASE+0xe) /* Control Register 3a. Read/Write */ |
#define | AP_CONTROL_2 isaIO2mem(AP_IOBASE+0xc) /* Control Register 2. Read/Write */ |
#define | FRAME_BUFFER_START 0x0FA0000 |
#define | FRAME_BUFFER_LEN 0x40000 |
#define | VECTOR_MODE 0x40 /* 010x.xxxx */ |
#define | DBLT_MODE 0x80 /* 100x.xxxx */ |
#define | NORMAL_MODE 0xE0 /* 111x.xxxx */ |
#define | SHIFT_BITS 0x1F /* xxx1.1111 */ |
#define | AD_BLT 0x80 /* 1xxx.xxxx */ |
#define | NORMAL 0x80 /* 1xxx.xxxx */ /* What is happening here ?? */ |
#define | INVERSE 0x00 /* 0xxx.xxxx */ /* Clearing this reverses the screen */ |
#define | PIX_BLT 0x00 /* 0xxx.xxxx */ |
#define | AD_HIBIT 0x40 /* xIxx.xxxx */ |
#define | ROP_EN 0x10 /* xxx1.xxxx */ |
#define | DST_EQ_SRC 0x00 /* xxx0.xxxx */ |
#define | nRESET_SYNC 0x08 /* xxxx.1xxx */ |
#define | SYNC_ENAB 0x02 /* xxxx.xx1x */ |
#define | BLANK_DISP 0x00 /* xxxx.xxx0 */ |
#define | ENAB_DISP 0x01 /* xxxx.xxx1 */ |
#define | NORM_CREG1 (nRESET_SYNC | SYNC_ENAB | ENAB_DISP) /* no reset sync */ |
#define | S_DATA_1s 0x00 /* 00xx.xxxx */ /* set source to all 1's -- vector drawing */ |
#define | S_DATA_PIX 0x40 /* 01xx.xxxx */ /* takes source from ls-bits and replicates over 16 bits */ |
#define | S_DATA_PLN |
#define | RESET_CREG 0x80 /* 1000.0000 */ |
#define | ROP(r2, r3, r0, r1) ( (U_SHORT)((r0)|((r1)<<4)|((r2)<<8)|((r3)<<12)) ) |
#define | DEST_ZERO 0x0 |
#define | SRC_AND_DEST 0x1 |
#define | SRC_AND_nDEST 0x2 |
#define | SRC 0x3 |
#define | nSRC_AND_DEST 0x4 |
#define | DEST 0x5 |
#define | SRC_XOR_DEST 0x6 |
#define | SRC_OR_DEST 0x7 |
#define | SRC_NOR_DEST 0x8 |
#define | SRC_XNOR_DEST 0x9 |
#define | nDEST 0xA |
#define | SRC_OR_nDEST 0xB |
#define | nSRC 0xC |
#define | nSRC_OR_DEST 0xD |
#define | SRC_NAND_DEST 0xE |
#define | DEST_ONE 0xF |
#define | SWAP(A) ((A>>8) | ((A&0xff) <<8)) |
Functions | |
int __init | dnfb_init (void) |
module_init (dnfb_init) | |
MODULE_LICENSE ("GPL") | |
Variables | |
struct fb_var_screeninfo dnfb_var | __devinitdata |
#define INVERSE 0x00 /* 0xxx.xxxx */ /* Clearing this reverses the screen */ |
#define NORMAL 0x80 /* 1xxx.xxxx */ /* What is happening here ?? */ |
#define S_DATA_1s 0x00 /* 00xx.xxxx */ /* set source to all 1's -- vector drawing */ |
#define S_DATA_PIX 0x40 /* 01xx.xxxx */ /* takes source from ls-bits and replicates over 16 bits */ |
#define S_DATA_PLN |
module_init | ( | dnfb_init | ) |
MODULE_LICENSE | ( | "GPL" | ) |
struct fb_fix_screeninfo dnfb_fix __devinitdata |