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pmac.c File Reference
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/ide.h>
#include <linux/notifier.h>
#include <linux/module.h>
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/adb.h>
#include <linux/pmu.h>
#include <linux/scatterlist.h>
#include <linux/slab.h>
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/dbdma.h>
#include <asm/ide.h>
#include <asm/pci-bridge.h>
#include <asm/machdep.h>
#include <asm/pmac_feature.h>
#include <asm/sections.h>
#include <asm/irq.h>
#include <asm/mediabay.h>

Go to the source code of this file.

Data Structures

struct  pmac_ide_hwif
 
struct  mdma_timings_t
 
struct  kauai_timing
 

Macros

#define DRV_NAME   "ide-pmac"
 
#define DMA_WAIT_TIMEOUT   50
 
#define IDE_TIMING_CONFIG   0x200
 
#define IDE_INTERRUPT   0x300
 
#define IDE_KAUAI_PIO_CONFIG   0x200
 
#define IDE_KAUAI_ULTRA_CONFIG   0x210
 
#define IDE_KAUAI_POLL_CONFIG   0x220
 
#define SYSCLK_TICKS(t)   (((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS)
 
#define SYSCLK_TICKS_66(t)   (((t) + IDE_SYSCLK_66_NS - 1) / IDE_SYSCLK_66_NS)
 
#define IDE_SYSCLK_NS   30 /* 33Mhz cell */
 
#define IDE_SYSCLK_66_NS   15 /* 66Mhz cell */
 
#define TR_133_PIOREG_PIO_MASK   0xff000fff
 
#define TR_133_PIOREG_MDMA_MASK   0x00fff800
 
#define TR_133_UDMAREG_UDMA_MASK   0x0003ffff
 
#define TR_133_UDMAREG_UDMA_EN   0x00000001
 
#define TR_100_PIOREG_PIO_MASK   0xff000fff
 
#define TR_100_PIOREG_MDMA_MASK   0x00fff000
 
#define TR_100_UDMAREG_UDMA_MASK   0x0000ffff
 
#define TR_100_UDMAREG_UDMA_EN   0x00000001
 
#define TR_66_UDMA_MASK   0xfff00000
 
#define TR_66_UDMA_EN   0x00100000 /* Enable Ultra mode for DMA */
 
#define TR_66_UDMA_ADDRSETUP_MASK   0xe0000000 /* Address setup */
 
#define TR_66_UDMA_ADDRSETUP_SHIFT   29
 
#define TR_66_UDMA_RDY2PAUS_MASK   0x1e000000 /* Ready 2 pause time */
 
#define TR_66_UDMA_RDY2PAUS_SHIFT   25
 
#define TR_66_UDMA_WRDATASETUP_MASK   0x01e00000 /* Write data setup time */
 
#define TR_66_UDMA_WRDATASETUP_SHIFT   21
 
#define TR_66_MDMA_MASK   0x000ffc00
 
#define TR_66_MDMA_RECOVERY_MASK   0x000f8000
 
#define TR_66_MDMA_RECOVERY_SHIFT   15
 
#define TR_66_MDMA_ACCESS_MASK   0x00007c00
 
#define TR_66_MDMA_ACCESS_SHIFT   10
 
#define TR_66_PIO_MASK   0x000003ff
 
#define TR_66_PIO_RECOVERY_MASK   0x000003e0
 
#define TR_66_PIO_RECOVERY_SHIFT   5
 
#define TR_66_PIO_ACCESS_MASK   0x0000001f
 
#define TR_66_PIO_ACCESS_SHIFT   0
 
#define TR_33_MDMA_MASK   0x003ff800
 
#define TR_33_MDMA_RECOVERY_MASK   0x001f0000
 
#define TR_33_MDMA_RECOVERY_SHIFT   16
 
#define TR_33_MDMA_ACCESS_MASK   0x0000f800
 
#define TR_33_MDMA_ACCESS_SHIFT   11
 
#define TR_33_MDMA_HALFTICK   0x00200000
 
#define TR_33_PIO_MASK   0x000007ff
 
#define TR_33_PIO_E   0x00000400
 
#define TR_33_PIO_RECOVERY_MASK   0x000003e0
 
#define TR_33_PIO_RECOVERY_SHIFT   5
 
#define TR_33_PIO_ACCESS_MASK   0x0000001f
 
#define TR_33_PIO_ACCESS_SHIFT   0
 
#define IDE_INTR_DMA   0x80000000
 
#define IDE_INTR_DEVICE   0x40000000
 
#define KAUAI_FCR_UATA_MAGIC   0x00000004
 
#define KAUAI_FCR_UATA_RESET_N   0x00000002
 
#define KAUAI_FCR_UATA_ENABLE   0x00000001
 
#define MAX_DCMDS   256
 
#define IDE_WAKEUP_DELAY   (1*HZ)
 
#define PMAC_IDE_REG(x)   ((void __iomem *)((drive)->hwif->io_ports.data_addr + (x)))
 

Typedefs

typedef struct pmac_ide_hwif pmac_ide_hwif_t
 

Enumerations

enum  {
  controller_ohare, controller_heathrow, controller_kl_ata3, controller_kl_ata4,
  controller_un_ata6, controller_k2_ata6, controller_sh_ata6
}
 

Functions

 MODULE_DEVICE_TABLE (pci, pmac_ide_pci_match)
 
int __init pmac_ide_probe (void)
 
 module_init (pmac_ide_probe)
 
 MODULE_LICENSE ("GPL")
 

Variables

struct mdma_timings_t mdma_timings_33 []
 
struct mdma_timings_t mdma_timings_33k []
 
struct mdma_timings_t mdma_timings_66 []
 
struct {
   int   addrSetup
 
   int   rdy2pause
 
   int   wrDataSetup
 
kl66_udma_timings []
 

Macro Definition Documentation

#define DMA_WAIT_TIMEOUT   50

Definition at line 54 of file pmac.c.

#define DRV_NAME   "ide-pmac"

Definition at line 50 of file pmac.c.

#define IDE_INTERRUPT   0x300

Definition at line 102 of file pmac.c.

#define IDE_INTR_DEVICE   0x40000000

Definition at line 213 of file pmac.c.

#define IDE_INTR_DMA   0x80000000

Definition at line 212 of file pmac.c.

#define IDE_KAUAI_PIO_CONFIG   0x200

Definition at line 105 of file pmac.c.

#define IDE_KAUAI_POLL_CONFIG   0x220

Definition at line 107 of file pmac.c.

#define IDE_KAUAI_ULTRA_CONFIG   0x210

Definition at line 106 of file pmac.c.

#define IDE_SYSCLK_66_NS   15 /* 66Mhz cell */

Definition at line 117 of file pmac.c.

#define IDE_SYSCLK_NS   30 /* 33Mhz cell */

Definition at line 116 of file pmac.c.

#define IDE_TIMING_CONFIG   0x200

Definition at line 101 of file pmac.c.

#define IDE_WAKEUP_DELAY   (1*HZ)

Definition at line 404 of file pmac.c.

#define KAUAI_FCR_UATA_ENABLE   0x00000001

Definition at line 220 of file pmac.c.

#define KAUAI_FCR_UATA_MAGIC   0x00000004

Definition at line 218 of file pmac.c.

#define KAUAI_FCR_UATA_RESET_N   0x00000002

Definition at line 219 of file pmac.c.

#define MAX_DCMDS   256

Definition at line 390 of file pmac.c.

#define PMAC_IDE_REG (   x)    ((void __iomem *)((drive)->hwif->io_ports.data_addr + (x)))

Definition at line 408 of file pmac.c.

#define SYSCLK_TICKS (   t)    (((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS)

Definition at line 114 of file pmac.c.

#define SYSCLK_TICKS_66 (   t)    (((t) + IDE_SYSCLK_66_NS - 1) / IDE_SYSCLK_66_NS)

Definition at line 115 of file pmac.c.

#define TR_100_PIOREG_MDMA_MASK   0x00fff000

Definition at line 145 of file pmac.c.

#define TR_100_PIOREG_PIO_MASK   0xff000fff

Definition at line 144 of file pmac.c.

#define TR_100_UDMAREG_UDMA_EN   0x00000001

Definition at line 147 of file pmac.c.

#define TR_100_UDMAREG_UDMA_MASK   0x0000ffff

Definition at line 146 of file pmac.c.

#define TR_133_PIOREG_MDMA_MASK   0x00fff800

Definition at line 124 of file pmac.c.

#define TR_133_PIOREG_PIO_MASK   0xff000fff

Definition at line 123 of file pmac.c.

#define TR_133_UDMAREG_UDMA_EN   0x00000001

Definition at line 126 of file pmac.c.

#define TR_133_UDMAREG_UDMA_MASK   0x0003ffff

Definition at line 125 of file pmac.c.

#define TR_33_MDMA_ACCESS_MASK   0x0000f800

Definition at line 199 of file pmac.c.

#define TR_33_MDMA_ACCESS_SHIFT   11

Definition at line 200 of file pmac.c.

#define TR_33_MDMA_HALFTICK   0x00200000

Definition at line 201 of file pmac.c.

#define TR_33_MDMA_MASK   0x003ff800

Definition at line 196 of file pmac.c.

#define TR_33_MDMA_RECOVERY_MASK   0x001f0000

Definition at line 197 of file pmac.c.

#define TR_33_MDMA_RECOVERY_SHIFT   16

Definition at line 198 of file pmac.c.

#define TR_33_PIO_ACCESS_MASK   0x0000001f

Definition at line 206 of file pmac.c.

#define TR_33_PIO_ACCESS_SHIFT   0

Definition at line 207 of file pmac.c.

#define TR_33_PIO_E   0x00000400

Definition at line 203 of file pmac.c.

#define TR_33_PIO_MASK   0x000007ff

Definition at line 202 of file pmac.c.

#define TR_33_PIO_RECOVERY_MASK   0x000003e0

Definition at line 204 of file pmac.c.

#define TR_33_PIO_RECOVERY_SHIFT   5

Definition at line 205 of file pmac.c.

#define TR_66_MDMA_ACCESS_MASK   0x00007c00

Definition at line 177 of file pmac.c.

#define TR_66_MDMA_ACCESS_SHIFT   10

Definition at line 178 of file pmac.c.

#define TR_66_MDMA_MASK   0x000ffc00

Definition at line 174 of file pmac.c.

#define TR_66_MDMA_RECOVERY_MASK   0x000f8000

Definition at line 175 of file pmac.c.

#define TR_66_MDMA_RECOVERY_SHIFT   15

Definition at line 176 of file pmac.c.

#define TR_66_PIO_ACCESS_MASK   0x0000001f

Definition at line 182 of file pmac.c.

#define TR_66_PIO_ACCESS_SHIFT   0

Definition at line 183 of file pmac.c.

#define TR_66_PIO_MASK   0x000003ff

Definition at line 179 of file pmac.c.

#define TR_66_PIO_RECOVERY_MASK   0x000003e0

Definition at line 180 of file pmac.c.

#define TR_66_PIO_RECOVERY_SHIFT   5

Definition at line 181 of file pmac.c.

#define TR_66_UDMA_ADDRSETUP_MASK   0xe0000000 /* Address setup */

Definition at line 168 of file pmac.c.

#define TR_66_UDMA_ADDRSETUP_SHIFT   29

Definition at line 169 of file pmac.c.

#define TR_66_UDMA_EN   0x00100000 /* Enable Ultra mode for DMA */

Definition at line 167 of file pmac.c.

#define TR_66_UDMA_MASK   0xfff00000

Definition at line 166 of file pmac.c.

#define TR_66_UDMA_RDY2PAUS_MASK   0x1e000000 /* Ready 2 pause time */

Definition at line 170 of file pmac.c.

#define TR_66_UDMA_RDY2PAUS_SHIFT   25

Definition at line 171 of file pmac.c.

#define TR_66_UDMA_WRDATASETUP_MASK   0x01e00000 /* Write data setup time */

Definition at line 172 of file pmac.c.

#define TR_66_UDMA_WRDATASETUP_SHIFT   21

Definition at line 173 of file pmac.c.

Typedef Documentation

Enumeration Type Documentation

anonymous enum
Enumerator:
controller_ohare 
controller_heathrow 
controller_kl_ata3 
controller_kl_ata4 
controller_un_ata6 
controller_k2_ata6 
controller_sh_ata6 

Definition at line 78 of file pmac.c.

Function Documentation

MODULE_DEVICE_TABLE ( pci  ,
pmac_ide_pci_match   
)
module_init ( pmac_ide_probe  )
MODULE_LICENSE ( "GPL"  )
int __init pmac_ide_probe ( void  )

Definition at line 1435 of file pmac.c.

Variable Documentation

int addrSetup

Definition at line 275 of file pmac.c.

struct { ... } kl66_udma_timings[]
Initial value:
=
{
{ 0, 180, 120 },
{ 0, 150, 90 },
{ 0, 120, 60 },
{ 0, 90, 45 },
{ 0, 90, 30 }
}
struct mdma_timings_t mdma_timings_33[]
Initial value:
=
{
{ 240, 240, 480 },
{ 180, 180, 360 },
{ 135, 135, 270 },
{ 120, 120, 240 },
{ 105, 105, 210 },
{ 90, 90, 180 },
{ 75, 75, 150 },
{ 75, 45, 120 },
{ 0, 0, 0 }
}

Definition at line 234 of file pmac.c.

struct mdma_timings_t mdma_timings_33k[]
Initial value:
=
{
{ 240, 240, 480 },
{ 180, 180, 360 },
{ 150, 150, 300 },
{ 120, 120, 240 },
{ 90, 120, 210 },
{ 90, 90, 180 },
{ 90, 60, 150 },
{ 90, 30, 120 },
{ 0, 0, 0 }
}

Definition at line 247 of file pmac.c.

struct mdma_timings_t mdma_timings_66[]
Initial value:
=
{
{ 240, 240, 480 },
{ 180, 180, 360 },
{ 135, 135, 270 },
{ 120, 120, 240 },
{ 105, 105, 210 },
{ 90, 90, 180 },
{ 90, 75, 165 },
{ 75, 45, 120 },
{ 0, 0, 0 }
}

Definition at line 260 of file pmac.c.

int rdy2pause

Definition at line 276 of file pmac.c.

int wrDataSetup

Definition at line 277 of file pmac.c.