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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <linux/etherdevice.h>#include <linux/netdevice.h>#include <linux/phy.h>#include <linux/module.h>#include <linux/init.h>#include "descs.h"#include "mmc.h"Go to the source code of this file.
Data Structures | |
| struct | stmmac_extra_stats |
| struct | dma_features |
| struct | stmmac_desc_ops |
| struct | stmmac_dma_ops |
| struct | stmmac_ops |
| struct | mac_link |
| struct | mii_regs |
| struct | stmmac_ring_mode_ops |
| struct | mac_device_info |
Macros | |
| #define | CHIP_DBG(fmt, args...) do { } while (0) |
| #define | CSR_F_35M 35000000 |
| #define | CSR_F_60M 60000000 |
| #define | CSR_F_100M 100000000 |
| #define | CSR_F_150M 150000000 |
| #define | CSR_F_250M 250000000 |
| #define | CSR_F_300M 300000000 |
| #define | MAC_CSR_H_FRQ_MASK 0x20 |
| #define | HASH_TABLE_SIZE 64 |
| #define | PAUSE_TIME 0x200 |
| #define | FLOW_OFF 0 |
| #define | FLOW_RX 1 |
| #define | FLOW_TX 2 |
| #define | FLOW_AUTO (FLOW_TX | FLOW_RX) |
| #define | SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */ |
| #define | DMA_HW_FEAT_MIISEL 0x00000001 /* 10/100 Mbps Support */ |
| #define | DMA_HW_FEAT_GMIISEL 0x00000002 /* 1000 Mbps Support */ |
| #define | DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */ |
| #define | DMA_HW_FEAT_EXTHASHEN 0x00000008 /* Expanded DA Hash Filter */ |
| #define | DMA_HW_FEAT_HASHSEL 0x00000010 /* HASH Filter */ |
| #define | DMA_HW_FEAT_ADDMACADRSEL 0x00000020 /* Multiple MAC Addr Reg */ |
| #define | DMA_HW_FEAT_PCSSEL 0x00000040 /* PCS registers */ |
| #define | DMA_HW_FEAT_L3L4FLTREN 0x00000080 /* Layer 3 & Layer 4 Feature */ |
| #define | DMA_HW_FEAT_SMASEL 0x00000100 /* SMA(MDIO) Interface */ |
| #define | DMA_HW_FEAT_RWKSEL 0x00000200 /* PMT Remote Wakeup */ |
| #define | DMA_HW_FEAT_MGKSEL 0x00000400 /* PMT Magic Packet */ |
| #define | DMA_HW_FEAT_MMCSEL 0x00000800 /* RMON Module */ |
| #define | DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 Timestamp */ |
| #define | DMA_HW_FEAT_TSVER2SEL 0x00002000 /* IEEE 1588-2008 Adv Timestamp */ |
| #define | DMA_HW_FEAT_EEESEL 0x00004000 /* Energy Efficient Ethernet */ |
| #define | DMA_HW_FEAT_AVSEL 0x00008000 /* AV Feature */ |
| #define | DMA_HW_FEAT_TXCOESEL 0x00010000 /* Checksum Offload in Tx */ |
| #define | DMA_HW_FEAT_RXTYP1COE 0x00020000 /* IP csum Offload(Type 1) in Rx */ |
| #define | DMA_HW_FEAT_RXTYP2COE 0x00040000 /* IP csum Offload(Type 2) in Rx */ |
| #define | DMA_HW_FEAT_RXFIFOSIZE 0x00080000 /* Rx FIFO > 2048 Bytes */ |
| #define | DMA_HW_FEAT_RXCHCNT 0x00300000 /* No. of additional Rx Channels */ |
| #define | DMA_HW_FEAT_TXCHCNT 0x00c00000 /* No. of additional Tx Channels */ |
| #define | DMA_HW_FEAT_ENHDESSEL 0x01000000 /* Alternate (Enhanced Descriptor) */ |
| #define | DMA_HW_FEAT_INTTSEN |
| #define | DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */ |
| #define | DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN Insertion */ |
| #define | DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY interface */ |
| #define | DEFAULT_DMA_PBL 8 |
| #define | BUF_SIZE_16KiB 16384 |
| #define | BUF_SIZE_8KiB 8192 |
| #define | BUF_SIZE_4KiB 4096 |
| #define | BUF_SIZE_2KiB 2048 |
| #define | PMT_NOT_SUPPORTED 0 |
| #define | PMT_SUPPORTED 1 |
| #define | MAC_CTRL_REG 0x00000000 /* MAC Control */ |
| #define | MAC_ENABLE_TX 0x00000008 /* Transmitter Enable */ |
| #define | MAC_RNABLE_RX 0x00000004 /* Receiver Enable */ |
| #define | STMMAC_DEFAULT_LIT_LS_TIMER 0x3E8 |
| #define | STMMAC_DEFAULT_TWT_LS_TIMER 0x0 |
Enumerations | |
| enum | rx_frame_status { good_frame = 0, discard_frame = 1, csum_none = 2, llc_snap = 4 } |
| enum | tx_dma_irq_status { tx_hard_error = 1, tx_hard_error_bump_tc = 2, handle_tx_rx = 3 } |
| enum | core_specific_irq_mask { core_mmc_tx_irq = 1, core_mmc_rx_irq = 2, core_mmc_rx_csum_offload_irq = 4, core_irq_receive_pmt_irq = 8, core_irq_tx_path_in_lpi_mode = 16, core_irq_tx_path_exit_lpi_mode = 32, core_irq_rx_path_in_lpi_mode = 64, core_irq_rx_path_exit_lpi_mode = 128 } |
Functions | |
| struct mac_device_info * | dwmac1000_setup (void __iomem *ioaddr) |
| struct mac_device_info * | dwmac100_setup (void __iomem *ioaddr) |
| void | stmmac_set_mac_addr (void __iomem *ioaddr, u8 addr[6], unsigned int high, unsigned int low) |
| void | stmmac_get_mac_addr (void __iomem *ioaddr, unsigned char *addr, unsigned int high, unsigned int low) |
| void | stmmac_set_mac (void __iomem *ioaddr, bool enable) |
| void | dwmac_dma_flush_tx_fifo (void __iomem *ioaddr) |
Variables | |
| struct stmmac_ring_mode_ops | ring_mode_ops |
| #define DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY interface */ |
| #define DMA_HW_FEAT_ADDMACADRSEL 0x00000020 /* Multiple MAC Addr Reg */ |
| #define DMA_HW_FEAT_EEESEL 0x00004000 /* Energy Efficient Ethernet */ |
| #define DMA_HW_FEAT_ENHDESSEL 0x01000000 /* Alternate (Enhanced Descriptor) */ |
| #define DMA_HW_FEAT_EXTHASHEN 0x00000008 /* Expanded DA Hash Filter */ |
| #define DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */ |
| #define DMA_HW_FEAT_GMIISEL 0x00000002 /* 1000 Mbps Support */ |
| #define DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */ |
| #define DMA_HW_FEAT_INTTSEN |
| #define DMA_HW_FEAT_L3L4FLTREN 0x00000080 /* Layer 3 & Layer 4 Feature */ |
| #define DMA_HW_FEAT_MGKSEL 0x00000400 /* PMT Magic Packet */ |
| #define DMA_HW_FEAT_MIISEL 0x00000001 /* 10/100 Mbps Support */ |
| #define DMA_HW_FEAT_RWKSEL 0x00000200 /* PMT Remote Wakeup */ |
| #define DMA_HW_FEAT_RXCHCNT 0x00300000 /* No. of additional Rx Channels */ |
| #define DMA_HW_FEAT_RXFIFOSIZE 0x00080000 /* Rx FIFO > 2048 Bytes */ |
| #define DMA_HW_FEAT_RXTYP1COE 0x00020000 /* IP csum Offload(Type 1) in Rx */ |
| #define DMA_HW_FEAT_RXTYP2COE 0x00040000 /* IP csum Offload(Type 2) in Rx */ |
| #define DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN Insertion */ |
| #define DMA_HW_FEAT_SMASEL 0x00000100 /* SMA(MDIO) Interface */ |
| #define DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 Timestamp */ |
| #define DMA_HW_FEAT_TSVER2SEL 0x00002000 /* IEEE 1588-2008 Adv Timestamp */ |
| #define DMA_HW_FEAT_TXCHCNT 0x00c00000 /* No. of additional Tx Channels */ |
| #define DMA_HW_FEAT_TXCOESEL 0x00010000 /* Checksum Offload in Tx */ |
| enum rx_frame_status |
| enum tx_dma_irq_status |
|
read |
Definition at line 316 of file dwmac1000_core.c.
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read |
Definition at line 173 of file dwmac100_core.c.
Definition at line 224 of file dwmac_lib.c.
| void stmmac_get_mac_addr | ( | void __iomem * | ioaddr, |
| unsigned char * | addr, | ||
| unsigned int | high, | ||
| unsigned int | low | ||
| ) |
Definition at line 260 of file dwmac_lib.c.
Definition at line 248 of file dwmac_lib.c.
Definition at line 232 of file dwmac_lib.c.
| struct stmmac_ring_mode_ops ring_mode_ops |
Definition at line 129 of file chain_mode.c.
1.8.2