dw_dmac.h File Reference

#include <linux/dmaengine.h>

Go to the source code of this file.

Data Structures
struct	dw_dma_platform_data
struct	dw_dma_slave
struct	dw_cyclic_desc

Macros
#define	CHAN_ALLOCATION_ASCENDING   0 /* zero to seven */
#define	CHAN_ALLOCATION_DESCENDING   1 /* seven to zero */
#define	CHAN_PRIORITY_ASCENDING   0 /* chan0 highest */
#define	CHAN_PRIORITY_DESCENDING   1 /* chan7 highest */
#define	DWC_CFGH_FCMODE   (1 << 0)
#define	DWC_CFGH_FIFO_MODE   (1 << 1)
#define	DWC_CFGH_PROTCTL(x)   ((x) << 2)
#define	DWC_CFGH_SRC_PER(x)   ((x) << 7)
#define	DWC_CFGH_DST_PER(x)   ((x) << 11)
#define	DWC_CFGL_LOCK_CH_XFER   (0 << 12) /* scope of LOCK_CH */
#define	DWC_CFGL_LOCK_CH_BLOCK   (1 << 12)
#define	DWC_CFGL_LOCK_CH_XACT   (2 << 12)
#define	DWC_CFGL_LOCK_BUS_XFER   (0 << 14) /* scope of LOCK_BUS */
#define	DWC_CFGL_LOCK_BUS_BLOCK   (1 << 14)
#define	DWC_CFGL_LOCK_BUS_XACT   (2 << 14)
#define	DWC_CFGL_LOCK_CH   (1 << 15) /* channel lockout */
#define	DWC_CFGL_LOCK_BUS   (1 << 16) /* busmaster lockout */
#define	DWC_CFGL_HS_DST_POL   (1 << 18) /* dst handshake active low */
#define	DWC_CFGL_HS_SRC_POL   (1 << 19) /* src handshake active low */

Enumerations
enum	dw_dma_msize {   DW_DMA_MSIZE_1, DW_DMA_MSIZE_4, DW_DMA_MSIZE_8, DW_DMA_MSIZE_16,   DW_DMA_MSIZE_32, DW_DMA_MSIZE_64, DW_DMA_MSIZE_128, DW_DMA_MSIZE_256 }

Functions
struct dw_cyclic_desc *	dw_dma_cyclic_prep (struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction)
void	dw_dma_cyclic_free (struct dma_chan *chan)
int	dw_dma_cyclic_start (struct dma_chan *chan)
void	dw_dma_cyclic_stop (struct dma_chan *chan)
dma_addr_t	dw_dma_get_src_addr (struct dma_chan *chan)
dma_addr_t	dw_dma_get_dst_addr (struct dma_chan *chan)

Macro Definition Documentation

#define CHAN_ALLOCATION_ASCENDING   0 /* zero to seven */

Definition at line 30 of file dw_dmac.h.

#define CHAN_ALLOCATION_DESCENDING   1 /* seven to zero */

Definition at line 31 of file dw_dmac.h.

#define CHAN_PRIORITY_ASCENDING   0 /* chan0 highest */

Definition at line 33 of file dw_dmac.h.

#define CHAN_PRIORITY_DESCENDING   1 /* chan7 highest */

Definition at line 34 of file dw_dmac.h.

#define DWC_CFGH_DST_PER

(

x

)

((x) << 11)

Definition at line 75 of file dw_dmac.h.

#define DWC_CFGH_FCMODE   (1 << 0)

Definition at line 71 of file dw_dmac.h.

#define DWC_CFGH_FIFO_MODE   (1 << 1)

Definition at line 72 of file dw_dmac.h.

#define DWC_CFGH_PROTCTL

(

x

)

((x) << 2)

Definition at line 73 of file dw_dmac.h.

#define DWC_CFGH_SRC_PER

(

x

)

((x) << 7)

Definition at line 74 of file dw_dmac.h.

#define DWC_CFGL_HS_DST_POL   (1 << 18) /* dst handshake active low */

Definition at line 86 of file dw_dmac.h.

#define DWC_CFGL_HS_SRC_POL   (1 << 19) /* src handshake active low */

Definition at line 87 of file dw_dmac.h.

#define DWC_CFGL_LOCK_BUS   (1 << 16) /* busmaster lockout */

Definition at line 85 of file dw_dmac.h.

#define DWC_CFGL_LOCK_BUS_BLOCK   (1 << 14)

Definition at line 82 of file dw_dmac.h.

#define DWC_CFGL_LOCK_BUS_XACT   (2 << 14)

Definition at line 83 of file dw_dmac.h.

#define DWC_CFGL_LOCK_BUS_XFER   (0 << 14) /* scope of LOCK_BUS */

Definition at line 81 of file dw_dmac.h.

#define DWC_CFGL_LOCK_CH   (1 << 15) /* channel lockout */

Definition at line 84 of file dw_dmac.h.

#define DWC_CFGL_LOCK_CH_BLOCK   (1 << 12)

Definition at line 79 of file dw_dmac.h.

#define DWC_CFGL_LOCK_CH_XACT   (2 << 12)

Definition at line 80 of file dw_dmac.h.

#define DWC_CFGL_LOCK_CH_XFER   (0 << 12) /* scope of LOCK_CH */

Definition at line 78 of file dw_dmac.h.

Enumeration Type Documentation

enum dw_dma_msize

Enumerator:

DW_DMA_MSIZE_1
DW_DMA_MSIZE_4
DW_DMA_MSIZE_8
DW_DMA_MSIZE_16
DW_DMA_MSIZE_32
DW_DMA_MSIZE_64
DW_DMA_MSIZE_128
DW_DMA_MSIZE_256

Definition at line 42 of file dw_dmac.h.

Function Documentation

void dw_dma_cyclic_free

(

struct dma_chan *

chan

)

dw_dma_cyclic_free - free a prepared cyclic DMA transfer : the DMA channel to free

Definition at line 1413 of file dw_dmac.c.

struct dw_cyclic_desc* dw_dma_cyclic_prep ( struct dma_chan *  chan, dma_addr_t  buf_addr, size_t  buf_len, size_t  period_len, enum dma_transfer_direction  direction  )

read

dw_dma_cyclic_prep - prepare the cyclic DMA transfer : the DMA channel to prepare : physical DMA address where the buffer starts : total number of bytes for the entire buffer : number of bytes for each period : transfer direction, to or from device

Must be called before trying to start the transfer. Returns a valid struct dw_cyclic_desc if successful or an ERR_PTR(-errno) if not successful.

Definition at line 1260 of file dw_dmac.c.

int dw_dma_cyclic_start

(

struct dma_chan *

chan

)

dw_dma_cyclic_start - start the cyclic DMA transfer : the DMA channel to start

Must be called with soft interrupts disabled. Returns zero on success or -errno on failure.

Definition at line 1191 of file dw_dmac.c.

void dw_dma_cyclic_stop

(

struct dma_chan *

chan

)

dw_dma_cyclic_stop - stop the cyclic DMA transfer : the DMA channel to stop

Must be called with soft interrupts disabled.

Definition at line 1235 of file dw_dmac.c.

dma_addr_t dw_dma_get_dst_addr ( struct dma_chan *  chan )

inline

Definition at line 519 of file dw_dmac.c.

dma_addr_t dw_dma_get_src_addr ( struct dma_chan *  chan )

inline

Definition at line 512 of file dw_dmac.c.