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ethernet.c
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1 /**********************************************************************
2  * Author: Cavium Networks
3  *
4  * Contact: [email protected]
5  * This file is part of the OCTEON SDK
6  *
7  * Copyright (c) 2003-2007 Cavium Networks
8  *
9  * This file is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License, Version 2, as
11  * published by the Free Software Foundation.
12  *
13  * This file is distributed in the hope that it will be useful, but
14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16  * NONINFRINGEMENT. See the GNU General Public License for more
17  * details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this file; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22  * or visit http://www.gnu.org/licenses/.
23  *
24  * This file may also be available under a different license from Cavium.
25  * Contact Cavium Networks for more information
26 **********************************************************************/
27 #include <linux/platform_device.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/netdevice.h>
32 #include <linux/etherdevice.h>
33 #include <linux/phy.h>
34 #include <linux/slab.h>
35 #include <linux/interrupt.h>
36 #include <linux/of_net.h>
37 
38 #include <net/dst.h>
39 
40 #include <asm/octeon/octeon.h>
41 
42 #include "ethernet-defines.h"
43 #include "octeon-ethernet.h"
44 #include "ethernet-mem.h"
45 #include "ethernet-rx.h"
46 #include "ethernet-tx.h"
47 #include "ethernet-mdio.h"
48 #include "ethernet-util.h"
49 
50 #include <asm/octeon/cvmx-pip.h>
51 #include <asm/octeon/cvmx-pko.h>
52 #include <asm/octeon/cvmx-fau.h>
53 #include <asm/octeon/cvmx-ipd.h>
54 #include <asm/octeon/cvmx-helper.h>
55 
58 
59 #if defined(CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS) \
60  && CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS
61 int num_packet_buffers = CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS;
62 #else
63 int num_packet_buffers = 1024;
64 #endif
67  "\tNumber of packet buffers to allocate and store in the\n"
68  "\tFPA. By default, 1024 packet buffers are used unless\n"
69  "\tCONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS is defined.");
70 
74  "\tPOW group to receive packets from. All ethernet hardware\n"
75  "\twill be configured to send incomming packets to this POW\n"
76  "\tgroup. Also any other software can submit packets to this\n"
77  "\tgroup for the kernel to process.");
78 
79 int pow_send_group = -1;
80 module_param(pow_send_group, int, 0644);
82  "\tPOW group to send packets to other software on. This\n"
83  "\tcontrols the creation of the virtual device pow0.\n"
84  "\talways_use_pow also depends on this value.");
85 
87 module_param(always_use_pow, int, 0444);
89  "\tWhen set, always send to the pow group. This will cause\n"
90  "\tpackets sent to real ethernet devices to be sent to the\n"
91  "\tPOW group instead of the hardware. Unless some other\n"
92  "\tapplication changes the config, packets will still be\n"
93  "\treceived from the low level hardware. Use this option\n"
94  "\tto allow a CVMX app to intercept all packets from the\n"
95  "\tlinux kernel. You must specify pow_send_group along with\n"
96  "\tthis option.");
97 
98 char pow_send_list[128] = "";
101  "\tComma separated list of ethernet devices that should use the\n"
102  "\tPOW for transmit instead of the actual ethernet hardware. This\n"
103  "\tis a per port version of always_use_pow. always_use_pow takes\n"
104  "\tprecedence over this list. For example, setting this to\n"
105  "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n"
106  "\tusing the pow_send_group.");
107 
108 int max_rx_cpus = -1;
109 module_param(max_rx_cpus, int, 0444);
110 MODULE_PARM_DESC(max_rx_cpus, "\n"
111  "\t\tThe maximum number of CPUs to use for packet reception.\n"
112  "\t\tUse -1 to use all available CPUs.");
113 
114 int rx_napi_weight = 32;
115 module_param(rx_napi_weight, int, 0444);
116 MODULE_PARM_DESC(rx_napi_weight, "The NAPI WEIGHT parameter.");
117 
122 
129 
135 
137 
138 static void cvm_oct_rx_refill_worker(struct work_struct *work);
139 static DECLARE_DELAYED_WORK(cvm_oct_rx_refill_work, cvm_oct_rx_refill_worker);
140 
141 static void cvm_oct_rx_refill_worker(struct work_struct *work)
142 {
143  /*
144  * FPA 0 may have been drained, try to refill it if we need
145  * more than num_packet_buffers / 2, otherwise normal receive
146  * processing will refill it. If it were drained, no packets
147  * could be received so cvm_oct_napi_poll would never be
148  * invoked to do the refill.
149  */
150  cvm_oct_rx_refill_pool(num_packet_buffers / 2);
151 
152  if (!atomic_read(&cvm_oct_poll_queue_stopping))
153  queue_delayed_work(cvm_oct_poll_queue,
154  &cvm_oct_rx_refill_work, HZ);
155 }
156 
157 static void cvm_oct_periodic_worker(struct work_struct *work)
158 {
159  struct octeon_ethernet *priv = container_of(work,
160  struct octeon_ethernet,
161  port_periodic_work.work);
162 
163  if (priv->poll)
164  priv->poll(cvm_oct_device[priv->port]);
165 
166  cvm_oct_device[priv->port]->netdev_ops->ndo_get_stats(cvm_oct_device[priv->port]);
167 
168  if (!atomic_read(&cvm_oct_poll_queue_stopping))
169  queue_delayed_work(cvm_oct_poll_queue, &priv->port_periodic_work, HZ);
170  }
171 
172 static __devinit void cvm_oct_configure_common_hw(void)
173 {
174  /* Setup the FPA */
175  cvmx_fpa_enable();
183 
184  if (USE_RED)
186  num_packet_buffers / 8);
187 
188 }
189 
197 int cvm_oct_free_work(void *work_queue_entry)
198 {
199  cvmx_wqe_t *work = work_queue_entry;
200 
201  int segments = work->word2.s.bufs;
202  union cvmx_buf_ptr segment_ptr = work->packet_ptr;
203 
204  while (segments--) {
205  union cvmx_buf_ptr next_ptr = *(union cvmx_buf_ptr *)
206  cvmx_phys_to_ptr(segment_ptr.s.addr - 8);
207  if (unlikely(!segment_ptr.s.i))
208  cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr),
209  segment_ptr.s.pool,
211  128));
212  segment_ptr = next_ptr;
213  }
214  cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1));
215 
216  return 0;
217 }
219 
226 static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev)
227 {
230  struct octeon_ethernet *priv = netdev_priv(dev);
231 
232  if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) {
233  if (octeon_is_simulation()) {
234  /* The simulator doesn't support statistics */
235  memset(&rx_status, 0, sizeof(rx_status));
236  memset(&tx_status, 0, sizeof(tx_status));
237  } else {
238  cvmx_pip_get_port_status(priv->port, 1, &rx_status);
239  cvmx_pko_get_port_status(priv->port, 1, &tx_status);
240  }
241 
242  priv->stats.rx_packets += rx_status.inb_packets;
243  priv->stats.tx_packets += tx_status.packets;
244  priv->stats.rx_bytes += rx_status.inb_octets;
245  priv->stats.tx_bytes += tx_status.octets;
246  priv->stats.multicast += rx_status.multicast_packets;
247  priv->stats.rx_crc_errors += rx_status.inb_errors;
248  priv->stats.rx_frame_errors += rx_status.fcs_align_err_packets;
249 
250  /*
251  * The drop counter must be incremented atomically
252  * since the RX tasklet also increments it.
253  */
254 #ifdef CONFIG_64BIT
255  atomic64_add(rx_status.dropped_packets,
256  (atomic64_t *)&priv->stats.rx_dropped);
257 #else
258  atomic_add(rx_status.dropped_packets,
259  (atomic_t *)&priv->stats.rx_dropped);
260 #endif
261  }
262 
263  return &priv->stats;
264 }
265 
273 static int cvm_oct_common_change_mtu(struct net_device *dev, int new_mtu)
274 {
275  struct octeon_ethernet *priv = netdev_priv(dev);
276  int interface = INTERFACE(priv->port);
277  int index = INDEX(priv->port);
278 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
279  int vlan_bytes = 4;
280 #else
281  int vlan_bytes = 0;
282 #endif
283 
284  /*
285  * Limit the MTU to make sure the ethernet packets are between
286  * 64 bytes and 65535 bytes.
287  */
288  if ((new_mtu + 14 + 4 + vlan_bytes < 64)
289  || (new_mtu + 14 + 4 + vlan_bytes > 65392)) {
290  pr_err("MTU must be between %d and %d.\n",
291  64 - 14 - 4 - vlan_bytes, 65392 - 14 - 4 - vlan_bytes);
292  return -EINVAL;
293  }
294  dev->mtu = new_mtu;
295 
296  if ((interface < 2)
299  /* Add ethernet header and FCS, and VLAN if configured. */
300  int max_packet = new_mtu + 14 + 4 + vlan_bytes;
301 
304  /* Signal errors on packets larger than the MTU */
305  cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface),
306  max_packet);
307  } else {
308  /*
309  * Set the hardware to truncate packets larger
310  * than the MTU and smaller the 64 bytes.
311  */
312  union cvmx_pip_frm_len_chkx frm_len_chk;
313  frm_len_chk.u64 = 0;
314  frm_len_chk.s.minlen = 64;
315  frm_len_chk.s.maxlen = max_packet;
316  cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface),
317  frm_len_chk.u64);
318  }
319  /*
320  * Set the hardware to truncate packets larger than
321  * the MTU. The jabber register must be set to a
322  * multiple of 8 bytes, so round up.
323  */
324  cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface),
325  (max_packet + 7) & ~7u);
326  }
327  return 0;
328 }
329 
334 static void cvm_oct_common_set_multicast_list(struct net_device *dev)
335 {
336  union cvmx_gmxx_prtx_cfg gmx_cfg;
337  struct octeon_ethernet *priv = netdev_priv(dev);
338  int interface = INTERFACE(priv->port);
339  int index = INDEX(priv->port);
340 
341  if ((interface < 2)
345  control.u64 = 0;
346  control.s.bcst = 1; /* Allow broadcast MAC addresses */
347 
348  if (!netdev_mc_empty(dev) || (dev->flags & IFF_ALLMULTI) ||
349  (dev->flags & IFF_PROMISC))
350  /* Force accept multicast packets */
351  control.s.mcst = 2;
352  else
353  /* Force reject multicast packets */
354  control.s.mcst = 1;
355 
356  if (dev->flags & IFF_PROMISC)
357  /*
358  * Reject matches if promisc. Since CAM is
359  * shut off, should accept everything.
360  */
361  control.s.cam_mode = 0;
362  else
363  /* Filter packets based on the CAM */
364  control.s.cam_mode = 1;
365 
366  gmx_cfg.u64 =
367  cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
368  cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
369  gmx_cfg.u64 & ~1ull);
370 
371  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface),
372  control.u64);
373  if (dev->flags & IFF_PROMISC)
374  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
375  (index, interface), 0);
376  else
377  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
378  (index, interface), 1);
379 
380  cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
381  gmx_cfg.u64);
382  }
383 }
384 
392 static int cvm_oct_set_mac_filter(struct net_device *dev)
393 {
394  struct octeon_ethernet *priv = netdev_priv(dev);
395  union cvmx_gmxx_prtx_cfg gmx_cfg;
396  int interface = INTERFACE(priv->port);
397  int index = INDEX(priv->port);
398 
399  if ((interface < 2)
402  int i;
403  uint8_t *ptr = dev->dev_addr;
404  uint64_t mac = 0;
405  for (i = 0; i < 6; i++)
406  mac = (mac << 8) | (uint64_t)ptr[i];
407 
408  gmx_cfg.u64 =
409  cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
410  cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
411  gmx_cfg.u64 & ~1ull);
412 
413  cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac);
414  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface),
415  ptr[0]);
416  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface),
417  ptr[1]);
418  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface),
419  ptr[2]);
420  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface),
421  ptr[3]);
422  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface),
423  ptr[4]);
424  cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface),
425  ptr[5]);
426  cvm_oct_common_set_multicast_list(dev);
427  cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
428  gmx_cfg.u64);
429  }
430  return 0;
431 }
432 
433 static int cvm_oct_common_set_mac_address(struct net_device *dev, void *addr)
434 {
435  int r = eth_mac_addr(dev, addr);
436 
437  if (r)
438  return r;
439  return cvm_oct_set_mac_filter(dev);
440 }
441 
449 {
450  struct octeon_ethernet *priv = netdev_priv(dev);
451  const u8 *mac = NULL;
452 
453  if (priv->of_node)
454  mac = of_get_mac_address(priv->of_node);
455 
456  if (mac && is_valid_ether_addr(mac)) {
457  memcpy(dev->dev_addr, mac, ETH_ALEN);
459  } else {
460  eth_hw_addr_random(dev);
461  }
462 
463  /*
464  * Force the interface to use the POW send if always_use_pow
465  * was specified or it is in the pow send list.
466  */
467  if ((pow_send_group != -1)
468  && (always_use_pow || strstr(pow_send_list, dev->name)))
469  priv->queue = -1;
470 
471  if (priv->queue != -1) {
472  dev->features |= NETIF_F_SG;
474  dev->features |= NETIF_F_IP_CSUM;
475  }
476 
477  /* We do our own locking, Linux doesn't need to */
478  dev->features |= NETIF_F_LLTX;
480 
482  cvm_oct_set_mac_filter(dev);
483  dev->netdev_ops->ndo_change_mtu(dev, dev->mtu);
484 
485  /*
486  * Zero out stats for port so we won't mistakenly show
487  * counters from the bootloader.
488  */
489  memset(dev->netdev_ops->ndo_get_stats(dev), 0,
490  sizeof(struct net_device_stats));
491 
492  return 0;
493 }
494 
496 {
497  struct octeon_ethernet *priv = netdev_priv(dev);
498 
499  if (priv->phydev)
500  phy_disconnect(priv->phydev);
501 }
502 
503 static const struct net_device_ops cvm_oct_npi_netdev_ops = {
504  .ndo_init = cvm_oct_common_init,
505  .ndo_uninit = cvm_oct_common_uninit,
506  .ndo_start_xmit = cvm_oct_xmit,
507  .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
508  .ndo_set_mac_address = cvm_oct_common_set_mac_address,
509  .ndo_do_ioctl = cvm_oct_ioctl,
510  .ndo_change_mtu = cvm_oct_common_change_mtu,
511  .ndo_get_stats = cvm_oct_common_get_stats,
512 #ifdef CONFIG_NET_POLL_CONTROLLER
513  .ndo_poll_controller = cvm_oct_poll_controller,
514 #endif
515 };
516 static const struct net_device_ops cvm_oct_xaui_netdev_ops = {
517  .ndo_init = cvm_oct_xaui_init,
518  .ndo_uninit = cvm_oct_xaui_uninit,
519  .ndo_open = cvm_oct_xaui_open,
520  .ndo_stop = cvm_oct_xaui_stop,
521  .ndo_start_xmit = cvm_oct_xmit,
522  .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
523  .ndo_set_mac_address = cvm_oct_common_set_mac_address,
524  .ndo_do_ioctl = cvm_oct_ioctl,
525  .ndo_change_mtu = cvm_oct_common_change_mtu,
526  .ndo_get_stats = cvm_oct_common_get_stats,
527 #ifdef CONFIG_NET_POLL_CONTROLLER
528  .ndo_poll_controller = cvm_oct_poll_controller,
529 #endif
530 };
531 static const struct net_device_ops cvm_oct_sgmii_netdev_ops = {
532  .ndo_init = cvm_oct_sgmii_init,
533  .ndo_uninit = cvm_oct_sgmii_uninit,
534  .ndo_open = cvm_oct_sgmii_open,
535  .ndo_stop = cvm_oct_sgmii_stop,
536  .ndo_start_xmit = cvm_oct_xmit,
537  .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
538  .ndo_set_mac_address = cvm_oct_common_set_mac_address,
539  .ndo_do_ioctl = cvm_oct_ioctl,
540  .ndo_change_mtu = cvm_oct_common_change_mtu,
541  .ndo_get_stats = cvm_oct_common_get_stats,
542 #ifdef CONFIG_NET_POLL_CONTROLLER
543  .ndo_poll_controller = cvm_oct_poll_controller,
544 #endif
545 };
546 static const struct net_device_ops cvm_oct_spi_netdev_ops = {
547  .ndo_init = cvm_oct_spi_init,
548  .ndo_uninit = cvm_oct_spi_uninit,
549  .ndo_start_xmit = cvm_oct_xmit,
550  .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
551  .ndo_set_mac_address = cvm_oct_common_set_mac_address,
552  .ndo_do_ioctl = cvm_oct_ioctl,
553  .ndo_change_mtu = cvm_oct_common_change_mtu,
554  .ndo_get_stats = cvm_oct_common_get_stats,
555 #ifdef CONFIG_NET_POLL_CONTROLLER
556  .ndo_poll_controller = cvm_oct_poll_controller,
557 #endif
558 };
559 static const struct net_device_ops cvm_oct_rgmii_netdev_ops = {
560  .ndo_init = cvm_oct_rgmii_init,
561  .ndo_uninit = cvm_oct_rgmii_uninit,
562  .ndo_open = cvm_oct_rgmii_open,
563  .ndo_stop = cvm_oct_rgmii_stop,
564  .ndo_start_xmit = cvm_oct_xmit,
565  .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
566  .ndo_set_mac_address = cvm_oct_common_set_mac_address,
567  .ndo_do_ioctl = cvm_oct_ioctl,
568  .ndo_change_mtu = cvm_oct_common_change_mtu,
569  .ndo_get_stats = cvm_oct_common_get_stats,
570 #ifdef CONFIG_NET_POLL_CONTROLLER
571  .ndo_poll_controller = cvm_oct_poll_controller,
572 #endif
573 };
574 static const struct net_device_ops cvm_oct_pow_netdev_ops = {
575  .ndo_init = cvm_oct_common_init,
576  .ndo_start_xmit = cvm_oct_xmit_pow,
577  .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
578  .ndo_set_mac_address = cvm_oct_common_set_mac_address,
579  .ndo_do_ioctl = cvm_oct_ioctl,
580  .ndo_change_mtu = cvm_oct_common_change_mtu,
581  .ndo_get_stats = cvm_oct_common_get_stats,
582 #ifdef CONFIG_NET_POLL_CONTROLLER
583  .ndo_poll_controller = cvm_oct_poll_controller,
584 #endif
585 };
586 
587 extern void octeon_mdiobus_force_mod_depencency(void);
588 
589 static struct device_node * __devinit cvm_oct_of_get_child(const struct device_node *parent,
590  int reg_val)
591 {
592  struct device_node *node = NULL;
593  int size;
594  const __be32 *addr;
595 
596  for (;;) {
597  node = of_get_next_child(parent, node);
598  if (!node)
599  break;
600  addr = of_get_property(node, "reg", &size);
601  if (addr && (be32_to_cpu(*addr) == reg_val))
602  break;
603  }
604  return node;
605 }
606 
607 static struct device_node * __devinit cvm_oct_node_for_port(struct device_node *pip,
608  int interface, int port)
609 {
610  struct device_node *ni, *np;
611 
612  ni = cvm_oct_of_get_child(pip, interface);
613  if (!ni)
614  return NULL;
615 
616  np = cvm_oct_of_get_child(ni, port);
617  of_node_put(ni);
618 
619  return np;
620 }
621 
622 static int __devinit cvm_oct_probe(struct platform_device *pdev)
623 {
624  int num_interfaces;
625  int interface;
627  int qos;
628  struct device_node *pip;
629 
631  pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION);
632 
633  pip = pdev->dev.of_node;
634  if (!pip) {
635  pr_err("Error: No 'pip' in /aliases\n");
636  return -EINVAL;
637  }
638 
639  cvm_oct_poll_queue = create_singlethread_workqueue("octeon-ethernet");
640  if (cvm_oct_poll_queue == NULL) {
641  pr_err("octeon-ethernet: Cannot create workqueue");
642  return -ENOMEM;
643  }
644 
645  cvm_oct_configure_common_hw();
646 
648 
649  /* Change the input group for all ports before input is enabled */
650  num_interfaces = cvmx_helper_get_number_of_interfaces();
651  for (interface = 0; interface < num_interfaces; interface++) {
652  int num_ports = cvmx_helper_ports_on_interface(interface);
653  int port;
654 
655  for (port = cvmx_helper_get_ipd_port(interface, 0);
656  port < cvmx_helper_get_ipd_port(interface, num_ports);
657  port++) {
658  union cvmx_pip_prt_tagx pip_prt_tagx;
659  pip_prt_tagx.u64 =
660  cvmx_read_csr(CVMX_PIP_PRT_TAGX(port));
661  pip_prt_tagx.s.grp = pow_receive_group;
662  cvmx_write_csr(CVMX_PIP_PRT_TAGX(port),
663  pip_prt_tagx.u64);
664  }
665  }
666 
668 
669  memset(cvm_oct_device, 0, sizeof(cvm_oct_device));
670 
671  /*
672  * Initialize the FAU used for counting packet buffers that
673  * need to be freed.
674  */
675  cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
676 
677  /* Initialize the FAU used for counting tx SKBs that need to be freed */
678  cvmx_fau_atomic_write32(FAU_TOTAL_TX_TO_CLEAN, 0);
679 
680  if ((pow_send_group != -1)) {
681  struct net_device *dev;
682  pr_info("\tConfiguring device for POW only access\n");
683  dev = alloc_etherdev(sizeof(struct octeon_ethernet));
684  if (dev) {
685  /* Initialize the device private structure. */
686  struct octeon_ethernet *priv = netdev_priv(dev);
687 
688  dev->netdev_ops = &cvm_oct_pow_netdev_ops;
691  priv->queue = -1;
692  strcpy(dev->name, "pow%d");
693  for (qos = 0; qos < 16; qos++)
694  skb_queue_head_init(&priv->tx_free_list[qos]);
695 
696  if (register_netdev(dev) < 0) {
697  pr_err("Failed to register ethernet device for POW\n");
698  free_netdev(dev);
699  } else {
700  cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev;
701  pr_info("%s: POW send group %d, receive group %d\n",
702  dev->name, pow_send_group,
704  }
705  } else {
706  pr_err("Failed to allocate ethernet device for POW\n");
707  }
708  }
709 
710  num_interfaces = cvmx_helper_get_number_of_interfaces();
711  for (interface = 0; interface < num_interfaces; interface++) {
714  int num_ports = cvmx_helper_ports_on_interface(interface);
715  int port;
716  int port_index;
717 
718  for (port_index = 0, port = cvmx_helper_get_ipd_port(interface, 0);
719  port < cvmx_helper_get_ipd_port(interface, num_ports);
720  port_index++, port++) {
721  struct octeon_ethernet *priv;
722  struct net_device *dev =
723  alloc_etherdev(sizeof(struct octeon_ethernet));
724  if (!dev) {
725  pr_err("Failed to allocate ethernet device for port %d\n", port);
726  continue;
727  }
728 
729  /* Initialize the device private structure. */
730  priv = netdev_priv(dev);
731  priv->of_node = cvm_oct_node_for_port(pip, interface, port_index);
732 
734  cvm_oct_periodic_worker);
735  priv->imode = imode;
736  priv->port = port;
737  priv->queue = cvmx_pko_get_base_queue(priv->port);
738  priv->fau = fau - cvmx_pko_get_num_queues(port) * 4;
739  for (qos = 0; qos < 16; qos++)
740  skb_queue_head_init(&priv->tx_free_list[qos]);
741  for (qos = 0; qos < cvmx_pko_get_num_queues(port);
742  qos++)
743  cvmx_fau_atomic_write32(priv->fau + qos * 4, 0);
744 
745  switch (priv->imode) {
746 
747  /* These types don't support ports to IPD/PKO */
751  break;
752 
754  dev->netdev_ops = &cvm_oct_npi_netdev_ops;
755  strcpy(dev->name, "npi%d");
756  break;
757 
759  dev->netdev_ops = &cvm_oct_xaui_netdev_ops;
760  strcpy(dev->name, "xaui%d");
761  break;
762 
764  dev->netdev_ops = &cvm_oct_npi_netdev_ops;
765  strcpy(dev->name, "loop%d");
766  break;
767 
769  dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
770  strcpy(dev->name, "eth%d");
771  break;
772 
774  dev->netdev_ops = &cvm_oct_spi_netdev_ops;
775  strcpy(dev->name, "spi%d");
776  break;
777 
780  dev->netdev_ops = &cvm_oct_rgmii_netdev_ops;
781  strcpy(dev->name, "eth%d");
782  break;
783  }
784 
785  if (!dev->netdev_ops) {
786  free_netdev(dev);
787  } else if (register_netdev(dev) < 0) {
788  pr_err("Failed to register ethernet device "
789  "for interface %d, port %d\n",
790  interface, priv->port);
791  free_netdev(dev);
792  } else {
793  cvm_oct_device[priv->port] = dev;
794  fau -=
795  cvmx_pko_get_num_queues(priv->port) *
796  sizeof(uint32_t);
797  queue_delayed_work(cvm_oct_poll_queue,
798  &priv->port_periodic_work, HZ);
799  }
800  }
801  }
802 
805 
806  /*
807  * 150 uS: about 10 1500-byte packtes at 1GE.
808  */
809  cvm_oct_tx_poll_interval = 150 * (octeon_get_clock_rate() / 1000000);
810 
811  queue_delayed_work(cvm_oct_poll_queue, &cvm_oct_rx_refill_work, HZ);
812 
813  return 0;
814 }
815 
816 static int __devexit cvm_oct_remove(struct platform_device *pdev)
817 {
818  int port;
819 
820  /* Disable POW interrupt */
821  cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0);
822 
823  cvmx_ipd_disable();
824 
825  /* Free the interrupt handler */
826  free_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, cvm_oct_device);
827 
828  atomic_inc_return(&cvm_oct_poll_queue_stopping);
829  cancel_delayed_work_sync(&cvm_oct_rx_refill_work);
830 
833 
835 
836  /* Free the ethernet devices */
837  for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) {
838  if (cvm_oct_device[port]) {
839  struct net_device *dev = cvm_oct_device[port];
840  struct octeon_ethernet *priv = netdev_priv(dev);
842 
844  unregister_netdev(dev);
845  free_netdev(dev);
846  cvm_oct_device[port] = NULL;
847  }
848  }
849 
850  destroy_workqueue(cvm_oct_poll_queue);
851 
853 
854  cvmx_ipd_free_ptr();
855 
856  /* Free the HW pools */
864  return 0;
865 }
866 
867 static struct of_device_id cvm_oct_match[] = {
868  {
869  .compatible = "cavium,octeon-3860-pip",
870  },
871  {},
872 };
873 MODULE_DEVICE_TABLE(of, cvm_oct_match);
874 
875 static struct platform_driver cvm_oct_driver = {
876  .probe = cvm_oct_probe,
877  .remove = __devexit_p(cvm_oct_remove),
878  .driver = {
879  .owner = THIS_MODULE,
880  .name = KBUILD_MODNAME,
881  .of_match_table = cvm_oct_match,
882  },
883 };
884 
885 module_platform_driver(cvm_oct_driver);
886 
887 MODULE_LICENSE("GPL");
888 MODULE_AUTHOR("Cavium Networks <[email protected]>");
889 MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver.");