intel_mid_dma.c File Reference

#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/pm_runtime.h>
#include <linux/intel_mid_dma.h>
#include <linux/module.h>
#include "dmaengine.h"
#include "intel_mid_dma_regs.h"

Go to the source code of this file.

Data Structures
struct	intel_mid_dma_probe_info

Macros
#define	MAX_CHAN   4 /*max ch across controllers*/
#define	INTEL_MID_DMAC1_ID   0x0814
#define	INTEL_MID_DMAC2_ID   0x0813
#define	INTEL_MID_GP_DMAC2_ID   0x0827
#define	INTEL_MFLD_DMAC1_ID   0x0830
#define	LNW_PERIPHRAL_MASK_BASE   0xFFAE8008
#define	LNW_PERIPHRAL_MASK_SIZE   0x10
#define	LNW_PERIPHRAL_STATUS   0x0
#define	LNW_PERIPHRAL_MASK   0x8
#define	INFO(_max_chan, _ch_base, _block_size, _pimr_mask)

Functions
int	dma_resume (struct device *dev)
	MODULE_DEVICE_TABLE (pci, intel_mid_dma_ids)
	fs_initcall (intel_mid_dma_init)
	module_exit (intel_mid_dma_exit)
	MODULE_AUTHOR ("Vinod Koul <[email protected]>")
	MODULE_DESCRIPTION ("Intel (R) MID DMAC Driver")
	MODULE_LICENSE ("GPL v2")
	MODULE_VERSION (INTEL_MID_DMA_DRIVER_VERSION)

Macro Definition Documentation

#define INFO	(		_max_chan,
			_ch_base,
			_block_size,
			_pimr_mask
	)

Value:

((kernel_ulong_t)&(struct intel_mid_dma_probe_info) {   \
        .max_chan = (_max_chan),            \
        .ch_base = (_ch_base),              \
        .block_size = (_block_size),            \
        .pimr_mask = (_pimr_mask),          \
    })

Definition at line 53 of file intel_mid_dma.c.

#define INTEL_MFLD_DMAC1_ID   0x0830

Definition at line 40 of file intel_mid_dma.c.

#define INTEL_MID_DMAC1_ID   0x0814

Definition at line 37 of file intel_mid_dma.c.

#define INTEL_MID_DMAC2_ID   0x0813

Definition at line 38 of file intel_mid_dma.c.

#define INTEL_MID_GP_DMAC2_ID   0x0827

Definition at line 39 of file intel_mid_dma.c.

#define LNW_PERIPHRAL_MASK   0x8

Definition at line 44 of file intel_mid_dma.c.

#define LNW_PERIPHRAL_MASK_BASE   0xFFAE8008

Definition at line 41 of file intel_mid_dma.c.

#define LNW_PERIPHRAL_MASK_SIZE   0x10

Definition at line 42 of file intel_mid_dma.c.

#define LNW_PERIPHRAL_STATUS   0x0

Definition at line 43 of file intel_mid_dma.c.

#define MAX_CHAN   4 /*max ch across controllers*/

Definition at line 34 of file intel_mid_dma.c.

Function Documentation

int dma_resume

(

struct device *

dev

)

dma_resume - PCI resume function

: PCI device structure

This function is called by OS when a power event occurs

Definition at line 1359 of file intel_mid_dma.c.

fs_initcall

(

intel_mid_dma_init

)

MODULE_AUTHOR

(

"Vinod Koul <[email protected]>"

)

MODULE_DESCRIPTION

(

"Intel (R) MID DMAC Driver"

)

MODULE_DEVICE_TABLE	(	pci	,
		intel_mid_dma_ids
	)

module_exit

(

intel_mid_dma_exit

)

MODULE_LICENSE

(

"GPL v2"

)

MODULE_VERSION

(

INTEL_MID_DMA_DRIVER_VERSION

)