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irq_ia64.c File Reference
#include <linux/module.h>
#include <linux/jiffies.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/kernel_stat.h>
#include <linux/ptrace.h>
#include <linux/signal.h>
#include <linux/smp.h>
#include <linux/threads.h>
#include <linux/bitops.h>
#include <linux/irq.h>
#include <linux/ratelimit.h>
#include <linux/acpi.h>
#include <linux/sched.h>
#include <asm/delay.h>
#include <asm/intrinsics.h>
#include <asm/io.h>
#include <asm/hw_irq.h>
#include <asm/machvec.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>

Go to the source code of this file.

Macros

#define IRQ_DEBUG   0
 
#define IRQ_VECTOR_UNASSIGNED   (0)
 
#define IRQ_UNUSED   (0)
 
#define IRQ_USED   (1)
 
#define IRQ_RSVD   (2)
 
#define IS_RESCHEDULE(vec)   (0)
 
#define IS_LOCAL_TLB_FLUSH(vec)   (0)
 

Functions

 EXPORT_SYMBOL (isa_irq_to_vector_map)
 
 DEFINE_SPINLOCK (vector_lock)
 
 DEFINE_PER_CPU (int[IA64_NUM_VECTORS], vector_irq)
 
int check_irq_used (int irq)
 
int bind_irq_vector (int irq, int vector, cpumask_t domain)
 
int ia64_native_assign_irq_vector (int irq)
 
void ia64_native_free_irq_vector (int vector)
 
int reserve_irq_vector (int vector)
 
void __setup_vector_irq (int cpu)
 
void destroy_and_reserve_irq (unsigned int irq)
 
int create_irq (void)
 
void destroy_irq (unsigned int irq)
 
void ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
 
void ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action)
 
void __init ia64_native_register_ipi (void)
 
void __init init_IRQ (void)
 
void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
 

Variables

int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR
 
int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR
 
void __iomemipi_base_addr
 
__u8 isa_irq_to_vector_map [16]
 
struct irq_cfg irq_cfg[NR_IRQS__read_mostly
 

Macro Definition Documentation

#define IRQ_DEBUG   0

Definition at line 47 of file irq_ia64.c.

#define IRQ_RSVD   (2)

Definition at line 53 of file irq_ia64.c.

#define IRQ_UNUSED   (0)

Definition at line 51 of file irq_ia64.c.

#define IRQ_USED   (1)

Definition at line 52 of file irq_ia64.c.

#define IRQ_VECTOR_UNASSIGNED   (0)

Definition at line 49 of file irq_ia64.c.

#define IS_LOCAL_TLB_FLUSH (   vec)    (0)

Definition at line 443 of file irq_ia64.c.

#define IS_RESCHEDULE (   vec)    (0)

Definition at line 442 of file irq_ia64.c.

Function Documentation

void __setup_vector_irq ( int  cpu)

Definition at line 246 of file irq_ia64.c.

int bind_irq_vector ( int  irq,
int  vector,
cpumask_t  domain 
)

Definition at line 158 of file irq_ia64.c.

int check_irq_used ( int  irq)

Definition at line 96 of file irq_ia64.c.

int create_irq ( void  )

Definition at line 405 of file irq_ia64.c.

DEFINE_PER_CPU ( int  [IA64_NUM_VECTORS],
vector_irq   
)
DEFINE_SPINLOCK ( vector_lock  )
void destroy_and_reserve_irq ( unsigned int  irq)

Definition at line 390 of file irq_ia64.c.

void destroy_irq ( unsigned int  irq)

Definition at line 432 of file irq_ia64.c.

EXPORT_SYMBOL ( isa_irq_to_vector_map  )
void ia64_handle_irq ( ia64_vector  vector,
struct pt_regs regs 
)

Definition at line 451 of file irq_ia64.c.

int ia64_native_assign_irq_vector ( int  irq)

Definition at line 199 of file irq_ia64.c.

void ia64_native_free_irq_vector ( int  vector)

Definition at line 225 of file irq_ia64.c.

void __init ia64_native_register_ipi ( void  )

Definition at line 641 of file irq_ia64.c.

void ia64_native_register_percpu_irq ( ia64_vector  vec,
struct irqaction action 
)

Definition at line 627 of file irq_ia64.c.

void ia64_send_ipi ( int  cpu,
int  vector,
int  delivery_mode,
int  redirect 
)

Definition at line 671 of file irq_ia64.c.

void __init init_IRQ ( void  )

The hexagon core comes with a first-level interrupt controller with 32 total possible interrupts. When the core is embedded into different systems/platforms, it is typically wrapped by macro cells that provide one or more second-level interrupt controllers that are cascaded into one or more of the first-level interrupts handled here. The precise wiring of these other irqs varies from platform to platform, and are set up & configured in the platform-specific files.

The first-level interrupt controller is wrapped by the VM, which virtualizes the interrupt controller for us. It provides a very simple, fast & efficient API, and so the fasteoi handler is appropriate for this case.

Definition at line 651 of file irq_ia64.c.

int reserve_irq_vector ( int  vector)

Definition at line 234 of file irq_ia64.c.

Variable Documentation

struct irq_cfg irq_cfg [NR_IRQS] __read_mostly
Initial value:
= {
[0 ... NR_IRQS - 1] = {
.domain = CPU_MASK_NONE
}
}

Definition at line 77 of file irq_ia64.c.

int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR

Definition at line 56 of file irq_ia64.c.

int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR

Definition at line 57 of file irq_ia64.c.

void __iomem* ipi_base_addr
Initial value:

Definition at line 60 of file irq_ia64.c.

__u8 isa_irq_to_vector_map[16]
Initial value:
= {
0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
}

Definition at line 68 of file irq_ia64.c.