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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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#include "omap-pcm.h"Go to the source code of this file.
Data Structures | |
| struct | omap_mcbsp_reg_cfg |
| struct | omap_mcbsp_st_data |
| struct | omap_mcbsp |
Macros | |
| #define | OMAP_ST_REG_REV 0x00 |
| #define | OMAP_ST_REG_SYSCONFIG 0x10 |
| #define | OMAP_ST_REG_IRQSTATUS 0x18 |
| #define | OMAP_ST_REG_IRQENABLE 0x1C |
| #define | OMAP_ST_REG_SGAINCR 0x24 |
| #define | OMAP_ST_REG_SFIRCR 0x28 |
| #define | OMAP_ST_REG_SSELCR 0x2C |
| #define | RRST BIT(0) |
| #define | RRDY BIT(1) |
| #define | RFULL BIT(2) |
| #define | RSYNC_ERR BIT(3) |
| #define | RINTM(value) (((value) & 0x3) << 4) /* bits 4:5 */ |
| #define | ABIS BIT(6) |
| #define | DXENA BIT(7) |
| #define | CLKSTP(value) (((value) & 0x3) << 11) /* bits 11:12 */ |
| #define | RJUST(value) (((value) & 0x3) << 13) /* bits 13:14 */ |
| #define | ALB BIT(15) |
| #define | DLB BIT(15) |
| #define | XRST BIT(0) |
| #define | XRDY BIT(1) |
| #define | XEMPTY BIT(2) |
| #define | XSYNC_ERR BIT(3) |
| #define | XINTM(value) (((value) & 0x3) << 4) /* bits 4:5 */ |
| #define | GRST BIT(6) |
| #define | FRST BIT(7) |
| #define | SOFT BIT(8) |
| #define | FREE BIT(9) |
| #define | CLKRP BIT(0) |
| #define | CLKXP BIT(1) |
| #define | FSRP BIT(2) |
| #define | FSXP BIT(3) |
| #define | DR_STAT BIT(4) |
| #define | DX_STAT BIT(5) |
| #define | CLKS_STAT BIT(6) |
| #define | SCLKME BIT(7) |
| #define | CLKRM BIT(8) |
| #define | CLKXM BIT(9) |
| #define | FSRM BIT(10) |
| #define | FSXM BIT(11) |
| #define | RIOEN BIT(12) |
| #define | XIOEN BIT(13) |
| #define | IDLE_EN BIT(14) |
| #define | RWDLEN1(value) (((value) & 0x7) << 5) /* Bits 5:7 */ |
| #define | RFRLEN1(value) (((value) & 0x7f) << 8) /* Bits 8:14 */ |
| #define | XWDLEN1(value) (((value) & 0x7) << 5) /* Bits 5:7 */ |
| #define | XFRLEN1(value) (((value) & 0x7f) << 8) /* Bits 8:14 */ |
| #define | RDATDLY(value) ((value) & 0x3) /* Bits 0:1 */ |
| #define | RFIG BIT(2) |
| #define | RCOMPAND(value) (((value) & 0x3) << 3) /* Bits 3:4 */ |
| #define | RWDLEN2(value) (((value) & 0x7) << 5) /* Bits 5:7 */ |
| #define | RFRLEN2(value) (((value) & 0x7f) << 8) /* Bits 8:14 */ |
| #define | RPHASE BIT(15) |
| #define | XDATDLY(value) ((value) & 0x3) /* Bits 0:1 */ |
| #define | XFIG BIT(2) |
| #define | XCOMPAND(value) (((value) & 0x3) << 3) /* Bits 3:4 */ |
| #define | XWDLEN2(value) (((value) & 0x7) << 5) /* Bits 5:7 */ |
| #define | XFRLEN2(value) (((value) & 0x7f) << 8) /* Bits 8:14 */ |
| #define | XPHASE BIT(15) |
| #define | CLKGDV(value) ((value) & 0x7f) /* Bits 0:7 */ |
| #define | FWID(value) (((value) & 0xff) << 8) /* Bits 8:15 */ |
| #define | FPER(value) ((value) & 0x0fff) /* Bits 0:11 */ |
| #define | FSGM BIT(12) |
| #define | CLKSM BIT(13) |
| #define | CLKSP BIT(14) |
| #define | GSYNC BIT(15) |
| #define | RMCM BIT(0) |
| #define | RCBLK(value) (((value) & 0x7) << 2) /* Bits 2:4 */ |
| #define | RPABLK(value) (((value) & 0x3) << 5) /* Bits 5:6 */ |
| #define | RPBBLK(value) (((value) & 0x3) << 7) /* Bits 7:8 */ |
| #define | XMCM(value) ((value) & 0x3) /* Bits 0:1 */ |
| #define | XCBLK(value) (((value) & 0x7) << 2) /* Bits 2:4 */ |
| #define | XPABLK(value) (((value) & 0x3) << 5) /* Bits 5:6 */ |
| #define | XPBBLK(value) (((value) & 0x3) << 7) /* Bits 7:8 */ |
| #define | XDISABLE BIT(0) |
| #define | XDMAEN BIT(3) |
| #define | DILB BIT(5) |
| #define | XFULL_CYCLE BIT(11) |
| #define | DXENDLY(value) (((value) & 0x3) << 12) /* Bits 12:13 */ |
| #define | PPCONNECT BIT(14) |
| #define | EXTCLKGATE BIT(15) |
| #define | RDISABLE BIT(0) |
| #define | RDMAEN BIT(3) |
| #define | RFULL_CYCLE BIT(11) |
| #define | SOFTRST BIT(1) |
| #define | ENAWAKEUP BIT(2) |
| #define | SIDLEMODE(value) (((value) & 0x3) << 3) |
| #define | CLOCKACTIVITY(value) (((value) & 0x3) << 8) |
| #define | SIDETONEEN BIT(10) |
| #define | ST_AUTOIDLE BIT(0) |
| #define | ST_CH0GAIN(value) ((value) & 0xffff) /* Bits 0:15 */ |
| #define | ST_CH1GAIN(value) (((value) & 0xffff) << 16) /* Bits 16:31 */ |
| #define | ST_FIRCOEFF(value) ((value) & 0xffff) /* Bits 0:15 */ |
| #define | ST_SIDETONEEN BIT(0) |
| #define | ST_COEFFWREN BIT(1) |
| #define | ST_COEFFWRDONE BIT(2) |
| #define | MCBSP_DMA_MODE_ELEMENT 0 |
| #define | MCBSP_DMA_MODE_THRESHOLD 1 |
| #define | RSYNCERREN BIT(0) |
| #define | RFSREN BIT(1) |
| #define | REOFEN BIT(2) |
| #define | RRDYEN BIT(3) |
| #define | RUNDFLEN BIT(4) |
| #define | ROVFLEN BIT(5) |
| #define | XSYNCERREN BIT(7) |
| #define | XFSXEN BIT(8) |
| #define | XEOFEN BIT(9) |
| #define | XRDYEN BIT(10) |
| #define | XUNDFLEN BIT(11) |
| #define | XOVFLEN BIT(12) |
| #define | XEMPTYEOFEN BIT(14) |
| #define | CLKR_SRC_CLKR 0 /* CLKR signal is from the CLKR pin */ |
| #define | CLKR_SRC_CLKX 1 /* CLKR signal is from the CLKX pin */ |
| #define | FSR_SRC_FSR 2 /* FSR signal is from the FSR pin */ |
| #define | FSR_SRC_FSX 3 /* FSR signal is from the FSX pin */ |
| #define | MCBSP_CLKS_PRCM_SRC 0 |
| #define | MCBSP_CLKS_PAD_SRC 1 |
| anonymous enum |
| int omap2_mcbsp_set_clks_src | ( | struct omap_mcbsp * | mcbsp, |
| u8 | fck_src_id | ||
| ) |
| void omap_mcbsp_config | ( | struct omap_mcbsp * | mcbsp, |
| const struct omap_mcbsp_reg_cfg * | config | ||
| ) |
| void omap_mcbsp_free | ( | struct omap_mcbsp * | mcbsp | ) |
| int omap_mcbsp_get_dma_op_mode | ( | struct omap_mcbsp * | mcbsp | ) |
| u16 omap_mcbsp_get_rx_delay | ( | struct omap_mcbsp * | mcbsp | ) |
| u16 omap_mcbsp_get_tx_delay | ( | struct omap_mcbsp * | mcbsp | ) |
| int __devinit omap_mcbsp_init | ( | struct platform_device * | pdev | ) |
| int omap_mcbsp_request | ( | struct omap_mcbsp * | mcbsp | ) |
| void omap_mcbsp_set_rx_threshold | ( | struct omap_mcbsp * | mcbsp, |
| u16 | threshold | ||
| ) |
| void omap_mcbsp_set_tx_threshold | ( | struct omap_mcbsp * | mcbsp, |
| u16 | threshold | ||
| ) |
| void omap_mcbsp_start | ( | struct omap_mcbsp * | mcbsp, |
| int | tx, | ||
| int | rx | ||
| ) |
| void omap_mcbsp_stop | ( | struct omap_mcbsp * | mcbsp, |
| int | tx, | ||
| int | rx | ||
| ) |
| void __devexit omap_mcbsp_sysfs_remove | ( | struct omap_mcbsp * | mcbsp | ) |
| int omap_st_disable | ( | struct omap_mcbsp * | mcbsp | ) |
| int omap_st_enable | ( | struct omap_mcbsp * | mcbsp | ) |
| int omap_st_get_chgain | ( | struct omap_mcbsp * | mcbsp, |
| int | channel, | ||
| s16 * | chgain | ||
| ) |
| int omap_st_is_enabled | ( | struct omap_mcbsp * | mcbsp | ) |
1.8.2