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ml403-ac97cr.c File Reference
#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/param.h>
#include <linux/jiffies.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/mutex.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/initval.h>
#include <sound/ac97_codec.h>
#include "pcm-indirect2.h"

Go to the source code of this file.

Data Structures

struct  lm4550_reg
 
struct  snd_ml403_ac97cr
 

Macros

#define SND_ML403_AC97CR_DRIVER   "ml403-ac97cr"
 
#define PDEBUG(fac, fmt, args...)   /* nothing */
 
#define CODEC_TIMEOUT_ON_INIT
 
#define CODEC_WAIT_AFTER_WRITE
 
#define CODEC_TIMEOUT_AFTER_READ
 
#define LM4550_REG_OK   (1<<0) /* register exists */
 
#define LM4550_REG_DONEREAD
 
#define LM4550_REG_NOSAVE
 
#define LM4550_REG_NOSHADOW
 
#define LM4550_REG_READONLY   (1<<4) /* register is read only */
 
#define LM4550_REG_FAKEPROBE
 
#define LM4550_REG_FAKEREAD
 
#define LM4550_REG_ALLFAKE   (LM4550_REG_FAKEREAD | LM4550_REG_FAKEPROBE)
 
#define LM4550_RF_OK(reg)   (lm4550_regfile[reg / 2].flag & LM4550_REG_OK)
 
#define CR_REG(ml403_ac97cr, x)   ((ml403_ac97cr)->port + CR_REG_##x)
 
#define CR_REG_PLAYFIFO   0x00
 
#define CR_PLAYDATA(a)   ((a) & 0xFFFF)
 
#define CR_REG_RECFIFO   0x04
 
#define CR_RECDATA(a)   ((a) & 0xFFFF)
 
#define CR_REG_STATUS   0x08
 
#define CR_RECOVER   (1<<7)
 
#define CR_PLAYUNDER   (1<<6)
 
#define CR_CODECREADY   (1<<5)
 
#define CR_RAF   (1<<4)
 
#define CR_RECEMPTY   (1<<3)
 
#define CR_RECFULL   (1<<2)
 
#define CR_PLAYHALF   (1<<1)
 
#define CR_PLAYFULL   (1<<0)
 
#define CR_REG_RESETFIFO   0x0C
 
#define CR_RECRESET   (1<<1)
 
#define CR_PLAYRESET   (1<<0)
 
#define CR_REG_CODEC_ADDR   0x10
 
#define CR_CODEC_ADDR(a)   ((a) << 0)
 
#define CR_CODEC_READ   (1<<7)
 
#define CR_CODEC_WRITE   (0<<7)
 
#define CR_REG_CODEC_DATAREAD   0x14
 
#define CR_CODEC_DATAREAD(v)   ((v) & 0xFFFF)
 
#define CR_REG_CODEC_DATAWRITE   0x18
 
#define CR_CODEC_DATAWRITE(v)   ((v) & 0xFFFF)
 
#define CR_FIFO_SIZE   32
 

Functions

 MODULE_AUTHOR ("Joachim Foerster <[email protected]>")
 
 MODULE_DESCRIPTION ("Xilinx ML403 AC97 Controller Reference")
 
 MODULE_LICENSE ("GPL")
 
 MODULE_SUPPORTED_DEVICE ("{{Xilinx,ML403 AC97 Controller Reference}}")
 
 module_param_array (index, int, NULL, 0444)
 
 MODULE_PARM_DESC (index,"Index value for ML403 AC97 Controller Reference.")
 
 module_param_array (id, charp, NULL, 0444)
 
 MODULE_PARM_DESC (id,"ID string for ML403 AC97 Controller Reference.")
 
 module_param_array (enable, bool, NULL, 0444)
 
 MODULE_PARM_DESC (enable,"Enable this ML403 AC97 Controller Reference.")
 
 MODULE_ALIAS ("platform:"SND_ML403_AC97CR_DRIVER)
 
 module_platform_driver (snd_ml403_ac97cr_driver)
 

Variables

struct lm4550_reg lm4550_regfile [64]
 

Macro Definition Documentation

#define CODEC_TIMEOUT_AFTER_READ
Value:
5 /* timeout after a read access to a
* codec register (checking RAF bit)
*/

Definition at line 137 of file ml403-ac97cr.c.

#define CODEC_TIMEOUT_ON_INIT
Value:
5 /* timeout for checking for codec
* readiness (after insmod)
*/

Definition at line 129 of file ml403-ac97cr.c.

#define CODEC_WAIT_AFTER_WRITE
Value:
100 /* general, static wait after a write
* access to a codec register, may be
* 0 to completely remove wait
*/

Definition at line 131 of file ml403-ac97cr.c.

#define CR_CODEC_ADDR (   a)    ((a) << 0)

Definition at line 313 of file ml403-ac97cr.c.

#define CR_CODEC_DATAREAD (   v)    ((v) & 0xFFFF)

Definition at line 318 of file ml403-ac97cr.c.

#define CR_CODEC_DATAWRITE (   v)    ((v) & 0xFFFF)

Definition at line 321 of file ml403-ac97cr.c.

#define CR_CODEC_READ   (1<<7)

Definition at line 314 of file ml403-ac97cr.c.

#define CR_CODEC_WRITE   (0<<7)

Definition at line 315 of file ml403-ac97cr.c.

#define CR_CODECREADY   (1<<5)

Definition at line 295 of file ml403-ac97cr.c.

#define CR_FIFO_SIZE   32

Definition at line 323 of file ml403-ac97cr.c.

#define CR_PLAYDATA (   a)    ((a) & 0xFFFF)

Definition at line 287 of file ml403-ac97cr.c.

#define CR_PLAYFULL   (1<<0)

Definition at line 300 of file ml403-ac97cr.c.

#define CR_PLAYHALF   (1<<1)

Definition at line 299 of file ml403-ac97cr.c.

#define CR_PLAYRESET   (1<<0)

Definition at line 304 of file ml403-ac97cr.c.

#define CR_PLAYUNDER   (1<<6)

Definition at line 294 of file ml403-ac97cr.c.

#define CR_RAF   (1<<4)

Definition at line 296 of file ml403-ac97cr.c.

#define CR_RECDATA (   a)    ((a) & 0xFFFF)

Definition at line 290 of file ml403-ac97cr.c.

#define CR_RECEMPTY   (1<<3)

Definition at line 297 of file ml403-ac97cr.c.

#define CR_RECFULL   (1<<2)

Definition at line 298 of file ml403-ac97cr.c.

#define CR_RECOVER   (1<<7)

Definition at line 293 of file ml403-ac97cr.c.

#define CR_RECRESET   (1<<1)

Definition at line 303 of file ml403-ac97cr.c.

#define CR_REG (   ml403_ac97cr,
  x 
)    ((ml403_ac97cr)->port + CR_REG_##x)

Definition at line 284 of file ml403-ac97cr.c.

#define CR_REG_CODEC_ADDR   0x10

Definition at line 306 of file ml403-ac97cr.c.

#define CR_REG_CODEC_DATAREAD   0x14

Definition at line 317 of file ml403-ac97cr.c.

#define CR_REG_CODEC_DATAWRITE   0x18

Definition at line 320 of file ml403-ac97cr.c.

#define CR_REG_PLAYFIFO   0x00

Definition at line 286 of file ml403-ac97cr.c.

#define CR_REG_RECFIFO   0x04

Definition at line 289 of file ml403-ac97cr.c.

#define CR_REG_RESETFIFO   0x0C

Definition at line 302 of file ml403-ac97cr.c.

#define CR_REG_STATUS   0x08

Definition at line 292 of file ml403-ac97cr.c.

#define LM4550_REG_ALLFAKE   (LM4550_REG_FAKEREAD | LM4550_REG_FAKEPROBE)

Definition at line 147 of file ml403-ac97cr.c.

#define LM4550_REG_DONEREAD
Value:
(1<<1) /* read register once, value should be
* the same currently in the register
*/

Definition at line 141 of file ml403-ac97cr.c.

#define LM4550_REG_FAKEPROBE
Value:
(1<<5) /* fake write _and_ read actions during
* probe() correctly
*/

Definition at line 145 of file ml403-ac97cr.c.

#define LM4550_REG_FAKEREAD
Value:
(1<<6) /* fake read access, always return
* default value
*/

Definition at line 146 of file ml403-ac97cr.c.

#define LM4550_REG_NOSAVE
Value:
(1<<2) /* values written to this register will
* not be saved in the register
*/

Definition at line 142 of file ml403-ac97cr.c.

#define LM4550_REG_NOSHADOW
Value:
(1<<3) /* don't do register shadowing, use plain
* hardware access
*/

Definition at line 143 of file ml403-ac97cr.c.

#define LM4550_REG_OK   (1<<0) /* register exists */

Definition at line 140 of file ml403-ac97cr.c.

#define LM4550_REG_READONLY   (1<<4) /* register is read only */

Definition at line 144 of file ml403-ac97cr.c.

#define LM4550_RF_OK (   reg)    (lm4550_regfile[reg / 2].flag & LM4550_REG_OK)

Definition at line 255 of file ml403-ac97cr.c.

#define PDEBUG (   fac,
  fmt,
  args... 
)    /* nothing */

Definition at line 123 of file ml403-ac97cr.c.

#define SND_ML403_AC97CR_DRIVER   "ml403-ac97cr"

Definition at line 67 of file ml403-ac97cr.c.

Function Documentation

MODULE_ALIAS ( "platform:"  SND_ML403_AC97CR_DRIVER)
MODULE_AUTHOR ( "Joachim Foerster <[email protected]>"  )
MODULE_DESCRIPTION ( "Xilinx ML403 AC97 Controller Reference"  )
MODULE_LICENSE ( "GPL"  )
module_param_array ( index  ,
int  ,
NULL  ,
0444   
)
module_param_array ( id  ,
charp  ,
NULL  ,
0444   
)
module_param_array ( enable  ,
bool  ,
NULL  ,
0444   
)
MODULE_PARM_DESC ( index  ,
"Index value for ML403 AC97 Controller Reference."   
)
MODULE_PARM_DESC ( id  ,
"ID string for ML403 AC97 Controller Reference."   
)
MODULE_PARM_DESC ( enable  ,
"Enable this ML403 AC97 Controller Reference."   
)
module_platform_driver ( snd_ml403_ac97cr_driver  )
MODULE_SUPPORTED_DEVICE ( "{{Xilinx,ML403 AC97 Controller Reference}}"  )

Variable Documentation

struct lm4550_reg lm4550_regfile[64]

Definition at line 156 of file ml403-ac97cr.c.

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