#include <linux/init.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
#include <linux/wait.h>
#include <linux/sched.h>
#include <linux/semaphore.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/dmaengine.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/fsl/mxs-dma.h>
#include <linux/stmp_device.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <asm/irq.h>
#include "dmaengine.h"
Go to the source code of this file.
#define BM_APBH_CTRL0_APB_BURST8_EN (1 << 29) |
#define BM_APBH_CTRL0_APB_BURST_EN (1 << 28) |
#define BM_CCW_COMMAND (3 << 0) |
#define BM_CCW_PIO_NUM (0xf << 12) |
#define BP_APBH_CTRL0_RESET_CHANNEL 16 |
#define BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL 16 |
#define BP_CCW_PIO_NUM 12 |
#define CCW_CHAIN (1 << 2) |
#define CCW_DEC_SEM (1 << 6) |
#define CCW_HALT_ON_TERM (1 << 8) |
#define CCW_TERM_FLUSH (1 << 9) |
#define CCW_WAIT4END (1 << 7) |
#define HW_APBHX_CHANNEL_CTRL 0x030 |
#define HW_APBHX_CTRL0 0x000 |
#define HW_APBHX_CTRL1 0x010 |
#define HW_APBHX_CTRL2 0x020 |
#define MAX_XFER_BYTES 0xff00 |
#define MXS_DMA_CHANNELS 16 |
#define MXS_DMA_CHANNELS_MASK 0xffff |
#define MXS_DMA_CMD_DMA_SENSE 3 /* not implemented */ |
#define MXS_DMA_CMD_NO_XFER 0 |
#define MXS_DMA_CMD_READ 2 |
#define MXS_DMA_CMD_WRITE 1 |
#define MXS_DMA_SG_LOOP (1 << 0) |
- Enumerator:
MXS_DMA_APBH |
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MXS_DMA_APBX |
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Definition at line 124 of file mxs-dma.c.
MODULE_DEVICE_TABLE |
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of |
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mxs_dma_dt_ids |
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) |
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subsys_initcall |
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mxs_dma_module_init |
| ) |
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