Linux Kernel
3.7.1
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#include <linux/platform_device.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/jiffies.h>
#include <linux/sched.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/omap-dma.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <plat/dma.h>
#include <plat/gpmc.h>
#include <linux/platform_data/mtd-nand-omap2.h>
Go to the source code of this file.
Data Structures | |
struct | omap_nand_info |
Macros | |
#define | DRIVER_NAME "omap2-nand" |
#define | OMAP_NAND_TIMEOUT_MS 5000 |
#define | NAND_Ecc_P1e (1 << 0) |
#define | NAND_Ecc_P2e (1 << 1) |
#define | NAND_Ecc_P4e (1 << 2) |
#define | NAND_Ecc_P8e (1 << 3) |
#define | NAND_Ecc_P16e (1 << 4) |
#define | NAND_Ecc_P32e (1 << 5) |
#define | NAND_Ecc_P64e (1 << 6) |
#define | NAND_Ecc_P128e (1 << 7) |
#define | NAND_Ecc_P256e (1 << 8) |
#define | NAND_Ecc_P512e (1 << 9) |
#define | NAND_Ecc_P1024e (1 << 10) |
#define | NAND_Ecc_P2048e (1 << 11) |
#define | NAND_Ecc_P1o (1 << 16) |
#define | NAND_Ecc_P2o (1 << 17) |
#define | NAND_Ecc_P4o (1 << 18) |
#define | NAND_Ecc_P8o (1 << 19) |
#define | NAND_Ecc_P16o (1 << 20) |
#define | NAND_Ecc_P32o (1 << 21) |
#define | NAND_Ecc_P64o (1 << 22) |
#define | NAND_Ecc_P128o (1 << 23) |
#define | NAND_Ecc_P256o (1 << 24) |
#define | NAND_Ecc_P512o (1 << 25) |
#define | NAND_Ecc_P1024o (1 << 26) |
#define | NAND_Ecc_P2048o (1 << 27) |
#define | TF(value) (value ? 1 : 0) |
#define | P2048e(a) (TF(a & NAND_Ecc_P2048e) << 0) |
#define | P2048o(a) (TF(a & NAND_Ecc_P2048o) << 1) |
#define | P1e(a) (TF(a & NAND_Ecc_P1e) << 2) |
#define | P1o(a) (TF(a & NAND_Ecc_P1o) << 3) |
#define | P2e(a) (TF(a & NAND_Ecc_P2e) << 4) |
#define | P2o(a) (TF(a & NAND_Ecc_P2o) << 5) |
#define | P4e(a) (TF(a & NAND_Ecc_P4e) << 6) |
#define | P4o(a) (TF(a & NAND_Ecc_P4o) << 7) |
#define | P8e(a) (TF(a & NAND_Ecc_P8e) << 0) |
#define | P8o(a) (TF(a & NAND_Ecc_P8o) << 1) |
#define | P16e(a) (TF(a & NAND_Ecc_P16e) << 2) |
#define | P16o(a) (TF(a & NAND_Ecc_P16o) << 3) |
#define | P32e(a) (TF(a & NAND_Ecc_P32e) << 4) |
#define | P32o(a) (TF(a & NAND_Ecc_P32o) << 5) |
#define | P64e(a) (TF(a & NAND_Ecc_P64e) << 6) |
#define | P64o(a) (TF(a & NAND_Ecc_P64o) << 7) |
#define | P128e(a) (TF(a & NAND_Ecc_P128e) << 0) |
#define | P128o(a) (TF(a & NAND_Ecc_P128o) << 1) |
#define | P256e(a) (TF(a & NAND_Ecc_P256e) << 2) |
#define | P256o(a) (TF(a & NAND_Ecc_P256o) << 3) |
#define | P512e(a) (TF(a & NAND_Ecc_P512e) << 4) |
#define | P512o(a) (TF(a & NAND_Ecc_P512o) << 5) |
#define | P1024e(a) (TF(a & NAND_Ecc_P1024e) << 6) |
#define | P1024o(a) (TF(a & NAND_Ecc_P1024o) << 7) |
#define | P8e_s(a) (TF(a & NAND_Ecc_P8e) << 0) |
#define | P8o_s(a) (TF(a & NAND_Ecc_P8o) << 1) |
#define | P16e_s(a) (TF(a & NAND_Ecc_P16e) << 2) |
#define | P16o_s(a) (TF(a & NAND_Ecc_P16o) << 3) |
#define | P1e_s(a) (TF(a & NAND_Ecc_P1e) << 4) |
#define | P1o_s(a) (TF(a & NAND_Ecc_P1o) << 5) |
#define | P2e_s(a) (TF(a & NAND_Ecc_P2e) << 6) |
#define | P2o_s(a) (TF(a & NAND_Ecc_P2o) << 7) |
#define | P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0) |
#define | P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1) |
#define | PREFETCH_CONFIG1_CS_SHIFT 24 |
#define | ECC_CONFIG_CS_SHIFT 1 |
#define | CS_MASK 0x7 |
#define | ENABLE_PREFETCH (0x1 << 7) |
#define | DMA_MPU_MODE_SHIFT 2 |
#define | ECCSIZE1_SHIFT 22 |
#define | ECC1RESULTSIZE 0x1 |
#define | ECCCLEAR 0x100 |
#define | ECC1 0x1 |
Functions | |
module_platform_driver (omap_nand_driver) | |
MODULE_ALIAS ("platform:"DRIVER_NAME) | |
MODULE_LICENSE ("GPL") | |
MODULE_DESCRIPTION ("Glue layer for NAND flash on TI OMAP boards") | |
MODULE_ALIAS | ( | "platform:" | DRIVER_NAME | ) |
MODULE_LICENSE | ( | "GPL" | ) |
module_platform_driver | ( | omap_nand_driver | ) |