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ohci-tmio.c
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1 /*
2  * OHCI HCD(Host Controller Driver) for USB.
3  *
4  *(C) Copyright 1999 Roman Weissgaerber <[email protected]>
5  *(C) Copyright 2000-2002 David Brownell <[email protected]>
6  *(C) Copyright 2002 Hewlett-Packard Company
7  *
8  * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core
9  * (C) Copyright 2005 Chris Humbert <[email protected]>
10  * (C) Copyright 2007, 2008 Dmitry Baryshkov <[email protected]>
11  *
12  * This is known to work with the following variants:
13  * TC6393XB revision 3 (32kB SRAM)
14  *
15  * The TMIO's OHCI core DMAs through a small internal buffer that
16  * is directly addressable by the CPU.
17  *
18  * Written from sparse documentation from Toshiba and Sharp's driver
19  * for the 2.4 kernel,
20  * usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc.
21  *
22  * This program is free software; you can redistribute it and/or modify
23  * it under the terms of the GNU General Public License version 2 as
24  * published by the Free Software Foundation.
25  */
26 
27 /*#include <linux/fs.h>
28 #include <linux/mount.h>
29 #include <linux/pagemap.h>
30 #include <linux/init.h>
31 #include <linux/namei.h>
32 #include <linux/sched.h>*/
33 #include <linux/platform_device.h>
34 #include <linux/mfd/core.h>
35 #include <linux/mfd/tmio.h>
36 #include <linux/dma-mapping.h>
37 
38 /*-------------------------------------------------------------------------*/
39 
40 /*
41  * USB Host Controller Configuration Register
42  */
43 #define CCR_REVID 0x08 /* b Revision ID */
44 #define CCR_BASE 0x10 /* l USB Control Register Base Address Low */
45 #define CCR_ILME 0x40 /* b Internal Local Memory Enable */
46 #define CCR_PM 0x4c /* w Power Management */
47 #define CCR_INTC 0x50 /* b INT Control */
48 #define CCR_LMW1L 0x54 /* w Local Memory Window 1 LMADRS Low */
49 #define CCR_LMW1H 0x56 /* w Local Memory Window 1 LMADRS High */
50 #define CCR_LMW1BL 0x58 /* w Local Memory Window 1 Base Address Low */
51 #define CCR_LMW1BH 0x5A /* w Local Memory Window 1 Base Address High */
52 #define CCR_LMW2L 0x5C /* w Local Memory Window 2 LMADRS Low */
53 #define CCR_LMW2H 0x5E /* w Local Memory Window 2 LMADRS High */
54 #define CCR_LMW2BL 0x60 /* w Local Memory Window 2 Base Address Low */
55 #define CCR_LMW2BH 0x62 /* w Local Memory Window 2 Base Address High */
56 #define CCR_MISC 0xFC /* b MISC */
57 
58 #define CCR_PM_GKEN 0x0001
59 #define CCR_PM_CKRNEN 0x0002
60 #define CCR_PM_USBPW1 0x0004
61 #define CCR_PM_USBPW2 0x0008
62 #define CCR_PM_USBPW3 0x0008
63 #define CCR_PM_PMEE 0x0100
64 #define CCR_PM_PMES 0x8000
65 
66 /*-------------------------------------------------------------------------*/
67 
68 struct tmio_hcd {
69  void __iomem *ccr;
70  spinlock_t lock; /* protects RMW cycles */
71 };
72 
73 #define hcd_to_tmio(hcd) ((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1))
74 
75 /*-------------------------------------------------------------------------*/
76 
77 static void tmio_write_pm(struct platform_device *dev)
78 {
79  struct usb_hcd *hcd = platform_get_drvdata(dev);
80  struct tmio_hcd *tmio = hcd_to_tmio(hcd);
81  u16 pm;
82  unsigned long flags;
83 
84  spin_lock_irqsave(&tmio->lock, flags);
85 
86  pm = CCR_PM_GKEN | CCR_PM_CKRNEN |
87  CCR_PM_PMEE | CCR_PM_PMES;
88 
89  tmio_iowrite16(pm, tmio->ccr + CCR_PM);
90  spin_unlock_irqrestore(&tmio->lock, flags);
91 }
92 
93 static void tmio_stop_hc(struct platform_device *dev)
94 {
95  struct usb_hcd *hcd = platform_get_drvdata(dev);
96  struct ohci_hcd *ohci = hcd_to_ohci(hcd);
97  struct tmio_hcd *tmio = hcd_to_tmio(hcd);
98  u16 pm;
99 
100  pm = CCR_PM_GKEN | CCR_PM_CKRNEN;
101  switch (ohci->num_ports) {
102  default:
103  dev_err(&dev->dev, "Unsupported amount of ports: %d\n", ohci->num_ports);
104  case 3:
105  pm |= CCR_PM_USBPW3;
106  case 2:
107  pm |= CCR_PM_USBPW2;
108  case 1:
109  pm |= CCR_PM_USBPW1;
110  }
111  tmio_iowrite8(0, tmio->ccr + CCR_INTC);
112  tmio_iowrite8(0, tmio->ccr + CCR_ILME);
113  tmio_iowrite16(0, tmio->ccr + CCR_BASE);
114  tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2);
115  tmio_iowrite16(pm, tmio->ccr + CCR_PM);
116 }
117 
118 static void tmio_start_hc(struct platform_device *dev)
119 {
120  struct usb_hcd *hcd = platform_get_drvdata(dev);
121  struct tmio_hcd *tmio = hcd_to_tmio(hcd);
122  unsigned long base = hcd->rsrc_start;
123 
124  tmio_write_pm(dev);
125  tmio_iowrite16(base, tmio->ccr + CCR_BASE);
126  tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2);
127  tmio_iowrite8(1, tmio->ccr + CCR_ILME);
128  tmio_iowrite8(2, tmio->ccr + CCR_INTC);
129 
130  dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n",
131  tmio_ioread8(tmio->ccr + CCR_REVID), hcd->rsrc_start, hcd->irq);
132 }
133 
134 static int ohci_tmio_start(struct usb_hcd *hcd)
135 {
136  struct ohci_hcd *ohci = hcd_to_ohci(hcd);
137  int ret;
138 
139  if ((ret = ohci_init(ohci)) < 0)
140  return ret;
141 
142  if ((ret = ohci_run(ohci)) < 0) {
143  dev_err(hcd->self.controller, "can't start %s\n",
144  hcd->self.bus_name);
145  ohci_stop(hcd);
146  return ret;
147  }
148 
149  return 0;
150 }
151 
152 static const struct hc_driver ohci_tmio_hc_driver = {
153  .description = hcd_name,
154  .product_desc = "TMIO OHCI USB Host Controller",
155  .hcd_priv_size = sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd),
156 
157  /* generic hardware linkage */
158  .irq = ohci_irq,
159  .flags = HCD_USB11 | HCD_MEMORY | HCD_LOCAL_MEM,
160 
161  /* basic lifecycle operations */
162  .start = ohci_tmio_start,
163  .stop = ohci_stop,
164  .shutdown = ohci_shutdown,
165 
166  /* managing i/o requests and associated device resources */
167  .urb_enqueue = ohci_urb_enqueue,
168  .urb_dequeue = ohci_urb_dequeue,
169  .endpoint_disable = ohci_endpoint_disable,
170 
171  /* scheduling support */
172  .get_frame_number = ohci_get_frame,
173 
174  /* root hub support */
175  .hub_status_data = ohci_hub_status_data,
176  .hub_control = ohci_hub_control,
177 #ifdef CONFIG_PM
178  .bus_suspend = ohci_bus_suspend,
179  .bus_resume = ohci_bus_resume,
180 #endif
181  .start_port_reset = ohci_start_port_reset,
182 };
183 
184 /*-------------------------------------------------------------------------*/
185 static struct platform_driver ohci_hcd_tmio_driver;
186 
187 static int __devinit ohci_hcd_tmio_drv_probe(struct platform_device *dev)
188 {
189  const struct mfd_cell *cell = mfd_get_cell(dev);
190  struct resource *regs = platform_get_resource(dev, IORESOURCE_MEM, 0);
191  struct resource *config = platform_get_resource(dev, IORESOURCE_MEM, 1);
192  struct resource *sram = platform_get_resource(dev, IORESOURCE_MEM, 2);
193  int irq = platform_get_irq(dev, 0);
194  struct tmio_hcd *tmio;
195  struct ohci_hcd *ohci;
196  struct usb_hcd *hcd;
197  int ret;
198 
199  if (usb_disabled())
200  return -ENODEV;
201 
202  if (!cell)
203  return -EINVAL;
204 
205  hcd = usb_create_hcd(&ohci_tmio_hc_driver, &dev->dev, dev_name(&dev->dev));
206  if (!hcd) {
207  ret = -ENOMEM;
208  goto err_usb_create_hcd;
209  }
210 
211  hcd->rsrc_start = regs->start;
212  hcd->rsrc_len = resource_size(regs);
213 
214  tmio = hcd_to_tmio(hcd);
215 
216  spin_lock_init(&tmio->lock);
217 
218  tmio->ccr = ioremap(config->start, resource_size(config));
219  if (!tmio->ccr) {
220  ret = -ENOMEM;
221  goto err_ioremap_ccr;
222  }
223 
224  hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
225  if (!hcd->regs) {
226  ret = -ENOMEM;
227  goto err_ioremap_regs;
228  }
229 
230  if (!dma_declare_coherent_memory(&dev->dev, sram->start,
231  sram->start,
232  resource_size(sram),
233  DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE)) {
234  ret = -EBUSY;
235  goto err_dma_declare;
236  }
237 
238  if (cell->enable) {
239  ret = cell->enable(dev);
240  if (ret)
241  goto err_enable;
242  }
243 
244  tmio_start_hc(dev);
245  ohci = hcd_to_ohci(hcd);
246  ohci_hcd_init(ohci);
247 
248  ret = usb_add_hcd(hcd, irq, 0);
249  if (ret)
250  goto err_add_hcd;
251 
252  if (ret == 0)
253  return ret;
254 
255  usb_remove_hcd(hcd);
256 
257 err_add_hcd:
258  tmio_stop_hc(dev);
259  if (cell->disable)
260  cell->disable(dev);
261 err_enable:
262  dma_release_declared_memory(&dev->dev);
263 err_dma_declare:
264  iounmap(hcd->regs);
265 err_ioremap_regs:
266  iounmap(tmio->ccr);
267 err_ioremap_ccr:
268  usb_put_hcd(hcd);
269 err_usb_create_hcd:
270 
271  return ret;
272 }
273 
274 static int __devexit ohci_hcd_tmio_drv_remove(struct platform_device *dev)
275 {
276  struct usb_hcd *hcd = platform_get_drvdata(dev);
277  struct tmio_hcd *tmio = hcd_to_tmio(hcd);
278  const struct mfd_cell *cell = mfd_get_cell(dev);
279 
280  usb_remove_hcd(hcd);
281  tmio_stop_hc(dev);
282  if (cell->disable)
283  cell->disable(dev);
284  dma_release_declared_memory(&dev->dev);
285  iounmap(hcd->regs);
286  iounmap(tmio->ccr);
287  usb_put_hcd(hcd);
288 
289  platform_set_drvdata(dev, NULL);
290 
291  return 0;
292 }
293 
294 #ifdef CONFIG_PM
295 static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state)
296 {
297  const struct mfd_cell *cell = mfd_get_cell(dev);
298  struct usb_hcd *hcd = platform_get_drvdata(dev);
299  struct ohci_hcd *ohci = hcd_to_ohci(hcd);
300  struct tmio_hcd *tmio = hcd_to_tmio(hcd);
301  unsigned long flags;
302  u8 misc;
303  int ret;
304 
305  if (time_before(jiffies, ohci->next_statechange))
306  msleep(5);
307  ohci->next_statechange = jiffies;
308 
309  spin_lock_irqsave(&tmio->lock, flags);
310 
311  misc = tmio_ioread8(tmio->ccr + CCR_MISC);
312  misc |= 1 << 3; /* USSUSP */
313  tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
314 
315  spin_unlock_irqrestore(&tmio->lock, flags);
316 
317  if (cell->suspend) {
318  ret = cell->suspend(dev);
319  if (ret)
320  return ret;
321  }
322  return 0;
323 }
324 
325 static int ohci_hcd_tmio_drv_resume(struct platform_device *dev)
326 {
327  const struct mfd_cell *cell = mfd_get_cell(dev);
328  struct usb_hcd *hcd = platform_get_drvdata(dev);
329  struct ohci_hcd *ohci = hcd_to_ohci(hcd);
330  struct tmio_hcd *tmio = hcd_to_tmio(hcd);
331  unsigned long flags;
332  u8 misc;
333  int ret;
334 
335  if (time_before(jiffies, ohci->next_statechange))
336  msleep(5);
337  ohci->next_statechange = jiffies;
338 
339  if (cell->resume) {
340  ret = cell->resume(dev);
341  if (ret)
342  return ret;
343  }
344 
345  tmio_start_hc(dev);
346 
347  spin_lock_irqsave(&tmio->lock, flags);
348 
349  misc = tmio_ioread8(tmio->ccr + CCR_MISC);
350  misc &= ~(1 << 3); /* USSUSP */
351  tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
352 
353  spin_unlock_irqrestore(&tmio->lock, flags);
354 
355  ohci_finish_controller_resume(hcd);
356 
357  return 0;
358 }
359 #else
360 #define ohci_hcd_tmio_drv_suspend NULL
361 #define ohci_hcd_tmio_drv_resume NULL
362 #endif
363 
364 static struct platform_driver ohci_hcd_tmio_driver = {
365  .probe = ohci_hcd_tmio_drv_probe,
366  .remove = __devexit_p(ohci_hcd_tmio_drv_remove),
367  .shutdown = usb_hcd_platform_shutdown,
368  .suspend = ohci_hcd_tmio_drv_suspend,
369  .resume = ohci_hcd_tmio_drv_resume,
370  .driver = {
371  .name = "tmio-ohci",
372  .owner = THIS_MODULE,
373  },
374 };
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