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patch_hdmi.c
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1 /*
2  *
3  * patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  * Copyright (c) 2006 ATI Technologies Inc.
7  * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8  * Copyright (c) 2008 Wei Ni <[email protected]>
9  *
10  * Authors:
11  * Wu Fengguang <[email protected]>
12  *
13  * Maintained by:
14  * Wu Fengguang <[email protected]>
15  *
16  * This program is free software; you can redistribute it and/or modify it
17  * under the terms of the GNU General Public License as published by the Free
18  * Software Foundation; either version 2 of the License, or (at your option)
19  * any later version.
20  *
21  * This program is distributed in the hope that it will be useful, but
22  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23  * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24  * for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software Foundation,
28  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29  */
30 
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
41 #include "hda_jack.h"
42 
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46 
47 /*
48  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
49  * could support N independent pipes, each of them can be connected to one or
50  * more ports (DVI, HDMI or DisplayPort).
51  *
52  * The HDA correspondence of pipes/ports are converter/pin nodes.
53  */
54 #define MAX_HDMI_CVTS 8
55 #define MAX_HDMI_PINS 8
56 
57 struct hdmi_spec_per_cvt {
58  hda_nid_t cvt_nid;
59  int assigned;
60  unsigned int channels_min;
61  unsigned int channels_max;
62  u32 rates;
63  u64 formats;
64  unsigned int maxbps;
65 };
66 
67 struct hdmi_spec_per_pin {
68  hda_nid_t pin_nid;
69  int num_mux_nids;
70  hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
71 
72  struct hda_codec *codec;
73  struct hdmi_eld sink_eld;
74  struct delayed_work work;
75  int repoll_count;
76  bool non_pcm;
77  bool chmap_set; /* channel-map override by ALSA API? */
78  unsigned char chmap[8]; /* ALSA API channel-map */
79 };
80 
81 struct hdmi_spec {
82  int num_cvts;
83  struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
84 
85  int num_pins;
86  struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
87  struct hda_pcm pcm_rec[MAX_HDMI_PINS];
88  unsigned int channels_max; /* max over all cvts */
89 
90  /*
91  * Non-generic ATI/NVIDIA specific
92  */
93  struct hda_multi_out multiout;
94  struct hda_pcm_stream pcm_playback;
95 };
96 
97 
98 struct hdmi_audio_infoframe {
99  u8 type; /* 0x84 */
100  u8 ver; /* 0x01 */
101  u8 len; /* 0x0a */
102 
103  u8 checksum;
104 
105  u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
106  u8 SS01_SF24;
107  u8 CXT04;
108  u8 CA;
109  u8 LFEPBL01_LSV36_DM_INH7;
110 };
111 
112 struct dp_audio_infoframe {
113  u8 type; /* 0x84 */
114  u8 len; /* 0x1b */
115  u8 ver; /* 0x11 << 2 */
116 
117  u8 CC02_CT47; /* match with HDMI infoframe from this on */
118  u8 SS01_SF24;
119  u8 CXT04;
120  u8 CA;
121  u8 LFEPBL01_LSV36_DM_INH7;
122 };
123 
124 union audio_infoframe {
125  struct hdmi_audio_infoframe hdmi;
126  struct dp_audio_infoframe dp;
127  u8 bytes[0];
128 };
129 
130 /*
131  * CEA speaker placement:
132  *
133  * FLH FCH FRH
134  * FLW FL FLC FC FRC FR FRW
135  *
136  * LFE
137  * TC
138  *
139  * RL RLC RC RRC RR
140  *
141  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
142  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
143  */
144 enum cea_speaker_placement {
145  FL = (1 << 0), /* Front Left */
146  FC = (1 << 1), /* Front Center */
147  FR = (1 << 2), /* Front Right */
148  FLC = (1 << 3), /* Front Left Center */
149  FRC = (1 << 4), /* Front Right Center */
150  RL = (1 << 5), /* Rear Left */
151  RC = (1 << 6), /* Rear Center */
152  RR = (1 << 7), /* Rear Right */
153  RLC = (1 << 8), /* Rear Left Center */
154  RRC = (1 << 9), /* Rear Right Center */
155  LFE = (1 << 10), /* Low Frequency Effect */
156  FLW = (1 << 11), /* Front Left Wide */
157  FRW = (1 << 12), /* Front Right Wide */
158  FLH = (1 << 13), /* Front Left High */
159  FCH = (1 << 14), /* Front Center High */
160  FRH = (1 << 15), /* Front Right High */
161  TC = (1 << 16), /* Top Center */
162 };
163 
164 /*
165  * ELD SA bits in the CEA Speaker Allocation data block
166  */
167 static int eld_speaker_allocation_bits[] = {
168  [0] = FL | FR,
169  [1] = LFE,
170  [2] = FC,
171  [3] = RL | RR,
172  [4] = RC,
173  [5] = FLC | FRC,
174  [6] = RLC | RRC,
175  /* the following are not defined in ELD yet */
176  [7] = FLW | FRW,
177  [8] = FLH | FRH,
178  [9] = TC,
179  [10] = FCH,
180 };
181 
182 struct cea_channel_speaker_allocation {
183  int ca_index;
184  int speakers[8];
185 
186  /* derived values, just for convenience */
187  int channels;
188  int spk_mask;
189 };
190 
191 /*
192  * ALSA sequence is:
193  *
194  * surround40 surround41 surround50 surround51 surround71
195  * ch0 front left = = = =
196  * ch1 front right = = = =
197  * ch2 rear left = = = =
198  * ch3 rear right = = = =
199  * ch4 LFE center center center
200  * ch5 LFE LFE
201  * ch6 side left
202  * ch7 side right
203  *
204  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
205  */
206 static int hdmi_channel_mapping[0x32][8] = {
207  /* stereo */
208  [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
209  /* 2.1 */
210  [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
211  /* Dolby Surround */
212  [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
213  /* surround40 */
214  [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
215  /* 4ch */
216  [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
217  /* surround41 */
218  [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
219  /* surround50 */
220  [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
221  /* surround51 */
222  [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
223  /* 7.1 */
224  [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
225 };
226 
227 /*
228  * This is an ordered list!
229  *
230  * The preceding ones have better chances to be selected by
231  * hdmi_channel_allocation().
232  */
233 static struct cea_channel_speaker_allocation channel_allocations[] = {
234 /* channel: 7 6 5 4 3 2 1 0 */
235 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
236  /* 2.1 */
237 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
238  /* Dolby Surround */
239 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
240  /* surround40 */
241 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
242  /* surround41 */
243 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
244  /* surround50 */
245 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
246  /* surround51 */
247 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
248  /* 6.1 */
249 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
250  /* surround71 */
251 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
252 
253 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
254 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
255 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
256 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
257 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
258 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
259 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
260 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
261 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
262 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
263 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
264 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
265 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
266 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
267 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
268 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
269 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
270 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
271 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
272 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
273 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
274 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
275 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
276 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
277 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
278 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
279 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
280 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
281 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
282 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
283 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
284 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
285 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
286 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
287 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
288 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
289 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
290 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
291 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
292 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
293 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
294 };
295 
296 
297 /*
298  * HDMI routines
299  */
300 
301 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
302 {
303  int pin_idx;
304 
305  for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
306  if (spec->pins[pin_idx].pin_nid == pin_nid)
307  return pin_idx;
308 
309  snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
310  return -EINVAL;
311 }
312 
313 static int hinfo_to_pin_index(struct hdmi_spec *spec,
314  struct hda_pcm_stream *hinfo)
315 {
316  int pin_idx;
317 
318  for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
319  if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
320  return pin_idx;
321 
322  snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
323  return -EINVAL;
324 }
325 
326 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
327 {
328  int cvt_idx;
329 
330  for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
331  if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
332  return cvt_idx;
333 
334  snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
335  return -EINVAL;
336 }
337 
338 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
339  struct snd_ctl_elem_info *uinfo)
340 {
341  struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
342  struct hdmi_spec *spec;
343  int pin_idx;
344 
345  spec = codec->spec;
346  uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
347 
348  pin_idx = kcontrol->private_value;
349  uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
350 
351  return 0;
352 }
353 
354 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
355  struct snd_ctl_elem_value *ucontrol)
356 {
357  struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
358  struct hdmi_spec *spec;
359  int pin_idx;
360 
361  spec = codec->spec;
362  pin_idx = kcontrol->private_value;
363 
364  memcpy(ucontrol->value.bytes.data,
365  spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
366 
367  return 0;
368 }
369 
370 static struct snd_kcontrol_new eld_bytes_ctl = {
371  .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
372  .iface = SNDRV_CTL_ELEM_IFACE_PCM,
373  .name = "ELD",
374  .info = hdmi_eld_ctl_info,
375  .get = hdmi_eld_ctl_get,
376 };
377 
378 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
379  int device)
380 {
381  struct snd_kcontrol *kctl;
382  struct hdmi_spec *spec = codec->spec;
383  int err;
384 
385  kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
386  if (!kctl)
387  return -ENOMEM;
388  kctl->private_value = pin_idx;
389  kctl->id.device = device;
390 
391  err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
392  if (err < 0)
393  return err;
394 
395  return 0;
396 }
397 
398 #ifdef BE_PARANOID
399 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
400  int *packet_index, int *byte_index)
401 {
402  int val;
403 
404  val = snd_hda_codec_read(codec, pin_nid, 0,
405  AC_VERB_GET_HDMI_DIP_INDEX, 0);
406 
407  *packet_index = val >> 5;
408  *byte_index = val & 0x1f;
409 }
410 #endif
411 
412 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
413  int packet_index, int byte_index)
414 {
415  int val;
416 
417  val = (packet_index << 5) | (byte_index & 0x1f);
418 
419  snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
420 }
421 
422 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
423  unsigned char val)
424 {
425  snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
426 }
427 
428 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
429 {
430  /* Unmute */
431  if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
432  snd_hda_codec_write(codec, pin_nid, 0,
433  AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
434  /* Disable pin out until stream is active*/
435  snd_hda_codec_write(codec, pin_nid, 0,
436  AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
437 }
438 
439 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
440 {
441  return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
442  AC_VERB_GET_CVT_CHAN_COUNT, 0);
443 }
444 
445 static void hdmi_set_channel_count(struct hda_codec *codec,
446  hda_nid_t cvt_nid, int chs)
447 {
448  if (chs != hdmi_get_channel_count(codec, cvt_nid))
449  snd_hda_codec_write(codec, cvt_nid, 0,
450  AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
451 }
452 
453 
454 /*
455  * Channel mapping routines
456  */
457 
458 /*
459  * Compute derived values in channel_allocations[].
460  */
461 static void init_channel_allocations(void)
462 {
463  int i, j;
464  struct cea_channel_speaker_allocation *p;
465 
466  for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
467  p = channel_allocations + i;
468  p->channels = 0;
469  p->spk_mask = 0;
470  for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
471  if (p->speakers[j]) {
472  p->channels++;
473  p->spk_mask |= p->speakers[j];
474  }
475  }
476 }
477 
478 static int get_channel_allocation_order(int ca)
479 {
480  int i;
481 
482  for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
483  if (channel_allocations[i].ca_index == ca)
484  break;
485  }
486  return i;
487 }
488 
489 /*
490  * The transformation takes two steps:
491  *
492  * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
493  * spk_mask => (channel_allocations[]) => ai->CA
494  *
495  * TODO: it could select the wrong CA from multiple candidates.
496 */
497 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
498 {
499  int i;
500  int ca = 0;
501  int spk_mask = 0;
502  char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
503 
504  /*
505  * CA defaults to 0 for basic stereo audio
506  */
507  if (channels <= 2)
508  return 0;
509 
510  /*
511  * expand ELD's speaker allocation mask
512  *
513  * ELD tells the speaker mask in a compact(paired) form,
514  * expand ELD's notions to match the ones used by Audio InfoFrame.
515  */
516  for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
517  if (eld->spk_alloc & (1 << i))
518  spk_mask |= eld_speaker_allocation_bits[i];
519  }
520 
521  /* search for the first working match in the CA table */
522  for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
523  if (channels == channel_allocations[i].channels &&
524  (spk_mask & channel_allocations[i].spk_mask) ==
525  channel_allocations[i].spk_mask) {
526  ca = channel_allocations[i].ca_index;
527  break;
528  }
529  }
530 
531  snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
532  snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
533  ca, channels, buf);
534 
535  return ca;
536 }
537 
538 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
539  hda_nid_t pin_nid)
540 {
541 #ifdef CONFIG_SND_DEBUG_VERBOSE
542  int i;
543  int slot;
544 
545  for (i = 0; i < 8; i++) {
546  slot = snd_hda_codec_read(codec, pin_nid, 0,
547  AC_VERB_GET_HDMI_CHAN_SLOT, i);
548  printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
549  slot >> 4, slot & 0xf);
550  }
551 #endif
552 }
553 
554 
555 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
556  hda_nid_t pin_nid,
557  bool non_pcm,
558  int ca)
559 {
560  int i;
561  int err;
562  int order;
563  int non_pcm_mapping[8];
564 
565  order = get_channel_allocation_order(ca);
566 
567  if (hdmi_channel_mapping[ca][1] == 0) {
568  for (i = 0; i < channel_allocations[order].channels; i++)
569  hdmi_channel_mapping[ca][i] = i | (i << 4);
570  for (; i < 8; i++)
571  hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
572  }
573 
574  if (non_pcm) {
575  for (i = 0; i < channel_allocations[order].channels; i++)
576  non_pcm_mapping[i] = i | (i << 4);
577  for (; i < 8; i++)
578  non_pcm_mapping[i] = 0xf | (i << 4);
579  }
580 
581  for (i = 0; i < 8; i++) {
582  err = snd_hda_codec_write(codec, pin_nid, 0,
583  AC_VERB_SET_HDMI_CHAN_SLOT,
584  non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
585  if (err) {
586  snd_printdd(KERN_NOTICE
587  "HDMI: channel mapping failed\n");
588  break;
589  }
590  }
591 
592  hdmi_debug_channel_mapping(codec, pin_nid);
593 }
594 
595 struct channel_map_table {
596  unsigned char map; /* ALSA API channel map position */
597  unsigned char cea_slot; /* CEA slot value */
598  int spk_mask; /* speaker position bit mask */
599 };
600 
601 static struct channel_map_table map_tables[] = {
602  { SNDRV_CHMAP_FL, 0x00, FL },
603  { SNDRV_CHMAP_FR, 0x01, FR },
604  { SNDRV_CHMAP_RL, 0x04, RL },
605  { SNDRV_CHMAP_RR, 0x05, RR },
606  { SNDRV_CHMAP_LFE, 0x02, LFE },
607  { SNDRV_CHMAP_FC, 0x03, FC },
608  { SNDRV_CHMAP_RLC, 0x06, RLC },
609  { SNDRV_CHMAP_RRC, 0x07, RRC },
610  {} /* terminator */
611 };
612 
613 /* from ALSA API channel position to speaker bit mask */
614 static int to_spk_mask(unsigned char c)
615 {
616  struct channel_map_table *t = map_tables;
617  for (; t->map; t++) {
618  if (t->map == c)
619  return t->spk_mask;
620  }
621  return 0;
622 }
623 
624 /* from ALSA API channel position to CEA slot */
625 static int to_cea_slot(unsigned char c)
626 {
627  struct channel_map_table *t = map_tables;
628  for (; t->map; t++) {
629  if (t->map == c)
630  return t->cea_slot;
631  }
632  return 0x0f;
633 }
634 
635 /* from CEA slot to ALSA API channel position */
636 static int from_cea_slot(unsigned char c)
637 {
638  struct channel_map_table *t = map_tables;
639  for (; t->map; t++) {
640  if (t->cea_slot == c)
641  return t->map;
642  }
643  return 0;
644 }
645 
646 /* from speaker bit mask to ALSA API channel position */
647 static int spk_to_chmap(int spk)
648 {
649  struct channel_map_table *t = map_tables;
650  for (; t->map; t++) {
651  if (t->spk_mask == spk)
652  return t->map;
653  }
654  return 0;
655 }
656 
657 /* get the CA index corresponding to the given ALSA API channel map */
658 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
659 {
660  int i, spks = 0, spk_mask = 0;
661 
662  for (i = 0; i < chs; i++) {
663  int mask = to_spk_mask(map[i]);
664  if (mask) {
665  spk_mask |= mask;
666  spks++;
667  }
668  }
669 
670  for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
671  if ((chs == channel_allocations[i].channels ||
672  spks == channel_allocations[i].channels) &&
673  (spk_mask & channel_allocations[i].spk_mask) ==
674  channel_allocations[i].spk_mask)
675  return channel_allocations[i].ca_index;
676  }
677  return -1;
678 }
679 
680 /* set up the channel slots for the given ALSA API channel map */
681 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
682  hda_nid_t pin_nid,
683  int chs, unsigned char *map)
684 {
685  int i;
686  for (i = 0; i < 8; i++) {
687  int val, err;
688  if (i < chs)
689  val = to_cea_slot(map[i]);
690  else
691  val = 0xf;
692  val |= (i << 4);
693  err = snd_hda_codec_write(codec, pin_nid, 0,
694  AC_VERB_SET_HDMI_CHAN_SLOT, val);
695  if (err)
696  return -EINVAL;
697  }
698  return 0;
699 }
700 
701 /* store ALSA API channel map from the current default map */
702 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
703 {
704  int i;
705  for (i = 0; i < 8; i++) {
706  if (i < channel_allocations[ca].channels)
707  map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
708  else
709  map[i] = 0;
710  }
711 }
712 
713 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
714  hda_nid_t pin_nid, bool non_pcm, int ca,
715  int channels, unsigned char *map)
716 {
717  if (!non_pcm && map) {
718  hdmi_manual_setup_channel_mapping(codec, pin_nid,
719  channels, map);
720  } else {
721  hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
722  hdmi_setup_fake_chmap(map, ca);
723  }
724 }
725 
726 /*
727  * Audio InfoFrame routines
728  */
729 
730 /*
731  * Enable Audio InfoFrame Transmission
732  */
733 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
734  hda_nid_t pin_nid)
735 {
736  hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
737  snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
738  AC_DIPXMIT_BEST);
739 }
740 
741 /*
742  * Disable Audio InfoFrame Transmission
743  */
744 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
745  hda_nid_t pin_nid)
746 {
747  hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
748  snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
749  AC_DIPXMIT_DISABLE);
750 }
751 
752 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
753 {
754 #ifdef CONFIG_SND_DEBUG_VERBOSE
755  int i;
756  int size;
757 
758  size = snd_hdmi_get_eld_size(codec, pin_nid);
759  printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
760 
761  for (i = 0; i < 8; i++) {
762  size = snd_hda_codec_read(codec, pin_nid, 0,
763  AC_VERB_GET_HDMI_DIP_SIZE, i);
764  printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
765  }
766 #endif
767 }
768 
769 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
770 {
771 #ifdef BE_PARANOID
772  int i, j;
773  int size;
774  int pi, bi;
775  for (i = 0; i < 8; i++) {
776  size = snd_hda_codec_read(codec, pin_nid, 0,
777  AC_VERB_GET_HDMI_DIP_SIZE, i);
778  if (size == 0)
779  continue;
780 
781  hdmi_set_dip_index(codec, pin_nid, i, 0x0);
782  for (j = 1; j < 1000; j++) {
783  hdmi_write_dip_byte(codec, pin_nid, 0x0);
784  hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
785  if (pi != i)
786  snd_printd(KERN_INFO "dip index %d: %d != %d\n",
787  bi, pi, i);
788  if (bi == 0) /* byte index wrapped around */
789  break;
790  }
791  snd_printd(KERN_INFO
792  "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
793  i, size, j);
794  }
795 #endif
796 }
797 
798 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
799 {
800  u8 *bytes = (u8 *)hdmi_ai;
801  u8 sum = 0;
802  int i;
803 
804  hdmi_ai->checksum = 0;
805 
806  for (i = 0; i < sizeof(*hdmi_ai); i++)
807  sum += bytes[i];
808 
809  hdmi_ai->checksum = -sum;
810 }
811 
812 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
813  hda_nid_t pin_nid,
814  u8 *dip, int size)
815 {
816  int i;
817 
818  hdmi_debug_dip_size(codec, pin_nid);
819  hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
820 
821  hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
822  for (i = 0; i < size; i++)
823  hdmi_write_dip_byte(codec, pin_nid, dip[i]);
824 }
825 
826 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
827  u8 *dip, int size)
828 {
829  u8 val;
830  int i;
831 
832  if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
833  != AC_DIPXMIT_BEST)
834  return false;
835 
836  hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
837  for (i = 0; i < size; i++) {
838  val = snd_hda_codec_read(codec, pin_nid, 0,
839  AC_VERB_GET_HDMI_DIP_DATA, 0);
840  if (val != dip[i])
841  return false;
842  }
843 
844  return true;
845 }
846 
847 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
848  bool non_pcm,
849  struct snd_pcm_substream *substream)
850 {
851  struct hdmi_spec *spec = codec->spec;
852  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
853  hda_nid_t pin_nid = per_pin->pin_nid;
854  int channels = substream->runtime->channels;
855  struct hdmi_eld *eld;
856  int ca;
857  union audio_infoframe ai;
858 
859  eld = &spec->pins[pin_idx].sink_eld;
860  if (!eld->monitor_present)
861  return;
862 
863  if (!non_pcm && per_pin->chmap_set)
864  ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
865  else
866  ca = hdmi_channel_allocation(eld, channels);
867  if (ca < 0)
868  ca = 0;
869 
870  memset(&ai, 0, sizeof(ai));
871  if (eld->conn_type == 0) { /* HDMI */
872  struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
873 
874  hdmi_ai->type = 0x84;
875  hdmi_ai->ver = 0x01;
876  hdmi_ai->len = 0x0a;
877  hdmi_ai->CC02_CT47 = channels - 1;
878  hdmi_ai->CA = ca;
879  hdmi_checksum_audio_infoframe(hdmi_ai);
880  } else if (eld->conn_type == 1) { /* DisplayPort */
881  struct dp_audio_infoframe *dp_ai = &ai.dp;
882 
883  dp_ai->type = 0x84;
884  dp_ai->len = 0x1b;
885  dp_ai->ver = 0x11 << 2;
886  dp_ai->CC02_CT47 = channels - 1;
887  dp_ai->CA = ca;
888  } else {
889  snd_printd("HDMI: unknown connection type at pin %d\n",
890  pin_nid);
891  return;
892  }
893 
894  /*
895  * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
896  * sizeof(*dp_ai) to avoid partial match/update problems when
897  * the user switches between HDMI/DP monitors.
898  */
899  if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
900  sizeof(ai))) {
901  snd_printdd("hdmi_setup_audio_infoframe: "
902  "pin=%d channels=%d\n",
903  pin_nid,
904  channels);
905  hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
906  channels, per_pin->chmap);
907  hdmi_stop_infoframe_trans(codec, pin_nid);
908  hdmi_fill_audio_infoframe(codec, pin_nid,
909  ai.bytes, sizeof(ai));
910  hdmi_start_infoframe_trans(codec, pin_nid);
911  } else {
912  /* For non-pcm audio switch, setup new channel mapping
913  * accordingly */
914  if (per_pin->non_pcm != non_pcm)
915  hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
916  channels, per_pin->chmap);
917  }
918 
919  per_pin->non_pcm = non_pcm;
920 }
921 
922 
923 /*
924  * Unsolicited events
925  */
926 
927 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
928 
929 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
930 {
931  struct hdmi_spec *spec = codec->spec;
932  int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
933  int pin_nid;
934  int pin_idx;
935  struct hda_jack_tbl *jack;
936 
937  jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
938  if (!jack)
939  return;
940  pin_nid = jack->nid;
941  jack->jack_dirty = 1;
942 
943  _snd_printd(SND_PR_VERBOSE,
944  "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
945  codec->addr, pin_nid,
946  !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
947 
948  pin_idx = pin_nid_to_pin_index(spec, pin_nid);
949  if (pin_idx < 0)
950  return;
951 
952  hdmi_present_sense(&spec->pins[pin_idx], 1);
953  snd_hda_jack_report_sync(codec);
954 }
955 
956 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
957 {
958  int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
959  int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
960  int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
961  int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
962 
963  printk(KERN_INFO
964  "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
965  codec->addr,
966  tag,
967  subtag,
968  cp_state,
969  cp_ready);
970 
971  /* TODO */
972  if (cp_state)
973  ;
974  if (cp_ready)
975  ;
976 }
977 
978 
979 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
980 {
981  int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
982  int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
983 
984  if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
985  snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
986  return;
987  }
988 
989  if (subtag == 0)
990  hdmi_intrinsic_event(codec, res);
991  else
992  hdmi_non_intrinsic_event(codec, res);
993 }
994 
995 /*
996  * Callbacks
997  */
998 
999 /* HBR should be Non-PCM, 8 channels */
1000 #define is_hbr_format(format) \
1001  ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1002 
1003 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1004  hda_nid_t pin_nid, u32 stream_tag, int format)
1005 {
1006  int pinctl;
1007  int new_pinctl = 0;
1008 
1009  if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1010  pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1011  AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1012 
1013  new_pinctl = pinctl & ~AC_PINCTL_EPT;
1014  if (is_hbr_format(format))
1015  new_pinctl |= AC_PINCTL_EPT_HBR;
1016  else
1017  new_pinctl |= AC_PINCTL_EPT_NATIVE;
1018 
1019  snd_printdd("hdmi_setup_stream: "
1020  "NID=0x%x, %spinctl=0x%x\n",
1021  pin_nid,
1022  pinctl == new_pinctl ? "" : "new-",
1023  new_pinctl);
1024 
1025  if (pinctl != new_pinctl)
1026  snd_hda_codec_write(codec, pin_nid, 0,
1027  AC_VERB_SET_PIN_WIDGET_CONTROL,
1028  new_pinctl);
1029 
1030  }
1031  if (is_hbr_format(format) && !new_pinctl) {
1032  snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1033  return -EINVAL;
1034  }
1035 
1036  snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1037  return 0;
1038 }
1039 
1040 /*
1041  * HDA PCM callbacks
1042  */
1043 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1044  struct hda_codec *codec,
1045  struct snd_pcm_substream *substream)
1046 {
1047  struct hdmi_spec *spec = codec->spec;
1048  struct snd_pcm_runtime *runtime = substream->runtime;
1049  int pin_idx, cvt_idx, mux_idx = 0;
1050  struct hdmi_spec_per_pin *per_pin;
1051  struct hdmi_eld *eld;
1052  struct hdmi_spec_per_cvt *per_cvt = NULL;
1053 
1054  /* Validate hinfo */
1055  pin_idx = hinfo_to_pin_index(spec, hinfo);
1056  if (snd_BUG_ON(pin_idx < 0))
1057  return -EINVAL;
1058  per_pin = &spec->pins[pin_idx];
1059  eld = &per_pin->sink_eld;
1060 
1061  /* Dynamically assign converter to stream */
1062  for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1063  per_cvt = &spec->cvts[cvt_idx];
1064 
1065  /* Must not already be assigned */
1066  if (per_cvt->assigned)
1067  continue;
1068  /* Must be in pin's mux's list of converters */
1069  for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1070  if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1071  break;
1072  /* Not in mux list */
1073  if (mux_idx == per_pin->num_mux_nids)
1074  continue;
1075  break;
1076  }
1077  /* No free converters */
1078  if (cvt_idx == spec->num_cvts)
1079  return -ENODEV;
1080 
1081  /* Claim converter */
1082  per_cvt->assigned = 1;
1083  hinfo->nid = per_cvt->cvt_nid;
1084 
1085  snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1086  AC_VERB_SET_CONNECT_SEL,
1087  mux_idx);
1088  snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1089 
1090  /* Initially set the converter's capabilities */
1091  hinfo->channels_min = per_cvt->channels_min;
1092  hinfo->channels_max = per_cvt->channels_max;
1093  hinfo->rates = per_cvt->rates;
1094  hinfo->formats = per_cvt->formats;
1095  hinfo->maxbps = per_cvt->maxbps;
1096 
1097  /* Restrict capabilities by ELD if this isn't disabled */
1098  if (!static_hdmi_pcm && eld->eld_valid) {
1099  snd_hdmi_eld_update_pcm_info(eld, hinfo);
1100  if (hinfo->channels_min > hinfo->channels_max ||
1101  !hinfo->rates || !hinfo->formats)
1102  return -ENODEV;
1103  }
1104 
1105  /* Store the updated parameters */
1106  runtime->hw.channels_min = hinfo->channels_min;
1107  runtime->hw.channels_max = hinfo->channels_max;
1108  runtime->hw.formats = hinfo->formats;
1109  runtime->hw.rates = hinfo->rates;
1110 
1111  snd_pcm_hw_constraint_step(substream->runtime, 0,
1112  SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1113  return 0;
1114 }
1115 
1116 /*
1117  * HDA/HDMI auto parsing
1118  */
1119 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1120 {
1121  struct hdmi_spec *spec = codec->spec;
1122  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1123  hda_nid_t pin_nid = per_pin->pin_nid;
1124 
1125  if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1126  snd_printk(KERN_WARNING
1127  "HDMI: pin %d wcaps %#x "
1128  "does not support connection list\n",
1129  pin_nid, get_wcaps(codec, pin_nid));
1130  return -EINVAL;
1131  }
1132 
1133  per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1134  per_pin->mux_nids,
1135  HDA_MAX_CONNECTIONS);
1136 
1137  return 0;
1138 }
1139 
1140 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1141 {
1142  struct hda_codec *codec = per_pin->codec;
1143  struct hdmi_eld *eld = &per_pin->sink_eld;
1144  hda_nid_t pin_nid = per_pin->pin_nid;
1145  /*
1146  * Always execute a GetPinSense verb here, even when called from
1147  * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1148  * response's PD bit is not the real PD value, but indicates that
1149  * the real PD value changed. An older version of the HD-audio
1150  * specification worked this way. Hence, we just ignore the data in
1151  * the unsolicited response to avoid custom WARs.
1152  */
1153  int present = snd_hda_pin_sense(codec, pin_nid);
1154  bool eld_valid = false;
1155 
1156  memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1157 
1158  eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1159  if (eld->monitor_present)
1160  eld_valid = !!(present & AC_PINSENSE_ELDV);
1161 
1162  _snd_printd(SND_PR_VERBOSE,
1163  "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1164  codec->addr, pin_nid, eld->monitor_present, eld_valid);
1165 
1166  if (eld_valid) {
1167  if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1168  snd_hdmi_show_eld(eld);
1169  else if (repoll) {
1170  queue_delayed_work(codec->bus->workq,
1171  &per_pin->work,
1172  msecs_to_jiffies(300));
1173  }
1174  }
1175 }
1176 
1177 static void hdmi_repoll_eld(struct work_struct *work)
1178 {
1179  struct hdmi_spec_per_pin *per_pin =
1180  container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1181 
1182  if (per_pin->repoll_count++ > 6)
1183  per_pin->repoll_count = 0;
1184 
1185  hdmi_present_sense(per_pin, per_pin->repoll_count);
1186 }
1187 
1188 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1189 {
1190  struct hdmi_spec *spec = codec->spec;
1191  unsigned int caps, config;
1192  int pin_idx;
1193  struct hdmi_spec_per_pin *per_pin;
1194  int err;
1195 
1196  caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1197  if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1198  return 0;
1199 
1200  config = snd_hda_codec_read(codec, pin_nid, 0,
1201  AC_VERB_GET_CONFIG_DEFAULT, 0);
1202  if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1203  return 0;
1204 
1205  if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1206  return -E2BIG;
1207 
1208  pin_idx = spec->num_pins;
1209  per_pin = &spec->pins[pin_idx];
1210 
1211  per_pin->pin_nid = pin_nid;
1212  per_pin->non_pcm = false;
1213 
1214  err = hdmi_read_pin_conn(codec, pin_idx);
1215  if (err < 0)
1216  return err;
1217 
1218  spec->num_pins++;
1219 
1220  return 0;
1221 }
1222 
1223 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1224 {
1225  struct hdmi_spec *spec = codec->spec;
1226  int cvt_idx;
1227  struct hdmi_spec_per_cvt *per_cvt;
1228  unsigned int chans;
1229  int err;
1230 
1231  if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1232  return -E2BIG;
1233 
1234  chans = get_wcaps(codec, cvt_nid);
1235  chans = get_wcaps_channels(chans);
1236 
1237  cvt_idx = spec->num_cvts;
1238  per_cvt = &spec->cvts[cvt_idx];
1239 
1240  per_cvt->cvt_nid = cvt_nid;
1241  per_cvt->channels_min = 2;
1242  if (chans <= 16) {
1243  per_cvt->channels_max = chans;
1244  if (chans > spec->channels_max)
1245  spec->channels_max = chans;
1246  }
1247 
1248  err = snd_hda_query_supported_pcm(codec, cvt_nid,
1249  &per_cvt->rates,
1250  &per_cvt->formats,
1251  &per_cvt->maxbps);
1252  if (err < 0)
1253  return err;
1254 
1255  spec->num_cvts++;
1256 
1257  return 0;
1258 }
1259 
1260 static int hdmi_parse_codec(struct hda_codec *codec)
1261 {
1262  hda_nid_t nid;
1263  int i, nodes;
1264 
1265  nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1266  if (!nid || nodes < 0) {
1267  snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1268  return -EINVAL;
1269  }
1270 
1271  for (i = 0; i < nodes; i++, nid++) {
1272  unsigned int caps;
1273  unsigned int type;
1274 
1275  caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1276  type = get_wcaps_type(caps);
1277 
1278  if (!(caps & AC_WCAP_DIGITAL))
1279  continue;
1280 
1281  switch (type) {
1282  case AC_WID_AUD_OUT:
1283  hdmi_add_cvt(codec, nid);
1284  break;
1285  case AC_WID_PIN:
1286  hdmi_add_pin(codec, nid);
1287  break;
1288  }
1289  }
1290 
1291  /*
1292  * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1293  * can be lost and presence sense verb will become inaccurate if the
1294  * HDA link is powered off at hot plug or hw initialization time.
1295  */
1296 #ifdef CONFIG_PM
1297  if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1298  AC_PWRST_EPSS))
1299  codec->bus->power_keep_link_on = 1;
1300 #endif
1301 
1302  return 0;
1303 }
1304 
1305 /*
1306  */
1307 static char *get_hdmi_pcm_name(int idx)
1308 {
1309  static char names[MAX_HDMI_PINS][8];
1310  sprintf(&names[idx][0], "HDMI %d", idx);
1311  return &names[idx][0];
1312 }
1313 
1314 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1315 {
1316  struct hda_spdif_out *spdif;
1317  bool non_pcm;
1318 
1319  mutex_lock(&codec->spdif_mutex);
1320  spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1321  non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1322  mutex_unlock(&codec->spdif_mutex);
1323  return non_pcm;
1324 }
1325 
1326 
1327 /*
1328  * HDMI callbacks
1329  */
1330 
1331 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1332  struct hda_codec *codec,
1333  unsigned int stream_tag,
1334  unsigned int format,
1335  struct snd_pcm_substream *substream)
1336 {
1337  hda_nid_t cvt_nid = hinfo->nid;
1338  struct hdmi_spec *spec = codec->spec;
1339  int pin_idx = hinfo_to_pin_index(spec, hinfo);
1340  hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1341  int pinctl;
1342  bool non_pcm;
1343 
1344  non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1345 
1346  hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1347 
1348  hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1349 
1350  pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1351  AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1352  snd_hda_codec_write(codec, pin_nid, 0,
1353  AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl | PIN_OUT);
1354 
1355  return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1356 }
1357 
1358 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1359  struct hda_codec *codec,
1360  struct snd_pcm_substream *substream)
1361 {
1362  snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1363  return 0;
1364 }
1365 
1366 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1367  struct hda_codec *codec,
1368  struct snd_pcm_substream *substream)
1369 {
1370  struct hdmi_spec *spec = codec->spec;
1371  int cvt_idx, pin_idx;
1372  struct hdmi_spec_per_cvt *per_cvt;
1373  struct hdmi_spec_per_pin *per_pin;
1374  int pinctl;
1375 
1376  if (hinfo->nid) {
1377  cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1378  if (snd_BUG_ON(cvt_idx < 0))
1379  return -EINVAL;
1380  per_cvt = &spec->cvts[cvt_idx];
1381 
1382  snd_BUG_ON(!per_cvt->assigned);
1383  per_cvt->assigned = 0;
1384  hinfo->nid = 0;
1385 
1386  pin_idx = hinfo_to_pin_index(spec, hinfo);
1387  if (snd_BUG_ON(pin_idx < 0))
1388  return -EINVAL;
1389  per_pin = &spec->pins[pin_idx];
1390 
1391  pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1392  AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1393  snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1394  AC_VERB_SET_PIN_WIDGET_CONTROL,
1395  pinctl & ~PIN_OUT);
1396  snd_hda_spdif_ctls_unassign(codec, pin_idx);
1397  per_pin->chmap_set = false;
1398  memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1399  }
1400 
1401  return 0;
1402 }
1403 
1404 static const struct hda_pcm_ops generic_ops = {
1405  .open = hdmi_pcm_open,
1406  .close = hdmi_pcm_close,
1407  .prepare = generic_hdmi_playback_pcm_prepare,
1408  .cleanup = generic_hdmi_playback_pcm_cleanup,
1409 };
1410 
1411 /*
1412  * ALSA API channel-map control callbacks
1413  */
1414 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1415  struct snd_ctl_elem_info *uinfo)
1416 {
1417  struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1418  struct hda_codec *codec = info->private_data;
1419  struct hdmi_spec *spec = codec->spec;
1420  uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1421  uinfo->count = spec->channels_max;
1422  uinfo->value.integer.min = 0;
1423  uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1424  return 0;
1425 }
1426 
1427 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1428  unsigned int size, unsigned int __user *tlv)
1429 {
1430  struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1431  struct hda_codec *codec = info->private_data;
1432  struct hdmi_spec *spec = codec->spec;
1433  const unsigned int valid_mask =
1434  FL | FR | RL | RR | LFE | FC | RLC | RRC;
1435  unsigned int __user *dst;
1436  int chs, count = 0;
1437 
1438  if (size < 8)
1439  return -ENOMEM;
1440  if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1441  return -EFAULT;
1442  size -= 8;
1443  dst = tlv + 2;
1444  for (chs = 2; chs <= spec->channels_max; chs++) {
1445  int i, c;
1446  struct cea_channel_speaker_allocation *cap;
1447  cap = channel_allocations;
1448  for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1449  int chs_bytes = chs * 4;
1450  if (cap->channels != chs)
1451  continue;
1452  if (cap->spk_mask & ~valid_mask)
1453  continue;
1454  if (size < 8)
1455  return -ENOMEM;
1456  if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1457  put_user(chs_bytes, dst + 1))
1458  return -EFAULT;
1459  dst += 2;
1460  size -= 8;
1461  count += 8;
1462  if (size < chs_bytes)
1463  return -ENOMEM;
1464  size -= chs_bytes;
1465  count += chs_bytes;
1466  for (c = 7; c >= 0; c--) {
1467  int spk = cap->speakers[c];
1468  if (!spk)
1469  continue;
1470  if (put_user(spk_to_chmap(spk), dst))
1471  return -EFAULT;
1472  dst++;
1473  }
1474  }
1475  }
1476  if (put_user(count, tlv + 1))
1477  return -EFAULT;
1478  return 0;
1479 }
1480 
1481 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1482  struct snd_ctl_elem_value *ucontrol)
1483 {
1484  struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1485  struct hda_codec *codec = info->private_data;
1486  struct hdmi_spec *spec = codec->spec;
1487  int pin_idx = kcontrol->private_value;
1488  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1489  int i;
1490 
1491  for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1492  ucontrol->value.integer.value[i] = per_pin->chmap[i];
1493  return 0;
1494 }
1495 
1496 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1497  struct snd_ctl_elem_value *ucontrol)
1498 {
1499  struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1500  struct hda_codec *codec = info->private_data;
1501  struct hdmi_spec *spec = codec->spec;
1502  int pin_idx = kcontrol->private_value;
1503  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1504  unsigned int ctl_idx;
1505  struct snd_pcm_substream *substream;
1506  unsigned char chmap[8];
1507  int i, ca, prepared = 0;
1508 
1509  ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1510  substream = snd_pcm_chmap_substream(info, ctl_idx);
1511  if (!substream || !substream->runtime)
1512  return -EBADFD;
1513  switch (substream->runtime->status->state) {
1514  case SNDRV_PCM_STATE_OPEN:
1515  case SNDRV_PCM_STATE_SETUP:
1516  break;
1517  case SNDRV_PCM_STATE_PREPARED:
1518  prepared = 1;
1519  break;
1520  default:
1521  return -EBUSY;
1522  }
1523  memset(chmap, 0, sizeof(chmap));
1524  for (i = 0; i < ARRAY_SIZE(chmap); i++)
1525  chmap[i] = ucontrol->value.integer.value[i];
1526  if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1527  return 0;
1528  ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1529  if (ca < 0)
1530  return -EINVAL;
1531  per_pin->chmap_set = true;
1532  memcpy(per_pin->chmap, chmap, sizeof(chmap));
1533  if (prepared)
1534  hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
1535  substream);
1536 
1537  return 0;
1538 }
1539 
1540 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1541 {
1542  struct hdmi_spec *spec = codec->spec;
1543  int pin_idx;
1544 
1545  for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1546  struct hda_pcm *info;
1547  struct hda_pcm_stream *pstr;
1548 
1549  info = &spec->pcm_rec[pin_idx];
1550  info->name = get_hdmi_pcm_name(pin_idx);
1551  info->pcm_type = HDA_PCM_TYPE_HDMI;
1552  info->own_chmap = true;
1553 
1554  pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1555  pstr->substreams = 1;
1556  pstr->ops = generic_ops;
1557  /* other pstr fields are set in open */
1558  }
1559 
1560  codec->num_pcms = spec->num_pins;
1561  codec->pcm_info = spec->pcm_rec;
1562 
1563  return 0;
1564 }
1565 
1566 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1567 {
1568  char hdmi_str[32] = "HDMI/DP";
1569  struct hdmi_spec *spec = codec->spec;
1570  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1571  int pcmdev = spec->pcm_rec[pin_idx].device;
1572 
1573  if (pcmdev > 0)
1574  sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1575 
1576  return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1577 }
1578 
1579 static int generic_hdmi_build_controls(struct hda_codec *codec)
1580 {
1581  struct hdmi_spec *spec = codec->spec;
1582  int err;
1583  int pin_idx;
1584 
1585  for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1586  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1587 
1588  err = generic_hdmi_build_jack(codec, pin_idx);
1589  if (err < 0)
1590  return err;
1591 
1592  err = snd_hda_create_spdif_out_ctls(codec,
1593  per_pin->pin_nid,
1594  per_pin->mux_nids[0]);
1595  if (err < 0)
1596  return err;
1597  snd_hda_spdif_ctls_unassign(codec, pin_idx);
1598 
1599  /* add control for ELD Bytes */
1600  err = hdmi_create_eld_ctl(codec,
1601  pin_idx,
1602  spec->pcm_rec[pin_idx].device);
1603 
1604  if (err < 0)
1605  return err;
1606 
1607  hdmi_present_sense(per_pin, 0);
1608  }
1609 
1610  /* add channel maps */
1611  for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1612  struct snd_pcm_chmap *chmap;
1613  struct snd_kcontrol *kctl;
1614  int i;
1615  err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1616  SNDRV_PCM_STREAM_PLAYBACK,
1617  NULL, 0, pin_idx, &chmap);
1618  if (err < 0)
1619  return err;
1620  /* override handlers */
1621  chmap->private_data = codec;
1622  kctl = chmap->kctl;
1623  for (i = 0; i < kctl->count; i++)
1624  kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1625  kctl->info = hdmi_chmap_ctl_info;
1626  kctl->get = hdmi_chmap_ctl_get;
1627  kctl->put = hdmi_chmap_ctl_put;
1628  kctl->tlv.c = hdmi_chmap_ctl_tlv;
1629  }
1630 
1631  return 0;
1632 }
1633 
1634 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1635 {
1636  struct hdmi_spec *spec = codec->spec;
1637  int pin_idx;
1638 
1639  for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1640  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1641  struct hdmi_eld *eld = &per_pin->sink_eld;
1642 
1643  per_pin->codec = codec;
1644  INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1645  snd_hda_eld_proc_new(codec, eld, pin_idx);
1646  }
1647  return 0;
1648 }
1649 
1650 static int generic_hdmi_init(struct hda_codec *codec)
1651 {
1652  struct hdmi_spec *spec = codec->spec;
1653  int pin_idx;
1654 
1655  for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1656  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1657  hda_nid_t pin_nid = per_pin->pin_nid;
1658 
1659  hdmi_init_pin(codec, pin_nid);
1660  snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1661  }
1662  return 0;
1663 }
1664 
1665 static void generic_hdmi_free(struct hda_codec *codec)
1666 {
1667  struct hdmi_spec *spec = codec->spec;
1668  int pin_idx;
1669 
1670  for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1671  struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1672  struct hdmi_eld *eld = &per_pin->sink_eld;
1673 
1674  cancel_delayed_work(&per_pin->work);
1675  snd_hda_eld_proc_free(codec, eld);
1676  }
1677 
1678  flush_workqueue(codec->bus->workq);
1679  kfree(spec);
1680 }
1681 
1682 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1683  .init = generic_hdmi_init,
1684  .free = generic_hdmi_free,
1685  .build_pcms = generic_hdmi_build_pcms,
1686  .build_controls = generic_hdmi_build_controls,
1687  .unsol_event = hdmi_unsol_event,
1688 };
1689 
1690 static int patch_generic_hdmi(struct hda_codec *codec)
1691 {
1692  struct hdmi_spec *spec;
1693 
1694  spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1695  if (spec == NULL)
1696  return -ENOMEM;
1697 
1698  codec->spec = spec;
1699  if (hdmi_parse_codec(codec) < 0) {
1700  codec->spec = NULL;
1701  kfree(spec);
1702  return -EINVAL;
1703  }
1704  codec->patch_ops = generic_hdmi_patch_ops;
1705  generic_hdmi_init_per_pins(codec);
1706 
1707  init_channel_allocations();
1708 
1709  return 0;
1710 }
1711 
1712 /*
1713  * Shared non-generic implementations
1714  */
1715 
1716 static int simple_playback_build_pcms(struct hda_codec *codec)
1717 {
1718  struct hdmi_spec *spec = codec->spec;
1719  struct hda_pcm *info = spec->pcm_rec;
1720  unsigned int chans;
1721  struct hda_pcm_stream *pstr;
1722 
1723  codec->num_pcms = 1;
1724  codec->pcm_info = info;
1725 
1726  chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
1727  chans = get_wcaps_channels(chans);
1728 
1729  info->name = get_hdmi_pcm_name(0);
1730  info->pcm_type = HDA_PCM_TYPE_HDMI;
1731  pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1732  *pstr = spec->pcm_playback;
1733  pstr->nid = spec->cvts[0].cvt_nid;
1734  if (pstr->channels_max <= 2 && chans && chans <= 16)
1735  pstr->channels_max = chans;
1736 
1737  return 0;
1738 }
1739 
1740 /* unsolicited event for jack sensing */
1741 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1742  unsigned int res)
1743 {
1744  snd_hda_jack_set_dirty_all(codec);
1745  snd_hda_jack_report_sync(codec);
1746 }
1747 
1748 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1749  * as long as spec->pins[] is set correctly
1750  */
1751 #define simple_hdmi_build_jack generic_hdmi_build_jack
1752 
1753 static int simple_playback_build_controls(struct hda_codec *codec)
1754 {
1755  struct hdmi_spec *spec = codec->spec;
1756  int err;
1757 
1758  err = snd_hda_create_spdif_out_ctls(codec,
1759  spec->cvts[0].cvt_nid,
1760  spec->cvts[0].cvt_nid);
1761  if (err < 0)
1762  return err;
1763  return simple_hdmi_build_jack(codec, 0);
1764 }
1765 
1766 static int simple_playback_init(struct hda_codec *codec)
1767 {
1768  struct hdmi_spec *spec = codec->spec;
1769  hda_nid_t pin = spec->pins[0].pin_nid;
1770 
1771  snd_hda_codec_write(codec, pin, 0,
1772  AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1773  /* some codecs require to unmute the pin */
1774  if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1775  snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1776  AMP_OUT_UNMUTE);
1777  snd_hda_jack_detect_enable(codec, pin, pin);
1778  return 0;
1779 }
1780 
1781 static void simple_playback_free(struct hda_codec *codec)
1782 {
1783  struct hdmi_spec *spec = codec->spec;
1784 
1785  kfree(spec);
1786 }
1787 
1788 /*
1789  * Nvidia specific implementations
1790  */
1791 
1792 #define Nv_VERB_SET_Channel_Allocation 0xF79
1793 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1794 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1795 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1796 
1797 #define nvhdmi_master_con_nid_7x 0x04
1798 #define nvhdmi_master_pin_nid_7x 0x05
1799 
1800 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1801  /*front, rear, clfe, rear_surr */
1802  0x6, 0x8, 0xa, 0xc,
1803 };
1804 
1805 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
1806  /* set audio protect on */
1807  { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1808  /* enable digital output on pin widget */
1809  { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1810  {} /* terminator */
1811 };
1812 
1813 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
1814  /* set audio protect on */
1815  { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1816  /* enable digital output on pin widget */
1817  { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1818  { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1819  { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1820  { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1821  { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1822  {} /* terminator */
1823 };
1824 
1825 #ifdef LIMITED_RATE_FMT_SUPPORT
1826 /* support only the safe format and rate */
1827 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1828 #define SUPPORTED_MAXBPS 16
1829 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1830 #else
1831 /* support all rates and formats */
1832 #define SUPPORTED_RATES \
1833  (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1834  SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1835  SNDRV_PCM_RATE_192000)
1836 #define SUPPORTED_MAXBPS 24
1837 #define SUPPORTED_FORMATS \
1838  (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1839 #endif
1840 
1841 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
1842 {
1843  snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
1844  return 0;
1845 }
1846 
1847 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
1848 {
1849  snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
1850  return 0;
1851 }
1852 
1853 static unsigned int channels_2_6_8[] = {
1854  2, 6, 8
1855 };
1856 
1857 static unsigned int channels_2_8[] = {
1858  2, 8
1859 };
1860 
1861 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1862  .count = ARRAY_SIZE(channels_2_6_8),
1863  .list = channels_2_6_8,
1864  .mask = 0,
1865 };
1866 
1867 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1868  .count = ARRAY_SIZE(channels_2_8),
1869  .list = channels_2_8,
1870  .mask = 0,
1871 };
1872 
1873 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1874  struct hda_codec *codec,
1875  struct snd_pcm_substream *substream)
1876 {
1877  struct hdmi_spec *spec = codec->spec;
1878  struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1879 
1880  switch (codec->preset->id) {
1881  case 0x10de0002:
1882  case 0x10de0003:
1883  case 0x10de0005:
1884  case 0x10de0006:
1885  hw_constraints_channels = &hw_constraints_2_8_channels;
1886  break;
1887  case 0x10de0007:
1888  hw_constraints_channels = &hw_constraints_2_6_8_channels;
1889  break;
1890  default:
1891  break;
1892  }
1893 
1894  if (hw_constraints_channels != NULL) {
1895  snd_pcm_hw_constraint_list(substream->runtime, 0,
1896  SNDRV_PCM_HW_PARAM_CHANNELS,
1897  hw_constraints_channels);
1898  } else {
1899  snd_pcm_hw_constraint_step(substream->runtime, 0,
1900  SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1901  }
1902 
1903  return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1904 }
1905 
1906 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1907  struct hda_codec *codec,
1908  struct snd_pcm_substream *substream)
1909 {
1910  struct hdmi_spec *spec = codec->spec;
1911  return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1912 }
1913 
1914 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1915  struct hda_codec *codec,
1916  unsigned int stream_tag,
1917  unsigned int format,
1918  struct snd_pcm_substream *substream)
1919 {
1920  struct hdmi_spec *spec = codec->spec;
1921  return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1922  stream_tag, format, substream);
1923 }
1924 
1925 static const struct hda_pcm_stream simple_pcm_playback = {
1926  .substreams = 1,
1927  .channels_min = 2,
1928  .channels_max = 2,
1929  .ops = {
1930  .open = simple_playback_pcm_open,
1931  .close = simple_playback_pcm_close,
1932  .prepare = simple_playback_pcm_prepare
1933  },
1934 };
1935 
1936 static const struct hda_codec_ops simple_hdmi_patch_ops = {
1937  .build_controls = simple_playback_build_controls,
1938  .build_pcms = simple_playback_build_pcms,
1939  .init = simple_playback_init,
1940  .free = simple_playback_free,
1941  .unsol_event = simple_hdmi_unsol_event,
1942 };
1943 
1944 static int patch_simple_hdmi(struct hda_codec *codec,
1945  hda_nid_t cvt_nid, hda_nid_t pin_nid)
1946 {
1947  struct hdmi_spec *spec;
1948 
1949  spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1950  if (!spec)
1951  return -ENOMEM;
1952 
1953  codec->spec = spec;
1954 
1955  spec->multiout.num_dacs = 0; /* no analog */
1956  spec->multiout.max_channels = 2;
1957  spec->multiout.dig_out_nid = cvt_nid;
1958  spec->num_cvts = 1;
1959  spec->num_pins = 1;
1960  spec->cvts[0].cvt_nid = cvt_nid;
1961  spec->pins[0].pin_nid = pin_nid;
1962  spec->pcm_playback = simple_pcm_playback;
1963 
1964  codec->patch_ops = simple_hdmi_patch_ops;
1965 
1966  return 0;
1967 }
1968 
1969 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1970  int channels)
1971 {
1972  unsigned int chanmask;
1973  int chan = channels ? (channels - 1) : 1;
1974 
1975  switch (channels) {
1976  default:
1977  case 0:
1978  case 2:
1979  chanmask = 0x00;
1980  break;
1981  case 4:
1982  chanmask = 0x08;
1983  break;
1984  case 6:
1985  chanmask = 0x0b;
1986  break;
1987  case 8:
1988  chanmask = 0x13;
1989  break;
1990  }
1991 
1992  /* Set the audio infoframe channel allocation and checksum fields. The
1993  * channel count is computed implicitly by the hardware. */
1994  snd_hda_codec_write(codec, 0x1, 0,
1995  Nv_VERB_SET_Channel_Allocation, chanmask);
1996 
1997  snd_hda_codec_write(codec, 0x1, 0,
1998  Nv_VERB_SET_Info_Frame_Checksum,
1999  (0x71 - chan - chanmask));
2000 }
2001 
2002 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2003  struct hda_codec *codec,
2004  struct snd_pcm_substream *substream)
2005 {
2006  struct hdmi_spec *spec = codec->spec;
2007  int i;
2008 
2009  snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2010  0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2011  for (i = 0; i < 4; i++) {
2012  /* set the stream id */
2013  snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2014  AC_VERB_SET_CHANNEL_STREAMID, 0);
2015  /* set the stream format */
2016  snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2017  AC_VERB_SET_STREAM_FORMAT, 0);
2018  }
2019 
2020  /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2021  * streams are disabled. */
2022  nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2023 
2024  return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2025 }
2026 
2027 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2028  struct hda_codec *codec,
2029  unsigned int stream_tag,
2030  unsigned int format,
2031  struct snd_pcm_substream *substream)
2032 {
2033  int chs;
2034  unsigned int dataDCC2, channel_id;
2035  int i;
2036  struct hdmi_spec *spec = codec->spec;
2037  struct hda_spdif_out *spdif;
2038 
2039  mutex_lock(&codec->spdif_mutex);
2040  spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
2041 
2042  chs = substream->runtime->channels;
2043 
2044  dataDCC2 = 0x2;
2045 
2046  /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2047  if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2048  snd_hda_codec_write(codec,
2049  nvhdmi_master_con_nid_7x,
2050  0,
2051  AC_VERB_SET_DIGI_CONVERT_1,
2052  spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2053 
2054  /* set the stream id */
2055  snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2056  AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2057 
2058  /* set the stream format */
2059  snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2060  AC_VERB_SET_STREAM_FORMAT, format);
2061 
2062  /* turn on again (if needed) */
2063  /* enable and set the channel status audio/data flag */
2064  if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2065  snd_hda_codec_write(codec,
2066  nvhdmi_master_con_nid_7x,
2067  0,
2068  AC_VERB_SET_DIGI_CONVERT_1,
2069  spdif->ctls & 0xff);
2070  snd_hda_codec_write(codec,
2071  nvhdmi_master_con_nid_7x,
2072  0,
2073  AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2074  }
2075 
2076  for (i = 0; i < 4; i++) {
2077  if (chs == 2)
2078  channel_id = 0;
2079  else
2080  channel_id = i * 2;
2081 
2082  /* turn off SPDIF once;
2083  *otherwise the IEC958 bits won't be updated
2084  */
2085  if (codec->spdif_status_reset &&
2086  (spdif->ctls & AC_DIG1_ENABLE))
2087  snd_hda_codec_write(codec,
2088  nvhdmi_con_nids_7x[i],
2089  0,
2090  AC_VERB_SET_DIGI_CONVERT_1,
2091  spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2092  /* set the stream id */
2093  snd_hda_codec_write(codec,
2094  nvhdmi_con_nids_7x[i],
2095  0,
2096  AC_VERB_SET_CHANNEL_STREAMID,
2097  (stream_tag << 4) | channel_id);
2098  /* set the stream format */
2099  snd_hda_codec_write(codec,
2100  nvhdmi_con_nids_7x[i],
2101  0,
2102  AC_VERB_SET_STREAM_FORMAT,
2103  format);
2104  /* turn on again (if needed) */
2105  /* enable and set the channel status audio/data flag */
2106  if (codec->spdif_status_reset &&
2107  (spdif->ctls & AC_DIG1_ENABLE)) {
2108  snd_hda_codec_write(codec,
2109  nvhdmi_con_nids_7x[i],
2110  0,
2111  AC_VERB_SET_DIGI_CONVERT_1,
2112  spdif->ctls & 0xff);
2113  snd_hda_codec_write(codec,
2114  nvhdmi_con_nids_7x[i],
2115  0,
2116  AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2117  }
2118  }
2119 
2120  nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2121 
2122  mutex_unlock(&codec->spdif_mutex);
2123  return 0;
2124 }
2125 
2126 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2127  .substreams = 1,
2128  .channels_min = 2,
2129  .channels_max = 8,
2130  .nid = nvhdmi_master_con_nid_7x,
2131  .rates = SUPPORTED_RATES,
2132  .maxbps = SUPPORTED_MAXBPS,
2133  .formats = SUPPORTED_FORMATS,
2134  .ops = {
2135  .open = simple_playback_pcm_open,
2136  .close = nvhdmi_8ch_7x_pcm_close,
2137  .prepare = nvhdmi_8ch_7x_pcm_prepare
2138  },
2139 };
2140 
2141 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2142 {
2143  struct hdmi_spec *spec;
2144  int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2145  nvhdmi_master_pin_nid_7x);
2146  if (err < 0)
2147  return err;
2148 
2149  codec->patch_ops.init = nvhdmi_7x_init_2ch;
2150  /* override the PCM rates, etc, as the codec doesn't give full list */
2151  spec = codec->spec;
2152  spec->pcm_playback.rates = SUPPORTED_RATES;
2153  spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2154  spec->pcm_playback.formats = SUPPORTED_FORMATS;
2155  return 0;
2156 }
2157 
2158 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2159 {
2160  struct hdmi_spec *spec = codec->spec;
2161  int err = simple_playback_build_pcms(codec);
2162  spec->pcm_rec[0].own_chmap = true;
2163  return err;
2164 }
2165 
2166 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2167 {
2168  struct hdmi_spec *spec = codec->spec;
2169  struct snd_pcm_chmap *chmap;
2170  int err;
2171 
2172  err = simple_playback_build_controls(codec);
2173  if (err < 0)
2174  return err;
2175 
2176  /* add channel maps */
2177  err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
2178  SNDRV_PCM_STREAM_PLAYBACK,
2179  snd_pcm_alt_chmaps, 8, 0, &chmap);
2180  if (err < 0)
2181  return err;
2182  switch (codec->preset->id) {
2183  case 0x10de0002:
2184  case 0x10de0003:
2185  case 0x10de0005:
2186  case 0x10de0006:
2187  chmap->channel_mask = (1U << 2) | (1U << 8);
2188  break;
2189  case 0x10de0007:
2190  chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2191  }
2192  return 0;
2193 }
2194 
2195 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2196 {
2197  struct hdmi_spec *spec;
2198  int err = patch_nvhdmi_2ch(codec);
2199  if (err < 0)
2200  return err;
2201  spec = codec->spec;
2202  spec->multiout.max_channels = 8;
2203  spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2204  codec->patch_ops.init = nvhdmi_7x_init_8ch;
2205  codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2206  codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2207 
2208  /* Initialize the audio infoframe channel mask and checksum to something
2209  * valid */
2210  nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2211 
2212  return 0;
2213 }
2214 
2215 /*
2216  * ATI-specific implementations
2217  *
2218  * FIXME: we may omit the whole this and use the generic code once after
2219  * it's confirmed to work.
2220  */
2221 
2222 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2223 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2224 
2225 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2226  struct hda_codec *codec,
2227  unsigned int stream_tag,
2228  unsigned int format,
2229  struct snd_pcm_substream *substream)
2230 {
2231  struct hdmi_spec *spec = codec->spec;
2232  int chans = substream->runtime->channels;
2233  int i, err;
2234 
2235  err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2236  substream);
2237  if (err < 0)
2238  return err;
2239  snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2240  AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2241  /* FIXME: XXX */
2242  for (i = 0; i < chans; i++) {
2243  snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2244  AC_VERB_SET_HDMI_CHAN_SLOT,
2245  (i << 4) | i);
2246  }
2247  return 0;
2248 }
2249 
2250 static int patch_atihdmi(struct hda_codec *codec)
2251 {
2252  struct hdmi_spec *spec;
2253  int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2254  if (err < 0)
2255  return err;
2256  spec = codec->spec;
2257  spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2258  return 0;
2259 }
2260 
2261 /* VIA HDMI Implementation */
2262 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2263 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2264 
2265 static int patch_via_hdmi(struct hda_codec *codec)
2266 {
2267  return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2268 }
2269 
2270 /*
2271  * patch entries
2272  */
2273 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2274 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2275 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2276 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2277 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2278 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2279 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2280 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2281 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2282 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2283 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2284 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2285 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2286 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2287 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2288 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2289 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2290 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2291 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2292 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2293 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2294 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2295 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2296 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2297 /* 17 is known to be absent */
2298 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2299 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2300 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2301 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2302 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2303 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2304 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2305 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2306 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2307 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2308 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2309 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2310 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2311 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2312 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2313 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2314 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2315 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2316 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2317 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2318 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2319 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2320 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2321 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2322 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2323 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2324 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2325 {} /* terminator */
2326 };
2327 
2328 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2329 MODULE_ALIAS("snd-hda-codec-id:10027919");
2330 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2331 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2332 MODULE_ALIAS("snd-hda-codec-id:10951390");
2333 MODULE_ALIAS("snd-hda-codec-id:10951392");
2334 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2335 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2336 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2337 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2338 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2339 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2340 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2341 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2342 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2343 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2344 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2345 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2346 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2347 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2348 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2349 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2350 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2351 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2352 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2353 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2354 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2355 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2356 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2357 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2358 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2359 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2360 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2361 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2362 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2363 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2364 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2365 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2366 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2367 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2368 MODULE_ALIAS("snd-hda-codec-id:80860054");
2369 MODULE_ALIAS("snd-hda-codec-id:80862801");
2370 MODULE_ALIAS("snd-hda-codec-id:80862802");
2371 MODULE_ALIAS("snd-hda-codec-id:80862803");
2372 MODULE_ALIAS("snd-hda-codec-id:80862804");
2373 MODULE_ALIAS("snd-hda-codec-id:80862805");
2374 MODULE_ALIAS("snd-hda-codec-id:80862806");
2375 MODULE_ALIAS("snd-hda-codec-id:80862807");
2376 MODULE_ALIAS("snd-hda-codec-id:80862880");
2377 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2378 
2379 MODULE_LICENSE("GPL");
2380 MODULE_DESCRIPTION("HDMI HD-audio codec");
2381 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2382 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2383 MODULE_ALIAS("snd-hda-codec-atihdmi");
2384 
2385 static struct hda_codec_preset_list intel_list = {
2386  .preset = snd_hda_preset_hdmi,
2387  .owner = THIS_MODULE,
2388 };
2389 
2390 static int __init patch_hdmi_init(void)
2391 {
2392  return snd_hda_add_codec_preset(&intel_list);
2393 }
2394 
2395 static void __exit patch_hdmi_exit(void)
2396 {
2397  snd_hda_delete_codec_preset(&intel_list);
2398 }
2399 
2400 module_init(patch_hdmi_init)
2401 module_exit(patch_hdmi_exit)
Generated on Thu Jan 10 2013 15:06:33 for Linux Kernel by   doxygen 1.8.2