Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
pci_of_scan.c
Go to the documentation of this file.
1 /*
2  * Helper routines to scan the device tree for PCI devices and busses
3  *
4  * Migrated out of PowerPC architecture pci_64.c file by Grant Likely
5  * <[email protected]> so that these routines are available for
6  * 32 bit also.
7  *
8  * Copyright (C) 2003 Anton Blanchard <[email protected]>, IBM
9  * Rework, based on alpha PCI code.
10  * Copyright (c) 2009 Secret Lab Technologies Ltd.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License
14  * version 2 as published by the Free Software Foundation.
15  */
16 
17 #include <linux/pci.h>
18 #include <linux/export.h>
19 #include <asm/pci-bridge.h>
20 #include <asm/prom.h>
21 
25 static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
26 {
27  const u32 *prop;
28  int len;
29 
30  prop = of_get_property(np, name, &len);
31  if (prop && len >= 4)
32  return *prop;
33  return def;
34 }
35 
41 unsigned int pci_parse_of_flags(u32 addr0, int bridge)
42 {
43  unsigned int flags = 0;
44 
45  if (addr0 & 0x02000000) {
47  flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
48  flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
49  if (addr0 & 0x40000000)
50  flags |= IORESOURCE_PREFETCH
52  /* Note: We don't know whether the ROM has been left enabled
53  * by the firmware or not. We mark it as disabled (ie, we do
54  * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
55  * do a config space read, it will be force-enabled if needed
56  */
57  if (!bridge && (addr0 & 0xff) == 0x30)
58  flags |= IORESOURCE_READONLY;
59  } else if (addr0 & 0x01000000)
61  if (flags)
62  flags |= IORESOURCE_SIZEALIGN;
63  return flags;
64 }
65 
74 static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
75 {
76  u64 base, size;
77  unsigned int flags;
78  struct pci_bus_region region;
79  struct resource *res;
80  const u32 *addrs;
81  u32 i;
82  int proplen;
83 
84  addrs = of_get_property(node, "assigned-addresses", &proplen);
85  if (!addrs)
86  return;
87  pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
88  for (; proplen >= 20; proplen -= 20, addrs += 5) {
89  flags = pci_parse_of_flags(addrs[0], 0);
90  if (!flags)
91  continue;
92  base = of_read_number(&addrs[1], 2);
93  size = of_read_number(&addrs[3], 2);
94  if (!size)
95  continue;
96  i = addrs[0] & 0xff;
97  pr_debug(" base: %llx, size: %llx, i: %x\n",
98  (unsigned long long)base,
99  (unsigned long long)size, i);
100 
101  if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
102  res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
103  } else if (i == dev->rom_base_reg) {
104  res = &dev->resource[PCI_ROM_RESOURCE];
106  } else {
107  printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
108  continue;
109  }
110  res->flags = flags;
111  res->name = pci_name(dev);
112  region.start = base;
113  region.end = base + size - 1;
114  pcibios_bus_to_resource(dev, res, &region);
115  }
116 }
117 
124 struct pci_dev *of_create_pci_dev(struct device_node *node,
125  struct pci_bus *bus, int devfn)
126 {
127  struct pci_dev *dev;
128  const char *type;
129  struct pci_slot *slot;
130 
131  dev = alloc_pci_dev();
132  if (!dev)
133  return NULL;
134  type = of_get_property(node, "device_type", NULL);
135  if (type == NULL)
136  type = "";
137 
138  pr_debug(" create device, devfn: %x, type: %s\n", devfn, type);
139 
140  dev->bus = bus;
141  dev->dev.of_node = of_node_get(node);
142  dev->dev.parent = bus->bridge;
143  dev->dev.bus = &pci_bus_type;
144  dev->devfn = devfn;
145  dev->multifunction = 0; /* maybe a lie? */
146  dev->needs_freset = 0; /* pcie fundamental reset required */
147  set_pcie_port_type(dev);
148 
149  list_for_each_entry(slot, &dev->bus->slots, list)
150  if (PCI_SLOT(dev->devfn) == slot->number)
151  dev->slot = slot;
152 
153  dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
154  dev->device = get_int_prop(node, "device-id", 0xffff);
155  dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
156  dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
157 
158  dev->cfg_size = pci_cfg_space_size(dev);
159 
160  dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
161  dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
162  dev->class = get_int_prop(node, "class-code", 0);
163  dev->revision = get_int_prop(node, "revision-id", 0);
164 
165  pr_debug(" class: 0x%x\n", dev->class);
166  pr_debug(" revision: 0x%x\n", dev->revision);
167 
168  dev->current_state = 4; /* unknown power state */
170  dev->dma_mask = 0xffffffff;
171 
172  /* Early fixups, before probing the BARs */
174 
175  if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
176  /* a PCI-PCI bridge */
180  } else if (!strcmp(type, "cardbus")) {
182  } else {
185  /* Maybe do a default OF mapping here */
186  dev->irq = NO_IRQ;
187  }
188 
189  of_pci_parse_addrs(node, dev);
190 
191  pr_debug(" adding to system ...\n");
192 
193  pci_device_add(dev, bus);
194 
195  return dev;
196 }
198 
208 {
209  struct device_node *node = dev->dev.of_node;
210  struct pci_bus *bus;
211  const u32 *busrange, *ranges;
212  int len, i, mode;
213  struct pci_bus_region region;
214  struct resource *res;
215  unsigned int flags;
216  u64 size;
217 
218  pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
219 
220  /* parse bus-range property */
221  busrange = of_get_property(node, "bus-range", &len);
222  if (busrange == NULL || len != 8) {
223  printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
224  node->full_name);
225  return;
226  }
227  ranges = of_get_property(node, "ranges", &len);
228  if (ranges == NULL) {
229  printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
230  node->full_name);
231  return;
232  }
233 
234  bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
235  if (!bus) {
236  printk(KERN_ERR "Failed to create pci bus for %s\n",
237  node->full_name);
238  return;
239  }
240 
241  bus->primary = dev->bus->number;
242  pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);
243  bus->bridge_ctl = 0;
244 
245  /* parse ranges property */
246  /* PCI #address-cells == 3 and #size-cells == 2 always */
247  res = &dev->resource[PCI_BRIDGE_RESOURCES];
248  for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
249  res->flags = 0;
250  bus->resource[i] = res;
251  ++res;
252  }
253  i = 1;
254  for (; len >= 32; len -= 32, ranges += 8) {
255  flags = pci_parse_of_flags(ranges[0], 1);
256  size = of_read_number(&ranges[6], 2);
257  if (flags == 0 || size == 0)
258  continue;
259  if (flags & IORESOURCE_IO) {
260  res = bus->resource[0];
261  if (res->flags) {
262  printk(KERN_ERR "PCI: ignoring extra I/O range"
263  " for bridge %s\n", node->full_name);
264  continue;
265  }
266  } else {
267  if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
268  printk(KERN_ERR "PCI: too many memory ranges"
269  " for bridge %s\n", node->full_name);
270  continue;
271  }
272  res = bus->resource[i];
273  ++i;
274  }
275  res->flags = flags;
276  region.start = of_read_number(&ranges[1], 2);
277  region.end = region.start + size - 1;
278  pcibios_bus_to_resource(dev, res, &region);
279  }
280  sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
281  bus->number);
282  pr_debug(" bus name: %s\n", bus->name);
283 
284  mode = PCI_PROBE_NORMAL;
285  if (ppc_md.pci_probe_mode)
286  mode = ppc_md.pci_probe_mode(bus);
287  pr_debug(" probe mode: %d\n", mode);
288 
289  if (mode == PCI_PROBE_DEVTREE)
290  of_scan_bus(node, bus);
291  else if (mode == PCI_PROBE_NORMAL)
292  pci_scan_child_bus(bus);
293 }
295 
302 static void __devinit __of_scan_bus(struct device_node *node,
303  struct pci_bus *bus, int rescan_existing)
304 {
305  struct device_node *child;
306  const u32 *reg;
307  int reglen, devfn;
308  struct pci_dev *dev;
309 
310  pr_debug("of_scan_bus(%s) bus no %d...\n",
311  node->full_name, bus->number);
312 
313  /* Scan direct children */
314  for_each_child_of_node(node, child) {
315  pr_debug(" * %s\n", child->full_name);
316  if (!of_device_is_available(child))
317  continue;
318  reg = of_get_property(child, "reg", &reglen);
319  if (reg == NULL || reglen < 20)
320  continue;
321  devfn = (reg[0] >> 8) & 0xff;
322 
323  /* create a new pci_dev for this device */
324  dev = of_create_pci_dev(child, bus, devfn);
325  if (!dev)
326  continue;
327  pr_debug(" dev header type: %x\n", dev->hdr_type);
328  }
329 
330  /* Apply all fixups necessary. We don't fixup the bus "self"
331  * for an existing bridge that is being rescanned
332  */
333  if (!rescan_existing)
336 
337  /* Now scan child busses */
338  list_for_each_entry(dev, &bus->devices, bus_list) {
339  if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
341  of_scan_pci_bridge(dev);
342  }
343  }
344 }
345 
352  struct pci_bus *bus)
353 {
354  __of_scan_bus(node, bus, 0);
355 }
357 
367  struct pci_bus *bus)
368 {
369  __of_scan_bus(node, bus, 1);
370 }
372