Linux Kernel
3.7.1
|
#include <perf_event.h>
Definition at line 33 of file perf_event.c.
unsigned long active_mask |
Definition at line 34 of file perf_event.c.
u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES] |
Definition at line 35 of file core-book3s.c.
unsigned long amasks[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES] |
Definition at line 36 of file core-book3s.c.
Definition at line 166 of file perf_event.h.
int assign[X86_PMC_IDX_MAX] |
Definition at line 127 of file perf_event.h.
unsigned long avalues[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES] |
Definition at line 37 of file core-book3s.c.
u64 br_sel |
Definition at line 148 of file perf_event.h.
Definition at line 48 of file perf_event.c.
atomic_t ctr_set[CPUMF_CTR_SET_MAX] |
Definition at line 72 of file perf_cpum_cf.c.
int current_idx |
Definition at line 46 of file perf_event.c.
int disabled |
Definition at line 25 of file core-book3s.c.
struct debug_store* ds |
Definition at line 137 of file perf_event.h.
int enabled |
Definition at line 34 of file perf_event.c.
Definition at line 40 of file perf_event.c.
Definition at line 129 of file perf_event.h.
Definition at line 30 of file core-book3s.c.
unsigned long events[MAX_HWEVENTS] |
Definition at line 96 of file perf_event.c.
Definition at line 231 of file perf_event.c.
unsigned long evtype[MAX_HWEVENTS] |
Definition at line 42 of file perf_event.c.
unsigned int flags |
Definition at line 31 of file core-book3s.c.
unsigned int group_flag |
Definition at line 39 of file core-book3s.c.
struct perf_guest_switch_msr guest_switch_msrs[X86_PMC_IDX_MAX] |
Definition at line 155 of file perf_event.h.
unsigned long idx_mask |
Definition at line 50 of file perf_event.c.
struct cpumf_ctr_info info |
Definition at line 71 of file perf_cpum_cf.c.
u64 intel_ctrl_guest_mask |
Definition at line 153 of file perf_event.h.
u64 intel_ctrl_host_mask |
Definition at line 154 of file perf_event.h.
int is_fake |
Definition at line 132 of file perf_event.h.
void* kfree_on_online |
Definition at line 170 of file perf_event.h.
void* lbr_context |
Definition at line 144 of file perf_event.h.
struct perf_branch_entry lbr_entries[MAX_LBR_ENTRIES] |
Definition at line 146 of file perf_event.h.
struct er_account* lbr_sel |
Definition at line 147 of file perf_event.h.
struct perf_branch_stack lbr_stack |
Definition at line 145 of file perf_event.h.
int lbr_users |
Definition at line 143 of file perf_event.h.
struct perf_event* limited_counter[MAX_LIMITED_HWCOUNTERS] |
Definition at line 33 of file core-book3s.c.
u8 limited_hwidx[MAX_LIMITED_HWCOUNTERS] |
Definition at line 34 of file core-book3s.c.
unsigned long mmcr[3] |
Definition at line 32 of file core-book3s.c.
int n_added |
Definition at line 38 of file perf_event.c.
int n_events |
Definition at line 36 of file perf_event.c.
int n_limited |
Definition at line 27 of file core-book3s.c.
int n_percpu |
Definition at line 24 of file core-book3s.c.
int n_txn |
Definition at line 126 of file perf_event.h.
int n_txn_start |
Definition at line 40 of file core-book3s.c.
u64 pcr[MAX_HWEVENTS] |
Definition at line 106 of file perf_event.c.
u64 pebs_enabled |
Definition at line 138 of file perf_event.h.
u64 perf_ctr_virt_mask |
Definition at line 168 of file perf_event.h.
u8 pmcs_enabled |
Definition at line 28 of file core-book3s.c.
unsigned long running[BITS_TO_LONGS(X86_PMC_IDX_MAX)] |
Definition at line 121 of file perf_event.h.
unsigned int saved_ctrl[MIPS_MAX_HWEVENTS] |
Definition at line 49 of file perf_event_mipsxx.c.
struct intel_shared_regs* shared_regs |
Definition at line 161 of file perf_event.h.
Definition at line 73 of file perf_cpum_cf.c.
u64 tags[X86_PMC_IDX_MAX] |
Definition at line 128 of file perf_event.h.
u64 tx_state |
Definition at line 73 of file perf_cpum_cf.c.
unsigned long used_mask |
Definition at line 232 of file perf_event.c.