#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl330.h>
#include <linux/scatterlist.h>
#include <linux/of.h>
#include "dmaengine.h"
Go to the source code of this file.
|
| enum | pl330_srccachectrl {
SCCTRL0,
SCCTRL1,
SCCTRL2,
SCCTRL3,
SINVALID1,
SINVALID2,
SCCTRL6,
SCCTRL7
} |
| |
| enum | pl330_dstcachectrl {
DCCTRL0,
DCCTRL1,
DCCTRL2,
DCCTRL3,
DINVALID1,
DINVALID2,
DCCTRL6,
DCCTRL7
} |
| |
| enum | pl330_byteswap {
SWAP_NO,
SWAP_2,
SWAP_4,
SWAP_8,
SWAP_16
} |
| |
| enum | pl330_reqtype { MEMTOMEM,
MEMTODEV,
DEVTOMEM,
DEVTODEV
} |
| |
| enum | pl330_op_err { PL330_ERR_NONE,
PL330_ERR_ABORT,
PL330_ERR_FAIL
} |
| |
| enum | pl330_chan_op { PL330_OP_START,
PL330_OP_ABORT,
PL330_OP_FLUSH
} |
| |
| enum | dmamov_dst { SAR = 0,
CCR,
DAR
} |
| |
| enum | pl330_dst { SRC = 0,
DST
} |
| |
| enum | pl330_cond { SINGLE,
BURST,
ALWAYS
} |
| |
| enum | pl330_dmac_state { UNINIT,
INIT,
DYING
} |
| |
| enum | desc_status { FREE,
PREP,
BUSY,
DONE
} |
| |
| #define CC |
( |
|
n | ) |
(_CC + (n)*0x20) |
| #define CC_DRCCCTRL_MASK 0x7 |
| #define CC_DSTBRSTLEN_SHFT 18 |
| #define CC_DSTBRSTSIZE_SHFT 15 |
| #define CC_DSTCCTRL_SHFT 25 |
| #define CC_DSTIA (1 << 24) |
| #define CC_DSTINC (1 << 14) |
| #define CC_DSTNS (1 << 23) |
| #define CC_DSTPRI (1 << 22) |
| #define CC_SRCBRSTLEN_SHFT 4 |
| #define CC_SRCBRSTSIZE_SHFT 1 |
| #define CC_SRCCCTRL_MASK 0x7 |
| #define CC_SRCCCTRL_SHFT 11 |
| #define CC_SRCIA (1 << 10) |
| #define CC_SRCINC (1 << 0) |
| #define CC_SRCNS (1 << 9) |
| #define CC_SRCPRI (1 << 8) |
| #define CMD_DMAFLUSHP 0x35 |
| #define CMD_DMALPEND 0x28 |
| #define CPC |
( |
|
n | ) |
(_CPC + (n)*0x8) |
| #define CR0_BOOT_EN_SET (1 << 1) |
| #define CR0_BOOT_MAN_NS (1 << 2) |
| #define CR0_NUM_CHANS_MASK 0x7 |
| #define CR0_NUM_CHANS_SHIFT 4 |
| #define CR0_NUM_EVENTS_MASK 0x1f |
| #define CR0_NUM_EVENTS_SHIFT 17 |
| #define CR0_NUM_PERIPH_MASK 0x1f |
| #define CR0_NUM_PERIPH_SHIFT 12 |
| #define CR0_PERIPH_REQ_SET (1 << 0) |
| #define CR1_ICACHE_LEN_MASK 0x7 |
| #define CR1_ICACHE_LEN_SHIFT 0 |
| #define CR1_NUM_ICACHELINES_MASK 0xf |
| #define CR1_NUM_ICACHELINES_SHIFT 4 |
| #define CRD_DATA_BUFF_MASK 0x3ff |
| #define CRD_DATA_BUFF_SHIFT 20 |
| #define CRD_DATA_WIDTH_MASK 0x7 |
| #define CRD_DATA_WIDTH_SHIFT 0 |
| #define CRD_RD_CAP_MASK 0x7 |
| #define CRD_RD_CAP_SHIFT 12 |
| #define CRD_RD_Q_DEP_MASK 0xf |
| #define CRD_RD_Q_DEP_SHIFT 16 |
| #define CRD_WR_CAP_MASK 0x7 |
| #define CRD_WR_CAP_SHIFT 4 |
| #define CRD_WR_Q_DEP_MASK 0xf |
| #define CRD_WR_Q_DEP_SHIFT 8 |
| #define CS |
( |
|
n | ) |
(_CS + (n)*0x8) |
| #define DA |
( |
|
n | ) |
(_DA + (n)*0x20) |
| #define DBG_BUSY (1 << 0) |
| #define DMAC_MODE_NS (1 << 0) |
| #define FTC |
( |
|
n | ) |
(_FTC + (n)*0x4) |
| #define LC0 |
( |
|
n | ) |
(_LC0 + (n)*0x20) |
| #define LC1 |
( |
|
n | ) |
(_LC1 + (n)*0x20) |
| #define MCODE_BUFF_PER_REQ 256 |
| #define NR_DEFAULT_DESC 16 |
| #define PCELL_ID_VAL 0xb105f00d |
| #define PERIPH_REV_MASK 0xf |
| #define PERIPH_REV_R0P0 0 |
| #define PERIPH_REV_R1P0 1 |
| #define PERIPH_REV_R1P1 2 |
| #define PERIPH_REV_SHIFT 20 |
| #define PL330_DBGCMD_DUMP |
( |
|
off, |
|
|
|
x... |
|
) |
| do {} while (0) |
| #define PL330_DBGMC_START |
( |
|
addr | ) |
do {} while (0) |
| #define PL330_MAX_IRQS 32 |
| #define PL330_MAX_PERI 32 |
| #define PL330_STABLE_STATES |
| #define PL330_STATE_ATBARRIER (1 << 10) |
| #define PL330_STATE_CACHEMISS (1 << 8) |
| #define PL330_STATE_COMPLETING (1 << 4) |
| #define PL330_STATE_EXECUTING (1 << 1) |
| #define PL330_STATE_FAULT_COMPLETING (1 << 7) |
| #define PL330_STATE_FAULTING (1 << 3) |
| #define PL330_STATE_INVALID (1 << 15) |
| #define PL330_STATE_KILLING (1 << 6) |
| #define PL330_STATE_QUEUEBUSY (1 << 11) |
| #define PL330_STATE_STOPPED (1 << 0) |
| #define PL330_STATE_UPDTPC (1 << 9) |
| #define PL330_STATE_WFE (1 << 2) |
| #define PL330_STATE_WFP (1 << 5) |
| #define SA |
( |
|
n | ) |
(_SA + (n)*0x20) |
- Enumerator:
-
Definition at line 520 of file pl330.c.
- Enumerator:
-
Definition at line 442 of file pl330.c.
- Enumerator:
| SWAP_NO |
|
| SWAP_2 |
|
| SWAP_4 |
|
| SWAP_8 |
|
| SWAP_16 |
|
Definition at line 56 of file pl330.c.
- Enumerator:
| PL330_OP_START |
|
| PL330_OP_ABORT |
|
| PL330_OP_FLUSH |
|
Definition at line 427 of file pl330.c.
- Enumerator:
-
Definition at line 453 of file pl330.c.
- Enumerator:
-
Definition at line 490 of file pl330.c.
- Enumerator:
-
Definition at line 448 of file pl330.c.
- Enumerator:
| DCCTRL0 |
|
| DCCTRL1 |
|
| DCCTRL2 |
|
| DCCTRL3 |
|
| DINVALID1 |
|
| DINVALID2 |
|
| DCCTRL6 |
|
| DCCTRL7 |
|
Definition at line 45 of file pl330.c.
- Enumerator:
| PL330_ERR_NONE |
|
| PL330_ERR_ABORT |
|
| PL330_ERR_FAIL |
|
Definition at line 372 of file pl330.c.
- Enumerator:
| MEMTOMEM |
|
| MEMTODEV |
|
| DEVTOMEM |
|
| DEVTODEV |
|
Definition at line 64 of file pl330.c.
- Enumerator:
| SCCTRL0 |
|
| SCCTRL1 |
|
| SCCTRL2 |
|
| SCCTRL3 |
|
| SINVALID1 |
|
| SINVALID2 |
|
| SCCTRL6 |
|
| SCCTRL7 |
|
Definition at line 34 of file pl330.c.
| module_amba_driver |
( |
pl330_driver |
| ) |
|
| MODULE_DESCRIPTION |
( |
"API Driver for PL330 DMAC" |
| ) |
|
| MODULE_DEVICE_TABLE |
( |
amba |
, |
|
|
pl330_ids |
|
|
) |
| |
1.8.2