Linux Kernel
3.7.1
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#include <linux/sched.h>
#include <linux/device.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/sa11x0-dma.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include "virt-dma.h"
Go to the source code of this file.
Data Structures | |
struct | sa11x0_dma_sg |
struct | sa11x0_dma_desc |
struct | sa11x0_dma_chan |
struct | sa11x0_dma_phy |
struct | sa11x0_dma_dev |
struct | sa11x0_dma_channel_desc |
Macros | |
#define | NR_PHY_CHAN 6 |
#define | DMA_ALIGN 3 |
#define | DMA_MAX_SIZE 0x1fff |
#define | DMA_CHUNK_SIZE 0x1000 |
#define | DMA_DDAR 0x00 |
#define | DMA_DCSR_S 0x04 |
#define | DMA_DCSR_C 0x08 |
#define | DMA_DCSR_R 0x0c |
#define | DMA_DBSA 0x10 |
#define | DMA_DBTA 0x14 |
#define | DMA_DBSB 0x18 |
#define | DMA_DBTB 0x1c |
#define | DMA_SIZE 0x20 |
#define | DCSR_RUN (1 << 0) |
#define | DCSR_IE (1 << 1) |
#define | DCSR_ERROR (1 << 2) |
#define | DCSR_DONEA (1 << 3) |
#define | DCSR_STRTA (1 << 4) |
#define | DCSR_DONEB (1 << 5) |
#define | DCSR_STRTB (1 << 6) |
#define | DCSR_BIU (1 << 7) |
#define | DDAR_RW (1 << 0) /* 0 = W, 1 = R */ |
#define | DDAR_E (1 << 1) /* 0 = LE, 1 = BE */ |
#define | DDAR_BS (1 << 2) /* 0 = BS4, 1 = BS8 */ |
#define | DDAR_DW (1 << 3) /* 0 = 8b, 1 = 16b */ |
#define | DDAR_Ser0UDCTr (0x0 << 4) |
#define | DDAR_Ser0UDCRc (0x1 << 4) |
#define | DDAR_Ser1SDLCTr (0x2 << 4) |
#define | DDAR_Ser1SDLCRc (0x3 << 4) |
#define | DDAR_Ser1UARTTr (0x4 << 4) |
#define | DDAR_Ser1UARTRc (0x5 << 4) |
#define | DDAR_Ser2ICPTr (0x6 << 4) |
#define | DDAR_Ser2ICPRc (0x7 << 4) |
#define | DDAR_Ser3UARTTr (0x8 << 4) |
#define | DDAR_Ser3UARTRc (0x9 << 4) |
#define | DDAR_Ser4MCP0Tr (0xa << 4) |
#define | DDAR_Ser4MCP0Rc (0xb << 4) |
#define | DDAR_Ser4MCP1Tr (0xc << 4) |
#define | DDAR_Ser4MCP1Rc (0xd << 4) |
#define | DDAR_Ser4SSPTr (0xe << 4) |
#define | DDAR_Ser4SSPRc (0xf << 4) |
#define | CD(d1, d2) { .ddar = DDAR_##d1 | d2, .name = #d1 } |
Functions | |
bool | sa11x0_dma_filter_fn (struct dma_chan *chan, void *param) |
EXPORT_SYMBOL (sa11x0_dma_filter_fn) | |
subsys_initcall (sa11x0_dma_init) | |
module_exit (sa11x0_dma_exit) | |
MODULE_AUTHOR ("Russell King") | |
MODULE_DESCRIPTION ("SA-11x0 DMA driver") | |
MODULE_LICENSE ("GPL v2") | |
MODULE_ALIAS ("platform:sa11x0-dma") | |
Variables | |
struct sa11x0_dma_sg | __attribute__ |
Definition at line 809 of file sa11x0-dma.c.
#define DCSR_BIU (1 << 7) |
Definition at line 48 of file sa11x0-dma.c.
#define DCSR_DONEA (1 << 3) |
Definition at line 44 of file sa11x0-dma.c.
#define DCSR_DONEB (1 << 5) |
Definition at line 46 of file sa11x0-dma.c.
#define DCSR_ERROR (1 << 2) |
Definition at line 43 of file sa11x0-dma.c.
#define DCSR_IE (1 << 1) |
Definition at line 42 of file sa11x0-dma.c.
#define DCSR_RUN (1 << 0) |
Definition at line 41 of file sa11x0-dma.c.
#define DCSR_STRTA (1 << 4) |
Definition at line 45 of file sa11x0-dma.c.
#define DCSR_STRTB (1 << 6) |
Definition at line 47 of file sa11x0-dma.c.
#define DDAR_BS (1 << 2) /* 0 = BS4, 1 = BS8 */ |
Definition at line 52 of file sa11x0-dma.c.
#define DDAR_DW (1 << 3) /* 0 = 8b, 1 = 16b */ |
Definition at line 53 of file sa11x0-dma.c.
Definition at line 51 of file sa11x0-dma.c.
Definition at line 50 of file sa11x0-dma.c.
#define DDAR_Ser0UDCRc (0x1 << 4) |
Definition at line 55 of file sa11x0-dma.c.
#define DDAR_Ser0UDCTr (0x0 << 4) |
Definition at line 54 of file sa11x0-dma.c.
#define DDAR_Ser1SDLCRc (0x3 << 4) |
Definition at line 57 of file sa11x0-dma.c.
#define DDAR_Ser1SDLCTr (0x2 << 4) |
Definition at line 56 of file sa11x0-dma.c.
#define DDAR_Ser1UARTRc (0x5 << 4) |
Definition at line 59 of file sa11x0-dma.c.
#define DDAR_Ser1UARTTr (0x4 << 4) |
Definition at line 58 of file sa11x0-dma.c.
#define DDAR_Ser2ICPRc (0x7 << 4) |
Definition at line 61 of file sa11x0-dma.c.
#define DDAR_Ser2ICPTr (0x6 << 4) |
Definition at line 60 of file sa11x0-dma.c.
#define DDAR_Ser3UARTRc (0x9 << 4) |
Definition at line 63 of file sa11x0-dma.c.
#define DDAR_Ser3UARTTr (0x8 << 4) |
Definition at line 62 of file sa11x0-dma.c.
#define DDAR_Ser4MCP0Rc (0xb << 4) |
Definition at line 65 of file sa11x0-dma.c.
#define DDAR_Ser4MCP0Tr (0xa << 4) |
Definition at line 64 of file sa11x0-dma.c.
#define DDAR_Ser4MCP1Rc (0xd << 4) |
Definition at line 67 of file sa11x0-dma.c.
#define DDAR_Ser4MCP1Tr (0xc << 4) |
Definition at line 66 of file sa11x0-dma.c.
#define DDAR_Ser4SSPRc (0xf << 4) |
Definition at line 69 of file sa11x0-dma.c.
#define DDAR_Ser4SSPTr (0xe << 4) |
Definition at line 68 of file sa11x0-dma.c.
#define DMA_ALIGN 3 |
Definition at line 27 of file sa11x0-dma.c.
#define DMA_CHUNK_SIZE 0x1000 |
Definition at line 29 of file sa11x0-dma.c.
#define DMA_DBSA 0x10 |
Definition at line 35 of file sa11x0-dma.c.
#define DMA_DBSB 0x18 |
Definition at line 37 of file sa11x0-dma.c.
#define DMA_DBTA 0x14 |
Definition at line 36 of file sa11x0-dma.c.
#define DMA_DBTB 0x1c |
Definition at line 38 of file sa11x0-dma.c.
#define DMA_DCSR_C 0x08 |
Definition at line 33 of file sa11x0-dma.c.
#define DMA_DCSR_R 0x0c |
Definition at line 34 of file sa11x0-dma.c.
#define DMA_DCSR_S 0x04 |
Definition at line 32 of file sa11x0-dma.c.
#define DMA_DDAR 0x00 |
Definition at line 31 of file sa11x0-dma.c.
#define DMA_MAX_SIZE 0x1fff |
Definition at line 28 of file sa11x0-dma.c.
#define DMA_SIZE 0x20 |
Definition at line 39 of file sa11x0-dma.c.
#define NR_PHY_CHAN 6 |
Definition at line 26 of file sa11x0-dma.c.
EXPORT_SYMBOL | ( | sa11x0_dma_filter_fn | ) |
MODULE_ALIAS | ( | "platform:sa11x0-dma" | ) |
MODULE_AUTHOR | ( | "Russell King" | ) |
MODULE_DESCRIPTION | ( | "SA-11x0 DMA driver" | ) |
module_exit | ( | sa11x0_dma_exit | ) |
MODULE_LICENSE | ( | "GPL v2" | ) |
Definition at line 1078 of file sa11x0-dma.c.
subsys_initcall | ( | sa11x0_dma_init | ) |