#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/mmc/card.h>
#include <linux/mmc/core.h>
#include <linux/mmc/host.h>
#include <linux/mmc/mmc.h>
#include <linux/mmc/sdio.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/slot-gpio.h>
#include <linux/mod_devicetable.h>
#include <linux/pagemap.h>
#include <linux/platform_device.h>
#include <linux/pm_qos.h>
#include <linux/pm_runtime.h>
#include <linux/spinlock.h>
#include <linux/module.h>

Data Structures
struct	sh_mmcif_host

Macros
#define	DRIVER_NAME "sh_mmcif"

#define	DRIVER_VERSION "2010-04-28"

#define	CMD_MASK 0x3f000000

#define	CMD_SET_RTYP_NO ((0 << 23) \| (0 << 22))

#define	CMD_SET_RTYP_6B ((0 << 23) \| (1 << 22)) /* R1/R1b/R3/R4/R5 */

#define	CMD_SET_RTYP_17B ((1 << 23) \| (0 << 22)) /* R2 */

#define	CMD_SET_RBSY (1 << 21) /* R1b */

#define	CMD_SET_CCSEN (1 << 20)

#define	CMD_SET_WDAT (1 << 19) /* 1: on data, 0: no data */

#define	CMD_SET_DWEN (1 << 18) /* 1: write, 0: read */

#define	CMD_SET_CMLTE (1 << 17) /* 1: multi block trans, 0: single */

#define	CMD_SET_CMD12EN (1 << 16) /* 1: CMD12 auto issue */

#define	CMD_SET_RIDXC_INDEX ((0 << 15) \| (0 << 14)) /* index check */

#define	CMD_SET_RIDXC_BITS ((0 << 15) \| (1 << 14)) /* check bits check */

#define	CMD_SET_RIDXC_NO ((1 << 15) \| (0 << 14)) /* no check */

#define	CMD_SET_CRC7C ((0 << 13) \| (0 << 12)) /* CRC7 check*/

#define	CMD_SET_CRC7C_BITS ((0 << 13) \| (1 << 12)) /* check bits check*/

#define	CMD_SET_CRC7C_INTERNAL ((1 << 13) \| (0 << 12)) /* internal CRC7 check*/

#define	CMD_SET_CRC16C (1 << 10) /* 0: CRC16 check*/

#define	CMD_SET_CRCSTE (1 << 8) /* 1: not receive CRC status */

#define	CMD_SET_TBIT (1 << 7) /* 1: tran mission bit "Low" */

#define	CMD_SET_OPDM (1 << 6) /* 1: open/drain */

#define	CMD_SET_CCSH (1 << 5)

#define	CMD_SET_DATW_1 ((0 << 1) \| (0 << 0)) /* 1bit */

#define	CMD_SET_DATW_4 ((0 << 1) \| (1 << 0)) /* 4bit */

#define	CMD_SET_DATW_8 ((1 << 1) \| (0 << 0)) /* 8bit */

#define	CMD_CTRL_BREAK (1 << 0)

#define	BLOCK_SIZE_MASK 0x0000ffff

#define	INT_CCSDE (1 << 29)

#define	INT_CMD12DRE (1 << 26)

#define	INT_CMD12RBE (1 << 25)

#define	INT_CMD12CRE (1 << 24)

#define	INT_DTRANE (1 << 23)

#define	INT_BUFRE (1 << 22)

#define	INT_BUFWEN (1 << 21)

#define	INT_BUFREN (1 << 20)

#define	INT_CCSRCV (1 << 19)

#define	INT_RBSYE (1 << 17)

#define	INT_CRSPE (1 << 16)

#define	INT_CMDVIO (1 << 15)

#define	INT_BUFVIO (1 << 14)

#define	INT_WDATERR (1 << 11)

#define	INT_RDATERR (1 << 10)

#define	INT_RIDXERR (1 << 9)

#define	INT_RSPERR (1 << 8)

#define	INT_CCSTO (1 << 5)

#define	INT_CRCSTO (1 << 4)

#define	INT_WDATTO (1 << 3)

#define	INT_RDATTO (1 << 2)

#define	INT_RBSYTO (1 << 1)

#define	INT_RSPTO (1 << 0)

#define	INT_ERR_STS

#define	MASK_ALL 0x00000000

#define	MASK_MCCSDE (1 << 29)

#define	MASK_MCMD12DRE (1 << 26)

#define	MASK_MCMD12RBE (1 << 25)

#define	MASK_MCMD12CRE (1 << 24)

#define	MASK_MDTRANE (1 << 23)

#define	MASK_MBUFRE (1 << 22)

#define	MASK_MBUFWEN (1 << 21)

#define	MASK_MBUFREN (1 << 20)

#define	MASK_MCCSRCV (1 << 19)

#define	MASK_MRBSYE (1 << 17)

#define	MASK_MCRSPE (1 << 16)

#define	MASK_MCMDVIO (1 << 15)

#define	MASK_MBUFVIO (1 << 14)

#define	MASK_MWDATERR (1 << 11)

#define	MASK_MRDATERR (1 << 10)

#define	MASK_MRIDXERR (1 << 9)

#define	MASK_MRSPERR (1 << 8)

#define	MASK_MCCSTO (1 << 5)

#define	MASK_MCRCSTO (1 << 4)

#define	MASK_MWDATTO (1 << 3)

#define	MASK_MRDATTO (1 << 2)

#define	MASK_MRBSYTO (1 << 1)

#define	MASK_MRSPTO (1 << 0)

#define	MASK_START_CMD

#define	STS1_CMDSEQ (1 << 31)

#define	STS2_CRCSTE (1 << 31)

#define	STS2_CRC16E (1 << 30)

#define	STS2_AC12CRCE (1 << 29)

#define	STS2_RSPCRC7E (1 << 28)

#define	STS2_CRCSTEBE (1 << 27)

#define	STS2_RDATEBE (1 << 26)

#define	STS2_AC12REBE (1 << 25)

#define	STS2_RSPEBE (1 << 24)

#define	STS2_AC12IDXE (1 << 23)

#define	STS2_RSPIDXE (1 << 22)

#define	STS2_CCSTO (1 << 15)

#define	STS2_RDATTO (1 << 14)

#define	STS2_DATBSYTO (1 << 13)

#define	STS2_CRCSTTO (1 << 12)

#define	STS2_AC12BSYTO (1 << 11)

#define	STS2_RSPBSYTO (1 << 10)

#define	STS2_AC12RSPTO (1 << 9)

#define	STS2_RSPTO (1 << 8)

#define	STS2_CRC_ERR

#define	STS2_TIMEOUT_ERR

#define	CLKDEV_EMMC_DATA 52000000 /* 52MHz */

#define	CLKDEV_MMC_DATA 20000000 /* 20MHz */

#define	CLKDEV_INIT 400000 /* 400 KHz */

#define	sh_mmcif_suspend NULL

#define	sh_mmcif_resume NULL

Enumerations
enum	mmcif_state { STATE_IDLE, STATE_REQUEST, STATE_IOS }

enum	mmcif_wait_for { MMCIF_WAIT_FOR_REQUEST, MMCIF_WAIT_FOR_CMD, MMCIF_WAIT_FOR_MREAD, MMCIF_WAIT_FOR_MWRITE, MMCIF_WAIT_FOR_READ, MMCIF_WAIT_FOR_WRITE, MMCIF_WAIT_FOR_READ_END, MMCIF_WAIT_FOR_WRITE_END, MMCIF_WAIT_FOR_STOP }

Functions
	MODULE_DEVICE_TABLE (of, mmcif_of_match)

	module_platform_driver (sh_mmcif_driver)

	MODULE_DESCRIPTION ("SuperH on-chip MMC/eMMC interface driver")

	MODULE_LICENSE ("GPL")

	MODULE_ALIAS ("platform:"DRIVER_NAME)

	MODULE_AUTHOR ("Yusuke Goda <yusuke.goda.sx@renesas.com>")

Macro Definition Documentation

#define BLOCK_SIZE_MASK 0x0000ffff

Definition at line 99 of file sh_mmcif.c.

#define CLKDEV_EMMC_DATA 52000000 /* 52MHz */

Definition at line 190 of file sh_mmcif.c.

#define CLKDEV_INIT 400000 /* 400 KHz */

Definition at line 192 of file sh_mmcif.c.

#define CLKDEV_MMC_DATA 20000000 /* 20MHz */

Definition at line 191 of file sh_mmcif.c.

#define CMD_CTRL_BREAK (1 << 0)

Definition at line 96 of file sh_mmcif.c.

#define CMD_MASK 0x3f000000

Definition at line 70 of file sh_mmcif.c.

#define CMD_SET_CCSEN (1 << 20)

Definition at line 75 of file sh_mmcif.c.

#define CMD_SET_CCSH (1 << 5)

Definition at line 90 of file sh_mmcif.c.

#define CMD_SET_CMD12EN (1 << 16) /* 1: CMD12 auto issue */

Definition at line 79 of file sh_mmcif.c.

#define CMD_SET_CMLTE (1 << 17) /* 1: multi block trans, 0: single */

Definition at line 78 of file sh_mmcif.c.

#define CMD_SET_CRC16C (1 << 10) /* 0: CRC16 check*/

Definition at line 86 of file sh_mmcif.c.

#define CMD_SET_CRC7C ((0 << 13) | (0 << 12)) /* CRC7 check*/

Definition at line 83 of file sh_mmcif.c.

#define CMD_SET_CRC7C_BITS ((0 << 13) | (1 << 12)) /* check bits check*/

Definition at line 84 of file sh_mmcif.c.

#define CMD_SET_CRC7C_INTERNAL ((1 << 13) | (0 << 12)) /* internal CRC7 check*/

Definition at line 85 of file sh_mmcif.c.

#define CMD_SET_CRCSTE (1 << 8) /* 1: not receive CRC status */

Definition at line 87 of file sh_mmcif.c.

#define CMD_SET_DATW_1 ((0 << 1) | (0 << 0)) /* 1bit */

Definition at line 91 of file sh_mmcif.c.

#define CMD_SET_DATW_4 ((0 << 1) | (1 << 0)) /* 4bit */

Definition at line 92 of file sh_mmcif.c.

#define CMD_SET_DATW_8 ((1 << 1) | (0 << 0)) /* 8bit */

Definition at line 93 of file sh_mmcif.c.

#define CMD_SET_DWEN (1 << 18) /* 1: write, 0: read */

Definition at line 77 of file sh_mmcif.c.

#define CMD_SET_OPDM (1 << 6) /* 1: open/drain */

Definition at line 89 of file sh_mmcif.c.

#define CMD_SET_RBSY (1 << 21) /* R1b */

Definition at line 74 of file sh_mmcif.c.

#define CMD_SET_RIDXC_BITS ((0 << 15) | (1 << 14)) /* check bits check */

Definition at line 81 of file sh_mmcif.c.

#define CMD_SET_RIDXC_INDEX ((0 << 15) | (0 << 14)) /* index check */

Definition at line 80 of file sh_mmcif.c.

#define CMD_SET_RIDXC_NO ((1 << 15) | (0 << 14)) /* no check */

Definition at line 82 of file sh_mmcif.c.

#define CMD_SET_RTYP_17B ((1 << 23) | (0 << 22)) /* R2 */

Definition at line 73 of file sh_mmcif.c.

#define CMD_SET_RTYP_6B ((0 << 23) | (1 << 22)) /* R1/R1b/R3/R4/R5 */

Definition at line 72 of file sh_mmcif.c.

#define CMD_SET_RTYP_NO ((0 << 23) | (0 << 22))

Definition at line 71 of file sh_mmcif.c.

#define CMD_SET_TBIT (1 << 7) /* 1: tran mission bit "Low" */

Definition at line 88 of file sh_mmcif.c.

#define CMD_SET_WDAT (1 << 19) /* 1: on data, 0: no data */

Definition at line 76 of file sh_mmcif.c.

#define DRIVER_NAME "sh_mmcif"

Definition at line 66 of file sh_mmcif.c.

#define DRIVER_VERSION "2010-04-28"

Definition at line 67 of file sh_mmcif.c.

#define INT_BUFRE (1 << 22)

Definition at line 107 of file sh_mmcif.c.

#define INT_BUFREN (1 << 20)

Definition at line 109 of file sh_mmcif.c.

#define INT_BUFVIO (1 << 14)

Definition at line 114 of file sh_mmcif.c.

#define INT_BUFWEN (1 << 21)

Definition at line 108 of file sh_mmcif.c.

#define INT_CCSDE (1 << 29)

Definition at line 102 of file sh_mmcif.c.

#define INT_CCSRCV (1 << 19)

Definition at line 110 of file sh_mmcif.c.

#define INT_CCSTO (1 << 5)

Definition at line 119 of file sh_mmcif.c.

#define INT_CMD12CRE (1 << 24)

Definition at line 105 of file sh_mmcif.c.

#define INT_CMD12DRE (1 << 26)

Definition at line 103 of file sh_mmcif.c.

#define INT_CMD12RBE (1 << 25)

Definition at line 104 of file sh_mmcif.c.

#define INT_CMDVIO (1 << 15)

Definition at line 113 of file sh_mmcif.c.

#define INT_CRCSTO (1 << 4)

Definition at line 120 of file sh_mmcif.c.

#define INT_CRSPE (1 << 16)

Definition at line 112 of file sh_mmcif.c.

#define INT_DTRANE (1 << 23)

Definition at line 106 of file sh_mmcif.c.

#define INT_ERR_STS

Value:

(INT_CMDVIO | INT_BUFVIO | INT_WDATERR |  \
                 INT_RDATERR | INT_RIDXERR | INT_RSPERR | \
                 INT_CCSTO | INT_CRCSTO | INT_WDATTO |    \
                 INT_RDATTO | INT_RBSYTO | INT_RSPTO)

Definition at line 125 of file sh_mmcif.c.

#define INT_RBSYE (1 << 17)

Definition at line 111 of file sh_mmcif.c.

#define INT_RBSYTO (1 << 1)

Definition at line 123 of file sh_mmcif.c.

#define INT_RDATERR (1 << 10)

Definition at line 116 of file sh_mmcif.c.

#define INT_RDATTO (1 << 2)

Definition at line 122 of file sh_mmcif.c.

#define INT_RIDXERR (1 << 9)

Definition at line 117 of file sh_mmcif.c.

#define INT_RSPERR (1 << 8)

Definition at line 118 of file sh_mmcif.c.

#define INT_RSPTO (1 << 0)

Definition at line 124 of file sh_mmcif.c.

#define INT_WDATERR (1 << 11)

Definition at line 115 of file sh_mmcif.c.

#define INT_WDATTO (1 << 3)

Definition at line 121 of file sh_mmcif.c.

#define MASK_ALL 0x00000000

Definition at line 131 of file sh_mmcif.c.

#define MASK_MBUFRE (1 << 22)

Definition at line 137 of file sh_mmcif.c.

#define MASK_MBUFREN (1 << 20)

Definition at line 139 of file sh_mmcif.c.

#define MASK_MBUFVIO (1 << 14)

Definition at line 144 of file sh_mmcif.c.

#define MASK_MBUFWEN (1 << 21)

Definition at line 138 of file sh_mmcif.c.

#define MASK_MCCSDE (1 << 29)

Definition at line 132 of file sh_mmcif.c.

#define MASK_MCCSRCV (1 << 19)

Definition at line 140 of file sh_mmcif.c.

#define MASK_MCCSTO (1 << 5)

Definition at line 149 of file sh_mmcif.c.

#define MASK_MCMD12CRE (1 << 24)

Definition at line 135 of file sh_mmcif.c.

#define MASK_MCMD12DRE (1 << 26)

Definition at line 133 of file sh_mmcif.c.

#define MASK_MCMD12RBE (1 << 25)

Definition at line 134 of file sh_mmcif.c.

#define MASK_MCMDVIO (1 << 15)

Definition at line 143 of file sh_mmcif.c.

#define MASK_MCRCSTO (1 << 4)

Definition at line 150 of file sh_mmcif.c.

#define MASK_MCRSPE (1 << 16)

Definition at line 142 of file sh_mmcif.c.

#define MASK_MDTRANE (1 << 23)

Definition at line 136 of file sh_mmcif.c.

#define MASK_MRBSYE (1 << 17)

Definition at line 141 of file sh_mmcif.c.

#define MASK_MRBSYTO (1 << 1)

Definition at line 153 of file sh_mmcif.c.

#define MASK_MRDATERR (1 << 10)

Definition at line 146 of file sh_mmcif.c.

#define MASK_MRDATTO (1 << 2)

Definition at line 152 of file sh_mmcif.c.

#define MASK_MRIDXERR (1 << 9)

Definition at line 147 of file sh_mmcif.c.

#define MASK_MRSPERR (1 << 8)

Definition at line 148 of file sh_mmcif.c.

#define MASK_MRSPTO (1 << 0)

Definition at line 154 of file sh_mmcif.c.

#define MASK_MWDATERR (1 << 11)

Definition at line 145 of file sh_mmcif.c.

#define MASK_MWDATTO (1 << 3)

Definition at line 151 of file sh_mmcif.c.

#define MASK_START_CMD

Value:

(MASK_MCMDVIO | MASK_MBUFVIO | MASK_MWDATERR | \
                 MASK_MRDATERR | MASK_MRIDXERR | MASK_MRSPERR | \
                 MASK_MCCSTO | MASK_MCRCSTO | MASK_MWDATTO | \
                 MASK_MRDATTO | MASK_MRBSYTO | MASK_MRSPTO)

Definition at line 156 of file sh_mmcif.c.

#define sh_mmcif_resume NULL

Definition at line 1493 of file sh_mmcif.c.

#define sh_mmcif_suspend NULL

Definition at line 1492 of file sh_mmcif.c.

#define STS1_CMDSEQ (1 << 31)

Definition at line 162 of file sh_mmcif.c.

#define STS2_AC12BSYTO (1 << 11)

Definition at line 179 of file sh_mmcif.c.

#define STS2_AC12CRCE (1 << 29)

Definition at line 167 of file sh_mmcif.c.

#define STS2_AC12IDXE (1 << 23)

Definition at line 173 of file sh_mmcif.c.

#define STS2_AC12REBE (1 << 25)

Definition at line 171 of file sh_mmcif.c.

#define STS2_AC12RSPTO (1 << 9)

Definition at line 181 of file sh_mmcif.c.

#define STS2_CCSTO (1 << 15)

Definition at line 175 of file sh_mmcif.c.

#define STS2_CRC16E (1 << 30)

Definition at line 166 of file sh_mmcif.c.

#define STS2_CRC_ERR

Value:

(STS2_CRCSTE | STS2_CRC16E | \

STS2_AC12CRCE | STS2_RSPCRC7E | STS2_CRCSTEBE)

Definition at line 183 of file sh_mmcif.c.

#define STS2_CRCSTE (1 << 31)

Definition at line 165 of file sh_mmcif.c.

#define STS2_CRCSTEBE (1 << 27)

Definition at line 169 of file sh_mmcif.c.

#define STS2_CRCSTTO (1 << 12)

Definition at line 178 of file sh_mmcif.c.

#define STS2_DATBSYTO (1 << 13)

Definition at line 177 of file sh_mmcif.c.

#define STS2_RDATEBE (1 << 26)

Definition at line 170 of file sh_mmcif.c.

#define STS2_RDATTO (1 << 14)

Definition at line 176 of file sh_mmcif.c.

#define STS2_RSPBSYTO (1 << 10)

Definition at line 180 of file sh_mmcif.c.

#define STS2_RSPCRC7E (1 << 28)

Definition at line 168 of file sh_mmcif.c.

#define STS2_RSPEBE (1 << 24)

Definition at line 172 of file sh_mmcif.c.

#define STS2_RSPIDXE (1 << 22)

Definition at line 174 of file sh_mmcif.c.

#define STS2_RSPTO (1 << 8)

Definition at line 182 of file sh_mmcif.c.

#define STS2_TIMEOUT_ERR

Value:

(STS2_CCSTO | STS2_RDATTO |     \
                 STS2_DATBSYTO | STS2_CRCSTTO |     \
                 STS2_AC12BSYTO | STS2_RSPBSYTO |   \
                 STS2_AC12RSPTO | STS2_RSPTO)

Definition at line 185 of file sh_mmcif.c.

Enumeration Type Documentation

enum mmcif_state

Enumerator:

STATE_IDLE
STATE_REQUEST
STATE_IOS

Definition at line 194 of file sh_mmcif.c.

enum mmcif_wait_for

Enumerator:

MMCIF_WAIT_FOR_REQUEST
MMCIF_WAIT_FOR_CMD
MMCIF_WAIT_FOR_MREAD
MMCIF_WAIT_FOR_MWRITE
MMCIF_WAIT_FOR_READ
MMCIF_WAIT_FOR_WRITE
MMCIF_WAIT_FOR_READ_END
MMCIF_WAIT_FOR_WRITE_END
MMCIF_WAIT_FOR_STOP

Definition at line 200 of file sh_mmcif.c.

Function Documentation

MODULE_ALIAS ( "platform:" DRIVER_NAME )

MODULE_AUTHOR ( "Yusuke Goda <yusuke.goda.sx@renesas.com>" )

MODULE_DESCRIPTION ( "SuperH on-chip MMC/eMMC interface driver" )

MODULE_DEVICE_TABLE	(	of	,
		mmcif_of_match
	)

MODULE_LICENSE ( "GPL" )

module_platform_driver ( sh_mmcif_driver )

Data Structures

Macros

Enumerations

Functions

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation