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smc91c92_cs.c
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1 /*======================================================================
2 
3  A PCMCIA ethernet driver for SMC91c92-based cards.
4 
5  This driver supports Megahertz PCMCIA ethernet cards; and
6  Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7  multifunction cards.
8 
9  Copyright (C) 1999 David A. Hinds -- [email protected]
10 
11  smc91c92_cs.c 1.122 2002/10/25 06:26:39
12 
13  This driver contains code written by Donald Becker
14  ([email protected]), Rowan Hughes ([email protected]),
15  David Hinds ([email protected]), and Erik Stahlman
16  ([email protected]). Donald wrote the SMC 91c92 code using parts of
17  Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18  incorporated some parts of his driver here. I (Dave) wrote most
19  of the PCMCIA glue code, and the Ositech support code. Kelly
20  Stephens ([email protected]) added support for the Motorola
21  Mariner, with help from Allen Brost.
22 
23  This software may be used and distributed according to the terms of
24  the GNU General Public License, incorporated herein by reference.
25 
26 ======================================================================*/
27 
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29 
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/init.h>
33 #include <linux/slab.h>
34 #include <linux/string.h>
35 #include <linux/timer.h>
36 #include <linux/interrupt.h>
37 #include <linux/delay.h>
38 #include <linux/crc32.h>
39 #include <linux/netdevice.h>
40 #include <linux/etherdevice.h>
41 #include <linux/skbuff.h>
42 #include <linux/if_arp.h>
43 #include <linux/ioport.h>
44 #include <linux/ethtool.h>
45 #include <linux/mii.h>
46 #include <linux/jiffies.h>
47 #include <linux/firmware.h>
48 
49 #include <pcmcia/cistpl.h>
50 #include <pcmcia/cisreg.h>
51 #include <pcmcia/ciscode.h>
52 #include <pcmcia/ds.h>
53 #include <pcmcia/ss.h>
54 
55 #include <asm/io.h>
56 #include <asm/uaccess.h>
57 
58 /*====================================================================*/
59 
60 static const char *if_names[] = { "auto", "10baseT", "10base2"};
61 
62 /* Firmware name */
63 #define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
64 
65 /* Module parameters */
66 
67 MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
68 MODULE_LICENSE("GPL");
70 
71 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
72 
73 /*
74  Transceiver/media type.
75  0 = auto
76  1 = 10baseT (and autoselect if #define AUTOSELECT),
77  2 = AUI/10base2,
78 */
80 
81 
82 #define DRV_NAME "smc91c92_cs"
83 #define DRV_VERSION "1.123"
84 
85 /*====================================================================*/
86 
87 /* Operational parameter that usually are not changed. */
88 
89 /* Time in jiffies before concluding Tx hung */
90 #define TX_TIMEOUT ((400*HZ)/1000)
91 
92 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
93 #define INTR_WORK 4
94 
95 /* Times to check the check the chip before concluding that it doesn't
96  currently have room for another Tx packet. */
97 #define MEMORY_WAIT_TIME 8
98 
99 struct smc_private {
100  struct pcmcia_device *p_dev;
104 
107  void __iomem *base;
115  int duplex;
116  int rx_ovrn;
117 };
118 
119 /* Special definitions for Megahertz multifunction cards */
120 #define MEGAHERTZ_ISR 0x0380
121 
122 /* Special function registers for Motorola Mariner */
123 #define MOT_LAN 0x0000
124 #define MOT_UART 0x0020
125 #define MOT_EEPROM 0x20
126 
127 #define MOT_NORMAL \
128 (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129 
130 /* Special function registers for Ositech cards */
131 #define OSITECH_AUI_CTL 0x0c
132 #define OSITECH_PWRDOWN 0x0d
133 #define OSITECH_RESET 0x0e
134 #define OSITECH_ISR 0x0f
135 #define OSITECH_AUI_PWR 0x0c
136 #define OSITECH_RESET_ISR 0x0e
137 
138 #define OSI_AUI_PWR 0x40
139 #define OSI_LAN_PWRDOWN 0x02
140 #define OSI_MODEM_PWRDOWN 0x01
141 #define OSI_LAN_RESET 0x02
142 #define OSI_MODEM_RESET 0x01
143 
144 /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145 #define BANK_SELECT 14 /* Window select register. */
146 #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
147 
148 /* Bank 0 registers. */
149 #define TCR 0 /* transmit control register */
150 #define TCR_CLEAR 0 /* do NOTHING */
151 #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
152 #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
153 #define TCR_MONCSN 0x0400 /* Monitor Carrier. */
154 #define TCR_FDUPLX 0x0800 /* Full duplex mode. */
155 #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156 
157 #define EPH 2 /* Ethernet Protocol Handler report. */
158 #define EPH_TX_SUC 0x0001
159 #define EPH_SNGLCOL 0x0002
160 #define EPH_MULCOL 0x0004
161 #define EPH_LTX_MULT 0x0008
162 #define EPH_16COL 0x0010
163 #define EPH_SQET 0x0020
164 #define EPH_LTX_BRD 0x0040
165 #define EPH_TX_DEFR 0x0080
166 #define EPH_LAT_COL 0x0200
167 #define EPH_LOST_CAR 0x0400
168 #define EPH_EXC_DEF 0x0800
169 #define EPH_CTR_ROL 0x1000
170 #define EPH_RX_OVRN 0x2000
171 #define EPH_LINK_OK 0x4000
172 #define EPH_TX_UNRN 0x8000
173 #define MEMINFO 8 /* Memory Information Register */
174 #define MEMCFG 10 /* Memory Configuration Register */
175 
176 /* Bank 1 registers. */
177 #define CONFIG 0
178 #define CFG_MII_SELECT 0x8000 /* 91C100 only */
179 #define CFG_NO_WAIT 0x1000
180 #define CFG_FULL_STEP 0x0400
181 #define CFG_SET_SQLCH 0x0200
182 #define CFG_AUI_SELECT 0x0100
183 #define CFG_16BIT 0x0080
184 #define CFG_DIS_LINK 0x0040
185 #define CFG_STATIC 0x0030
186 #define CFG_IRQ_SEL_1 0x0004
187 #define CFG_IRQ_SEL_0 0x0002
188 #define BASE_ADDR 2
189 #define ADDR0 4
190 #define GENERAL 10
191 #define CONTROL 12
192 #define CTL_STORE 0x0001
193 #define CTL_RELOAD 0x0002
194 #define CTL_EE_SELECT 0x0004
195 #define CTL_TE_ENABLE 0x0020
196 #define CTL_CR_ENABLE 0x0040
197 #define CTL_LE_ENABLE 0x0080
198 #define CTL_AUTO_RELEASE 0x0800
199 #define CTL_POWERDOWN 0x2000
200 
201 /* Bank 2 registers. */
202 #define MMU_CMD 0
203 #define MC_ALLOC 0x20 /* or with number of 256 byte packets */
204 #define MC_RESET 0x40
205 #define MC_RELEASE 0x80 /* remove and release the current rx packet */
206 #define MC_FREEPKT 0xA0 /* Release packet in PNR register */
207 #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
208 #define PNR_ARR 2
209 #define FIFO_PORTS 4
210 #define FP_RXEMPTY 0x8000
211 #define POINTER 6
212 #define PTR_AUTO_INC 0x0040
213 #define PTR_READ 0x2000
214 #define PTR_AUTOINC 0x4000
215 #define PTR_RCV 0x8000
216 #define DATA_1 8
217 #define INTERRUPT 12
218 #define IM_RCV_INT 0x1
219 #define IM_TX_INT 0x2
220 #define IM_TX_EMPTY_INT 0x4
221 #define IM_ALLOC_INT 0x8
222 #define IM_RX_OVRN_INT 0x10
223 #define IM_EPH_INT 0x20
224 
225 #define RCR 4
226 enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227  RxEnable = 0x0100, RxStripCRC = 0x0200};
228 #define RCR_SOFTRESET 0x8000 /* resets the chip */
229 #define RCR_STRIP_CRC 0x200 /* strips CRC */
230 #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
231 #define RCR_ALMUL 0x4 /* receive all multicast packets */
232 #define RCR_PROMISC 0x2 /* enable promiscuous mode */
233 
234 /* the normal settings for the RCR register : */
235 #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
236 #define RCR_CLEAR 0x0 /* set it to a base state */
237 #define COUNTER 6
238 
239 /* BANK 3 -- not the same values as in smc9194! */
240 #define MULTICAST0 0
241 #define MULTICAST2 2
242 #define MULTICAST4 4
243 #define MULTICAST6 6
244 #define MGMT 8
245 #define REVISION 0x0a
246 
247 /* Transmit status bits. */
248 #define TS_SUCCESS 0x0001
249 #define TS_16COL 0x0010
250 #define TS_LATCOL 0x0200
251 #define TS_LOSTCAR 0x0400
252 
253 /* Receive status bits. */
254 #define RS_ALGNERR 0x8000
255 #define RS_BADCRC 0x2000
256 #define RS_ODDFRAME 0x1000
257 #define RS_TOOLONG 0x0800
258 #define RS_TOOSHORT 0x0400
259 #define RS_MULTICAST 0x0001
260 #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261 
262 #define set_bits(v, p) outw(inw(p)|(v), (p))
263 #define mask_bits(v, p) outw(inw(p)&(v), (p))
264 
265 /*====================================================================*/
266 
267 static void smc91c92_detach(struct pcmcia_device *p_dev);
268 static int smc91c92_config(struct pcmcia_device *link);
269 static void smc91c92_release(struct pcmcia_device *link);
270 
271 static int smc_open(struct net_device *dev);
272 static int smc_close(struct net_device *dev);
273 static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274 static void smc_tx_timeout(struct net_device *dev);
275 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276  struct net_device *dev);
277 static irqreturn_t smc_interrupt(int irq, void *dev_id);
278 static void smc_rx(struct net_device *dev);
279 static void set_rx_mode(struct net_device *dev);
280 static int s9k_config(struct net_device *dev, struct ifmap *map);
281 static void smc_set_xcvr(struct net_device *dev, int if_port);
282 static void smc_reset(struct net_device *dev);
283 static void media_check(u_long arg);
284 static void mdio_sync(unsigned int addr);
285 static int mdio_read(struct net_device *dev, int phy_id, int loc);
286 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287 static int smc_link_ok(struct net_device *dev);
288 static const struct ethtool_ops ethtool_ops;
289 
290 static const struct net_device_ops smc_netdev_ops = {
291  .ndo_open = smc_open,
292  .ndo_stop = smc_close,
293  .ndo_start_xmit = smc_start_xmit,
294  .ndo_tx_timeout = smc_tx_timeout,
295  .ndo_set_config = s9k_config,
296  .ndo_set_rx_mode = set_rx_mode,
297  .ndo_do_ioctl = smc_ioctl,
298  .ndo_change_mtu = eth_change_mtu,
299  .ndo_set_mac_address = eth_mac_addr,
300  .ndo_validate_addr = eth_validate_addr,
301 };
302 
303 static int smc91c92_probe(struct pcmcia_device *link)
304 {
305  struct smc_private *smc;
306  struct net_device *dev;
307 
308  dev_dbg(&link->dev, "smc91c92_attach()\n");
309 
310  /* Create new ethernet device */
311  dev = alloc_etherdev(sizeof(struct smc_private));
312  if (!dev)
313  return -ENOMEM;
314  smc = netdev_priv(dev);
315  smc->p_dev = link;
316  link->priv = dev;
317 
318  spin_lock_init(&smc->lock);
319 
320  /* The SMC91c92-specific entries in the device structure. */
321  dev->netdev_ops = &smc_netdev_ops;
323  dev->watchdog_timeo = TX_TIMEOUT;
324 
325  smc->mii_if.dev = dev;
326  smc->mii_if.mdio_read = mdio_read;
327  smc->mii_if.mdio_write = mdio_write;
328  smc->mii_if.phy_id_mask = 0x1f;
329  smc->mii_if.reg_num_mask = 0x1f;
330 
331  return smc91c92_config(link);
332 } /* smc91c92_attach */
333 
334 static void smc91c92_detach(struct pcmcia_device *link)
335 {
336  struct net_device *dev = link->priv;
337 
338  dev_dbg(&link->dev, "smc91c92_detach\n");
339 
340  unregister_netdev(dev);
341 
342  smc91c92_release(link);
343 
344  free_netdev(dev);
345 } /* smc91c92_detach */
346 
347 /*====================================================================*/
348 
349 static int cvt_ascii_address(struct net_device *dev, char *s)
350 {
351  int i, j, da, c;
352 
353  if (strlen(s) != 12)
354  return -1;
355  for (i = 0; i < 6; i++) {
356  da = 0;
357  for (j = 0; j < 2; j++) {
358  c = *s++;
359  da <<= 4;
360  da += ((c >= '0') && (c <= '9')) ?
361  (c - '0') : ((c & 0x0f) + 9);
362  }
363  dev->dev_addr[i] = da;
364  }
365  return 0;
366 }
367 
368 /*====================================================================
369 
370  Configuration stuff for Megahertz cards
371 
372  mhz_3288_power() is used to power up a 3288's ethernet chip.
373  mhz_mfc_config() handles socket setup for multifunction (1144
374  and 3288) cards. mhz_setup() gets a card's hardware ethernet
375  address.
376 
377 ======================================================================*/
378 
379 static int mhz_3288_power(struct pcmcia_device *link)
380 {
381  struct net_device *dev = link->priv;
382  struct smc_private *smc = netdev_priv(dev);
383  u_char tmp;
384 
385  /* Read the ISR twice... */
386  readb(smc->base+MEGAHERTZ_ISR);
387  udelay(5);
388  readb(smc->base+MEGAHERTZ_ISR);
389 
390  /* Pause 200ms... */
391  mdelay(200);
392 
393  /* Now read and write the COR... */
394  tmp = readb(smc->base + link->config_base + CISREG_COR);
395  udelay(5);
396  writeb(tmp, smc->base + link->config_base + CISREG_COR);
397 
398  return 0;
399 }
400 
401 static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data)
402 {
403  int k;
404  p_dev->io_lines = 16;
405  p_dev->resource[1]->start = p_dev->resource[0]->start;
406  p_dev->resource[1]->end = 8;
407  p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
408  p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
409  p_dev->resource[0]->end = 16;
410  p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
411  p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
412  for (k = 0; k < 0x400; k += 0x10) {
413  if (k & 0x80)
414  continue;
415  p_dev->resource[0]->start = k ^ 0x300;
416  if (!pcmcia_request_io(p_dev))
417  return 0;
418  }
419  return -ENODEV;
420 }
421 
422 static int mhz_mfc_config(struct pcmcia_device *link)
423 {
424  struct net_device *dev = link->priv;
425  struct smc_private *smc = netdev_priv(dev);
426  unsigned int offset;
427  int i;
428 
429  link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ |
430  CONF_AUTO_SET_IO;
431 
432  /* The Megahertz combo cards have modem-like CIS entries, so
433  we have to explicitly try a bunch of port combinations. */
434  if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
435  return -ENODEV;
436 
437  dev->base_addr = link->resource[0]->start;
438 
439  /* Allocate a memory window, for accessing the ISR */
440  link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
441  link->resource[2]->start = link->resource[2]->end = 0;
442  i = pcmcia_request_window(link, link->resource[2], 0);
443  if (i != 0)
444  return -ENODEV;
445 
446  smc->base = ioremap(link->resource[2]->start,
447  resource_size(link->resource[2]));
448  offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
449  i = pcmcia_map_mem_page(link, link->resource[2], offset);
450  if ((i == 0) &&
451  (smc->manfid == MANFID_MEGAHERTZ) &&
453  mhz_3288_power(link);
454 
455  return 0;
456 }
457 
458 static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
459  tuple_t *tuple,
460  void *priv)
461 {
462  struct net_device *dev = priv;
464  u8 *buf;
465 
466  if (pcmcia_parse_tuple(tuple, &parse))
467  return -EINVAL;
468 
469  buf = parse.version_1.str + parse.version_1.ofs[3];
470 
471  if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
472  return 0;
473 
474  return -EINVAL;
475 };
476 
477 static int mhz_setup(struct pcmcia_device *link)
478 {
479  struct net_device *dev = link->priv;
480  size_t len;
481  u8 *buf;
482  int rc;
483 
484  /* Read the station address from the CIS. It is stored as the last
485  (fourth) string in the Version 1 Version/ID tuple. */
486  if ((link->prod_id[3]) &&
487  (cvt_ascii_address(dev, link->prod_id[3]) == 0))
488  return 0;
489 
490  /* Workarounds for broken cards start here. */
491  /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
492  if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
493  return 0;
494 
495  /* Another possibility: for the EM3288, in a special tuple */
496  rc = -1;
497  len = pcmcia_get_tuple(link, 0x81, &buf);
498  if (buf && len >= 13) {
499  buf[12] = '\0';
500  if (cvt_ascii_address(dev, buf) == 0)
501  rc = 0;
502  }
503  kfree(buf);
504 
505  return rc;
506 };
507 
508 /*======================================================================
509 
510  Configuration stuff for the Motorola Mariner
511 
512  mot_config() writes directly to the Mariner configuration
513  registers because the CIS is just bogus.
514 
515 ======================================================================*/
516 
517 static void mot_config(struct pcmcia_device *link)
518 {
519  struct net_device *dev = link->priv;
520  struct smc_private *smc = netdev_priv(dev);
521  unsigned int ioaddr = dev->base_addr;
522  unsigned int iouart = link->resource[1]->start;
523 
524  /* Set UART base address and force map with COR bit 1 */
525  writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
526  writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
528 
529  /* Set SMC base address and force map with COR bit 1 */
530  writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
531  writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
533 
534  /* Wait for things to settle down */
535  mdelay(100);
536 }
537 
538 static int mot_setup(struct pcmcia_device *link)
539 {
540  struct net_device *dev = link->priv;
541  unsigned int ioaddr = dev->base_addr;
542  int i, wait, loop;
543  u_int addr;
544 
545  /* Read Ethernet address from Serial EEPROM */
546 
547  for (i = 0; i < 3; i++) {
548  SMC_SELECT_BANK(2);
549  outw(MOT_EEPROM + i, ioaddr + POINTER);
550  SMC_SELECT_BANK(1);
551  outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
552 
553  for (loop = wait = 0; loop < 200; loop++) {
554  udelay(10);
555  wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
556  if (wait == 0) break;
557  }
558 
559  if (wait)
560  return -1;
561 
562  addr = inw(ioaddr + GENERAL);
563  dev->dev_addr[2*i] = addr & 0xff;
564  dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
565  }
566 
567  return 0;
568 }
569 
570 /*====================================================================*/
571 
572 static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data)
573 {
574  p_dev->resource[0]->end = 16;
575  p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
576  p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
577 
578  return pcmcia_request_io(p_dev);
579 }
580 
581 static int smc_config(struct pcmcia_device *link)
582 {
583  struct net_device *dev = link->priv;
584  int i;
585 
586  link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
587 
588  i = pcmcia_loop_config(link, smc_configcheck, NULL);
589  if (!i)
590  dev->base_addr = link->resource[0]->start;
591 
592  return i;
593 }
594 
595 
596 static int smc_setup(struct pcmcia_device *link)
597 {
598  struct net_device *dev = link->priv;
599 
600  /* Check for a LAN function extension tuple */
601  if (!pcmcia_get_mac_from_cis(link, dev))
602  return 0;
603 
604  /* Try the third string in the Version 1 Version/ID tuple. */
605  if (link->prod_id[2]) {
606  if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
607  return 0;
608  }
609  return -1;
610 }
611 
612 /*====================================================================*/
613 
614 static int osi_config(struct pcmcia_device *link)
615 {
616  struct net_device *dev = link->priv;
617  static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
618  int i, j;
619 
620  link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ;
621  link->resource[0]->end = 64;
622  link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
623  link->resource[1]->end = 8;
624 
625  /* Enable Hard Decode, LAN, Modem */
626  link->io_lines = 16;
627  link->config_index = 0x23;
628 
629  for (i = j = 0; j < 4; j++) {
630  link->resource[1]->start = com[j];
631  i = pcmcia_request_io(link);
632  if (i == 0)
633  break;
634  }
635  if (i != 0) {
636  /* Fallback: turn off hard decode */
637  link->config_index = 0x03;
638  link->resource[1]->end = 0;
639  i = pcmcia_request_io(link);
640  }
641  dev->base_addr = link->resource[0]->start + 0x10;
642  return i;
643 }
644 
645 static int osi_load_firmware(struct pcmcia_device *link)
646 {
647  const struct firmware *fw;
648  int i, err;
649 
650  err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
651  if (err) {
652  pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
653  return err;
654  }
655 
656  /* Download the Seven of Diamonds firmware */
657  for (i = 0; i < fw->size; i++) {
658  outb(fw->data[i], link->resource[0]->start + 2);
659  udelay(50);
660  }
661  release_firmware(fw);
662  return err;
663 }
664 
665 static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
666  tuple_t *tuple,
667  void *priv)
668 {
669  struct net_device *dev = priv;
670  int i;
671 
672  if (tuple->TupleDataLen < 8)
673  return -EINVAL;
674  if (tuple->TupleData[0] != 0x04)
675  return -EINVAL;
676  for (i = 0; i < 6; i++)
677  dev->dev_addr[i] = tuple->TupleData[i+2];
678  return 0;
679 };
680 
681 
682 static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
683 {
684  struct net_device *dev = link->priv;
685  int rc;
686 
687  /* Read the station address from tuple 0x90, subtuple 0x04 */
688  if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
689  return -1;
690 
691  if (((manfid == MANFID_OSITECH) &&
692  (cardid == PRODID_OSITECH_SEVEN)) ||
693  ((manfid == MANFID_PSION) &&
694  (cardid == PRODID_PSION_NET100))) {
695  rc = osi_load_firmware(link);
696  if (rc)
697  return rc;
698  } else if (manfid == MANFID_OSITECH) {
699  /* Make sure both functions are powered up */
700  set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
701  /* Now, turn on the interrupt for both card functions */
702  set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
703  dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
704  inw(link->resource[0]->start + OSITECH_AUI_PWR),
705  inw(link->resource[0]->start + OSITECH_RESET_ISR));
706  }
707  return 0;
708 }
709 
710 static int smc91c92_suspend(struct pcmcia_device *link)
711 {
712  struct net_device *dev = link->priv;
713 
714  if (link->open)
715  netif_device_detach(dev);
716 
717  return 0;
718 }
719 
720 static int smc91c92_resume(struct pcmcia_device *link)
721 {
722  struct net_device *dev = link->priv;
723  struct smc_private *smc = netdev_priv(dev);
724  int i;
725 
726  if ((smc->manfid == MANFID_MEGAHERTZ) &&
728  mhz_3288_power(link);
729  if (smc->manfid == MANFID_MOTOROLA)
730  mot_config(link);
731  if ((smc->manfid == MANFID_OSITECH) &&
732  (smc->cardid != PRODID_OSITECH_SEVEN)) {
733  /* Power up the card and enable interrupts */
734  set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
735  set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
736  }
737  if (((smc->manfid == MANFID_OSITECH) &&
738  (smc->cardid == PRODID_OSITECH_SEVEN)) ||
739  ((smc->manfid == MANFID_PSION) &&
740  (smc->cardid == PRODID_PSION_NET100))) {
741  i = osi_load_firmware(link);
742  if (i) {
743  pr_err("smc91c92_cs: Failed to load firmware\n");
744  return i;
745  }
746  }
747  if (link->open) {
748  smc_reset(dev);
749  netif_device_attach(dev);
750  }
751 
752  return 0;
753 }
754 
755 
756 /*======================================================================
757 
758  This verifies that the chip is some SMC91cXX variant, and returns
759  the revision code if successful. Otherwise, it returns -ENODEV.
760 
761 ======================================================================*/
762 
763 static int check_sig(struct pcmcia_device *link)
764 {
765  struct net_device *dev = link->priv;
766  unsigned int ioaddr = dev->base_addr;
767  int width;
768  u_short s;
769 
770  SMC_SELECT_BANK(1);
771  if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
772  /* Try powering up the chip */
773  outw(0, ioaddr + CONTROL);
774  mdelay(55);
775  }
776 
777  /* Try setting bus width */
778  width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
779  s = inb(ioaddr + CONFIG);
780  if (width)
781  s |= CFG_16BIT;
782  else
783  s &= ~CFG_16BIT;
784  outb(s, ioaddr + CONFIG);
785 
786  /* Check Base Address Register to make sure bus width is OK */
787  s = inw(ioaddr + BASE_ADDR);
788  if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
789  ((s >> 8) != (s & 0xff))) {
790  SMC_SELECT_BANK(3);
791  s = inw(ioaddr + REVISION);
792  return s & 0xff;
793  }
794 
795  if (width) {
796  pr_info("using 8-bit IO window\n");
797 
798  smc91c92_suspend(link);
799  pcmcia_fixup_iowidth(link);
800  smc91c92_resume(link);
801  return check_sig(link);
802  }
803  return -ENODEV;
804 }
805 
806 static int smc91c92_config(struct pcmcia_device *link)
807 {
808  struct net_device *dev = link->priv;
809  struct smc_private *smc = netdev_priv(dev);
810  char *name;
811  int i, rev, j = 0;
812  unsigned int ioaddr;
813  u_long mir;
814 
815  dev_dbg(&link->dev, "smc91c92_config\n");
816 
817  smc->manfid = link->manf_id;
818  smc->cardid = link->card_id;
819 
820  if ((smc->manfid == MANFID_OSITECH) &&
821  (smc->cardid != PRODID_OSITECH_SEVEN)) {
822  i = osi_config(link);
823  } else if ((smc->manfid == MANFID_MOTOROLA) ||
824  ((smc->manfid == MANFID_MEGAHERTZ) &&
825  ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
826  (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
827  i = mhz_mfc_config(link);
828  } else {
829  i = smc_config(link);
830  }
831  if (i)
832  goto config_failed;
833 
834  i = pcmcia_request_irq(link, smc_interrupt);
835  if (i)
836  goto config_failed;
837  i = pcmcia_enable_device(link);
838  if (i)
839  goto config_failed;
840 
841  if (smc->manfid == MANFID_MOTOROLA)
842  mot_config(link);
843 
844  dev->irq = link->irq;
845 
846  if ((if_port >= 0) && (if_port <= 2))
847  dev->if_port = if_port;
848  else
849  dev_notice(&link->dev, "invalid if_port requested\n");
850 
851  switch (smc->manfid) {
852  case MANFID_OSITECH:
853  case MANFID_PSION:
854  i = osi_setup(link, smc->manfid, smc->cardid); break;
855  case MANFID_SMC:
856  case MANFID_NEW_MEDIA:
857  i = smc_setup(link); break;
858  case 0x128: /* For broken Megahertz cards */
859  case MANFID_MEGAHERTZ:
860  i = mhz_setup(link); break;
861  case MANFID_MOTOROLA:
862  default: /* get the hw address from EEPROM */
863  i = mot_setup(link); break;
864  }
865 
866  if (i != 0) {
867  dev_notice(&link->dev, "Unable to find hardware address.\n");
868  goto config_failed;
869  }
870 
871  smc->duplex = 0;
872  smc->rx_ovrn = 0;
873 
874  rev = check_sig(link);
875  name = "???";
876  if (rev > 0)
877  switch (rev >> 4) {
878  case 3: name = "92"; break;
879  case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
880  case 5: name = "95"; break;
881  case 7: name = "100"; break;
882  case 8: name = "100-FD"; break;
883  case 9: name = "110"; break;
884  }
885 
886  ioaddr = dev->base_addr;
887  if (rev > 0) {
888  u_long mcr;
889  SMC_SELECT_BANK(0);
890  mir = inw(ioaddr + MEMINFO) & 0xff;
891  if (mir == 0xff) mir++;
892  /* Get scale factor for memory size */
893  mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
894  mir *= 128 * (1<<((mcr >> 9) & 7));
895  SMC_SELECT_BANK(1);
896  smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
897  smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
898  if (smc->manfid == MANFID_OSITECH)
899  smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
900  if ((rev >> 4) >= 7)
901  smc->cfg |= CFG_MII_SELECT;
902  } else
903  mir = 0;
904 
905  if (smc->cfg & CFG_MII_SELECT) {
906  SMC_SELECT_BANK(3);
907 
908  for (i = 0; i < 32; i++) {
909  j = mdio_read(dev, i, 1);
910  if ((j != 0) && (j != 0xffff)) break;
911  }
912  smc->mii_if.phy_id = (i < 32) ? i : -1;
913 
914  SMC_SELECT_BANK(0);
915  }
916 
917  SET_NETDEV_DEV(dev, &link->dev);
918 
919  if (register_netdev(dev) != 0) {
920  dev_err(&link->dev, "register_netdev() failed\n");
921  goto config_undo;
922  }
923 
924  netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n",
925  name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr);
926 
927  if (rev > 0) {
928  if (mir & 0x3ff)
929  netdev_info(dev, " %lu byte", mir);
930  else
931  netdev_info(dev, " %lu kb", mir>>10);
932  pr_cont(" buffer, %s xcvr\n",
933  (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]);
934  }
935 
936  if (smc->cfg & CFG_MII_SELECT) {
937  if (smc->mii_if.phy_id != -1) {
938  netdev_dbg(dev, " MII transceiver at index %d, status %x\n",
939  smc->mii_if.phy_id, j);
940  } else {
941  netdev_notice(dev, " No MII transceivers found!\n");
942  }
943  }
944  return 0;
945 
946 config_undo:
947  unregister_netdev(dev);
948 config_failed:
949  smc91c92_release(link);
950  free_netdev(dev);
951  return -ENODEV;
952 } /* smc91c92_config */
953 
954 static void smc91c92_release(struct pcmcia_device *link)
955 {
956  dev_dbg(&link->dev, "smc91c92_release\n");
957  if (link->resource[2]->end) {
958  struct net_device *dev = link->priv;
959  struct smc_private *smc = netdev_priv(dev);
960  iounmap(smc->base);
961  }
962  pcmcia_disable_device(link);
963 }
964 
965 /*======================================================================
966 
967  MII interface support for SMC91cXX based cards
968 ======================================================================*/
969 
970 #define MDIO_SHIFT_CLK 0x04
971 #define MDIO_DATA_OUT 0x01
972 #define MDIO_DIR_WRITE 0x08
973 #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
974 #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
975 #define MDIO_DATA_READ 0x02
976 
977 static void mdio_sync(unsigned int addr)
978 {
979  int bits;
980  for (bits = 0; bits < 32; bits++) {
981  outb(MDIO_DATA_WRITE1, addr);
983  }
984 }
985 
986 static int mdio_read(struct net_device *dev, int phy_id, int loc)
987 {
988  unsigned int addr = dev->base_addr + MGMT;
989  u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
990  int i, retval = 0;
991 
992  mdio_sync(addr);
993  for (i = 13; i >= 0; i--) {
994  int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
995  outb(dat, addr);
996  outb(dat | MDIO_SHIFT_CLK, addr);
997  }
998  for (i = 19; i > 0; i--) {
999  outb(0, addr);
1000  retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1001  outb(MDIO_SHIFT_CLK, addr);
1002  }
1003  return (retval>>1) & 0xffff;
1004 }
1005 
1006 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1007 {
1008  unsigned int addr = dev->base_addr + MGMT;
1009  u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1010  int i;
1011 
1012  mdio_sync(addr);
1013  for (i = 31; i >= 0; i--) {
1014  int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1015  outb(dat, addr);
1016  outb(dat | MDIO_SHIFT_CLK, addr);
1017  }
1018  for (i = 1; i >= 0; i--) {
1019  outb(0, addr);
1020  outb(MDIO_SHIFT_CLK, addr);
1021  }
1022 }
1023 
1024 /*======================================================================
1025 
1026  The driver core code, most of which should be common with a
1027  non-PCMCIA implementation.
1028 
1029 ======================================================================*/
1030 
1031 #ifdef PCMCIA_DEBUG
1032 static void smc_dump(struct net_device *dev)
1033 {
1034  unsigned int ioaddr = dev->base_addr;
1035  u_short i, w, save;
1036  save = inw(ioaddr + BANK_SELECT);
1037  for (w = 0; w < 4; w++) {
1038  SMC_SELECT_BANK(w);
1039  netdev_printk(KERN_DEBUG, dev, "bank %d: ", w);
1040  for (i = 0; i < 14; i += 2)
1041  pr_cont(" %04x", inw(ioaddr + i));
1042  pr_cont("\n");
1043  }
1044  outw(save, ioaddr + BANK_SELECT);
1045 }
1046 #endif
1047 
1048 static int smc_open(struct net_device *dev)
1049 {
1050  struct smc_private *smc = netdev_priv(dev);
1051  struct pcmcia_device *link = smc->p_dev;
1052 
1053  dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1054  dev->name, dev, inw(dev->base_addr + BANK_SELECT));
1055 #ifdef PCMCIA_DEBUG
1056  smc_dump(dev);
1057 #endif
1058 
1059  /* Check that the PCMCIA card is still here. */
1060  if (!pcmcia_dev_present(link))
1061  return -ENODEV;
1062  /* Physical device present signature. */
1063  if (check_sig(link) < 0) {
1064  netdev_info(dev, "Yikes! Bad chip signature!\n");
1065  return -ENODEV;
1066  }
1067  link->open++;
1068 
1069  netif_start_queue(dev);
1070  smc->saved_skb = NULL;
1071  smc->packets_waiting = 0;
1072 
1073  smc_reset(dev);
1074  init_timer(&smc->media);
1075  smc->media.function = media_check;
1076  smc->media.data = (u_long) dev;
1077  smc->media.expires = jiffies + HZ;
1078  add_timer(&smc->media);
1079 
1080  return 0;
1081 } /* smc_open */
1082 
1083 /*====================================================================*/
1084 
1085 static int smc_close(struct net_device *dev)
1086 {
1087  struct smc_private *smc = netdev_priv(dev);
1088  struct pcmcia_device *link = smc->p_dev;
1089  unsigned int ioaddr = dev->base_addr;
1090 
1091  dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1092  dev->name, inw(ioaddr + BANK_SELECT));
1093 
1094  netif_stop_queue(dev);
1095 
1096  /* Shut off all interrupts, and turn off the Tx and Rx sections.
1097  Don't bother to check for chip present. */
1098  SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1099  outw(0, ioaddr + INTERRUPT);
1100  SMC_SELECT_BANK(0);
1101  mask_bits(0xff00, ioaddr + RCR);
1102  mask_bits(0xff00, ioaddr + TCR);
1103 
1104  /* Put the chip into power-down mode. */
1105  SMC_SELECT_BANK(1);
1106  outw(CTL_POWERDOWN, ioaddr + CONTROL );
1107 
1108  link->open--;
1109  del_timer_sync(&smc->media);
1110 
1111  return 0;
1112 } /* smc_close */
1113 
1114 /*======================================================================
1115 
1116  Transfer a packet to the hardware and trigger the packet send.
1117  This may be called at either from either the Tx queue code
1118  or the interrupt handler.
1119 
1120 ======================================================================*/
1121 
1122 static void smc_hardware_send_packet(struct net_device * dev)
1123 {
1124  struct smc_private *smc = netdev_priv(dev);
1125  struct sk_buff *skb = smc->saved_skb;
1126  unsigned int ioaddr = dev->base_addr;
1127  u_char packet_no;
1128 
1129  if (!skb) {
1130  netdev_err(dev, "In XMIT with no packet to send\n");
1131  return;
1132  }
1133 
1134  /* There should be a packet slot waiting. */
1135  packet_no = inw(ioaddr + PNR_ARR) >> 8;
1136  if (packet_no & 0x80) {
1137  /* If not, there is a hardware problem! Likely an ejected card. */
1138  netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n",
1139  packet_no);
1140  dev_kfree_skb_irq(skb);
1141  smc->saved_skb = NULL;
1142  netif_start_queue(dev);
1143  return;
1144  }
1145 
1146  dev->stats.tx_bytes += skb->len;
1147  /* The card should use the just-allocated buffer. */
1148  outw(packet_no, ioaddr + PNR_ARR);
1149  /* point to the beginning of the packet */
1150  outw(PTR_AUTOINC , ioaddr + POINTER);
1151 
1152  /* Send the packet length (+6 for status, length and ctl byte)
1153  and the status word (set to zeros). */
1154  {
1155  u_char *buf = skb->data;
1156  u_int length = skb->len; /* The chip will pad to ethernet min. */
1157 
1158  netdev_dbg(dev, "Trying to xmit packet of length %d\n", length);
1159 
1160  /* send the packet length: +6 for status word, length, and ctl */
1161  outw(0, ioaddr + DATA_1);
1162  outw(length + 6, ioaddr + DATA_1);
1163  outsw(ioaddr + DATA_1, buf, length >> 1);
1164 
1165  /* The odd last byte, if there is one, goes in the control word. */
1166  outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1167  }
1168 
1169  /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1170  outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1171  (inw(ioaddr + INTERRUPT) & 0xff00),
1172  ioaddr + INTERRUPT);
1173 
1174  /* The chip does the rest of the work. */
1175  outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1176 
1177  smc->saved_skb = NULL;
1178  dev_kfree_skb_irq(skb);
1179  dev->trans_start = jiffies;
1180  netif_start_queue(dev);
1181 }
1182 
1183 /*====================================================================*/
1184 
1185 static void smc_tx_timeout(struct net_device *dev)
1186 {
1187  struct smc_private *smc = netdev_priv(dev);
1188  unsigned int ioaddr = dev->base_addr;
1189 
1190  netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n",
1191  inw(ioaddr)&0xff, inw(ioaddr + 2));
1192  dev->stats.tx_errors++;
1193  smc_reset(dev);
1194  dev->trans_start = jiffies; /* prevent tx timeout */
1195  smc->saved_skb = NULL;
1196  netif_wake_queue(dev);
1197 }
1198 
1199 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1200  struct net_device *dev)
1201 {
1202  struct smc_private *smc = netdev_priv(dev);
1203  unsigned int ioaddr = dev->base_addr;
1205  short time_out, ir;
1206  unsigned long flags;
1207 
1208  netif_stop_queue(dev);
1209 
1210  netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n",
1211  skb->len, inw(ioaddr + 2));
1212 
1213  if (smc->saved_skb) {
1214  /* THIS SHOULD NEVER HAPPEN. */
1215  dev->stats.tx_aborted_errors++;
1217  "Internal error -- sent packet while busy\n");
1218  return NETDEV_TX_BUSY;
1219  }
1220  smc->saved_skb = skb;
1221 
1222  num_pages = skb->len >> 8;
1223 
1224  if (num_pages > 7) {
1225  netdev_err(dev, "Far too big packet error: %d pages\n", num_pages);
1226  dev_kfree_skb (skb);
1227  smc->saved_skb = NULL;
1228  dev->stats.tx_dropped++;
1229  return NETDEV_TX_OK; /* Do not re-queue this packet. */
1230  }
1231  /* A packet is now waiting. */
1232  smc->packets_waiting++;
1233 
1234  spin_lock_irqsave(&smc->lock, flags);
1235  SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1236 
1237  /* need MC_RESET to keep the memory consistent. errata? */
1238  if (smc->rx_ovrn) {
1239  outw(MC_RESET, ioaddr + MMU_CMD);
1240  smc->rx_ovrn = 0;
1241  }
1242 
1243  /* Allocate the memory; send the packet now if we win. */
1244  outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1245  for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1246  ir = inw(ioaddr+INTERRUPT);
1247  if (ir & IM_ALLOC_INT) {
1248  /* Acknowledge the interrupt, send the packet. */
1249  outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1250  smc_hardware_send_packet(dev); /* Send the packet now.. */
1251  spin_unlock_irqrestore(&smc->lock, flags);
1252  return NETDEV_TX_OK;
1253  }
1254  }
1255 
1256  /* Otherwise defer until the Tx-space-allocated interrupt. */
1257  pr_debug("%s: memory allocation deferred.\n", dev->name);
1258  outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
1259  spin_unlock_irqrestore(&smc->lock, flags);
1260 
1261  return NETDEV_TX_OK;
1262 }
1263 
1264 /*======================================================================
1265 
1266  Handle a Tx anomalous event. Entered while in Window 2.
1267 
1268 ======================================================================*/
1269 
1270 static void smc_tx_err(struct net_device * dev)
1271 {
1272  struct smc_private *smc = netdev_priv(dev);
1273  unsigned int ioaddr = dev->base_addr;
1274  int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1275  int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1276  int tx_status;
1277 
1278  /* select this as the packet to read from */
1279  outw(packet_no, ioaddr + PNR_ARR);
1280 
1281  /* read the first word from this packet */
1282  outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1283 
1284  tx_status = inw(ioaddr + DATA_1);
1285 
1286  dev->stats.tx_errors++;
1287  if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1288  if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1289  if (tx_status & TS_16COL) {
1290  dev->stats.tx_aborted_errors++;
1291  smc->tx_err++;
1292  }
1293 
1294  if (tx_status & TS_SUCCESS) {
1295  netdev_notice(dev, "Successful packet caused error interrupt?\n");
1296  }
1297  /* re-enable transmit */
1298  SMC_SELECT_BANK(0);
1299  outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1300  SMC_SELECT_BANK(2);
1301 
1302  outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1303 
1304  /* one less packet waiting for me */
1305  smc->packets_waiting--;
1306 
1307  outw(saved_packet, ioaddr + PNR_ARR);
1308 }
1309 
1310 /*====================================================================*/
1311 
1312 static void smc_eph_irq(struct net_device *dev)
1313 {
1314  struct smc_private *smc = netdev_priv(dev);
1315  unsigned int ioaddr = dev->base_addr;
1316  u_short card_stats, ephs;
1317 
1318  SMC_SELECT_BANK(0);
1319  ephs = inw(ioaddr + EPH);
1320  pr_debug("%s: Ethernet protocol handler interrupt, status"
1321  " %4.4x.\n", dev->name, ephs);
1322  /* Could be a counter roll-over warning: update stats. */
1323  card_stats = inw(ioaddr + COUNTER);
1324  /* single collisions */
1325  dev->stats.collisions += card_stats & 0xF;
1326  card_stats >>= 4;
1327  /* multiple collisions */
1328  dev->stats.collisions += card_stats & 0xF;
1329 #if 0 /* These are for when linux supports these statistics */
1330  card_stats >>= 4; /* deferred */
1331  card_stats >>= 4; /* excess deferred */
1332 #endif
1333  /* If we had a transmit error we must re-enable the transmitter. */
1334  outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1335 
1336  /* Clear a link error interrupt. */
1337  SMC_SELECT_BANK(1);
1338  outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1340  ioaddr + CONTROL);
1341  SMC_SELECT_BANK(2);
1342 }
1343 
1344 /*====================================================================*/
1345 
1346 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1347 {
1348  struct net_device *dev = dev_id;
1349  struct smc_private *smc = netdev_priv(dev);
1350  unsigned int ioaddr;
1351  u_short saved_bank, saved_pointer, mask, status;
1352  unsigned int handled = 1;
1353  char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1354 
1355  if (!netif_device_present(dev))
1356  return IRQ_NONE;
1357 
1358  ioaddr = dev->base_addr;
1359 
1360  pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1361  irq, ioaddr);
1362 
1363  spin_lock(&smc->lock);
1364  smc->watchdog = 0;
1365  saved_bank = inw(ioaddr + BANK_SELECT);
1366  if ((saved_bank & 0xff00) != 0x3300) {
1367  /* The device does not exist -- the card could be off-line, or
1368  maybe it has been ejected. */
1369  pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1370  "/ejected device.\n", dev->name, irq);
1371  handled = 0;
1372  goto irq_done;
1373  }
1374 
1375  SMC_SELECT_BANK(2);
1376  saved_pointer = inw(ioaddr + POINTER);
1377  mask = inw(ioaddr + INTERRUPT) >> 8;
1378  /* clear all interrupts */
1379  outw(0, ioaddr + INTERRUPT);
1380 
1381  do { /* read the status flag, and mask it */
1382  status = inw(ioaddr + INTERRUPT) & 0xff;
1383  pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1384  status, mask);
1385  if ((status & mask) == 0) {
1386  if (bogus_cnt == INTR_WORK)
1387  handled = 0;
1388  break;
1389  }
1390  if (status & IM_RCV_INT) {
1391  /* Got a packet(s). */
1392  smc_rx(dev);
1393  }
1394  if (status & IM_TX_INT) {
1395  smc_tx_err(dev);
1396  outw(IM_TX_INT, ioaddr + INTERRUPT);
1397  }
1398  status &= mask;
1399  if (status & IM_TX_EMPTY_INT) {
1400  outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1401  mask &= ~IM_TX_EMPTY_INT;
1402  dev->stats.tx_packets += smc->packets_waiting;
1403  smc->packets_waiting = 0;
1404  }
1405  if (status & IM_ALLOC_INT) {
1406  /* Clear this interrupt so it doesn't happen again */
1407  mask &= ~IM_ALLOC_INT;
1408 
1409  smc_hardware_send_packet(dev);
1410 
1411  /* enable xmit interrupts based on this */
1412  mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1413 
1414  /* and let the card send more packets to me */
1415  netif_wake_queue(dev);
1416  }
1417  if (status & IM_RX_OVRN_INT) {
1418  dev->stats.rx_errors++;
1419  dev->stats.rx_fifo_errors++;
1420  if (smc->duplex)
1421  smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1422  outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1423  }
1424  if (status & IM_EPH_INT)
1425  smc_eph_irq(dev);
1426  } while (--bogus_cnt);
1427 
1428  pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1429  " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1430 
1431  /* restore state register */
1432  outw((mask<<8), ioaddr + INTERRUPT);
1433  outw(saved_pointer, ioaddr + POINTER);
1434  SMC_SELECT_BANK(saved_bank);
1435 
1436  pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1437 
1438 irq_done:
1439 
1440  if ((smc->manfid == MANFID_OSITECH) &&
1441  (smc->cardid != PRODID_OSITECH_SEVEN)) {
1442  /* Retrigger interrupt if needed */
1443  mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1444  set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1445  }
1446  if (smc->manfid == MANFID_MOTOROLA) {
1447  u_char cor;
1448  cor = readb(smc->base + MOT_UART + CISREG_COR);
1449  writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1450  writeb(cor, smc->base + MOT_UART + CISREG_COR);
1451  cor = readb(smc->base + MOT_LAN + CISREG_COR);
1452  writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1453  writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1454  }
1455 
1456  if ((smc->base != NULL) && /* Megahertz MFC's */
1457  (smc->manfid == MANFID_MEGAHERTZ) &&
1458  (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1459 
1460  u_char tmp;
1461  tmp = readb(smc->base+MEGAHERTZ_ISR);
1462  tmp = readb(smc->base+MEGAHERTZ_ISR);
1463 
1464  /* Retrigger interrupt if needed */
1465  writeb(tmp, smc->base + MEGAHERTZ_ISR);
1466  writeb(tmp, smc->base + MEGAHERTZ_ISR);
1467  }
1468 
1469  spin_unlock(&smc->lock);
1470  return IRQ_RETVAL(handled);
1471 }
1472 
1473 /*====================================================================*/
1474 
1475 static void smc_rx(struct net_device *dev)
1476 {
1477  unsigned int ioaddr = dev->base_addr;
1478  int rx_status;
1479  int packet_length; /* Caution: not frame length, rather words
1480  to transfer from the chip. */
1481 
1482  /* Assertion: we are in Window 2. */
1483 
1484  if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1485  netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n");
1486  return;
1487  }
1488 
1489  /* Reset the read pointer, and read the status and packet length. */
1490  outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1491  rx_status = inw(ioaddr + DATA_1);
1492  packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1493 
1494  pr_debug("%s: Receive status %4.4x length %d.\n",
1495  dev->name, rx_status, packet_length);
1496 
1497  if (!(rx_status & RS_ERRORS)) {
1498  /* do stuff to make a new packet */
1499  struct sk_buff *skb;
1500 
1501  /* Note: packet_length adds 5 or 6 extra bytes here! */
1502  skb = netdev_alloc_skb(dev, packet_length+2);
1503 
1504  if (skb == NULL) {
1505  pr_debug("%s: Low memory, packet dropped.\n", dev->name);
1506  dev->stats.rx_dropped++;
1507  outw(MC_RELEASE, ioaddr + MMU_CMD);
1508  return;
1509  }
1510 
1511  packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1512  skb_reserve(skb, 2);
1513  insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1514  (packet_length+1)>>1);
1515  skb->protocol = eth_type_trans(skb, dev);
1516 
1517  netif_rx(skb);
1518  dev->last_rx = jiffies;
1519  dev->stats.rx_packets++;
1520  dev->stats.rx_bytes += packet_length;
1521  if (rx_status & RS_MULTICAST)
1522  dev->stats.multicast++;
1523  } else {
1524  /* error ... */
1525  dev->stats.rx_errors++;
1526 
1527  if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1528  if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
1529  dev->stats.rx_length_errors++;
1530  if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1531  }
1532  /* Let the MMU free the memory of this packet. */
1533  outw(MC_RELEASE, ioaddr + MMU_CMD);
1534 }
1535 
1536 /*======================================================================
1537 
1538  Set the receive mode.
1539 
1540  This routine is used by both the protocol level to notify us of
1541  promiscuous/multicast mode changes, and by the open/reset code to
1542  initialize the Rx registers. We always set the multicast list and
1543  leave the receiver running.
1544 
1545 ======================================================================*/
1546 
1547 static void set_rx_mode(struct net_device *dev)
1548 {
1549  unsigned int ioaddr = dev->base_addr;
1550  struct smc_private *smc = netdev_priv(dev);
1551  unsigned char multicast_table[8];
1552  unsigned long flags;
1553  u_short rx_cfg_setting;
1554  int i;
1555 
1556  memset(multicast_table, 0, sizeof(multicast_table));
1557 
1558  if (dev->flags & IFF_PROMISC) {
1559  rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1560  } else if (dev->flags & IFF_ALLMULTI)
1561  rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1562  else {
1563  if (!netdev_mc_empty(dev)) {
1564  struct netdev_hw_addr *ha;
1565 
1566  netdev_for_each_mc_addr(ha, dev) {
1567  u_int position = ether_crc(6, ha->addr);
1568  multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1569  }
1570  }
1571  rx_cfg_setting = RxStripCRC | RxEnable;
1572  }
1573 
1574  /* Load MC table and Rx setting into the chip without interrupts. */
1575  spin_lock_irqsave(&smc->lock, flags);
1576  SMC_SELECT_BANK(3);
1577  for (i = 0; i < 8; i++)
1578  outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1579  SMC_SELECT_BANK(0);
1580  outw(rx_cfg_setting, ioaddr + RCR);
1581  SMC_SELECT_BANK(2);
1582  spin_unlock_irqrestore(&smc->lock, flags);
1583 }
1584 
1585 /*======================================================================
1586 
1587  Senses when a card's config changes. Here, it's coax or TP.
1588 
1589 ======================================================================*/
1590 
1591 static int s9k_config(struct net_device *dev, struct ifmap *map)
1592 {
1593  struct smc_private *smc = netdev_priv(dev);
1594  if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1595  if (smc->cfg & CFG_MII_SELECT)
1596  return -EOPNOTSUPP;
1597  else if (map->port > 2)
1598  return -EINVAL;
1599  dev->if_port = map->port;
1600  netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]);
1601  smc_reset(dev);
1602  }
1603  return 0;
1604 }
1605 
1606 /*======================================================================
1607 
1608  Reset the chip, reloading every register that might be corrupted.
1609 
1610 ======================================================================*/
1611 
1612 /*
1613  Set transceiver type, perhaps to something other than what the user
1614  specified in dev->if_port.
1615 */
1616 static void smc_set_xcvr(struct net_device *dev, int if_port)
1617 {
1618  struct smc_private *smc = netdev_priv(dev);
1619  unsigned int ioaddr = dev->base_addr;
1620  u_short saved_bank;
1621 
1622  saved_bank = inw(ioaddr + BANK_SELECT);
1623  SMC_SELECT_BANK(1);
1624  if (if_port == 2) {
1625  outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1626  if ((smc->manfid == MANFID_OSITECH) &&
1627  (smc->cardid != PRODID_OSITECH_SEVEN))
1628  set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1629  smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1630  } else {
1631  outw(smc->cfg, ioaddr + CONFIG);
1632  if ((smc->manfid == MANFID_OSITECH) &&
1633  (smc->cardid != PRODID_OSITECH_SEVEN))
1634  mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1635  smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1636  }
1637  SMC_SELECT_BANK(saved_bank);
1638 }
1639 
1640 static void smc_reset(struct net_device *dev)
1641 {
1642  unsigned int ioaddr = dev->base_addr;
1643  struct smc_private *smc = netdev_priv(dev);
1644  int i;
1645 
1646  pr_debug("%s: smc91c92 reset called.\n", dev->name);
1647 
1648  /* The first interaction must be a write to bring the chip out
1649  of sleep mode. */
1650  SMC_SELECT_BANK(0);
1651  /* Reset the chip. */
1652  outw(RCR_SOFTRESET, ioaddr + RCR);
1653  udelay(10);
1654 
1655  /* Clear the transmit and receive configuration registers. */
1656  outw(RCR_CLEAR, ioaddr + RCR);
1657  outw(TCR_CLEAR, ioaddr + TCR);
1658 
1659  /* Set the Window 1 control, configuration and station addr registers.
1660  No point in writing the I/O base register ;-> */
1661  SMC_SELECT_BANK(1);
1662  /* Automatically release successfully transmitted packets,
1663  Accept link errors, counter and Tx error interrupts. */
1665  ioaddr + CONTROL);
1666  smc_set_xcvr(dev, dev->if_port);
1667  if ((smc->manfid == MANFID_OSITECH) &&
1668  (smc->cardid != PRODID_OSITECH_SEVEN))
1669  outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1670  (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1671  ioaddr - 0x10 + OSITECH_AUI_PWR);
1672 
1673  /* Fill in the physical address. The databook is wrong about the order! */
1674  for (i = 0; i < 6; i += 2)
1675  outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1676  ioaddr + ADDR0 + i);
1677 
1678  /* Reset the MMU */
1679  SMC_SELECT_BANK(2);
1680  outw(MC_RESET, ioaddr + MMU_CMD);
1681  outw(0, ioaddr + INTERRUPT);
1682 
1683  /* Re-enable the chip. */
1684  SMC_SELECT_BANK(0);
1685  outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1686  TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1687  set_rx_mode(dev);
1688 
1689  if (smc->cfg & CFG_MII_SELECT) {
1690  SMC_SELECT_BANK(3);
1691 
1692  /* Reset MII */
1693  mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1694 
1695  /* Advertise 100F, 100H, 10F, 10H */
1696  mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1697 
1698  /* Restart MII autonegotiation */
1699  mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1700  mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1701  }
1702 
1703  /* Enable interrupts. */
1704  SMC_SELECT_BANK(2);
1705  outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1706  ioaddr + INTERRUPT);
1707 }
1708 
1709 /*======================================================================
1710 
1711  Media selection timer routine
1712 
1713 ======================================================================*/
1714 
1715 static void media_check(u_long arg)
1716 {
1717  struct net_device *dev = (struct net_device *) arg;
1718  struct smc_private *smc = netdev_priv(dev);
1719  unsigned int ioaddr = dev->base_addr;
1720  u_short i, media, saved_bank;
1721  u_short link;
1722  unsigned long flags;
1723 
1724  spin_lock_irqsave(&smc->lock, flags);
1725 
1726  saved_bank = inw(ioaddr + BANK_SELECT);
1727 
1728  if (!netif_device_present(dev))
1729  goto reschedule;
1730 
1731  SMC_SELECT_BANK(2);
1732 
1733  /* need MC_RESET to keep the memory consistent. errata? */
1734  if (smc->rx_ovrn) {
1735  outw(MC_RESET, ioaddr + MMU_CMD);
1736  smc->rx_ovrn = 0;
1737  }
1738  i = inw(ioaddr + INTERRUPT);
1739  SMC_SELECT_BANK(0);
1740  media = inw(ioaddr + EPH) & EPH_LINK_OK;
1741  SMC_SELECT_BANK(1);
1742  media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1743 
1744  SMC_SELECT_BANK(saved_bank);
1745  spin_unlock_irqrestore(&smc->lock, flags);
1746 
1747  /* Check for pending interrupt with watchdog flag set: with
1748  this, we can limp along even if the interrupt is blocked */
1749  if (smc->watchdog++ && ((i>>8) & i)) {
1750  if (!smc->fast_poll)
1751  netdev_info(dev, "interrupt(s) dropped!\n");
1752  local_irq_save(flags);
1753  smc_interrupt(dev->irq, dev);
1754  local_irq_restore(flags);
1755  smc->fast_poll = HZ;
1756  }
1757  if (smc->fast_poll) {
1758  smc->fast_poll--;
1759  smc->media.expires = jiffies + HZ/100;
1760  add_timer(&smc->media);
1761  return;
1762  }
1763 
1764  spin_lock_irqsave(&smc->lock, flags);
1765 
1766  saved_bank = inw(ioaddr + BANK_SELECT);
1767 
1768  if (smc->cfg & CFG_MII_SELECT) {
1769  if (smc->mii_if.phy_id < 0)
1770  goto reschedule;
1771 
1772  SMC_SELECT_BANK(3);
1773  link = mdio_read(dev, smc->mii_if.phy_id, 1);
1774  if (!link || (link == 0xffff)) {
1775  netdev_info(dev, "MII is missing!\n");
1776  smc->mii_if.phy_id = -1;
1777  goto reschedule;
1778  }
1779 
1780  link &= 0x0004;
1781  if (link != smc->link_status) {
1782  u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1783  netdev_info(dev, "%s link beat\n", link ? "found" : "lost");
1784  smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1785  ? TCR_FDUPLX : 0);
1786  if (link) {
1787  netdev_info(dev, "autonegotiation complete: "
1788  "%dbaseT-%cD selected\n",
1789  (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H');
1790  }
1791  SMC_SELECT_BANK(0);
1792  outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1793  smc->link_status = link;
1794  }
1795  goto reschedule;
1796  }
1797 
1798  /* Ignore collisions unless we've had no rx's recently */
1799  if (time_after(jiffies, dev->last_rx + HZ)) {
1800  if (smc->tx_err || (smc->media_status & EPH_16COL))
1801  media |= EPH_16COL;
1802  }
1803  smc->tx_err = 0;
1804 
1805  if (media != smc->media_status) {
1806  if ((media & smc->media_status & 1) &&
1807  ((smc->media_status ^ media) & EPH_LINK_OK))
1808  netdev_info(dev, "%s link beat\n",
1809  smc->media_status & EPH_LINK_OK ? "lost" : "found");
1810  else if ((media & smc->media_status & 2) &&
1811  ((smc->media_status ^ media) & EPH_16COL))
1812  netdev_info(dev, "coax cable %s\n",
1813  media & EPH_16COL ? "problem" : "ok");
1814  if (dev->if_port == 0) {
1815  if (media & 1) {
1816  if (media & EPH_LINK_OK)
1817  netdev_info(dev, "flipped to 10baseT\n");
1818  else
1819  smc_set_xcvr(dev, 2);
1820  } else {
1821  if (media & EPH_16COL)
1822  smc_set_xcvr(dev, 1);
1823  else
1824  netdev_info(dev, "flipped to 10base2\n");
1825  }
1826  }
1827  smc->media_status = media;
1828  }
1829 
1830 reschedule:
1831  smc->media.expires = jiffies + HZ;
1832  add_timer(&smc->media);
1833  SMC_SELECT_BANK(saved_bank);
1834  spin_unlock_irqrestore(&smc->lock, flags);
1835 }
1836 
1837 static int smc_link_ok(struct net_device *dev)
1838 {
1839  unsigned int ioaddr = dev->base_addr;
1840  struct smc_private *smc = netdev_priv(dev);
1841 
1842  if (smc->cfg & CFG_MII_SELECT) {
1843  return mii_link_ok(&smc->mii_if);
1844  } else {
1845  SMC_SELECT_BANK(0);
1846  return inw(ioaddr + EPH) & EPH_LINK_OK;
1847  }
1848 }
1849 
1850 static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1851 {
1852  u16 tmp;
1853  unsigned int ioaddr = dev->base_addr;
1854 
1855  ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1857 
1858  SMC_SELECT_BANK(1);
1859  tmp = inw(ioaddr + CONFIG);
1860  ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1861  ecmd->transceiver = XCVR_INTERNAL;
1862  ethtool_cmd_speed_set(ecmd, SPEED_10);
1863  ecmd->phy_address = ioaddr + MGMT;
1864 
1865  SMC_SELECT_BANK(0);
1866  tmp = inw(ioaddr + TCR);
1867  ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1868 
1869  return 0;
1870 }
1871 
1872 static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1873 {
1874  u16 tmp;
1875  unsigned int ioaddr = dev->base_addr;
1876 
1877  if (ethtool_cmd_speed(ecmd) != SPEED_10)
1878  return -EINVAL;
1879  if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1880  return -EINVAL;
1881  if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1882  return -EINVAL;
1883  if (ecmd->transceiver != XCVR_INTERNAL)
1884  return -EINVAL;
1885 
1886  if (ecmd->port == PORT_AUI)
1887  smc_set_xcvr(dev, 1);
1888  else
1889  smc_set_xcvr(dev, 0);
1890 
1891  SMC_SELECT_BANK(0);
1892  tmp = inw(ioaddr + TCR);
1893  if (ecmd->duplex == DUPLEX_FULL)
1894  tmp |= TCR_FDUPLX;
1895  else
1896  tmp &= ~TCR_FDUPLX;
1897  outw(tmp, ioaddr + TCR);
1898 
1899  return 0;
1900 }
1901 
1902 static int check_if_running(struct net_device *dev)
1903 {
1904  if (!netif_running(dev))
1905  return -EINVAL;
1906  return 0;
1907 }
1908 
1909 static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1910 {
1911  strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1912  strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1913 }
1914 
1915 static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1916 {
1917  struct smc_private *smc = netdev_priv(dev);
1918  unsigned int ioaddr = dev->base_addr;
1919  u16 saved_bank = inw(ioaddr + BANK_SELECT);
1920  int ret;
1921  unsigned long flags;
1922 
1923  spin_lock_irqsave(&smc->lock, flags);
1924  SMC_SELECT_BANK(3);
1925  if (smc->cfg & CFG_MII_SELECT)
1926  ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1927  else
1928  ret = smc_netdev_get_ecmd(dev, ecmd);
1929  SMC_SELECT_BANK(saved_bank);
1930  spin_unlock_irqrestore(&smc->lock, flags);
1931  return ret;
1932 }
1933 
1934 static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1935 {
1936  struct smc_private *smc = netdev_priv(dev);
1937  unsigned int ioaddr = dev->base_addr;
1938  u16 saved_bank = inw(ioaddr + BANK_SELECT);
1939  int ret;
1940  unsigned long flags;
1941 
1942  spin_lock_irqsave(&smc->lock, flags);
1943  SMC_SELECT_BANK(3);
1944  if (smc->cfg & CFG_MII_SELECT)
1945  ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1946  else
1947  ret = smc_netdev_set_ecmd(dev, ecmd);
1948  SMC_SELECT_BANK(saved_bank);
1949  spin_unlock_irqrestore(&smc->lock, flags);
1950  return ret;
1951 }
1952 
1953 static u32 smc_get_link(struct net_device *dev)
1954 {
1955  struct smc_private *smc = netdev_priv(dev);
1956  unsigned int ioaddr = dev->base_addr;
1957  u16 saved_bank = inw(ioaddr + BANK_SELECT);
1958  u32 ret;
1959  unsigned long flags;
1960 
1961  spin_lock_irqsave(&smc->lock, flags);
1962  SMC_SELECT_BANK(3);
1963  ret = smc_link_ok(dev);
1964  SMC_SELECT_BANK(saved_bank);
1965  spin_unlock_irqrestore(&smc->lock, flags);
1966  return ret;
1967 }
1968 
1969 static int smc_nway_reset(struct net_device *dev)
1970 {
1971  struct smc_private *smc = netdev_priv(dev);
1972  if (smc->cfg & CFG_MII_SELECT) {
1973  unsigned int ioaddr = dev->base_addr;
1974  u16 saved_bank = inw(ioaddr + BANK_SELECT);
1975  int res;
1976 
1977  SMC_SELECT_BANK(3);
1978  res = mii_nway_restart(&smc->mii_if);
1979  SMC_SELECT_BANK(saved_bank);
1980 
1981  return res;
1982  } else
1983  return -EOPNOTSUPP;
1984 }
1985 
1986 static const struct ethtool_ops ethtool_ops = {
1987  .begin = check_if_running,
1988  .get_drvinfo = smc_get_drvinfo,
1989  .get_settings = smc_get_settings,
1990  .set_settings = smc_set_settings,
1991  .get_link = smc_get_link,
1992  .nway_reset = smc_nway_reset,
1993 };
1994 
1995 static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1996 {
1997  struct smc_private *smc = netdev_priv(dev);
1998  struct mii_ioctl_data *mii = if_mii(rq);
1999  int rc = 0;
2000  u16 saved_bank;
2001  unsigned int ioaddr = dev->base_addr;
2002  unsigned long flags;
2003 
2004  if (!netif_running(dev))
2005  return -EINVAL;
2006 
2007  spin_lock_irqsave(&smc->lock, flags);
2008  saved_bank = inw(ioaddr + BANK_SELECT);
2009  SMC_SELECT_BANK(3);
2010  rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2011  SMC_SELECT_BANK(saved_bank);
2012  spin_unlock_irqrestore(&smc->lock, flags);
2013  return rc;
2014 }
2015 
2016 static const struct pcmcia_device_id smc91c92_ids[] = {
2017  PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2018  PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2019  PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2020  PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2021  PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2022  PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2023  PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2024  PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
2025  PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2026  PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
2027  PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2028  PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2029  PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2030  PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2031  PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2032  PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2033  PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2034  PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2035  PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
2036  PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2037  PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
2038  PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2039  PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2040  PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2041  /* These conflict with other cards! */
2042  /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2043  /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2044  PCMCIA_DEVICE_NULL,
2045 };
2046 MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2047 
2048 static struct pcmcia_driver smc91c92_cs_driver = {
2049  .owner = THIS_MODULE,
2050  .name = "smc91c92_cs",
2051  .probe = smc91c92_probe,
2052  .remove = smc91c92_detach,
2053  .id_table = smc91c92_ids,
2054  .suspend = smc91c92_suspend,
2055  .resume = smc91c92_resume,
2056 };
2057 
2058 static int __init init_smc91c92_cs(void)
2059 {
2060  return pcmcia_register_driver(&smc91c92_cs_driver);
2061 }
2062 
2063 static void __exit exit_smc91c92_cs(void)
2064 {
2065  pcmcia_unregister_driver(&smc91c92_cs_driver);
2066 }
2067 
2068 module_init(init_smc91c92_cs);
2069 module_exit(exit_smc91c92_cs);