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Data Structures | Macros | Enumerations
t4.h File Reference
#include "t4_hw.h"
#include "t4_regs.h"
#include "t4_msg.h"
#include "t4fw_ri_api.h"

Go to the source code of this file.

Data Structures

struct  t4_status_page
 
union  t4_wr
 
union  t4_recv_wr
 
struct  t4_cqe
 
struct  t4_swsqe
 
struct  t4_sq
 
struct  t4_swrqe
 
struct  t4_rq
 
struct  t4_wq
 
struct  t4_cq
 

Macros

#define T4_MAX_NUM_QP   (1<<16)
 
#define T4_MAX_NUM_CQ   (1<<15)
 
#define T4_MAX_NUM_PD   (1<<15)
 
#define T4_EQ_STATUS_ENTRIES   (L1_CACHE_BYTES > 64 ? 2 : 1)
 
#define T4_MAX_EQ_SIZE   (65520 - T4_EQ_STATUS_ENTRIES)
 
#define T4_MAX_IQ_SIZE   (65520 - 1)
 
#define T4_MAX_RQ_SIZE   (8192 - T4_EQ_STATUS_ENTRIES)
 
#define T4_MAX_SQ_SIZE   (T4_MAX_EQ_SIZE - 1)
 
#define T4_MAX_QP_DEPTH   (T4_MAX_RQ_SIZE - 1)
 
#define T4_MAX_CQ_DEPTH   (T4_MAX_IQ_SIZE - 1)
 
#define T4_MAX_NUM_STAG   (1<<15)
 
#define T4_MAX_MR_SIZE   (~0ULL - 1)
 
#define T4_PAGESIZE_MASK   0xffff000 /* 4KB-128MB */
 
#define T4_STAG_UNSET   0xffffffff
 
#define T4_FW_MAJ   0
 
#define T4_EQ_STATUS_ENTRIES   (L1_CACHE_BYTES > 64 ? 2 : 1)
 
#define A_PCIE_MA_SYNC   0x30b4
 
#define T4_EQ_ENTRY_SIZE   64
 
#define T4_SQ_NUM_SLOTS   5
 
#define T4_SQ_NUM_BYTES   (T4_EQ_ENTRY_SIZE * T4_SQ_NUM_SLOTS)
 
#define T4_MAX_SEND_SGE
 
#define T4_MAX_SEND_INLINE
 
#define T4_MAX_WRITE_INLINE
 
#define T4_MAX_WRITE_SGE
 
#define T4_MAX_FR_IMMD
 
#define T4_MAX_FR_DEPTH   (T4_MAX_FR_IMMD / sizeof(u64))
 
#define T4_RQ_NUM_SLOTS   2
 
#define T4_RQ_NUM_BYTES   (T4_EQ_ENTRY_SIZE * T4_RQ_NUM_SLOTS)
 
#define T4_MAX_RECV_SGE   4
 
#define T4_ERR_SUCCESS   0x0
 
#define T4_ERR_STAG   0x1 /* STAG invalid: either the */
 
#define T4_ERR_PDID   0x2 /* PDID mismatch */
 
#define T4_ERR_QPID   0x3 /* QPID mismatch */
 
#define T4_ERR_ACCESS   0x4 /* Invalid access right */
 
#define T4_ERR_WRAP   0x5 /* Wrap error */
 
#define T4_ERR_BOUND   0x6 /* base and bounds voilation */
 
#define T4_ERR_INVALIDATE_SHARED_MR   0x7 /* attempt to invalidate a */
 
#define T4_ERR_INVALIDATE_MR_WITH_MW_BOUND   0x8 /* attempt to invalidate a */
 
#define T4_ERR_ECC   0x9 /* ECC error detected */
 
#define T4_ERR_ECC_PSTAG   0xA /* ECC error detected when */
 
#define T4_ERR_PBL_ADDR_BOUND   0xB /* pbl addr out of bounds: */
 
#define T4_ERR_SWFLUSH   0xC /* SW FLUSHED */
 
#define T4_ERR_CRC   0x10 /* CRC error */
 
#define T4_ERR_MARKER   0x11 /* Marker error */
 
#define T4_ERR_PDU_LEN_ERR   0x12 /* invalid PDU length */
 
#define T4_ERR_OUT_OF_RQE   0x13 /* out of RQE */
 
#define T4_ERR_DDP_VERSION   0x14 /* wrong DDP version */
 
#define T4_ERR_RDMA_VERSION   0x15 /* wrong RDMA version */
 
#define T4_ERR_OPCODE   0x16 /* invalid rdma opcode */
 
#define T4_ERR_DDP_QUEUE_NUM   0x17 /* invalid ddp queue number */
 
#define T4_ERR_MSN   0x18 /* MSN error */
 
#define T4_ERR_TBIT   0x19 /* tag bit not set correctly */
 
#define T4_ERR_MO   0x1A /* MO not 0 for TERMINATE */
 
#define T4_ERR_MSN_GAP   0x1B
 
#define T4_ERR_MSN_RANGE   0x1C
 
#define T4_ERR_IRD_OVERFLOW   0x1D
 
#define T4_ERR_RQE_ADDR_BOUND   0x1E /* RQE addr out of bounds: */
 
#define T4_ERR_INTERNAL_ERR   0x1F /* internal error (opcode */
 
#define S_CQE_QPID   12
 
#define M_CQE_QPID   0xFFFFF
 
#define G_CQE_QPID(x)   ((((x) >> S_CQE_QPID)) & M_CQE_QPID)
 
#define V_CQE_QPID(x)   ((x)<<S_CQE_QPID)
 
#define S_CQE_SWCQE   11
 
#define M_CQE_SWCQE   0x1
 
#define G_CQE_SWCQE(x)   ((((x) >> S_CQE_SWCQE)) & M_CQE_SWCQE)
 
#define V_CQE_SWCQE(x)   ((x)<<S_CQE_SWCQE)
 
#define S_CQE_STATUS   5
 
#define M_CQE_STATUS   0x1F
 
#define G_CQE_STATUS(x)   ((((x) >> S_CQE_STATUS)) & M_CQE_STATUS)
 
#define V_CQE_STATUS(x)   ((x)<<S_CQE_STATUS)
 
#define S_CQE_TYPE   4
 
#define M_CQE_TYPE   0x1
 
#define G_CQE_TYPE(x)   ((((x) >> S_CQE_TYPE)) & M_CQE_TYPE)
 
#define V_CQE_TYPE(x)   ((x)<<S_CQE_TYPE)
 
#define S_CQE_OPCODE   0
 
#define M_CQE_OPCODE   0xF
 
#define G_CQE_OPCODE(x)   ((((x) >> S_CQE_OPCODE)) & M_CQE_OPCODE)
 
#define V_CQE_OPCODE(x)   ((x)<<S_CQE_OPCODE)
 
#define SW_CQE(x)   (G_CQE_SWCQE(be32_to_cpu((x)->header)))
 
#define CQE_QPID(x)   (G_CQE_QPID(be32_to_cpu((x)->header)))
 
#define CQE_TYPE(x)   (G_CQE_TYPE(be32_to_cpu((x)->header)))
 
#define SQ_TYPE(x)   (CQE_TYPE((x)))
 
#define RQ_TYPE(x)   (!CQE_TYPE((x)))
 
#define CQE_STATUS(x)   (G_CQE_STATUS(be32_to_cpu((x)->header)))
 
#define CQE_OPCODE(x)   (G_CQE_OPCODE(be32_to_cpu((x)->header)))
 
#define CQE_SEND_OPCODE(x)
 
#define CQE_LEN(x)   (be32_to_cpu((x)->len))
 
#define CQE_WRID_STAG(x)   (be32_to_cpu((x)->u.rcqe.stag))
 
#define CQE_WRID_MSN(x)   (be32_to_cpu((x)->u.rcqe.msn))
 
#define CQE_WRID_SQ_IDX(x)   ((x)->u.scqe.cidx)
 
#define CQE_WRID_HI(x)   ((x)->u.gen.wrid_hi)
 
#define CQE_WRID_LOW(x)   ((x)->u.gen.wrid_low)
 
#define S_CQE_GENBIT   63
 
#define M_CQE_GENBIT   0x1
 
#define G_CQE_GENBIT(x)   (((x) >> S_CQE_GENBIT) & M_CQE_GENBIT)
 
#define V_CQE_GENBIT(x)   ((x)<<S_CQE_GENBIT)
 
#define S_CQE_OVFBIT   62
 
#define M_CQE_OVFBIT   0x1
 
#define G_CQE_OVFBIT(x)   ((((x) >> S_CQE_OVFBIT)) & M_CQE_OVFBIT)
 
#define S_CQE_IQTYPE   60
 
#define M_CQE_IQTYPE   0x3
 
#define G_CQE_IQTYPE(x)   ((((x) >> S_CQE_IQTYPE)) & M_CQE_IQTYPE)
 
#define M_CQE_TS   0x0fffffffffffffffULL
 
#define G_CQE_TS(x)   ((x) & M_CQE_TS)
 
#define CQE_OVFBIT(x)   ((unsigned)G_CQE_OVFBIT(be64_to_cpu((x)->bits_type_ts)))
 
#define CQE_GENBIT(x)   ((unsigned)G_CQE_GENBIT(be64_to_cpu((x)->bits_type_ts)))
 
#define CQE_TS(x)   (G_CQE_TS(be64_to_cpu((x)->bits_type_ts)))
 

Enumerations

enum  { T4_SQ_ONCHIP = (1<<0) }
 

Macro Definition Documentation

#define A_PCIE_MA_SYNC   0x30b4

Definition at line 55 of file t4.h.

#define CQE_GENBIT (   x)    ((unsigned)G_CQE_GENBIT(be64_to_cpu((x)->bits_type_ts)))

Definition at line 261 of file t4.h.

#define CQE_LEN (   x)    (be32_to_cpu((x)->len))

Definition at line 230 of file t4.h.

#define CQE_OPCODE (   x)    (G_CQE_OPCODE(be32_to_cpu((x)->header)))

Definition at line 222 of file t4.h.

#define CQE_OVFBIT (   x)    ((unsigned)G_CQE_OVFBIT(be64_to_cpu((x)->bits_type_ts)))

Definition at line 260 of file t4.h.

#define CQE_QPID (   x)    (G_CQE_QPID(be32_to_cpu((x)->header)))

Definition at line 217 of file t4.h.

#define CQE_SEND_OPCODE (   x)
#define CQE_STATUS (   x)    (G_CQE_STATUS(be32_to_cpu((x)->header)))

Definition at line 221 of file t4.h.

#define CQE_TS (   x)    (G_CQE_TS(be64_to_cpu((x)->bits_type_ts)))

Definition at line 262 of file t4.h.

#define CQE_TYPE (   x)    (G_CQE_TYPE(be32_to_cpu((x)->header)))

Definition at line 218 of file t4.h.

#define CQE_WRID_HI (   x)    ((x)->u.gen.wrid_hi)

Definition at line 240 of file t4.h.

#define CQE_WRID_LOW (   x)    ((x)->u.gen.wrid_low)

Definition at line 241 of file t4.h.

#define CQE_WRID_MSN (   x)    (be32_to_cpu((x)->u.rcqe.msn))

Definition at line 234 of file t4.h.

#define CQE_WRID_SQ_IDX (   x)    ((x)->u.scqe.cidx)

Definition at line 237 of file t4.h.

#define CQE_WRID_STAG (   x)    (be32_to_cpu((x)->u.rcqe.stag))

Definition at line 233 of file t4.h.

#define G_CQE_GENBIT (   x)    (((x) >> S_CQE_GENBIT) & M_CQE_GENBIT)

Definition at line 246 of file t4.h.

#define G_CQE_IQTYPE (   x)    ((((x) >> S_CQE_IQTYPE)) & M_CQE_IQTYPE)

Definition at line 255 of file t4.h.

#define G_CQE_OPCODE (   x)    ((((x) >> S_CQE_OPCODE)) & M_CQE_OPCODE)

Definition at line 213 of file t4.h.

#define G_CQE_OVFBIT (   x)    ((((x) >> S_CQE_OVFBIT)) & M_CQE_OVFBIT)

Definition at line 251 of file t4.h.

#define G_CQE_QPID (   x)    ((((x) >> S_CQE_QPID)) & M_CQE_QPID)

Definition at line 193 of file t4.h.

#define G_CQE_STATUS (   x)    ((((x) >> S_CQE_STATUS)) & M_CQE_STATUS)

Definition at line 203 of file t4.h.

#define G_CQE_SWCQE (   x)    ((((x) >> S_CQE_SWCQE)) & M_CQE_SWCQE)

Definition at line 198 of file t4.h.

#define G_CQE_TS (   x)    ((x) & M_CQE_TS)

Definition at line 258 of file t4.h.

#define G_CQE_TYPE (   x)    ((((x) >> S_CQE_TYPE)) & M_CQE_TYPE)

Definition at line 208 of file t4.h.

#define M_CQE_GENBIT   0x1

Definition at line 245 of file t4.h.

#define M_CQE_IQTYPE   0x3

Definition at line 254 of file t4.h.

#define M_CQE_OPCODE   0xF

Definition at line 212 of file t4.h.

#define M_CQE_OVFBIT   0x1

Definition at line 250 of file t4.h.

#define M_CQE_QPID   0xFFFFF

Definition at line 192 of file t4.h.

#define M_CQE_STATUS   0x1F

Definition at line 202 of file t4.h.

#define M_CQE_SWCQE   0x1

Definition at line 197 of file t4.h.

#define M_CQE_TS   0x0fffffffffffffffULL

Definition at line 257 of file t4.h.

#define M_CQE_TYPE   0x1

Definition at line 207 of file t4.h.

#define RQ_TYPE (   x)    (!CQE_TYPE((x)))

Definition at line 220 of file t4.h.

#define S_CQE_GENBIT   63

Definition at line 244 of file t4.h.

#define S_CQE_IQTYPE   60

Definition at line 253 of file t4.h.

#define S_CQE_OPCODE   0

Definition at line 211 of file t4.h.

#define S_CQE_OVFBIT   62

Definition at line 249 of file t4.h.

#define S_CQE_QPID   12

Definition at line 191 of file t4.h.

#define S_CQE_STATUS   5

Definition at line 201 of file t4.h.

#define S_CQE_SWCQE   11

Definition at line 196 of file t4.h.

#define S_CQE_TYPE   4

Definition at line 206 of file t4.h.

#define SQ_TYPE (   x)    (CQE_TYPE((x)))

Definition at line 219 of file t4.h.

#define SW_CQE (   x)    (G_CQE_SWCQE(be32_to_cpu((x)->header)))

Definition at line 216 of file t4.h.

#define T4_EQ_ENTRY_SIZE   64

Definition at line 71 of file t4.h.

#define T4_EQ_STATUS_ENTRIES   (L1_CACHE_BYTES > 64 ? 2 : 1)

Definition at line 54 of file t4.h.

#define T4_EQ_STATUS_ENTRIES   (L1_CACHE_BYTES > 64 ? 2 : 1)

Definition at line 54 of file t4.h.

#define T4_ERR_ACCESS   0x4 /* Invalid access right */

Definition at line 131 of file t4.h.

#define T4_ERR_BOUND   0x6 /* base and bounds voilation */

Definition at line 133 of file t4.h.

#define T4_ERR_CRC   0x10 /* CRC error */

Definition at line 145 of file t4.h.

#define T4_ERR_DDP_QUEUE_NUM   0x17 /* invalid ddp queue number */

Definition at line 152 of file t4.h.

#define T4_ERR_DDP_VERSION   0x14 /* wrong DDP version */

Definition at line 149 of file t4.h.

#define T4_ERR_ECC   0x9 /* ECC error detected */

Definition at line 138 of file t4.h.

#define T4_ERR_ECC_PSTAG   0xA /* ECC error detected when */

Definition at line 139 of file t4.h.

#define T4_ERR_INTERNAL_ERR   0x1F /* internal error (opcode */

Definition at line 162 of file t4.h.

#define T4_ERR_INVALIDATE_MR_WITH_MW_BOUND   0x8 /* attempt to invalidate a */

Definition at line 136 of file t4.h.

#define T4_ERR_INVALIDATE_SHARED_MR   0x7 /* attempt to invalidate a */

Definition at line 134 of file t4.h.

#define T4_ERR_IRD_OVERFLOW   0x1D

Definition at line 159 of file t4.h.

#define T4_ERR_MARKER   0x11 /* Marker error */

Definition at line 146 of file t4.h.

#define T4_ERR_MO   0x1A /* MO not 0 for TERMINATE */

Definition at line 155 of file t4.h.

#define T4_ERR_MSN   0x18 /* MSN error */

Definition at line 153 of file t4.h.

#define T4_ERR_MSN_GAP   0x1B

Definition at line 157 of file t4.h.

#define T4_ERR_MSN_RANGE   0x1C

Definition at line 158 of file t4.h.

#define T4_ERR_OPCODE   0x16 /* invalid rdma opcode */

Definition at line 151 of file t4.h.

#define T4_ERR_OUT_OF_RQE   0x13 /* out of RQE */

Definition at line 148 of file t4.h.

#define T4_ERR_PBL_ADDR_BOUND   0xB /* pbl addr out of bounds: */

Definition at line 142 of file t4.h.

#define T4_ERR_PDID   0x2 /* PDID mismatch */

Definition at line 129 of file t4.h.

#define T4_ERR_PDU_LEN_ERR   0x12 /* invalid PDU length */

Definition at line 147 of file t4.h.

#define T4_ERR_QPID   0x3 /* QPID mismatch */

Definition at line 130 of file t4.h.

#define T4_ERR_RDMA_VERSION   0x15 /* wrong RDMA version */

Definition at line 150 of file t4.h.

#define T4_ERR_RQE_ADDR_BOUND   0x1E /* RQE addr out of bounds: */

Definition at line 160 of file t4.h.

#define T4_ERR_STAG   0x1 /* STAG invalid: either the */

Definition at line 126 of file t4.h.

#define T4_ERR_SUCCESS   0x0

Definition at line 125 of file t4.h.

#define T4_ERR_SWFLUSH   0xC /* SW FLUSHED */

Definition at line 144 of file t4.h.

#define T4_ERR_TBIT   0x19 /* tag bit not set correctly */

Definition at line 154 of file t4.h.

#define T4_ERR_WRAP   0x5 /* Wrap error */

Definition at line 132 of file t4.h.

#define T4_FW_MAJ   0

Definition at line 53 of file t4.h.

#define T4_MAX_CQ_DEPTH   (T4_MAX_IQ_SIZE - 1)

Definition at line 48 of file t4.h.

#define T4_MAX_EQ_SIZE   (65520 - T4_EQ_STATUS_ENTRIES)

Definition at line 43 of file t4.h.

#define T4_MAX_FR_DEPTH   (T4_MAX_FR_IMMD / sizeof(u64))

Definition at line 87 of file t4.h.

#define T4_MAX_FR_IMMD
Value:
((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \

Definition at line 85 of file t4.h.

#define T4_MAX_IQ_SIZE   (65520 - 1)

Definition at line 44 of file t4.h.

#define T4_MAX_MR_SIZE   (~0ULL - 1)

Definition at line 50 of file t4.h.

#define T4_MAX_NUM_CQ   (1<<15)

Definition at line 40 of file t4.h.

#define T4_MAX_NUM_PD   (1<<15)

Definition at line 41 of file t4.h.

#define T4_MAX_NUM_QP   (1<<16)

Definition at line 39 of file t4.h.

#define T4_MAX_NUM_STAG   (1<<15)

Definition at line 49 of file t4.h.

#define T4_MAX_QP_DEPTH   (T4_MAX_RQ_SIZE - 1)

Definition at line 47 of file t4.h.

#define T4_MAX_RECV_SGE   4

Definition at line 91 of file t4.h.

#define T4_MAX_RQ_SIZE   (8192 - T4_EQ_STATUS_ENTRIES)

Definition at line 45 of file t4.h.

#define T4_MAX_SEND_INLINE
Value:

Definition at line 77 of file t4.h.

#define T4_MAX_SEND_SGE
Value:

Definition at line 75 of file t4.h.

#define T4_MAX_SQ_SIZE   (T4_MAX_EQ_SIZE - 1)

Definition at line 46 of file t4.h.

#define T4_MAX_WRITE_INLINE
Value:
sizeof(struct fw_ri_rdma_write_wr) - \
sizeof(struct fw_ri_immd)))

Definition at line 79 of file t4.h.

#define T4_MAX_WRITE_SGE
Value:
sizeof(struct fw_ri_rdma_write_wr) - \
sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge))

Definition at line 82 of file t4.h.

#define T4_PAGESIZE_MASK   0xffff000 /* 4KB-128MB */

Definition at line 51 of file t4.h.

#define T4_RQ_NUM_BYTES   (T4_EQ_ENTRY_SIZE * T4_RQ_NUM_SLOTS)

Definition at line 90 of file t4.h.

#define T4_RQ_NUM_SLOTS   2

Definition at line 89 of file t4.h.

#define T4_SQ_NUM_BYTES   (T4_EQ_ENTRY_SIZE * T4_SQ_NUM_SLOTS)

Definition at line 74 of file t4.h.

#define T4_SQ_NUM_SLOTS   5

Definition at line 73 of file t4.h.

#define T4_STAG_UNSET   0xffffffff

Definition at line 52 of file t4.h.

#define V_CQE_GENBIT (   x)    ((x)<<S_CQE_GENBIT)

Definition at line 247 of file t4.h.

#define V_CQE_OPCODE (   x)    ((x)<<S_CQE_OPCODE)

Definition at line 214 of file t4.h.

#define V_CQE_QPID (   x)    ((x)<<S_CQE_QPID)

Definition at line 194 of file t4.h.

#define V_CQE_STATUS (   x)    ((x)<<S_CQE_STATUS)

Definition at line 204 of file t4.h.

#define V_CQE_SWCQE (   x)    ((x)<<S_CQE_SWCQE)

Definition at line 199 of file t4.h.

#define V_CQE_TYPE (   x)    ((x)<<S_CQE_TYPE)

Definition at line 209 of file t4.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
T4_SQ_ONCHIP 

Definition at line 292 of file t4.h.