#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <mach/clk.h>
#include "dmaengine.h"

Data Structures
struct	tegra_dma_chip_data

struct	tegra_dma_channel_regs

struct	tegra_dma_sg_req

struct	tegra_dma_desc

struct	tegra_dma_channel

struct	tegra_dma

Macros
#define	TEGRA_APBDMA_GENERAL 0x0

#define	TEGRA_APBDMA_GENERAL_ENABLE BIT(31)

#define	TEGRA_APBDMA_CONTROL 0x010

#define	TEGRA_APBDMA_IRQ_MASK 0x01c

#define	TEGRA_APBDMA_IRQ_MASK_SET 0x020

#define	TEGRA_APBDMA_CHAN_CSR 0x00

#define	TEGRA_APBDMA_CSR_ENB BIT(31)

#define	TEGRA_APBDMA_CSR_IE_EOC BIT(30)

#define	TEGRA_APBDMA_CSR_HOLD BIT(29)

#define	TEGRA_APBDMA_CSR_DIR BIT(28)

#define	TEGRA_APBDMA_CSR_ONCE BIT(27)

#define	TEGRA_APBDMA_CSR_FLOW BIT(21)

#define	TEGRA_APBDMA_CSR_REQ_SEL_SHIFT 16

#define	TEGRA_APBDMA_CSR_WCOUNT_MASK 0xFFFC

#define	TEGRA_APBDMA_CHAN_STATUS 0x004

#define	TEGRA_APBDMA_STATUS_BUSY BIT(31)

#define	TEGRA_APBDMA_STATUS_ISE_EOC BIT(30)

#define	TEGRA_APBDMA_STATUS_HALT BIT(29)

#define	TEGRA_APBDMA_STATUS_PING_PONG BIT(28)

#define	TEGRA_APBDMA_STATUS_COUNT_SHIFT 2

#define	TEGRA_APBDMA_STATUS_COUNT_MASK 0xFFFC

#define	TEGRA_APBDMA_CHAN_AHBPTR 0x010

#define	TEGRA_APBDMA_CHAN_AHBSEQ 0x14

#define	TEGRA_APBDMA_AHBSEQ_INTR_ENB BIT(31)

#define	TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_8 (0 << 28)

#define	TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_16 (1 << 28)

#define	TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32 (2 << 28)

#define	TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_64 (3 << 28)

#define	TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_128 (4 << 28)

#define	TEGRA_APBDMA_AHBSEQ_DATA_SWAP BIT(27)

#define	TEGRA_APBDMA_AHBSEQ_BURST_1 (4 << 24)

#define	TEGRA_APBDMA_AHBSEQ_BURST_4 (5 << 24)

#define	TEGRA_APBDMA_AHBSEQ_BURST_8 (6 << 24)

#define	TEGRA_APBDMA_AHBSEQ_DBL_BUF BIT(19)

#define	TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT 16

#define	TEGRA_APBDMA_AHBSEQ_WRAP_NONE 0

#define	TEGRA_APBDMA_CHAN_APBPTR 0x018

#define	TEGRA_APBDMA_CHAN_APBSEQ 0x01c

#define	TEGRA_APBDMA_APBSEQ_BUS_WIDTH_8 (0 << 28)

#define	TEGRA_APBDMA_APBSEQ_BUS_WIDTH_16 (1 << 28)

#define	TEGRA_APBDMA_APBSEQ_BUS_WIDTH_32 (2 << 28)

#define	TEGRA_APBDMA_APBSEQ_BUS_WIDTH_64 (3 << 28)

#define	TEGRA_APBDMA_APBSEQ_BUS_WIDTH_128 (4 << 28)

#define	TEGRA_APBDMA_APBSEQ_DATA_SWAP BIT(27)

#define	TEGRA_APBDMA_APBSEQ_WRAP_WORD_1 (1 << 16)

#define	TEGRA_APBDMA_BURST_COMPLETE_TIME 20

#define	TEGRA_APBDMA_CHANNEL_BASE_ADD_OFFSET 0x1000

#define	TEGRA_APBDMA_CHANNEL_REGISTER_SIZE 0x20

Typedefs
typedef void(*	dma_isr_handler )(struct tegra_dma_channel *tdc, bool to_terminate)

Functions
struct dma_async_tx_descriptor *	tegra_dma_prep_dma_cyclic (struct dma_chan dc, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags, void context)

	module_platform_driver (tegra_dmac_driver)

	MODULE_ALIAS ("platform:tegra20-apbdma")

	MODULE_DESCRIPTION ("NVIDIA Tegra APB DMA Controller driver")

	MODULE_AUTHOR ("Laxman Dewangan <[email protected]>")

	MODULE_LICENSE ("GPL v2")

Macro Definition Documentation

#define TEGRA_APBDMA_AHBSEQ_BURST_1 (4 << 24)

Definition at line 77 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_BURST_4 (5 << 24)

Definition at line 78 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_BURST_8 (6 << 24)

Definition at line 79 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_128 (4 << 28)

Definition at line 75 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_16 (1 << 28)

Definition at line 72 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32 (2 << 28)

Definition at line 73 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_64 (3 << 28)

Definition at line 74 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_8 (0 << 28)

Definition at line 71 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_DATA_SWAP BIT(27)

Definition at line 76 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_DBL_BUF BIT(19)

Definition at line 80 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_INTR_ENB BIT(31)

Definition at line 70 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_WRAP_NONE 0

Definition at line 82 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT 16

Definition at line 81 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_128 (4 << 28)

Definition at line 93 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_16 (1 << 28)

Definition at line 90 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_32 (2 << 28)

Definition at line 91 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_64 (3 << 28)

Definition at line 92 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_8 (0 << 28)

Definition at line 89 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_APBSEQ_DATA_SWAP BIT(27)

Definition at line 94 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_APBSEQ_WRAP_WORD_1 (1 << 16)

Definition at line 95 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_BURST_COMPLETE_TIME 20

Definition at line 101 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CHAN_AHBPTR 0x010

Definition at line 66 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CHAN_AHBSEQ 0x14

Definition at line 69 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CHAN_APBPTR 0x018

Definition at line 85 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CHAN_APBSEQ 0x01c

Definition at line 88 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CHAN_CSR 0x00

Definition at line 46 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CHAN_STATUS 0x004

Definition at line 57 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CHANNEL_BASE_ADD_OFFSET 0x1000

Definition at line 104 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CHANNEL_REGISTER_SIZE 0x20

Definition at line 107 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CONTROL 0x010

Definition at line 41 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CSR_DIR BIT(28)

Definition at line 50 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CSR_ENB BIT(31)

Definition at line 47 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CSR_FLOW BIT(21)

Definition at line 52 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CSR_HOLD BIT(29)

Definition at line 49 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CSR_IE_EOC BIT(30)

Definition at line 48 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CSR_ONCE BIT(27)

Definition at line 51 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CSR_REQ_SEL_SHIFT 16

Definition at line 53 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_CSR_WCOUNT_MASK 0xFFFC

Definition at line 54 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_GENERAL 0x0

Definition at line 38 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_GENERAL_ENABLE BIT(31)

Definition at line 39 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_IRQ_MASK 0x01c

Definition at line 42 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_IRQ_MASK_SET 0x020

Definition at line 43 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_STATUS_BUSY BIT(31)

Definition at line 58 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_STATUS_COUNT_MASK 0xFFFC

Definition at line 63 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_STATUS_COUNT_SHIFT 2

Definition at line 62 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_STATUS_HALT BIT(29)

Definition at line 60 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_STATUS_ISE_EOC BIT(30)

Definition at line 59 of file tegra20-apb-dma.c.

#define TEGRA_APBDMA_STATUS_PING_PONG BIT(28)

Definition at line 61 of file tegra20-apb-dma.c.

Typedef Documentation

typedef void(* dma_isr_handler)(struct tegra_dma_channel *tdc, bool to_terminate)

Definition at line 166 of file tegra20-apb-dma.c.

Function Documentation

MODULE_ALIAS ( "platform:tegra20-apbdma" )

MODULE_AUTHOR ( "Laxman Dewangan <[email protected]>" )

MODULE_DESCRIPTION ( "NVIDIA Tegra APB DMA Controller driver" )

MODULE_LICENSE ( "GPL v2" )

module_platform_driver ( tegra_dmac_driver )

struct dma_async_tx_descriptor* tegra_dma_prep_dma_cyclic	(	struct dma_chan *	dc,
		dma_addr_t	buf_addr,
		size_t	buf_len,
		size_t	period_len,
		enum dma_transfer_direction	direction,
		unsigned long	flags,
		void *	context
	)

read

Definition at line 989 of file tegra20-apb-dma.c.

Data Structures

Macros

Typedefs

Functions

Macro Definition Documentation

Typedef Documentation

Function Documentation