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via82cxxx.c
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1 /*
2  * VIA IDE driver for Linux. Supported southbridges:
3  *
4  * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
5  * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
6  * vt8235, vt8237, vt8237a
7  *
8  * Copyright (c) 2000-2002 Vojtech Pavlik
9  * Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
10  *
11  * Based on the work of:
12  * Michel Aubry
13  * Jeff Garzik
14  * Andre Hedrick
15  *
16  * Documentation:
17  * Obsolete device documentation publicly available from via.com.tw
18  * Current device documentation available under NDA only
19  */
20 
21 /*
22  * This program is free software; you can redistribute it and/or modify it
23  * under the terms of the GNU General Public License version 2 as published by
24  * the Free Software Foundation.
25  */
26 
27 #include <linux/module.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/init.h>
32 #include <linux/ide.h>
33 #include <linux/dmi.h>
34 
35 #ifdef CONFIG_PPC_CHRP
36 #include <asm/processor.h>
37 #endif
38 
39 #define DRV_NAME "via82cxxx"
40 
41 #define VIA_IDE_ENABLE 0x40
42 #define VIA_IDE_CONFIG 0x41
43 #define VIA_FIFO_CONFIG 0x43
44 #define VIA_MISC_1 0x44
45 #define VIA_MISC_2 0x45
46 #define VIA_MISC_3 0x46
47 #define VIA_DRIVE_TIMING 0x48
48 #define VIA_8BIT_TIMING 0x4e
49 #define VIA_ADDRESS_SETUP 0x4c
50 #define VIA_UDMA_TIMING 0x50
51 
52 #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
53 #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
54 #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
55 #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
56 #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
57 #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
58 #define VIA_SATA_PATA 0x80 /* SATA/PATA combined configuration */
59 
60 enum {
61  VIA_IDFLAG_SINGLE = (1 << 1), /* single channel controller */
62 };
63 
64 /*
65  * VIA SouthBridge chips.
66  */
67 
68 static struct via_isa_bridge {
69  char *name;
70  u16 id;
71  u8 rev_min;
72  u8 rev_max;
73  u8 udma_mask;
74  u8 flags;
75 } via_isa_bridges[] = {
76  { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
77  { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
78  { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
79  { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
80  { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
81  { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
82  { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST },
83  { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
84  { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
85  { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
86  { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
87  { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
88  { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
89  { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
90  { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
91  { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
92  { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
93  { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
94  { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
95  { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
96  { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
97  { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
98  { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
99  { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
100  { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
101  { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
102  { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
103  { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
104  { NULL }
105 };
106 
107 static unsigned int via_clock;
108 static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
109 
110 struct via82cxxx_dev
111 {
112  struct via_isa_bridge *via_config;
113  unsigned int via_80w;
114 };
115 
125 static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
126 {
127  struct pci_dev *dev = to_pci_dev(hwif->dev);
128  struct ide_host *host = pci_get_drvdata(dev);
129  struct via82cxxx_dev *vdev = host->host_priv;
130  u8 t;
131 
132  if (~vdev->via_config->flags & VIA_BAD_AST) {
133  pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
134  t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
135  pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
136  }
137 
138  pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
139  ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
140 
141  pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
142  ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
143 
144  switch (vdev->via_config->udma_mask) {
145  case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
146  case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
147  case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
148  case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
149  }
150 
151  /* Set UDMA unless device is not UDMA capable */
152  if (vdev->via_config->udma_mask) {
153  u8 udma_etc;
154 
155  pci_read_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, &udma_etc);
156 
157  /* clear transfer mode bit */
158  udma_etc &= ~0x20;
159 
160  if (timing->udma) {
161  /* preserve 80-wire cable detection bit */
162  udma_etc &= 0x10;
163  udma_etc |= t;
164  }
165 
166  pci_write_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, udma_etc);
167  }
168 }
169 
179 static void via_set_drive(ide_hwif_t *hwif, ide_drive_t *drive)
180 {
181  ide_drive_t *peer = ide_get_pair_dev(drive);
182  struct pci_dev *dev = to_pci_dev(hwif->dev);
183  struct ide_host *host = pci_get_drvdata(dev);
184  struct via82cxxx_dev *vdev = host->host_priv;
185  struct ide_timing t, p;
186  unsigned int T, UT;
187  const u8 speed = drive->dma_mode;
188 
189  T = 1000000000 / via_clock;
190 
191  switch (vdev->via_config->udma_mask) {
192  case ATA_UDMA2: UT = T; break;
193  case ATA_UDMA4: UT = T/2; break;
194  case ATA_UDMA5: UT = T/3; break;
195  case ATA_UDMA6: UT = T/4; break;
196  default: UT = T;
197  }
198 
199  ide_timing_compute(drive, speed, &t, T, UT);
200 
201  if (peer) {
202  ide_timing_compute(peer, peer->pio_mode, &p, T, UT);
203  ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
204  }
205 
206  via_set_speed(hwif, drive->dn, &t);
207 }
208 
217 static void via_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
218 {
219  drive->dma_mode = drive->pio_mode;
220  via_set_drive(hwif, drive);
221 }
222 
223 static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
224 {
225  struct via_isa_bridge *via_config;
226 
227  for (via_config = via_isa_bridges;
228  via_config->id != PCI_DEVICE_ID_VIA_ANON; via_config++)
229  if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
230  !!(via_config->flags & VIA_BAD_ID),
231  via_config->id, NULL))) {
232 
233  if ((*isa)->revision >= via_config->rev_min &&
234  (*isa)->revision <= via_config->rev_max)
235  break;
236  pci_dev_put(*isa);
237  }
238 
239  return via_config;
240 }
241 
242 /*
243  * Check and handle 80-wire cable presence
244  */
245 static void via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
246 {
247  int i;
248 
249  switch (vdev->via_config->udma_mask) {
250  case ATA_UDMA4:
251  for (i = 24; i >= 0; i -= 8)
252  if (((u >> (i & 16)) & 8) &&
253  ((u >> i) & 0x20) &&
254  (((u >> i) & 7) < 2)) {
255  /*
256  * 2x PCI clock and
257  * UDMA w/ < 3T/cycle
258  */
259  vdev->via_80w |= (1 << (1 - (i >> 4)));
260  }
261  break;
262 
263  case ATA_UDMA5:
264  for (i = 24; i >= 0; i -= 8)
265  if (((u >> i) & 0x10) ||
266  (((u >> i) & 0x20) &&
267  (((u >> i) & 7) < 4))) {
268  /* BIOS 80-wire bit or
269  * UDMA w/ < 60ns/cycle
270  */
271  vdev->via_80w |= (1 << (1 - (i >> 4)));
272  }
273  break;
274 
275  case ATA_UDMA6:
276  for (i = 24; i >= 0; i -= 8)
277  if (((u >> i) & 0x10) ||
278  (((u >> i) & 0x20) &&
279  (((u >> i) & 7) < 6))) {
280  /* BIOS 80-wire bit or
281  * UDMA w/ < 60ns/cycle
282  */
283  vdev->via_80w |= (1 << (1 - (i >> 4)));
284  }
285  break;
286  }
287 }
288 
297 static int init_chipset_via82cxxx(struct pci_dev *dev)
298 {
299  struct ide_host *host = pci_get_drvdata(dev);
300  struct via82cxxx_dev *vdev = host->host_priv;
301  struct via_isa_bridge *via_config = vdev->via_config;
302  u8 t, v;
303  u32 u;
304 
305  /*
306  * Detect cable and configure Clk66
307  */
308  pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
309 
310  via_cable_detect(vdev, u);
311 
312  if (via_config->udma_mask == ATA_UDMA4) {
313  /* Enable Clk66 */
314  pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
315  } else if (via_config->flags & VIA_BAD_CLK66) {
316  /* Would cause trouble on 596a and 686 */
317  pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
318  }
319 
320  /*
321  * Check whether interfaces are enabled.
322  */
323 
324  pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
325 
326  /*
327  * Set up FIFO sizes and thresholds.
328  */
329 
330  pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
331 
332  /* Disable PREQ# till DDACK# */
333  if (via_config->flags & VIA_BAD_PREQ) {
334  /* Would crash on 586b rev 41 */
335  t &= 0x7f;
336  }
337 
338  /* Fix FIFO split between channels */
339  if (via_config->flags & VIA_SET_FIFO) {
340  t &= (t & 0x9f);
341  switch (v & 3) {
342  case 2: t |= 0x00; break; /* 16 on primary */
343  case 1: t |= 0x60; break; /* 16 on secondary */
344  case 3: t |= 0x20; break; /* 8 pri 8 sec */
345  }
346  }
347 
348  pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
349 
350  return 0;
351 }
352 
353 /*
354  * Cable special cases
355  */
356 
357 static const struct dmi_system_id cable_dmi_table[] = {
358  {
359  .ident = "Acer Ferrari 3400",
360  .matches = {
361  DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
362  DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
363  },
364  },
365  { }
366 };
367 
368 static int via_cable_override(struct pci_dev *pdev)
369 {
370  /* Systems by DMI */
371  if (dmi_check_system(cable_dmi_table))
372  return 1;
373 
374  /* Arima W730-K8/Targa Visionary 811/... */
375  if (pdev->subsystem_vendor == 0x161F &&
376  pdev->subsystem_device == 0x2032)
377  return 1;
378 
379  return 0;
380 }
381 
382 static u8 via82cxxx_cable_detect(ide_hwif_t *hwif)
383 {
384  struct pci_dev *pdev = to_pci_dev(hwif->dev);
385  struct ide_host *host = pci_get_drvdata(pdev);
386  struct via82cxxx_dev *vdev = host->host_priv;
387 
388  if (via_cable_override(pdev))
389  return ATA_CBL_PATA40_SHORT;
390 
391  if ((vdev->via_config->flags & VIA_SATA_PATA) && hwif->channel == 0)
392  return ATA_CBL_SATA;
393 
394  if ((vdev->via_80w >> hwif->channel) & 1)
395  return ATA_CBL_PATA80;
396  else
397  return ATA_CBL_PATA40;
398 }
399 
400 static const struct ide_port_ops via_port_ops = {
401  .set_pio_mode = via_set_pio_mode,
402  .set_dma_mode = via_set_drive,
403  .cable_detect = via82cxxx_cable_detect,
404 };
405 
406 static const struct ide_port_info via82cxxx_chipset __devinitconst = {
407  .name = DRV_NAME,
408  .init_chipset = init_chipset_via82cxxx,
409  .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
410  .port_ops = &via_port_ops,
411  .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
412  IDE_HFLAG_POST_SET_MODE |
413  IDE_HFLAG_IO_32BIT,
414  .pio_mask = ATA_PIO5,
415  .swdma_mask = ATA_SWDMA2,
416  .mwdma_mask = ATA_MWDMA2,
417 };
418 
419 static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
420 {
421  struct pci_dev *isa = NULL;
422  struct via_isa_bridge *via_config;
423  struct via82cxxx_dev *vdev;
424  int rc;
425  u8 idx = id->driver_data;
426  struct ide_port_info d;
427 
428  d = via82cxxx_chipset;
429 
430  /*
431  * Find the ISA bridge and check we know what it is.
432  */
433  via_config = via_config_find(&isa);
434 
435  /*
436  * Print the boot message.
437  */
438  printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n",
439  pci_name(dev), via_config->name, isa->revision,
440  via_config->udma_mask ? "U" : "MW",
441  via_dma[via_config->udma_mask ?
442  (fls(via_config->udma_mask) - 1) : 0]);
443 
444  pci_dev_put(isa);
445 
446  /*
447  * Determine system bus clock.
448  */
449  via_clock = (ide_pci_clk ? ide_pci_clk : 33) * 1000;
450 
451  switch (via_clock) {
452  case 33000: via_clock = 33333; break;
453  case 37000: via_clock = 37500; break;
454  case 41000: via_clock = 41666; break;
455  }
456 
457  if (via_clock < 20000 || via_clock > 50000) {
458  printk(KERN_WARNING DRV_NAME ": User given PCI clock speed "
459  "impossible (%d), using 33 MHz instead.\n", via_clock);
460  via_clock = 33333;
461  }
462 
463  if (idx == 1)
464  d.enablebits[1].reg = d.enablebits[0].reg = 0;
465  else
466  d.host_flags |= IDE_HFLAG_NO_AUTODMA;
467 
468  if (idx == VIA_IDFLAG_SINGLE)
469  d.host_flags |= IDE_HFLAG_SINGLE;
470 
471  if ((via_config->flags & VIA_NO_UNMASK) == 0)
472  d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
473 
474  d.udma_mask = via_config->udma_mask;
475 
476  vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
477  if (!vdev) {
478  printk(KERN_ERR DRV_NAME " %s: out of memory :(\n",
479  pci_name(dev));
480  return -ENOMEM;
481  }
482 
483  vdev->via_config = via_config;
484 
485  rc = ide_pci_init_one(dev, &d, vdev);
486  if (rc)
487  kfree(vdev);
488 
489  return rc;
490 }
491 
492 static void __devexit via_remove(struct pci_dev *dev)
493 {
494  struct ide_host *host = pci_get_drvdata(dev);
495  struct via82cxxx_dev *vdev = host->host_priv;
496 
497  ide_pci_remove(dev);
498  kfree(vdev);
499 }
500 
501 static const struct pci_device_id via_pci_tbl[] = {
502  { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 },
503  { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 },
504  { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
505  { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_VX855_IDE), VIA_IDFLAG_SINGLE },
506  { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 },
507  { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6415), 1 },
508  { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
509  { 0, },
510 };
511 MODULE_DEVICE_TABLE(pci, via_pci_tbl);
512 
513 static struct pci_driver via_pci_driver = {
514  .name = "VIA_IDE",
515  .id_table = via_pci_tbl,
516  .probe = via_init_one,
517  .remove = __devexit_p(via_remove),
518  .suspend = ide_pci_suspend,
519  .resume = ide_pci_resume,
520 };
521 
522 static int __init via_ide_init(void)
523 {
524  return ide_pci_register_driver(&via_pci_driver);
525 }
526 
527 static void __exit via_ide_exit(void)
528 {
529  pci_unregister_driver(&via_pci_driver);
530 }
531 
532 module_init(via_ide_init);
533 module_exit(via_ide_exit);
534 
535 MODULE_AUTHOR("Vojtech Pavlik, Bartlomiej Zolnierkiewicz, Michel Aubry, Jeff Garzik, Andre Hedrick");
536 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
537 MODULE_LICENSE("GPL");
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