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ymfpci_main.c
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1 /*
2  * Copyright (c) by Jaroslav Kysela <[email protected]>
3  * Routines for control of YMF724/740/744/754 chips
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18  *
19  */
20 
21 #include <linux/delay.h>
22 #include <linux/firmware.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
28 #include <linux/vmalloc.h>
29 #include <linux/mutex.h>
30 #include <linux/module.h>
31 
32 #include <sound/core.h>
33 #include <sound/control.h>
34 #include <sound/info.h>
35 #include <sound/tlv.h>
36 #include "ymfpci.h"
37 #include <sound/asoundef.h>
38 #include <sound/mpu401.h>
39 
40 #include <asm/io.h>
41 #include <asm/byteorder.h>
42 
43 /*
44  * common I/O routines
45  */
46 
47 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
48 
49 static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
50 {
51  return readb(chip->reg_area_virt + offset);
52 }
53 
54 static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
55 {
56  writeb(val, chip->reg_area_virt + offset);
57 }
58 
59 static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
60 {
61  return readw(chip->reg_area_virt + offset);
62 }
63 
64 static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
65 {
66  writew(val, chip->reg_area_virt + offset);
67 }
68 
69 static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
70 {
71  return readl(chip->reg_area_virt + offset);
72 }
73 
74 static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
75 {
76  writel(val, chip->reg_area_virt + offset);
77 }
78 
79 static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
80 {
81  unsigned long end_time;
82  u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
83 
84  end_time = jiffies + msecs_to_jiffies(750);
85  do {
86  if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
87  return 0;
88  schedule_timeout_uninterruptible(1);
89  } while (time_before(jiffies, end_time));
90  snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
91  return -EBUSY;
92 }
93 
94 static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
95 {
96  struct snd_ymfpci *chip = ac97->private_data;
97  u32 cmd;
98 
99  snd_ymfpci_codec_ready(chip, 0);
100  cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
101  snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
102 }
103 
104 static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
105 {
106  struct snd_ymfpci *chip = ac97->private_data;
107 
108  if (snd_ymfpci_codec_ready(chip, 0))
109  return ~0;
110  snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
111  if (snd_ymfpci_codec_ready(chip, 0))
112  return ~0;
113  if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
114  int i;
115  for (i = 0; i < 600; i++)
116  snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
117  }
118  return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
119 }
120 
121 /*
122  * Misc routines
123  */
124 
125 static u32 snd_ymfpci_calc_delta(u32 rate)
126 {
127  switch (rate) {
128  case 8000: return 0x02aaab00;
129  case 11025: return 0x03accd00;
130  case 16000: return 0x05555500;
131  case 22050: return 0x07599a00;
132  case 32000: return 0x0aaaab00;
133  case 44100: return 0x0eb33300;
134  default: return ((rate << 16) / 375) << 5;
135  }
136 }
137 
138 static u32 def_rate[8] = {
139  100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
140 };
141 
142 static u32 snd_ymfpci_calc_lpfK(u32 rate)
143 {
144  u32 i;
145  static u32 val[8] = {
146  0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
147  0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
148  };
149 
150  if (rate == 44100)
151  return 0x40000000; /* FIXME: What's the right value? */
152  for (i = 0; i < 8; i++)
153  if (rate <= def_rate[i])
154  return val[i];
155  return val[0];
156 }
157 
158 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
159 {
160  u32 i;
161  static u32 val[8] = {
162  0x35280000, 0x34A70000, 0x32020000, 0x31770000,
163  0x31390000, 0x31C90000, 0x33D00000, 0x40000000
164  };
165 
166  if (rate == 44100)
167  return 0x370A0000;
168  for (i = 0; i < 8; i++)
169  if (rate <= def_rate[i])
170  return val[i];
171  return val[0];
172 }
173 
174 /*
175  * Hardware start management
176  */
177 
178 static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
179 {
180  unsigned long flags;
181 
182  spin_lock_irqsave(&chip->reg_lock, flags);
183  if (chip->start_count++ > 0)
184  goto __end;
185  snd_ymfpci_writel(chip, YDSXGR_MODE,
186  snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
187  chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
188  __end:
189  spin_unlock_irqrestore(&chip->reg_lock, flags);
190 }
191 
192 static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
193 {
194  unsigned long flags;
195  long timeout = 1000;
196 
197  spin_lock_irqsave(&chip->reg_lock, flags);
198  if (--chip->start_count > 0)
199  goto __end;
200  snd_ymfpci_writel(chip, YDSXGR_MODE,
201  snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
202  while (timeout-- > 0) {
203  if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
204  break;
205  }
206  if (atomic_read(&chip->interrupt_sleep_count)) {
207  atomic_set(&chip->interrupt_sleep_count, 0);
208  wake_up(&chip->interrupt_sleep);
209  }
210  __end:
211  spin_unlock_irqrestore(&chip->reg_lock, flags);
212 }
213 
214 /*
215  * Playback voice management
216  */
217 
218 static int voice_alloc(struct snd_ymfpci *chip,
219  enum snd_ymfpci_voice_type type, int pair,
220  struct snd_ymfpci_voice **rvoice)
221 {
222  struct snd_ymfpci_voice *voice, *voice2;
223  int idx;
224 
225  *rvoice = NULL;
226  for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
227  voice = &chip->voices[idx];
228  voice2 = pair ? &chip->voices[idx+1] : NULL;
229  if (voice->use || (voice2 && voice2->use))
230  continue;
231  voice->use = 1;
232  if (voice2)
233  voice2->use = 1;
234  switch (type) {
235  case YMFPCI_PCM:
236  voice->pcm = 1;
237  if (voice2)
238  voice2->pcm = 1;
239  break;
240  case YMFPCI_SYNTH:
241  voice->synth = 1;
242  break;
243  case YMFPCI_MIDI:
244  voice->midi = 1;
245  break;
246  }
247  snd_ymfpci_hw_start(chip);
248  if (voice2)
249  snd_ymfpci_hw_start(chip);
250  *rvoice = voice;
251  return 0;
252  }
253  return -ENOMEM;
254 }
255 
256 static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
257  enum snd_ymfpci_voice_type type, int pair,
258  struct snd_ymfpci_voice **rvoice)
259 {
260  unsigned long flags;
261  int result;
262 
263  if (snd_BUG_ON(!rvoice))
264  return -EINVAL;
265  if (snd_BUG_ON(pair && type != YMFPCI_PCM))
266  return -EINVAL;
267 
268  spin_lock_irqsave(&chip->voice_lock, flags);
269  for (;;) {
270  result = voice_alloc(chip, type, pair, rvoice);
271  if (result == 0 || type != YMFPCI_PCM)
272  break;
273  /* TODO: synth/midi voice deallocation */
274  break;
275  }
276  spin_unlock_irqrestore(&chip->voice_lock, flags);
277  return result;
278 }
279 
280 static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
281 {
282  unsigned long flags;
283 
284  if (snd_BUG_ON(!pvoice))
285  return -EINVAL;
286  snd_ymfpci_hw_stop(chip);
287  spin_lock_irqsave(&chip->voice_lock, flags);
288  if (pvoice->number == chip->src441_used) {
289  chip->src441_used = -1;
290  pvoice->ypcm->use_441_slot = 0;
291  }
292  pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
293  pvoice->ypcm = NULL;
294  pvoice->interrupt = NULL;
295  spin_unlock_irqrestore(&chip->voice_lock, flags);
296  return 0;
297 }
298 
299 /*
300  * PCM part
301  */
302 
303 static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
304 {
305  struct snd_ymfpci_pcm *ypcm;
306  u32 pos, delta;
307 
308  if ((ypcm = voice->ypcm) == NULL)
309  return;
310  if (ypcm->substream == NULL)
311  return;
312  spin_lock(&chip->reg_lock);
313  if (ypcm->running) {
314  pos = le32_to_cpu(voice->bank[chip->active_bank].start);
315  if (pos < ypcm->last_pos)
316  delta = pos + (ypcm->buffer_size - ypcm->last_pos);
317  else
318  delta = pos - ypcm->last_pos;
319  ypcm->period_pos += delta;
320  ypcm->last_pos = pos;
321  if (ypcm->period_pos >= ypcm->period_size) {
322  /*
323  printk(KERN_DEBUG
324  "done - active_bank = 0x%x, start = 0x%x\n",
325  chip->active_bank,
326  voice->bank[chip->active_bank].start);
327  */
328  ypcm->period_pos %= ypcm->period_size;
329  spin_unlock(&chip->reg_lock);
330  snd_pcm_period_elapsed(ypcm->substream);
331  spin_lock(&chip->reg_lock);
332  }
333 
334  if (unlikely(ypcm->update_pcm_vol)) {
335  unsigned int subs = ypcm->substream->number;
336  unsigned int next_bank = 1 - chip->active_bank;
337  struct snd_ymfpci_playback_bank *bank;
338  u32 volume;
339 
340  bank = &voice->bank[next_bank];
341  volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
342  bank->left_gain_end = volume;
343  if (ypcm->output_rear)
344  bank->eff2_gain_end = volume;
345  if (ypcm->voices[1])
346  bank = &ypcm->voices[1]->bank[next_bank];
347  volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
348  bank->right_gain_end = volume;
349  if (ypcm->output_rear)
350  bank->eff3_gain_end = volume;
351  ypcm->update_pcm_vol--;
352  }
353  }
354  spin_unlock(&chip->reg_lock);
355 }
356 
357 static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
358 {
359  struct snd_pcm_runtime *runtime = substream->runtime;
360  struct snd_ymfpci_pcm *ypcm = runtime->private_data;
361  struct snd_ymfpci *chip = ypcm->chip;
362  u32 pos, delta;
363 
364  spin_lock(&chip->reg_lock);
365  if (ypcm->running) {
366  pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
367  if (pos < ypcm->last_pos)
368  delta = pos + (ypcm->buffer_size - ypcm->last_pos);
369  else
370  delta = pos - ypcm->last_pos;
371  ypcm->period_pos += delta;
372  ypcm->last_pos = pos;
373  if (ypcm->period_pos >= ypcm->period_size) {
374  ypcm->period_pos %= ypcm->period_size;
375  /*
376  printk(KERN_DEBUG
377  "done - active_bank = 0x%x, start = 0x%x\n",
378  chip->active_bank,
379  voice->bank[chip->active_bank].start);
380  */
381  spin_unlock(&chip->reg_lock);
382  snd_pcm_period_elapsed(substream);
383  spin_lock(&chip->reg_lock);
384  }
385  }
386  spin_unlock(&chip->reg_lock);
387 }
388 
389 static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
390  int cmd)
391 {
392  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
393  struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
394  struct snd_kcontrol *kctl = NULL;
395  int result = 0;
396 
397  spin_lock(&chip->reg_lock);
398  if (ypcm->voices[0] == NULL) {
399  result = -EINVAL;
400  goto __unlock;
401  }
402  switch (cmd) {
403  case SNDRV_PCM_TRIGGER_START:
404  case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
405  case SNDRV_PCM_TRIGGER_RESUME:
406  chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
407  if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
408  chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
409  ypcm->running = 1;
410  break;
411  case SNDRV_PCM_TRIGGER_STOP:
412  if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
413  kctl = chip->pcm_mixer[substream->number].ctl;
414  kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
415  }
416  /* fall through */
417  case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
418  case SNDRV_PCM_TRIGGER_SUSPEND:
419  chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
420  if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
421  chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
422  ypcm->running = 0;
423  break;
424  default:
425  result = -EINVAL;
426  break;
427  }
428  __unlock:
429  spin_unlock(&chip->reg_lock);
430  if (kctl)
431  snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
432  return result;
433 }
434 static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
435  int cmd)
436 {
437  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
438  struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
439  int result = 0;
440  u32 tmp;
441 
442  spin_lock(&chip->reg_lock);
443  switch (cmd) {
444  case SNDRV_PCM_TRIGGER_START:
445  case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
446  case SNDRV_PCM_TRIGGER_RESUME:
447  tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
448  snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
449  ypcm->running = 1;
450  break;
451  case SNDRV_PCM_TRIGGER_STOP:
452  case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
453  case SNDRV_PCM_TRIGGER_SUSPEND:
454  tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
455  snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
456  ypcm->running = 0;
457  break;
458  default:
459  result = -EINVAL;
460  break;
461  }
462  spin_unlock(&chip->reg_lock);
463  return result;
464 }
465 
466 static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
467 {
468  int err;
469 
470  if (ypcm->voices[1] != NULL && voices < 2) {
471  snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
472  ypcm->voices[1] = NULL;
473  }
474  if (voices == 1 && ypcm->voices[0] != NULL)
475  return 0; /* already allocated */
476  if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
477  return 0; /* already allocated */
478  if (voices > 1) {
479  if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
480  snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
481  ypcm->voices[0] = NULL;
482  }
483  }
484  err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
485  if (err < 0)
486  return err;
487  ypcm->voices[0]->ypcm = ypcm;
488  ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
489  if (voices > 1) {
490  ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
491  ypcm->voices[1]->ypcm = ypcm;
492  }
493  return 0;
494 }
495 
496 static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
497  struct snd_pcm_runtime *runtime,
498  int has_pcm_volume)
499 {
500  struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
501  u32 format;
502  u32 delta = snd_ymfpci_calc_delta(runtime->rate);
503  u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
504  u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
505  struct snd_ymfpci_playback_bank *bank;
506  unsigned int nbank;
507  u32 vol_left, vol_right;
508  u8 use_left, use_right;
509  unsigned long flags;
510 
511  if (snd_BUG_ON(!voice))
512  return;
513  if (runtime->channels == 1) {
514  use_left = 1;
515  use_right = 1;
516  } else {
517  use_left = (voiceidx & 1) == 0;
518  use_right = !use_left;
519  }
520  if (has_pcm_volume) {
521  vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
522  [ypcm->substream->number].left << 15);
523  vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
524  [ypcm->substream->number].right << 15);
525  } else {
526  vol_left = cpu_to_le32(0x40000000);
527  vol_right = cpu_to_le32(0x40000000);
528  }
529  spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
530  format = runtime->channels == 2 ? 0x00010000 : 0;
531  if (snd_pcm_format_width(runtime->format) == 8)
532  format |= 0x80000000;
533  else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
534  runtime->rate == 44100 && runtime->channels == 2 &&
535  voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
536  ypcm->chip->src441_used == voice->number)) {
537  ypcm->chip->src441_used = voice->number;
538  ypcm->use_441_slot = 1;
539  format |= 0x10000000;
540  }
541  if (ypcm->chip->src441_used == voice->number &&
542  (format & 0x10000000) == 0) {
543  ypcm->chip->src441_used = -1;
544  ypcm->use_441_slot = 0;
545  }
546  if (runtime->channels == 2 && (voiceidx & 1) != 0)
547  format |= 1;
548  spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
549  for (nbank = 0; nbank < 2; nbank++) {
550  bank = &voice->bank[nbank];
551  memset(bank, 0, sizeof(*bank));
552  bank->format = cpu_to_le32(format);
553  bank->base = cpu_to_le32(runtime->dma_addr);
554  bank->loop_end = cpu_to_le32(ypcm->buffer_size);
555  bank->lpfQ = cpu_to_le32(lpfQ);
556  bank->delta =
557  bank->delta_end = cpu_to_le32(delta);
558  bank->lpfK =
559  bank->lpfK_end = cpu_to_le32(lpfK);
560  bank->eg_gain =
561  bank->eg_gain_end = cpu_to_le32(0x40000000);
562 
563  if (ypcm->output_front) {
564  if (use_left) {
565  bank->left_gain =
566  bank->left_gain_end = vol_left;
567  }
568  if (use_right) {
569  bank->right_gain =
570  bank->right_gain_end = vol_right;
571  }
572  }
573  if (ypcm->output_rear) {
574  if (!ypcm->swap_rear) {
575  if (use_left) {
576  bank->eff2_gain =
577  bank->eff2_gain_end = vol_left;
578  }
579  if (use_right) {
580  bank->eff3_gain =
581  bank->eff3_gain_end = vol_right;
582  }
583  } else {
584  /* The SPDIF out channels seem to be swapped, so we have
585  * to swap them here, too. The rear analog out channels
586  * will be wrong, but otherwise AC3 would not work.
587  */
588  if (use_left) {
589  bank->eff3_gain =
590  bank->eff3_gain_end = vol_left;
591  }
592  if (use_right) {
593  bank->eff2_gain =
594  bank->eff2_gain_end = vol_right;
595  }
596  }
597  }
598  }
599 }
600 
601 static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
602 {
603  if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
604  4096, &chip->ac3_tmp_base) < 0)
605  return -ENOMEM;
606 
607  chip->bank_effect[3][0]->base =
608  chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
609  chip->bank_effect[3][0]->loop_end =
610  chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
611  chip->bank_effect[4][0]->base =
612  chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
613  chip->bank_effect[4][0]->loop_end =
614  chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
615 
616  spin_lock_irq(&chip->reg_lock);
617  snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
618  snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
619  spin_unlock_irq(&chip->reg_lock);
620  return 0;
621 }
622 
623 static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
624 {
625  spin_lock_irq(&chip->reg_lock);
626  snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
627  snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
628  spin_unlock_irq(&chip->reg_lock);
629  // snd_ymfpci_irq_wait(chip);
630  if (chip->ac3_tmp_base.area) {
631  snd_dma_free_pages(&chip->ac3_tmp_base);
632  chip->ac3_tmp_base.area = NULL;
633  }
634  return 0;
635 }
636 
637 static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
638  struct snd_pcm_hw_params *hw_params)
639 {
640  struct snd_pcm_runtime *runtime = substream->runtime;
641  struct snd_ymfpci_pcm *ypcm = runtime->private_data;
642  int err;
643 
644  if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
645  return err;
646  if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
647  return err;
648  return 0;
649 }
650 
651 static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
652 {
653  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
654  struct snd_pcm_runtime *runtime = substream->runtime;
655  struct snd_ymfpci_pcm *ypcm;
656 
657  if (runtime->private_data == NULL)
658  return 0;
659  ypcm = runtime->private_data;
660 
661  /* wait, until the PCI operations are not finished */
662  snd_ymfpci_irq_wait(chip);
663  snd_pcm_lib_free_pages(substream);
664  if (ypcm->voices[1]) {
665  snd_ymfpci_voice_free(chip, ypcm->voices[1]);
666  ypcm->voices[1] = NULL;
667  }
668  if (ypcm->voices[0]) {
669  snd_ymfpci_voice_free(chip, ypcm->voices[0]);
670  ypcm->voices[0] = NULL;
671  }
672  return 0;
673 }
674 
675 static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
676 {
677  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
678  struct snd_pcm_runtime *runtime = substream->runtime;
679  struct snd_ymfpci_pcm *ypcm = runtime->private_data;
680  struct snd_kcontrol *kctl;
681  unsigned int nvoice;
682 
683  ypcm->period_size = runtime->period_size;
684  ypcm->buffer_size = runtime->buffer_size;
685  ypcm->period_pos = 0;
686  ypcm->last_pos = 0;
687  for (nvoice = 0; nvoice < runtime->channels; nvoice++)
688  snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
689  substream->pcm == chip->pcm);
690 
691  if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
692  kctl = chip->pcm_mixer[substream->number].ctl;
693  kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
694  snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
695  }
696  return 0;
697 }
698 
699 static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
700  struct snd_pcm_hw_params *hw_params)
701 {
702  return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
703 }
704 
705 static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
706 {
707  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
708 
709  /* wait, until the PCI operations are not finished */
710  snd_ymfpci_irq_wait(chip);
711  return snd_pcm_lib_free_pages(substream);
712 }
713 
714 static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
715 {
716  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
717  struct snd_pcm_runtime *runtime = substream->runtime;
718  struct snd_ymfpci_pcm *ypcm = runtime->private_data;
719  struct snd_ymfpci_capture_bank * bank;
720  int nbank;
721  u32 rate, format;
722 
723  ypcm->period_size = runtime->period_size;
724  ypcm->buffer_size = runtime->buffer_size;
725  ypcm->period_pos = 0;
726  ypcm->last_pos = 0;
727  ypcm->shift = 0;
728  rate = ((48000 * 4096) / runtime->rate) - 1;
729  format = 0;
730  if (runtime->channels == 2) {
731  format |= 2;
732  ypcm->shift++;
733  }
734  if (snd_pcm_format_width(runtime->format) == 8)
735  format |= 1;
736  else
737  ypcm->shift++;
738  switch (ypcm->capture_bank_number) {
739  case 0:
740  snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
741  snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
742  break;
743  case 1:
744  snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
745  snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
746  break;
747  }
748  for (nbank = 0; nbank < 2; nbank++) {
749  bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
750  bank->base = cpu_to_le32(runtime->dma_addr);
751  bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
752  bank->start = 0;
753  bank->num_of_loops = 0;
754  }
755  return 0;
756 }
757 
758 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
759 {
760  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
761  struct snd_pcm_runtime *runtime = substream->runtime;
762  struct snd_ymfpci_pcm *ypcm = runtime->private_data;
763  struct snd_ymfpci_voice *voice = ypcm->voices[0];
764 
765  if (!(ypcm->running && voice))
766  return 0;
767  return le32_to_cpu(voice->bank[chip->active_bank].start);
768 }
769 
770 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
771 {
772  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
773  struct snd_pcm_runtime *runtime = substream->runtime;
774  struct snd_ymfpci_pcm *ypcm = runtime->private_data;
775 
776  if (!ypcm->running)
777  return 0;
778  return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
779 }
780 
781 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
782 {
783  wait_queue_t wait;
784  int loops = 4;
785 
786  while (loops-- > 0) {
787  if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
788  continue;
789  init_waitqueue_entry(&wait, current);
790  add_wait_queue(&chip->interrupt_sleep, &wait);
791  atomic_inc(&chip->interrupt_sleep_count);
792  schedule_timeout_uninterruptible(msecs_to_jiffies(50));
793  remove_wait_queue(&chip->interrupt_sleep, &wait);
794  }
795 }
796 
797 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
798 {
799  struct snd_ymfpci *chip = dev_id;
800  u32 status, nvoice, mode;
801  struct snd_ymfpci_voice *voice;
802 
803  status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
804  if (status & 0x80000000) {
805  chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
806  spin_lock(&chip->voice_lock);
807  for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
808  voice = &chip->voices[nvoice];
809  if (voice->interrupt)
810  voice->interrupt(chip, voice);
811  }
812  for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
813  if (chip->capture_substream[nvoice])
814  snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
815  }
816 #if 0
817  for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
818  if (chip->effect_substream[nvoice])
819  snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
820  }
821 #endif
822  spin_unlock(&chip->voice_lock);
823  spin_lock(&chip->reg_lock);
824  snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
825  mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
826  snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
827  spin_unlock(&chip->reg_lock);
828 
829  if (atomic_read(&chip->interrupt_sleep_count)) {
830  atomic_set(&chip->interrupt_sleep_count, 0);
831  wake_up(&chip->interrupt_sleep);
832  }
833  }
834 
835  status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
836  if (status & 1) {
837  if (chip->timer)
838  snd_timer_interrupt(chip->timer, chip->timer_ticks);
839  }
840  snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
841 
842  if (chip->rawmidi)
843  snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
844  return IRQ_HANDLED;
845 }
846 
847 static struct snd_pcm_hardware snd_ymfpci_playback =
848 {
849  .info = (SNDRV_PCM_INFO_MMAP |
850  SNDRV_PCM_INFO_MMAP_VALID |
851  SNDRV_PCM_INFO_INTERLEAVED |
852  SNDRV_PCM_INFO_BLOCK_TRANSFER |
853  SNDRV_PCM_INFO_PAUSE |
854  SNDRV_PCM_INFO_RESUME),
855  .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
856  .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
857  .rate_min = 8000,
858  .rate_max = 48000,
859  .channels_min = 1,
860  .channels_max = 2,
861  .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
862  .period_bytes_min = 64,
863  .period_bytes_max = 256 * 1024, /* FIXME: enough? */
864  .periods_min = 3,
865  .periods_max = 1024,
866  .fifo_size = 0,
867 };
868 
869 static struct snd_pcm_hardware snd_ymfpci_capture =
870 {
871  .info = (SNDRV_PCM_INFO_MMAP |
872  SNDRV_PCM_INFO_MMAP_VALID |
873  SNDRV_PCM_INFO_INTERLEAVED |
874  SNDRV_PCM_INFO_BLOCK_TRANSFER |
875  SNDRV_PCM_INFO_PAUSE |
876  SNDRV_PCM_INFO_RESUME),
877  .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
878  .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
879  .rate_min = 8000,
880  .rate_max = 48000,
881  .channels_min = 1,
882  .channels_max = 2,
883  .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
884  .period_bytes_min = 64,
885  .period_bytes_max = 256 * 1024, /* FIXME: enough? */
886  .periods_min = 3,
887  .periods_max = 1024,
888  .fifo_size = 0,
889 };
890 
891 static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
892 {
893  kfree(runtime->private_data);
894 }
895 
896 static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
897 {
898  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
899  struct snd_pcm_runtime *runtime = substream->runtime;
900  struct snd_ymfpci_pcm *ypcm;
901  int err;
902 
903  runtime->hw = snd_ymfpci_playback;
904  /* FIXME? True value is 256/48 = 5.33333 ms */
905  err = snd_pcm_hw_constraint_minmax(runtime,
906  SNDRV_PCM_HW_PARAM_PERIOD_TIME,
907  5334, UINT_MAX);
908  if (err < 0)
909  return err;
910  err = snd_pcm_hw_rule_noresample(runtime, 48000);
911  if (err < 0)
912  return err;
913 
914  ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
915  if (ypcm == NULL)
916  return -ENOMEM;
917  ypcm->chip = chip;
918  ypcm->type = PLAYBACK_VOICE;
919  ypcm->substream = substream;
920  runtime->private_data = ypcm;
921  runtime->private_free = snd_ymfpci_pcm_free_substream;
922  return 0;
923 }
924 
925 /* call with spinlock held */
926 static void ymfpci_open_extension(struct snd_ymfpci *chip)
927 {
928  if (! chip->rear_opened) {
929  if (! chip->spdif_opened) /* set AC3 */
930  snd_ymfpci_writel(chip, YDSXGR_MODE,
931  snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
932  /* enable second codec (4CHEN) */
933  snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
934  (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
935  }
936 }
937 
938 /* call with spinlock held */
939 static void ymfpci_close_extension(struct snd_ymfpci *chip)
940 {
941  if (! chip->rear_opened) {
942  if (! chip->spdif_opened)
943  snd_ymfpci_writel(chip, YDSXGR_MODE,
944  snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
945  snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
946  (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
947  }
948 }
949 
950 static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
951 {
952  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
953  struct snd_pcm_runtime *runtime = substream->runtime;
954  struct snd_ymfpci_pcm *ypcm;
955  int err;
956 
957  if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
958  return err;
959  ypcm = runtime->private_data;
960  ypcm->output_front = 1;
961  ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
962  ypcm->swap_rear = 0;
963  spin_lock_irq(&chip->reg_lock);
964  if (ypcm->output_rear) {
965  ymfpci_open_extension(chip);
966  chip->rear_opened++;
967  }
968  spin_unlock_irq(&chip->reg_lock);
969  return 0;
970 }
971 
972 static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
973 {
974  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
975  struct snd_pcm_runtime *runtime = substream->runtime;
976  struct snd_ymfpci_pcm *ypcm;
977  int err;
978 
979  if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
980  return err;
981  ypcm = runtime->private_data;
982  ypcm->output_front = 0;
983  ypcm->output_rear = 1;
984  ypcm->swap_rear = 1;
985  spin_lock_irq(&chip->reg_lock);
986  snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
987  snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
988  ymfpci_open_extension(chip);
989  chip->spdif_pcm_bits = chip->spdif_bits;
990  snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
991  chip->spdif_opened++;
992  spin_unlock_irq(&chip->reg_lock);
993 
994  chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
995  snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
996  SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
997  return 0;
998 }
999 
1000 static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1001 {
1002  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1003  struct snd_pcm_runtime *runtime = substream->runtime;
1004  struct snd_ymfpci_pcm *ypcm;
1005  int err;
1006 
1007  if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
1008  return err;
1009  ypcm = runtime->private_data;
1010  ypcm->output_front = 0;
1011  ypcm->output_rear = 1;
1012  ypcm->swap_rear = 0;
1013  spin_lock_irq(&chip->reg_lock);
1014  ymfpci_open_extension(chip);
1015  chip->rear_opened++;
1016  spin_unlock_irq(&chip->reg_lock);
1017  return 0;
1018 }
1019 
1020 static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1021  u32 capture_bank_number)
1022 {
1023  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1024  struct snd_pcm_runtime *runtime = substream->runtime;
1025  struct snd_ymfpci_pcm *ypcm;
1026  int err;
1027 
1028  runtime->hw = snd_ymfpci_capture;
1029  /* FIXME? True value is 256/48 = 5.33333 ms */
1030  err = snd_pcm_hw_constraint_minmax(runtime,
1031  SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1032  5334, UINT_MAX);
1033  if (err < 0)
1034  return err;
1035  err = snd_pcm_hw_rule_noresample(runtime, 48000);
1036  if (err < 0)
1037  return err;
1038 
1039  ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1040  if (ypcm == NULL)
1041  return -ENOMEM;
1042  ypcm->chip = chip;
1043  ypcm->type = capture_bank_number + CAPTURE_REC;
1044  ypcm->substream = substream;
1045  ypcm->capture_bank_number = capture_bank_number;
1046  chip->capture_substream[capture_bank_number] = substream;
1047  runtime->private_data = ypcm;
1048  runtime->private_free = snd_ymfpci_pcm_free_substream;
1049  snd_ymfpci_hw_start(chip);
1050  return 0;
1051 }
1052 
1053 static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1054 {
1055  return snd_ymfpci_capture_open(substream, 0);
1056 }
1057 
1058 static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1059 {
1060  return snd_ymfpci_capture_open(substream, 1);
1061 }
1062 
1063 static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1064 {
1065  return 0;
1066 }
1067 
1068 static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1069 {
1070  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1071  struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1072 
1073  spin_lock_irq(&chip->reg_lock);
1074  if (ypcm->output_rear && chip->rear_opened > 0) {
1075  chip->rear_opened--;
1076  ymfpci_close_extension(chip);
1077  }
1078  spin_unlock_irq(&chip->reg_lock);
1079  return snd_ymfpci_playback_close_1(substream);
1080 }
1081 
1082 static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1083 {
1084  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1085 
1086  spin_lock_irq(&chip->reg_lock);
1087  chip->spdif_opened = 0;
1088  ymfpci_close_extension(chip);
1089  snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1090  snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1091  snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1092  spin_unlock_irq(&chip->reg_lock);
1093  chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1094  snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1095  SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1096  return snd_ymfpci_playback_close_1(substream);
1097 }
1098 
1099 static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1100 {
1101  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1102 
1103  spin_lock_irq(&chip->reg_lock);
1104  if (chip->rear_opened > 0) {
1105  chip->rear_opened--;
1106  ymfpci_close_extension(chip);
1107  }
1108  spin_unlock_irq(&chip->reg_lock);
1109  return snd_ymfpci_playback_close_1(substream);
1110 }
1111 
1112 static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1113 {
1114  struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1115  struct snd_pcm_runtime *runtime = substream->runtime;
1116  struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1117 
1118  if (ypcm != NULL) {
1119  chip->capture_substream[ypcm->capture_bank_number] = NULL;
1120  snd_ymfpci_hw_stop(chip);
1121  }
1122  return 0;
1123 }
1124 
1125 static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1126  .open = snd_ymfpci_playback_open,
1127  .close = snd_ymfpci_playback_close,
1128  .ioctl = snd_pcm_lib_ioctl,
1129  .hw_params = snd_ymfpci_playback_hw_params,
1130  .hw_free = snd_ymfpci_playback_hw_free,
1131  .prepare = snd_ymfpci_playback_prepare,
1132  .trigger = snd_ymfpci_playback_trigger,
1133  .pointer = snd_ymfpci_playback_pointer,
1134 };
1135 
1136 static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1137  .open = snd_ymfpci_capture_rec_open,
1138  .close = snd_ymfpci_capture_close,
1139  .ioctl = snd_pcm_lib_ioctl,
1140  .hw_params = snd_ymfpci_capture_hw_params,
1141  .hw_free = snd_ymfpci_capture_hw_free,
1142  .prepare = snd_ymfpci_capture_prepare,
1143  .trigger = snd_ymfpci_capture_trigger,
1144  .pointer = snd_ymfpci_capture_pointer,
1145 };
1146 
1147 int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1148 {
1149  struct snd_pcm *pcm;
1150  int err;
1151 
1152  if (rpcm)
1153  *rpcm = NULL;
1154  if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1155  return err;
1156  pcm->private_data = chip;
1157 
1158  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1159  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1160 
1161  /* global setup */
1162  pcm->info_flags = 0;
1163  strcpy(pcm->name, "YMFPCI");
1164  chip->pcm = pcm;
1165 
1166  snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1167  snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1168 
1169  err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1170  snd_pcm_std_chmaps, 2, 0, NULL);
1171  if (err < 0)
1172  return err;
1173 
1174  if (rpcm)
1175  *rpcm = pcm;
1176  return 0;
1177 }
1178 
1179 static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1180  .open = snd_ymfpci_capture_ac97_open,
1181  .close = snd_ymfpci_capture_close,
1182  .ioctl = snd_pcm_lib_ioctl,
1183  .hw_params = snd_ymfpci_capture_hw_params,
1184  .hw_free = snd_ymfpci_capture_hw_free,
1185  .prepare = snd_ymfpci_capture_prepare,
1186  .trigger = snd_ymfpci_capture_trigger,
1187  .pointer = snd_ymfpci_capture_pointer,
1188 };
1189 
1190 int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1191 {
1192  struct snd_pcm *pcm;
1193  int err;
1194 
1195  if (rpcm)
1196  *rpcm = NULL;
1197  if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1198  return err;
1199  pcm->private_data = chip;
1200 
1201  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1202 
1203  /* global setup */
1204  pcm->info_flags = 0;
1205  sprintf(pcm->name, "YMFPCI - %s",
1206  chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1207  chip->pcm2 = pcm;
1208 
1209  snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1210  snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1211 
1212  if (rpcm)
1213  *rpcm = pcm;
1214  return 0;
1215 }
1216 
1217 static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1218  .open = snd_ymfpci_playback_spdif_open,
1219  .close = snd_ymfpci_playback_spdif_close,
1220  .ioctl = snd_pcm_lib_ioctl,
1221  .hw_params = snd_ymfpci_playback_hw_params,
1222  .hw_free = snd_ymfpci_playback_hw_free,
1223  .prepare = snd_ymfpci_playback_prepare,
1224  .trigger = snd_ymfpci_playback_trigger,
1225  .pointer = snd_ymfpci_playback_pointer,
1226 };
1227 
1228 int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1229 {
1230  struct snd_pcm *pcm;
1231  int err;
1232 
1233  if (rpcm)
1234  *rpcm = NULL;
1235  if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1236  return err;
1237  pcm->private_data = chip;
1238 
1239  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1240 
1241  /* global setup */
1242  pcm->info_flags = 0;
1243  strcpy(pcm->name, "YMFPCI - IEC958");
1244  chip->pcm_spdif = pcm;
1245 
1246  snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1247  snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1248 
1249  if (rpcm)
1250  *rpcm = pcm;
1251  return 0;
1252 }
1253 
1254 static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1255  .open = snd_ymfpci_playback_4ch_open,
1256  .close = snd_ymfpci_playback_4ch_close,
1257  .ioctl = snd_pcm_lib_ioctl,
1258  .hw_params = snd_ymfpci_playback_hw_params,
1259  .hw_free = snd_ymfpci_playback_hw_free,
1260  .prepare = snd_ymfpci_playback_prepare,
1261  .trigger = snd_ymfpci_playback_trigger,
1262  .pointer = snd_ymfpci_playback_pointer,
1263 };
1264 
1265 static const struct snd_pcm_chmap_elem surround_map[] = {
1266  { .channels = 1,
1267  .map = { SNDRV_CHMAP_MONO } },
1268  { .channels = 2,
1269  .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1270  { }
1271 };
1272 
1273 int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
1274 {
1275  struct snd_pcm *pcm;
1276  int err;
1277 
1278  if (rpcm)
1279  *rpcm = NULL;
1280  if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1281  return err;
1282  pcm->private_data = chip;
1283 
1284  snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1285 
1286  /* global setup */
1287  pcm->info_flags = 0;
1288  strcpy(pcm->name, "YMFPCI - Rear PCM");
1289  chip->pcm_4ch = pcm;
1290 
1291  snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1292  snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1293 
1294  err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1295  surround_map, 2, 0, NULL);
1296  if (err < 0)
1297  return err;
1298 
1299  if (rpcm)
1300  *rpcm = pcm;
1301  return 0;
1302 }
1303 
1304 static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1305 {
1306  uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1307  uinfo->count = 1;
1308  return 0;
1309 }
1310 
1311 static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1312  struct snd_ctl_elem_value *ucontrol)
1313 {
1314  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1315 
1316  spin_lock_irq(&chip->reg_lock);
1317  ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1318  ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1319  ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1320  spin_unlock_irq(&chip->reg_lock);
1321  return 0;
1322 }
1323 
1324 static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1325  struct snd_ctl_elem_value *ucontrol)
1326 {
1327  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1328  unsigned int val;
1329  int change;
1330 
1331  val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1332  (ucontrol->value.iec958.status[1] << 8);
1333  spin_lock_irq(&chip->reg_lock);
1334  change = chip->spdif_bits != val;
1335  chip->spdif_bits = val;
1336  if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1337  snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1338  spin_unlock_irq(&chip->reg_lock);
1339  return change;
1340 }
1341 
1342 static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
1343 {
1344  .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1345  .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1346  .info = snd_ymfpci_spdif_default_info,
1347  .get = snd_ymfpci_spdif_default_get,
1348  .put = snd_ymfpci_spdif_default_put
1349 };
1350 
1351 static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1352 {
1353  uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1354  uinfo->count = 1;
1355  return 0;
1356 }
1357 
1358 static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1359  struct snd_ctl_elem_value *ucontrol)
1360 {
1361  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1362 
1363  spin_lock_irq(&chip->reg_lock);
1364  ucontrol->value.iec958.status[0] = 0x3e;
1365  ucontrol->value.iec958.status[1] = 0xff;
1366  spin_unlock_irq(&chip->reg_lock);
1367  return 0;
1368 }
1369 
1370 static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
1371 {
1372  .access = SNDRV_CTL_ELEM_ACCESS_READ,
1373  .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1374  .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1375  .info = snd_ymfpci_spdif_mask_info,
1376  .get = snd_ymfpci_spdif_mask_get,
1377 };
1378 
1379 static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1380 {
1381  uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1382  uinfo->count = 1;
1383  return 0;
1384 }
1385 
1386 static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1387  struct snd_ctl_elem_value *ucontrol)
1388 {
1389  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1390 
1391  spin_lock_irq(&chip->reg_lock);
1392  ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1393  ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1394  ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1395  spin_unlock_irq(&chip->reg_lock);
1396  return 0;
1397 }
1398 
1399 static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1400  struct snd_ctl_elem_value *ucontrol)
1401 {
1402  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1403  unsigned int val;
1404  int change;
1405 
1406  val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1407  (ucontrol->value.iec958.status[1] << 8);
1408  spin_lock_irq(&chip->reg_lock);
1409  change = chip->spdif_pcm_bits != val;
1410  chip->spdif_pcm_bits = val;
1411  if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1412  snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1413  spin_unlock_irq(&chip->reg_lock);
1414  return change;
1415 }
1416 
1417 static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
1418 {
1419  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1420  .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1421  .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1422  .info = snd_ymfpci_spdif_stream_info,
1423  .get = snd_ymfpci_spdif_stream_get,
1424  .put = snd_ymfpci_spdif_stream_put
1425 };
1426 
1427 static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1428 {
1429  static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1430 
1431  return snd_ctl_enum_info(info, 1, 3, texts);
1432 }
1433 
1434 static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1435 {
1436  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1437  u16 reg;
1438 
1439  spin_lock_irq(&chip->reg_lock);
1440  reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1441  spin_unlock_irq(&chip->reg_lock);
1442  if (!(reg & 0x100))
1443  value->value.enumerated.item[0] = 0;
1444  else
1445  value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1446  return 0;
1447 }
1448 
1449 static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1450 {
1451  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1452  u16 reg, old_reg;
1453 
1454  spin_lock_irq(&chip->reg_lock);
1455  old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1456  if (value->value.enumerated.item[0] == 0)
1457  reg = old_reg & ~0x100;
1458  else
1459  reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1460  snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1461  spin_unlock_irq(&chip->reg_lock);
1462  return reg != old_reg;
1463 }
1464 
1465 static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
1466  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1467  .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1468  .name = "Direct Recording Source",
1469  .info = snd_ymfpci_drec_source_info,
1470  .get = snd_ymfpci_drec_source_get,
1471  .put = snd_ymfpci_drec_source_put
1472 };
1473 
1474 /*
1475  * Mixer controls
1476  */
1477 
1478 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1479 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1480  .info = snd_ymfpci_info_single, \
1481  .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1482  .private_value = ((reg) | ((shift) << 16)) }
1483 
1484 #define snd_ymfpci_info_single snd_ctl_boolean_mono_info
1485 
1486 static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1487  struct snd_ctl_elem_value *ucontrol)
1488 {
1489  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1490  int reg = kcontrol->private_value & 0xffff;
1491  unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1492  unsigned int mask = 1;
1493 
1494  switch (reg) {
1495  case YDSXGR_SPDIFOUTCTRL: break;
1496  case YDSXGR_SPDIFINCTRL: break;
1497  default: return -EINVAL;
1498  }
1499  ucontrol->value.integer.value[0] =
1500  (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1501  return 0;
1502 }
1503 
1504 static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1505  struct snd_ctl_elem_value *ucontrol)
1506 {
1507  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1508  int reg = kcontrol->private_value & 0xffff;
1509  unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1510  unsigned int mask = 1;
1511  int change;
1512  unsigned int val, oval;
1513 
1514  switch (reg) {
1515  case YDSXGR_SPDIFOUTCTRL: break;
1516  case YDSXGR_SPDIFINCTRL: break;
1517  default: return -EINVAL;
1518  }
1519  val = (ucontrol->value.integer.value[0] & mask);
1520  val <<= shift;
1521  spin_lock_irq(&chip->reg_lock);
1522  oval = snd_ymfpci_readl(chip, reg);
1523  val = (oval & ~(mask << shift)) | val;
1524  change = val != oval;
1525  snd_ymfpci_writel(chip, reg, val);
1526  spin_unlock_irq(&chip->reg_lock);
1527  return change;
1528 }
1529 
1530 static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1531 
1532 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1533 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1534  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1535  .info = snd_ymfpci_info_double, \
1536  .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1537  .private_value = reg, \
1538  .tlv = { .p = db_scale_native } }
1539 
1540 static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1541 {
1542  unsigned int reg = kcontrol->private_value;
1543 
1544  if (reg < 0x80 || reg >= 0xc0)
1545  return -EINVAL;
1546  uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1547  uinfo->count = 2;
1548  uinfo->value.integer.min = 0;
1549  uinfo->value.integer.max = 16383;
1550  return 0;
1551 }
1552 
1553 static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1554 {
1555  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1556  unsigned int reg = kcontrol->private_value;
1557  unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1558  unsigned int val;
1559 
1560  if (reg < 0x80 || reg >= 0xc0)
1561  return -EINVAL;
1562  spin_lock_irq(&chip->reg_lock);
1563  val = snd_ymfpci_readl(chip, reg);
1564  spin_unlock_irq(&chip->reg_lock);
1565  ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1566  ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1567  return 0;
1568 }
1569 
1570 static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1571 {
1572  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1573  unsigned int reg = kcontrol->private_value;
1574  unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1575  int change;
1576  unsigned int val1, val2, oval;
1577 
1578  if (reg < 0x80 || reg >= 0xc0)
1579  return -EINVAL;
1580  val1 = ucontrol->value.integer.value[0] & mask;
1581  val2 = ucontrol->value.integer.value[1] & mask;
1582  val1 <<= shift_left;
1583  val2 <<= shift_right;
1584  spin_lock_irq(&chip->reg_lock);
1585  oval = snd_ymfpci_readl(chip, reg);
1586  val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1587  change = val1 != oval;
1588  snd_ymfpci_writel(chip, reg, val1);
1589  spin_unlock_irq(&chip->reg_lock);
1590  return change;
1591 }
1592 
1593 static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1594  struct snd_ctl_elem_value *ucontrol)
1595 {
1596  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1597  unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1598  unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1599  int change;
1600  unsigned int value, oval;
1601 
1602  value = ucontrol->value.integer.value[0] & 0x3fff;
1603  value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1604  spin_lock_irq(&chip->reg_lock);
1605  oval = snd_ymfpci_readl(chip, reg);
1606  change = value != oval;
1607  snd_ymfpci_writel(chip, reg, value);
1608  snd_ymfpci_writel(chip, reg2, value);
1609  spin_unlock_irq(&chip->reg_lock);
1610  return change;
1611 }
1612 
1613 /*
1614  * 4ch duplication
1615  */
1616 #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
1617 
1618 static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1619 {
1620  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1621  ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1622  return 0;
1623 }
1624 
1625 static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1626 {
1627  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1628  int change;
1629  change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1630  if (change)
1631  chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1632  return change;
1633 }
1634 
1635 static struct snd_kcontrol_new snd_ymfpci_dup4ch __devinitdata = {
1636  .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1637  .name = "4ch Duplication",
1638  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1639  .info = snd_ymfpci_info_dup4ch,
1640  .get = snd_ymfpci_get_dup4ch,
1641  .put = snd_ymfpci_put_dup4ch,
1642 };
1643 
1644 static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
1645 {
1646  .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1647  .name = "Wave Playback Volume",
1648  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1649  SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1650  .info = snd_ymfpci_info_double,
1651  .get = snd_ymfpci_get_double,
1652  .put = snd_ymfpci_put_nativedacvol,
1653  .private_value = YDSXGR_NATIVEDACOUTVOL,
1654  .tlv = { .p = db_scale_native },
1655 },
1656 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1657 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1658 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1659 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1660 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1661 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1662 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1663 YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1664 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1665 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1666 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1667 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1668 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1669 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1670 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1671 };
1672 
1673 
1674 /*
1675  * GPIO
1676  */
1677 
1678 static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1679 {
1680  u16 reg, mode;
1681  unsigned long flags;
1682 
1683  spin_lock_irqsave(&chip->reg_lock, flags);
1684  reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1685  reg &= ~(1 << (pin + 8));
1686  reg |= (1 << pin);
1687  snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1688  /* set the level mode for input line */
1689  mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1690  mode &= ~(3 << (pin * 2));
1691  snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1692  snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1693  mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1694  spin_unlock_irqrestore(&chip->reg_lock, flags);
1695  return (mode >> pin) & 1;
1696 }
1697 
1698 static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1699 {
1700  u16 reg;
1701  unsigned long flags;
1702 
1703  spin_lock_irqsave(&chip->reg_lock, flags);
1704  reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1705  reg &= ~(1 << pin);
1706  reg &= ~(1 << (pin + 8));
1707  snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1708  snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1709  snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1710  spin_unlock_irqrestore(&chip->reg_lock, flags);
1711 
1712  return 0;
1713 }
1714 
1715 #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
1716 
1717 static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1718 {
1719  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1720  int pin = (int)kcontrol->private_value;
1721  ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1722  return 0;
1723 }
1724 
1725 static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1726 {
1727  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1728  int pin = (int)kcontrol->private_value;
1729 
1730  if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1731  snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1732  ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1733  return 1;
1734  }
1735  return 0;
1736 }
1737 
1738 static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
1739  .name = "Shared Rear/Line-In Switch",
1740  .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1741  .info = snd_ymfpci_gpio_sw_info,
1742  .get = snd_ymfpci_gpio_sw_get,
1743  .put = snd_ymfpci_gpio_sw_put,
1744  .private_value = 2,
1745 };
1746 
1747 /*
1748  * PCM voice volume
1749  */
1750 
1751 static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1752  struct snd_ctl_elem_info *uinfo)
1753 {
1754  uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1755  uinfo->count = 2;
1756  uinfo->value.integer.min = 0;
1757  uinfo->value.integer.max = 0x8000;
1758  return 0;
1759 }
1760 
1761 static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1762  struct snd_ctl_elem_value *ucontrol)
1763 {
1764  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1765  unsigned int subs = kcontrol->id.subdevice;
1766 
1767  ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1768  ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1769  return 0;
1770 }
1771 
1772 static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1773  struct snd_ctl_elem_value *ucontrol)
1774 {
1775  struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1776  unsigned int subs = kcontrol->id.subdevice;
1777  struct snd_pcm_substream *substream;
1778  unsigned long flags;
1779 
1780  if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1781  ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1782  chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1783  chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1784  if (chip->pcm_mixer[subs].left > 0x8000)
1785  chip->pcm_mixer[subs].left = 0x8000;
1786  if (chip->pcm_mixer[subs].right > 0x8000)
1787  chip->pcm_mixer[subs].right = 0x8000;
1788 
1789  substream = (struct snd_pcm_substream *)kcontrol->private_value;
1790  spin_lock_irqsave(&chip->voice_lock, flags);
1791  if (substream->runtime && substream->runtime->private_data) {
1792  struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1793  if (!ypcm->use_441_slot)
1794  ypcm->update_pcm_vol = 2;
1795  }
1796  spin_unlock_irqrestore(&chip->voice_lock, flags);
1797  return 1;
1798  }
1799  return 0;
1800 }
1801 
1802 static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
1803  .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1804  .name = "PCM Playback Volume",
1805  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1806  SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1807  .info = snd_ymfpci_pcm_vol_info,
1808  .get = snd_ymfpci_pcm_vol_get,
1809  .put = snd_ymfpci_pcm_vol_put,
1810 };
1811 
1812 
1813 /*
1814  * Mixer routines
1815  */
1816 
1817 static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1818 {
1819  struct snd_ymfpci *chip = bus->private_data;
1820  chip->ac97_bus = NULL;
1821 }
1822 
1823 static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1824 {
1825  struct snd_ymfpci *chip = ac97->private_data;
1826  chip->ac97 = NULL;
1827 }
1828 
1829 int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1830 {
1831  struct snd_ac97_template ac97;
1832  struct snd_kcontrol *kctl;
1833  struct snd_pcm_substream *substream;
1834  unsigned int idx;
1835  int err;
1836  static struct snd_ac97_bus_ops ops = {
1837  .write = snd_ymfpci_codec_write,
1838  .read = snd_ymfpci_codec_read,
1839  };
1840 
1841  if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1842  return err;
1843  chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1844  chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1845 
1846  memset(&ac97, 0, sizeof(ac97));
1847  ac97.private_data = chip;
1848  ac97.private_free = snd_ymfpci_mixer_free_ac97;
1849  if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1850  return err;
1851 
1852  /* to be sure */
1853  snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1854  AC97_EA_VRA|AC97_EA_VRM, 0);
1855 
1856  for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1857  if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1858  return err;
1859  }
1860  if (chip->ac97->ext_id & AC97_EI_SDAC) {
1861  kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1862  err = snd_ctl_add(chip->card, kctl);
1863  if (err < 0)
1864  return err;
1865  }
1866 
1867  /* add S/PDIF control */
1868  if (snd_BUG_ON(!chip->pcm_spdif))
1869  return -ENXIO;
1870  if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1871  return err;
1872  kctl->id.device = chip->pcm_spdif->device;
1873  if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1874  return err;
1875  kctl->id.device = chip->pcm_spdif->device;
1876  if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1877  return err;
1878  kctl->id.device = chip->pcm_spdif->device;
1879  chip->spdif_pcm_ctl = kctl;
1880 
1881  /* direct recording source */
1882  if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1883  (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1884  return err;
1885 
1886  /*
1887  * shared rear/line-in
1888  */
1889  if (rear_switch) {
1890  if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1891  return err;
1892  }
1893 
1894  /* per-voice volume */
1895  substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1896  for (idx = 0; idx < 32; ++idx) {
1897  kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1898  if (!kctl)
1899  return -ENOMEM;
1900  kctl->id.device = chip->pcm->device;
1901  kctl->id.subdevice = idx;
1902  kctl->private_value = (unsigned long)substream;
1903  if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1904  return err;
1905  chip->pcm_mixer[idx].left = 0x8000;
1906  chip->pcm_mixer[idx].right = 0x8000;
1907  chip->pcm_mixer[idx].ctl = kctl;
1908  substream = substream->next;
1909  }
1910 
1911  return 0;
1912 }
1913 
1914 
1915 /*
1916  * timer
1917  */
1918 
1919 static int snd_ymfpci_timer_start(struct snd_timer *timer)
1920 {
1921  struct snd_ymfpci *chip;
1922  unsigned long flags;
1923  unsigned int count;
1924 
1925  chip = snd_timer_chip(timer);
1926  spin_lock_irqsave(&chip->reg_lock, flags);
1927  if (timer->sticks > 1) {
1928  chip->timer_ticks = timer->sticks;
1929  count = timer->sticks - 1;
1930  } else {
1931  /*
1932  * Divisor 1 is not allowed; fake it by using divisor 2 and
1933  * counting two ticks for each interrupt.
1934  */
1935  chip->timer_ticks = 2;
1936  count = 2 - 1;
1937  }
1938  snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1939  snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1940  spin_unlock_irqrestore(&chip->reg_lock, flags);
1941  return 0;
1942 }
1943 
1944 static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1945 {
1946  struct snd_ymfpci *chip;
1947  unsigned long flags;
1948 
1949  chip = snd_timer_chip(timer);
1950  spin_lock_irqsave(&chip->reg_lock, flags);
1951  snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1952  spin_unlock_irqrestore(&chip->reg_lock, flags);
1953  return 0;
1954 }
1955 
1956 static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1957  unsigned long *num, unsigned long *den)
1958 {
1959  *num = 1;
1960  *den = 96000;
1961  return 0;
1962 }
1963 
1964 static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1965  .flags = SNDRV_TIMER_HW_AUTO,
1966  .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1967  .ticks = 0x10000,
1968  .start = snd_ymfpci_timer_start,
1969  .stop = snd_ymfpci_timer_stop,
1970  .precise_resolution = snd_ymfpci_timer_precise_resolution,
1971 };
1972 
1973 int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1974 {
1975  struct snd_timer *timer = NULL;
1976  struct snd_timer_id tid;
1977  int err;
1978 
1979  tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1980  tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1981  tid.card = chip->card->number;
1982  tid.device = device;
1983  tid.subdevice = 0;
1984  if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1985  strcpy(timer->name, "YMFPCI timer");
1986  timer->private_data = chip;
1987  timer->hw = snd_ymfpci_timer_hw;
1988  }
1989  chip->timer = timer;
1990  return err;
1991 }
1992 
1993 
1994 /*
1995  * proc interface
1996  */
1997 
1998 static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1999  struct snd_info_buffer *buffer)
2000 {
2001  struct snd_ymfpci *chip = entry->private_data;
2002  int i;
2003 
2004  snd_iprintf(buffer, "YMFPCI\n\n");
2005  for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
2006  snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
2007 }
2008 
2009 static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
2010 {
2011  struct snd_info_entry *entry;
2012 
2013  if (! snd_card_proc_new(card, "ymfpci", &entry))
2014  snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
2015  return 0;
2016 }
2017 
2018 /*
2019  * initialization routines
2020  */
2021 
2022 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
2023 {
2024  u8 cmd;
2025 
2026  pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
2027 #if 0 // force to reset
2028  if (cmd & 0x03) {
2029 #endif
2030  pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2031  pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
2032  pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2033  pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
2034  pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
2035 #if 0
2036  }
2037 #endif
2038 }
2039 
2040 static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
2041 {
2042  snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
2043 }
2044 
2045 static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
2046 {
2047  u32 val;
2048  int timeout = 1000;
2049 
2050  val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2051  if (val)
2052  snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2053  while (timeout-- > 0) {
2054  val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2055  if ((val & 0x00000002) == 0)
2056  break;
2057  }
2058 }
2059 
2060 static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2061 {
2062  int err, is_1e;
2063  const char *name;
2064 
2065  err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2066  &chip->pci->dev);
2067  if (err >= 0) {
2068  if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
2069  snd_printk(KERN_ERR "DSP microcode has wrong size\n");
2070  err = -EINVAL;
2071  }
2072  }
2073  if (err < 0)
2074  return err;
2075  is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2076  chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2077  chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2078  chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2079  name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2080  err = request_firmware(&chip->controller_microcode, name,
2081  &chip->pci->dev);
2082  if (err >= 0) {
2083  if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
2084  snd_printk(KERN_ERR "controller microcode"
2085  " has wrong size\n");
2086  err = -EINVAL;
2087  }
2088  }
2089  if (err < 0)
2090  return err;
2091  return 0;
2092 }
2093 
2094 MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2095 MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2096 MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2097 
2098 static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
2099 {
2100  int i;
2101  u16 ctrl;
2102  const __le32 *inst;
2103 
2104  snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2105  snd_ymfpci_disable_dsp(chip);
2106  snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2107  snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2108  snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2109  snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2110  snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2111  snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2112  snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2113  ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2114  snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2115 
2116  /* setup DSP instruction code */
2117  inst = (const __le32 *)chip->dsp_microcode->data;
2118  for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
2119  snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2120  le32_to_cpu(inst[i]));
2121 
2122  /* setup control instruction code */
2123  inst = (const __le32 *)chip->controller_microcode->data;
2124  for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2125  snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2126  le32_to_cpu(inst[i]));
2127 
2128  snd_ymfpci_enable_dsp(chip);
2129 }
2130 
2131 static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
2132 {
2133  long size, playback_ctrl_size;
2134  int voice, bank, reg;
2135  u8 *ptr;
2136  dma_addr_t ptr_addr;
2137 
2138  playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2139  chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2140  chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2141  chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2142  chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2143 
2144  size = ALIGN(playback_ctrl_size, 0x100) +
2145  ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2146  ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2147  ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
2148  chip->work_size;
2149  /* work_ptr must be aligned to 256 bytes, but it's already
2150  covered with the kernel page allocation mechanism */
2151  if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2152  size, &chip->work_ptr) < 0)
2153  return -ENOMEM;
2154  ptr = chip->work_ptr.area;
2155  ptr_addr = chip->work_ptr.addr;
2156  memset(ptr, 0, size); /* for sure */
2157 
2158  chip->bank_base_playback = ptr;
2159  chip->bank_base_playback_addr = ptr_addr;
2160  chip->ctrl_playback = (u32 *)ptr;
2161  chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2162  ptr += ALIGN(playback_ctrl_size, 0x100);
2163  ptr_addr += ALIGN(playback_ctrl_size, 0x100);
2164  for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2165  chip->voices[voice].number = voice;
2166  chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
2167  chip->voices[voice].bank_addr = ptr_addr;
2168  for (bank = 0; bank < 2; bank++) {
2169  chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
2170  ptr += chip->bank_size_playback;
2171  ptr_addr += chip->bank_size_playback;
2172  }
2173  }
2174  ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2175  ptr_addr = ALIGN(ptr_addr, 0x100);
2176  chip->bank_base_capture = ptr;
2177  chip->bank_base_capture_addr = ptr_addr;
2178  for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2179  for (bank = 0; bank < 2; bank++) {
2180  chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
2181  ptr += chip->bank_size_capture;
2182  ptr_addr += chip->bank_size_capture;
2183  }
2184  ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2185  ptr_addr = ALIGN(ptr_addr, 0x100);
2186  chip->bank_base_effect = ptr;
2187  chip->bank_base_effect_addr = ptr_addr;
2188  for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2189  for (bank = 0; bank < 2; bank++) {
2190  chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
2191  ptr += chip->bank_size_effect;
2192  ptr_addr += chip->bank_size_effect;
2193  }
2194  ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2195  ptr_addr = ALIGN(ptr_addr, 0x100);
2196  chip->work_base = ptr;
2197  chip->work_base_addr = ptr_addr;
2198 
2199  snd_BUG_ON(ptr + chip->work_size !=
2200  chip->work_ptr.area + chip->work_ptr.bytes);
2201 
2202  snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2203  snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2204  snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2205  snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2206  snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2207 
2208  /* S/PDIF output initialization */
2209  chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2210  snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2211  snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2212 
2213  /* S/PDIF input initialization */
2214  snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2215 
2216  /* digital mixer setup */
2217  for (reg = 0x80; reg < 0xc0; reg += 4)
2218  snd_ymfpci_writel(chip, reg, 0);
2219  snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2220  snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
2221  snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2222  snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2223  snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2224  snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2225  snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2226  snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2227 
2228  return 0;
2229 }
2230 
2231 static int snd_ymfpci_free(struct snd_ymfpci *chip)
2232 {
2233  u16 ctrl;
2234 
2235  if (snd_BUG_ON(!chip))
2236  return -EINVAL;
2237 
2238  if (chip->res_reg_area) { /* don't touch busy hardware */
2239  snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2240  snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2241  snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2242  snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2243  snd_ymfpci_disable_dsp(chip);
2244  snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2245  snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2246  snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2247  snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2248  snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2249  ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2250  snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2251  }
2252 
2253  snd_ymfpci_ac3_done(chip);
2254 
2255  /* Set PCI device to D3 state */
2256 #if 0
2257  /* FIXME: temporarily disabled, otherwise we cannot fire up
2258  * the chip again unless reboot. ACPI bug?
2259  */
2260  pci_set_power_state(chip->pci, 3);
2261 #endif
2262 
2263 #ifdef CONFIG_PM_SLEEP
2264  vfree(chip->saved_regs);
2265 #endif
2266  if (chip->irq >= 0)
2267  free_irq(chip->irq, chip);
2268  release_and_free_resource(chip->mpu_res);
2269  release_and_free_resource(chip->fm_res);
2270  snd_ymfpci_free_gameport(chip);
2271  if (chip->reg_area_virt)
2272  iounmap(chip->reg_area_virt);
2273  if (chip->work_ptr.area)
2274  snd_dma_free_pages(&chip->work_ptr);
2275 
2276  release_and_free_resource(chip->res_reg_area);
2277 
2278  pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2279 
2280  pci_disable_device(chip->pci);
2281  release_firmware(chip->dsp_microcode);
2282  release_firmware(chip->controller_microcode);
2283  kfree(chip);
2284  return 0;
2285 }
2286 
2287 static int snd_ymfpci_dev_free(struct snd_device *device)
2288 {
2289  struct snd_ymfpci *chip = device->device_data;
2290  return snd_ymfpci_free(chip);
2291 }
2292 
2293 #ifdef CONFIG_PM_SLEEP
2294 static int saved_regs_index[] = {
2295  /* spdif */
2296  YDSXGR_SPDIFOUTCTRL,
2297  YDSXGR_SPDIFOUTSTATUS,
2298  YDSXGR_SPDIFINCTRL,
2299  /* volumes */
2300  YDSXGR_PRIADCLOOPVOL,
2301  YDSXGR_NATIVEDACINVOL,
2302  YDSXGR_NATIVEDACOUTVOL,
2303  YDSXGR_BUF441OUTVOL,
2304  YDSXGR_NATIVEADCINVOL,
2305  YDSXGR_SPDIFLOOPVOL,
2306  YDSXGR_SPDIFOUTVOL,
2307  YDSXGR_ZVOUTVOL,
2308  YDSXGR_LEGACYOUTVOL,
2309  /* address bases */
2310  YDSXGR_PLAYCTRLBASE,
2311  YDSXGR_RECCTRLBASE,
2312  YDSXGR_EFFCTRLBASE,
2313  YDSXGR_WORKBASE,
2314  /* capture set up */
2315  YDSXGR_MAPOFREC,
2316  YDSXGR_RECFORMAT,
2317  YDSXGR_RECSLOTSR,
2318  YDSXGR_ADCFORMAT,
2319  YDSXGR_ADCSLOTSR,
2320 };
2321 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2322 
2323 static int snd_ymfpci_suspend(struct device *dev)
2324 {
2325  struct pci_dev *pci = to_pci_dev(dev);
2326  struct snd_card *card = dev_get_drvdata(dev);
2327  struct snd_ymfpci *chip = card->private_data;
2328  unsigned int i;
2329 
2330  snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2331  snd_pcm_suspend_all(chip->pcm);
2332  snd_pcm_suspend_all(chip->pcm2);
2333  snd_pcm_suspend_all(chip->pcm_spdif);
2334  snd_pcm_suspend_all(chip->pcm_4ch);
2335  snd_ac97_suspend(chip->ac97);
2336  for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2337  chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2338  chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2339  pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY,
2340  &chip->saved_dsxg_legacy);
2341  pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2342  &chip->saved_dsxg_elegacy);
2343  snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2344  snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2345  snd_ymfpci_disable_dsp(chip);
2346  pci_disable_device(pci);
2347  pci_save_state(pci);
2348  pci_set_power_state(pci, PCI_D3hot);
2349  return 0;
2350 }
2351 
2352 static int snd_ymfpci_resume(struct device *dev)
2353 {
2354  struct pci_dev *pci = to_pci_dev(dev);
2355  struct snd_card *card = dev_get_drvdata(dev);
2356  struct snd_ymfpci *chip = card->private_data;
2357  unsigned int i;
2358 
2359  pci_set_power_state(pci, PCI_D0);
2360  pci_restore_state(pci);
2361  if (pci_enable_device(pci) < 0) {
2362  printk(KERN_ERR "ymfpci: pci_enable_device failed, "
2363  "disabling device\n");
2364  snd_card_disconnect(card);
2365  return -EIO;
2366  }
2367  pci_set_master(pci);
2368  snd_ymfpci_aclink_reset(pci);
2369  snd_ymfpci_codec_ready(chip, 0);
2370  snd_ymfpci_download_image(chip);
2371  udelay(100);
2372 
2373  for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2374  snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2375 
2376  snd_ac97_resume(chip->ac97);
2377 
2378  pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY,
2379  chip->saved_dsxg_legacy);
2380  pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2381  chip->saved_dsxg_elegacy);
2382 
2383  /* start hw again */
2384  if (chip->start_count > 0) {
2385  spin_lock_irq(&chip->reg_lock);
2386  snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2387  chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2388  spin_unlock_irq(&chip->reg_lock);
2389  }
2390  snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2391  return 0;
2392 }
2393 
2394 SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
2395 #endif /* CONFIG_PM_SLEEP */
2396 
2397 int __devinit snd_ymfpci_create(struct snd_card *card,
2398  struct pci_dev * pci,
2399  unsigned short old_legacy_ctrl,
2400  struct snd_ymfpci ** rchip)
2401 {
2402  struct snd_ymfpci *chip;
2403  int err;
2404  static struct snd_device_ops ops = {
2405  .dev_free = snd_ymfpci_dev_free,
2406  };
2407 
2408  *rchip = NULL;
2409 
2410  /* enable PCI device */
2411  if ((err = pci_enable_device(pci)) < 0)
2412  return err;
2413 
2414  chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2415  if (chip == NULL) {
2416  pci_disable_device(pci);
2417  return -ENOMEM;
2418  }
2419  chip->old_legacy_ctrl = old_legacy_ctrl;
2420  spin_lock_init(&chip->reg_lock);
2421  spin_lock_init(&chip->voice_lock);
2422  init_waitqueue_head(&chip->interrupt_sleep);
2423  atomic_set(&chip->interrupt_sleep_count, 0);
2424  chip->card = card;
2425  chip->pci = pci;
2426  chip->irq = -1;
2427  chip->device_id = pci->device;
2428  chip->rev = pci->revision;
2429  chip->reg_area_phys = pci_resource_start(pci, 0);
2430  chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2431  pci_set_master(pci);
2432  chip->src441_used = -1;
2433 
2434  if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2435  snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2436  snd_ymfpci_free(chip);
2437  return -EBUSY;
2438  }
2439  if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2440  KBUILD_MODNAME, chip)) {
2441  snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2442  snd_ymfpci_free(chip);
2443  return -EBUSY;
2444  }
2445  chip->irq = pci->irq;
2446 
2447  snd_ymfpci_aclink_reset(pci);
2448  if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2449  snd_ymfpci_free(chip);
2450  return -EIO;
2451  }
2452 
2453  err = snd_ymfpci_request_firmware(chip);
2454  if (err < 0) {
2455  snd_printk(KERN_ERR "firmware request failed: %d\n", err);
2456  snd_ymfpci_free(chip);
2457  return err;
2458  }
2459  snd_ymfpci_download_image(chip);
2460 
2461  udelay(100); /* seems we need a delay after downloading image.. */
2462 
2463  if (snd_ymfpci_memalloc(chip) < 0) {
2464  snd_ymfpci_free(chip);
2465  return -EIO;
2466  }
2467 
2468  if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2469  snd_ymfpci_free(chip);
2470  return err;
2471  }
2472 
2473 #ifdef CONFIG_PM_SLEEP
2474  chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2475  if (chip->saved_regs == NULL) {
2476  snd_ymfpci_free(chip);
2477  return -ENOMEM;
2478  }
2479 #endif
2480 
2481  if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2482  snd_ymfpci_free(chip);
2483  return err;
2484  }
2485 
2486  snd_ymfpci_proc_init(card, chip);
2487 
2488  snd_card_set_dev(card, &pci->dev);
2489 
2490  *rchip = chip;
2491  return 0;
2492 }
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