LLVM API Documentation
00001 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This is an extremely simple MachineInstr-level dead-code-elimination pass. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #include "llvm/CodeGen/Passes.h" 00015 #include "llvm/ADT/Statistic.h" 00016 #include "llvm/CodeGen/MachineFunctionPass.h" 00017 #include "llvm/CodeGen/MachineRegisterInfo.h" 00018 #include "llvm/Pass.h" 00019 #include "llvm/Support/Debug.h" 00020 #include "llvm/Support/raw_ostream.h" 00021 #include "llvm/Target/TargetInstrInfo.h" 00022 #include "llvm/Target/TargetMachine.h" 00023 #include "llvm/Target/TargetSubtargetInfo.h" 00024 00025 using namespace llvm; 00026 00027 #define DEBUG_TYPE "codegen-dce" 00028 00029 STATISTIC(NumDeletes, "Number of dead instructions deleted"); 00030 00031 namespace { 00032 class DeadMachineInstructionElim : public MachineFunctionPass { 00033 bool runOnMachineFunction(MachineFunction &MF) override; 00034 00035 const TargetRegisterInfo *TRI; 00036 const MachineRegisterInfo *MRI; 00037 const TargetInstrInfo *TII; 00038 BitVector LivePhysRegs; 00039 00040 public: 00041 static char ID; // Pass identification, replacement for typeid 00042 DeadMachineInstructionElim() : MachineFunctionPass(ID) { 00043 initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry()); 00044 } 00045 00046 private: 00047 bool isDead(const MachineInstr *MI) const; 00048 }; 00049 } 00050 char DeadMachineInstructionElim::ID = 0; 00051 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID; 00052 00053 INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination", 00054 "Remove dead machine instructions", false, false) 00055 00056 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { 00057 // Technically speaking inline asm without side effects and no defs can still 00058 // be deleted. But there is so much bad inline asm code out there, we should 00059 // let them be. 00060 if (MI->isInlineAsm()) 00061 return false; 00062 00063 // Don't delete instructions with side effects. 00064 bool SawStore = false; 00065 if (!MI->isSafeToMove(TII, nullptr, SawStore) && !MI->isPHI()) 00066 return false; 00067 00068 // Examine each operand. 00069 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 00070 const MachineOperand &MO = MI->getOperand(i); 00071 if (MO.isReg() && MO.isDef()) { 00072 unsigned Reg = MO.getReg(); 00073 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { 00074 // Don't delete live physreg defs, or any reserved register defs. 00075 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg)) 00076 return false; 00077 } else { 00078 if (!MRI->use_nodbg_empty(Reg)) 00079 // This def has a non-debug use. Don't delete the instruction! 00080 return false; 00081 } 00082 } 00083 } 00084 00085 // If there are no defs with uses, the instruction is dead. 00086 return true; 00087 } 00088 00089 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) { 00090 if (skipOptnoneFunction(*MF.getFunction())) 00091 return false; 00092 00093 bool AnyChanges = false; 00094 MRI = &MF.getRegInfo(); 00095 TRI = MF.getSubtarget().getRegisterInfo(); 00096 TII = MF.getSubtarget().getInstrInfo(); 00097 00098 // Loop over all instructions in all blocks, from bottom to top, so that it's 00099 // more likely that chains of dependent but ultimately dead instructions will 00100 // be cleaned up. 00101 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend(); 00102 I != E; ++I) { 00103 MachineBasicBlock *MBB = &*I; 00104 00105 // Start out assuming that reserved registers are live out of this block. 00106 LivePhysRegs = MRI->getReservedRegs(); 00107 00108 // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not 00109 // live across blocks, but some targets (x86) can have flags live out of a 00110 // block. 00111 for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(), 00112 E = MBB->succ_end(); S != E; S++) 00113 for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin(); 00114 LI != (*S)->livein_end(); LI++) 00115 LivePhysRegs.set(*LI); 00116 00117 // Now scan the instructions and delete dead ones, tracking physreg 00118 // liveness as we go. 00119 for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(), 00120 MIE = MBB->rend(); MII != MIE; ) { 00121 MachineInstr *MI = &*MII; 00122 00123 // If the instruction is dead, delete it! 00124 if (isDead(MI)) { 00125 DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI); 00126 // It is possible that some DBG_VALUE instructions refer to this 00127 // instruction. They get marked as undef and will be deleted 00128 // in the live debug variable analysis. 00129 MI->eraseFromParentAndMarkDBGValuesForRemoval(); 00130 AnyChanges = true; 00131 ++NumDeletes; 00132 MIE = MBB->rend(); 00133 // MII is now pointing to the next instruction to process, 00134 // so don't increment it. 00135 continue; 00136 } 00137 00138 // Record the physreg defs. 00139 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 00140 const MachineOperand &MO = MI->getOperand(i); 00141 if (MO.isReg() && MO.isDef()) { 00142 unsigned Reg = MO.getReg(); 00143 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { 00144 // Check the subreg set, not the alias set, because a def 00145 // of a super-register may still be partially live after 00146 // this def. 00147 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true); 00148 SR.isValid(); ++SR) 00149 LivePhysRegs.reset(*SR); 00150 } 00151 } else if (MO.isRegMask()) { 00152 // Register mask of preserved registers. All clobbers are dead. 00153 LivePhysRegs.clearBitsNotInMask(MO.getRegMask()); 00154 } 00155 } 00156 // Record the physreg uses, after the defs, in case a physreg is 00157 // both defined and used in the same instruction. 00158 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 00159 const MachineOperand &MO = MI->getOperand(i); 00160 if (MO.isReg() && MO.isUse()) { 00161 unsigned Reg = MO.getReg(); 00162 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { 00163 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) 00164 LivePhysRegs.set(*AI); 00165 } 00166 } 00167 } 00168 00169 // We didn't delete the current instruction, so increment MII to 00170 // the next one. 00171 ++MII; 00172 } 00173 } 00174 00175 LivePhysRegs.clear(); 00176 return AnyChanges; 00177 }