#include "llvm/PassSupport.h"#include "Hexagon.h"#include "HexagonInstrInfo.h"#include "HexagonMachineFunctionInfo.h"#include "HexagonRegisterInfo.h"#include "HexagonSubtarget.h"#include "HexagonTargetMachine.h"#include "llvm/ADT/DenseMap.h"#include "llvm/ADT/DenseSet.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineFunctionPass.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/Passes.h"#include "llvm/Support/CodeGen.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/raw_ostream.h"#include "llvm/Target/TargetRegisterInfo.h"
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Namespaces | |
| namespace | llvm |
List of target independent CodeGen pass IDs. | |
Defines | |
| #define | DEBUG_TYPE "hexagon-copy-combine" |
Functions | |
| void | llvm::initializeHexagonCopyToCombinePass (PassRegistry &) |
| INITIALIZE_PASS (HexagonCopyToCombine,"hexagon-copy-combine","Hexagon Copy-To-Combine Pass", false, false) static bool isCombinableInstType(MachineInstr *MI | |
| const HexagonInstrInfo bool ShouldCombineAggressively | switch (MI->getOpcode()) |
| static bool | isGreaterThan8BitTFRI (MachineInstr *I) |
| static bool | isGreaterThan6BitTFRI (MachineInstr *I) |
| static bool | areCombinableOperations (const TargetRegisterInfo *TRI, MachineInstr *HighRegInst, MachineInstr *LowRegInst) |
| static bool | isEvenReg (unsigned Reg) |
| static void | removeKillInfo (MachineInstr *MI, unsigned RegNotKilled) |
| static bool | isUnsafeToMoveAcross (MachineInstr *I, unsigned UseReg, unsigned DestReg, const TargetRegisterInfo *TRI) |
Variables | |
| static cl::opt< bool > | IsCombinesDisabled ("disable-merge-into-combines", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable merging into combines")) |
| static cl::opt< unsigned > | MaxNumOfInstsBetweenNewValueStoreAndTFR ("max-num-inst-between-tfr-and-nv-store", cl::Hidden, cl::init(4), cl::desc("Maximum distance between a tfr feeding a store we ""consider the store still to be newifiable")) |
| const HexagonInstrInfo * | TII |
| return | false |
Define Documentation
| #define DEBUG_TYPE "hexagon-copy-combine" |
Definition at line 37 of file HexagonCopyToCombine.cpp.
Function Documentation
| static bool areCombinableOperations | ( | const TargetRegisterInfo * | TRI, |
| MachineInstr * | HighRegInst, | ||
| MachineInstr * | LowRegInst | ||
| ) | [static] |
areCombinableOperations - Returns true if the two instruction can be merge into a combine (ignoring register constraints).
Definition at line 171 of file HexagonCopyToCombine.cpp.
References llvm::MachineInstr::getOpcode(), llvm::HexagonSubtarget::hasV4TOps(), isGreaterThan6BitTFRI(), isGreaterThan8BitTFRI(), and llvm::HexagonRegisterInfo::Subtarget.
| INITIALIZE_PASS | ( | HexagonCopyToCombine | , |
| "hexagon-copy-combine" | , | ||
| "Hexagon Copy-To-Combine Pass" | , | ||
| false | , | ||
| false | |||
| ) |
Definition at line 204 of file HexagonCopyToCombine.cpp.
References contains(), and llvm::TargetRegisterInfo::isPhysicalRegister().
| static bool isGreaterThan6BitTFRI | ( | MachineInstr * | I | ) | [static] |
Definition at line 164 of file HexagonCopyToCombine.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), and llvm::MachineInstr::getOperand().
Referenced by areCombinableOperations().
| static bool isGreaterThan8BitTFRI | ( | MachineInstr * | I | ) | [static] |
Definition at line 160 of file HexagonCopyToCombine.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::isInt< 8 >().
Referenced by areCombinableOperations().
| static bool isUnsafeToMoveAcross | ( | MachineInstr * | I, |
| unsigned | UseReg, | ||
| unsigned | DestReg, | ||
| const TargetRegisterInfo * | TRI | ||
| ) | [static] |
isUnsafeToMoveAcross - Returns true if it is unsafe to move a copy instruction from UseReg to DestReg over the instruction I.
Definition at line 221 of file HexagonCopyToCombine.cpp.
References llvm::MachineInstr::hasUnmodeledSideEffects(), llvm::MachineInstr::isDebugValue(), llvm::MachineInstr::isInlineAsm(), llvm::MachineInstr::modifiesRegister(), and llvm::MachineInstr::readsRegister().
| static void removeKillInfo | ( | MachineInstr * | MI, |
| unsigned | RegNotKilled | ||
| ) | [static] |
Definition at line 210 of file HexagonCopyToCombine.cpp.
References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), I, llvm::MachineOperand::isKill(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::setIsKill().
| const HexagonInstrInfo bool ShouldCombineAggressively switch | ( | MI-> | getOpcode() | ) |
Definition at line 116 of file HexagonCopyToCombine.cpp.
References llvm::isInt< 8 >(), and llvm::HexagonII::MO_NO_FLAG.
Variable Documentation
| return false |
Definition at line 157 of file HexagonCopyToCombine.cpp.
cl::opt<bool> IsCombinesDisabled("disable-merge-into-combines", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable merging into combines")) [static] |
cl::opt<unsigned> MaxNumOfInstsBetweenNewValueStoreAndTFR("max-num-inst-between-tfr-and-nv-store", cl::Hidden, cl::init(4), cl::desc("Maximum distance between a tfr feeding a store we ""consider the store still to be newifiable")) [static] |
Definition at line 114 of file HexagonCopyToCombine.cpp.
Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::X86FrameLowering::adjustForSegmentedStacks(), llvm::MachineBasicBlock::canFallThrough(), llvm::createBURRListDAGScheduler(), llvm::createHybridListDAGScheduler(), llvm::createILPListDAGScheduler(), llvm::createSourceListDAGScheduler(), llvm::Mips16FrameLowering::eliminateCallFramePseudoInstr(), llvm::AArch64FrameLowering::eliminateCallFramePseudoInstr(), llvm::MSP430FrameLowering::eliminateCallFramePseudoInstr(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::Thumb1FrameLowering::eliminateCallFramePseudoInstr(), llvm::PPCFrameLowering::eliminateCallFramePseudoInstr(), llvm::X86FrameLowering::eliminateCallFramePseudoInstr(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::Thumb1RegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::AArch64FrameLowering::emitCalleeSavedFrameMoves(), llvm::X86FrameLowering::emitCalleeSavedFrameMoves(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::Mips16FrameLowering::emitEpilogue(), llvm::HexagonFrameLowering::emitEpilogue(), llvm::MSP430FrameLowering::emitEpilogue(), llvm::Thumb1FrameLowering::emitEpilogue(), llvm::ARMFrameLowering::emitEpilogue(), llvm::XCoreFrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitEpilogue(), llvm::AArch64FrameLowering::emitEpilogue(), llvm::X86FrameLowering::emitEpilogue(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::MSP430TargetLowering::EmitInstrWithCustomInserter(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::Thumb2RegisterInfo::emitLoadConstPool(), llvm::Thumb1RegisterInfo::emitLoadConstPool(), llvm::ARMBaseRegisterInfo::emitLoadConstPool(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::Mips16FrameLowering::emitPrologue(), llvm::HexagonFrameLowering::emitPrologue(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::MSP430FrameLowering::emitPrologue(), llvm::XCoreFrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), llvm::PPCFrameLowering::emitPrologue(), llvm::AArch64FrameLowering::emitPrologue(), llvm::X86FrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), llvm::SparcTargetLowering::expandAtomicRMW(), llvm::SparcTargetLowering::expandSelectCC(), FindCallSeqStart(), FoldOperand(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::ARMHazardRecognizer::getHazardType(), llvm::MSP430InstrInfo::GetInstSizeInBytes(), llvm::SDNode::getOperationName(), llvm::MachineInstr::getRegClassConstraintEffectForVReg(), llvm::R600RegisterInfo::getReservedRegs(), llvm::ARMTargetLowering::getSchedulingPreference(), INITIALIZE_PASS(), IsChainDependent(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::R600TargetLowering::LowerOperation(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), llvm::PPCRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseRegisterInfo::materializeFrameBaseRegister(), MIsNeedChainEdge(), llvm::Mips16FrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::MachineRegisterInfo::recomputeRegClass(), replaceFI(), llvm::Thumb1RegisterInfo::resolveFrameIndex(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::ARMBaseRegisterInfo::resolveFrameIndex(), llvm::SystemZFrameLowering::restoreCalleeSavedRegisters(), llvm::Thumb1FrameLowering::restoreCalleeSavedRegisters(), llvm::XCoreFrameLowering::restoreCalleeSavedRegisters(), llvm::HexagonFrameLowering::restoreCalleeSavedRegisters(), llvm::MSP430FrameLowering::restoreCalleeSavedRegisters(), llvm::AArch64FrameLowering::restoreCalleeSavedRegisters(), llvm::PPCFrameLowering::restoreCalleeSavedRegisters(), llvm::X86FrameLowering::restoreCalleeSavedRegisters(), restoreCRs(), llvm::rewriteAArch64FrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::VirtRegMap::runOnMachineFunction(), llvm::MachineTraceMetrics::runOnMachineFunction(), llvm::Mips16RegisterInfo::saveScavengerRegister(), llvm::Thumb1RegisterInfo::saveScavengerRegister(), llvm::FunctionLoweringInfo::set(), setCallTargetReg(), llvm::SITargetLowering::shouldConvertConstantLoadToIntImm(), llvm::HexagonFrameLowering::spillCalleeSavedRegisters(), llvm::SystemZFrameLowering::spillCalleeSavedRegisters(), llvm::Thumb1FrameLowering::spillCalleeSavedRegisters(), llvm::XCoreFrameLowering::spillCalleeSavedRegisters(), llvm::MSP430FrameLowering::spillCalleeSavedRegisters(), llvm::AArch64FrameLowering::spillCalleeSavedRegisters(), llvm::PPCFrameLowering::spillCalleeSavedRegisters(), llvm::X86FrameLowering::spillCalleeSavedRegisters(), llvm::MachineBasicBlock::SplitCriticalEdge(), UpdateOperandRegClass(), and llvm::MachineBasicBlock::updateTerminator().
1.7.6.1