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NVPTXISelLowering.h
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00001 //===-- NVPTXISelLowering.h - NVPTX DAG Lowering Interface ------*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file defines the interfaces that NVPTX uses to lower LLVM code into a
00011 // selection DAG.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTXISELLOWERING_H
00016 #define LLVM_LIB_TARGET_NVPTX_NVPTXISELLOWERING_H
00017 
00018 #include "NVPTX.h"
00019 #include "llvm/CodeGen/SelectionDAG.h"
00020 #include "llvm/Target/TargetLowering.h"
00021 
00022 namespace llvm {
00023 namespace NVPTXISD {
00024 enum NodeType {
00025   // Start the numbering from where ISD NodeType finishes.
00026   FIRST_NUMBER = ISD::BUILTIN_OP_END,
00027   Wrapper,
00028   CALL,
00029   RET_FLAG,
00030   LOAD_PARAM,
00031   DeclareParam,
00032   DeclareScalarParam,
00033   DeclareRetParam,
00034   DeclareRet,
00035   DeclareScalarRet,
00036   PrintCall,
00037   PrintCallUni,
00038   CallArgBegin,
00039   CallArg,
00040   LastCallArg,
00041   CallArgEnd,
00042   CallVoid,
00043   CallVal,
00044   CallSymbol,
00045   Prototype,
00046   MoveParam,
00047   PseudoUseParam,
00048   RETURN,
00049   CallSeqBegin,
00050   CallSeqEnd,
00051   CallPrototype,
00052   FUN_SHFL_CLAMP,
00053   FUN_SHFR_CLAMP,
00054   MUL_WIDE_SIGNED,
00055   MUL_WIDE_UNSIGNED,
00056   IMAD,
00057   Dummy,
00058 
00059   LoadV2 = ISD::FIRST_TARGET_MEMORY_OPCODE,
00060   LoadV4,
00061   LDGV2, // LDG.v2
00062   LDGV4, // LDG.v4
00063   LDUV2, // LDU.v2
00064   LDUV4, // LDU.v4
00065   StoreV2,
00066   StoreV4,
00067   LoadParam,
00068   LoadParamV2,
00069   LoadParamV4,
00070   StoreParam,
00071   StoreParamV2,
00072   StoreParamV4,
00073   StoreParamS32, // to sext and store a <32bit value, not used currently
00074   StoreParamU32, // to zext and store a <32bit value, not used currently 
00075   StoreRetval,
00076   StoreRetvalV2,
00077   StoreRetvalV4,
00078 
00079   // Texture intrinsics
00080   Tex1DFloatS32,
00081   Tex1DFloatFloat,
00082   Tex1DFloatFloatLevel,
00083   Tex1DFloatFloatGrad,
00084   Tex1DS32S32,
00085   Tex1DS32Float,
00086   Tex1DS32FloatLevel,
00087   Tex1DS32FloatGrad,
00088   Tex1DU32S32,
00089   Tex1DU32Float,
00090   Tex1DU32FloatLevel,
00091   Tex1DU32FloatGrad,
00092   Tex1DArrayFloatS32,
00093   Tex1DArrayFloatFloat,
00094   Tex1DArrayFloatFloatLevel,
00095   Tex1DArrayFloatFloatGrad,
00096   Tex1DArrayS32S32,
00097   Tex1DArrayS32Float,
00098   Tex1DArrayS32FloatLevel,
00099   Tex1DArrayS32FloatGrad,
00100   Tex1DArrayU32S32,
00101   Tex1DArrayU32Float,
00102   Tex1DArrayU32FloatLevel,
00103   Tex1DArrayU32FloatGrad,
00104   Tex2DFloatS32,
00105   Tex2DFloatFloat,
00106   Tex2DFloatFloatLevel,
00107   Tex2DFloatFloatGrad,
00108   Tex2DS32S32,
00109   Tex2DS32Float,
00110   Tex2DS32FloatLevel,
00111   Tex2DS32FloatGrad,
00112   Tex2DU32S32,
00113   Tex2DU32Float,
00114   Tex2DU32FloatLevel,
00115   Tex2DU32FloatGrad,
00116   Tex2DArrayFloatS32,
00117   Tex2DArrayFloatFloat,
00118   Tex2DArrayFloatFloatLevel,
00119   Tex2DArrayFloatFloatGrad,
00120   Tex2DArrayS32S32,
00121   Tex2DArrayS32Float,
00122   Tex2DArrayS32FloatLevel,
00123   Tex2DArrayS32FloatGrad,
00124   Tex2DArrayU32S32,
00125   Tex2DArrayU32Float,
00126   Tex2DArrayU32FloatLevel,
00127   Tex2DArrayU32FloatGrad,
00128   Tex3DFloatS32,
00129   Tex3DFloatFloat,
00130   Tex3DFloatFloatLevel,
00131   Tex3DFloatFloatGrad,
00132   Tex3DS32S32,
00133   Tex3DS32Float,
00134   Tex3DS32FloatLevel,
00135   Tex3DS32FloatGrad,
00136   Tex3DU32S32,
00137   Tex3DU32Float,
00138   Tex3DU32FloatLevel,
00139   Tex3DU32FloatGrad,
00140   TexCubeFloatFloat,
00141   TexCubeFloatFloatLevel,
00142   TexCubeS32Float,
00143   TexCubeS32FloatLevel,
00144   TexCubeU32Float,
00145   TexCubeU32FloatLevel,
00146   TexCubeArrayFloatFloat,
00147   TexCubeArrayFloatFloatLevel,
00148   TexCubeArrayS32Float,
00149   TexCubeArrayS32FloatLevel,
00150   TexCubeArrayU32Float,
00151   TexCubeArrayU32FloatLevel,
00152   Tld4R2DFloatFloat,
00153   Tld4G2DFloatFloat,
00154   Tld4B2DFloatFloat,
00155   Tld4A2DFloatFloat,
00156   Tld4R2DS64Float,
00157   Tld4G2DS64Float,
00158   Tld4B2DS64Float,
00159   Tld4A2DS64Float,
00160   Tld4R2DU64Float,
00161   Tld4G2DU64Float,
00162   Tld4B2DU64Float,
00163   Tld4A2DU64Float,
00164   TexUnified1DFloatS32,
00165   TexUnified1DFloatFloat,
00166   TexUnified1DFloatFloatLevel,
00167   TexUnified1DFloatFloatGrad,
00168   TexUnified1DS32S32,
00169   TexUnified1DS32Float,
00170   TexUnified1DS32FloatLevel,
00171   TexUnified1DS32FloatGrad,
00172   TexUnified1DU32S32,
00173   TexUnified1DU32Float,
00174   TexUnified1DU32FloatLevel,
00175   TexUnified1DU32FloatGrad,
00176   TexUnified1DArrayFloatS32,
00177   TexUnified1DArrayFloatFloat,
00178   TexUnified1DArrayFloatFloatLevel,
00179   TexUnified1DArrayFloatFloatGrad,
00180   TexUnified1DArrayS32S32,
00181   TexUnified1DArrayS32Float,
00182   TexUnified1DArrayS32FloatLevel,
00183   TexUnified1DArrayS32FloatGrad,
00184   TexUnified1DArrayU32S32,
00185   TexUnified1DArrayU32Float,
00186   TexUnified1DArrayU32FloatLevel,
00187   TexUnified1DArrayU32FloatGrad,
00188   TexUnified2DFloatS32,
00189   TexUnified2DFloatFloat,
00190   TexUnified2DFloatFloatLevel,
00191   TexUnified2DFloatFloatGrad,
00192   TexUnified2DS32S32,
00193   TexUnified2DS32Float,
00194   TexUnified2DS32FloatLevel,
00195   TexUnified2DS32FloatGrad,
00196   TexUnified2DU32S32,
00197   TexUnified2DU32Float,
00198   TexUnified2DU32FloatLevel,
00199   TexUnified2DU32FloatGrad,
00200   TexUnified2DArrayFloatS32,
00201   TexUnified2DArrayFloatFloat,
00202   TexUnified2DArrayFloatFloatLevel,
00203   TexUnified2DArrayFloatFloatGrad,
00204   TexUnified2DArrayS32S32,
00205   TexUnified2DArrayS32Float,
00206   TexUnified2DArrayS32FloatLevel,
00207   TexUnified2DArrayS32FloatGrad,
00208   TexUnified2DArrayU32S32,
00209   TexUnified2DArrayU32Float,
00210   TexUnified2DArrayU32FloatLevel,
00211   TexUnified2DArrayU32FloatGrad,
00212   TexUnified3DFloatS32,
00213   TexUnified3DFloatFloat,
00214   TexUnified3DFloatFloatLevel,
00215   TexUnified3DFloatFloatGrad,
00216   TexUnified3DS32S32,
00217   TexUnified3DS32Float,
00218   TexUnified3DS32FloatLevel,
00219   TexUnified3DS32FloatGrad,
00220   TexUnified3DU32S32,
00221   TexUnified3DU32Float,
00222   TexUnified3DU32FloatLevel,
00223   TexUnified3DU32FloatGrad,
00224   TexUnifiedCubeFloatFloat,
00225   TexUnifiedCubeFloatFloatLevel,
00226   TexUnifiedCubeS32Float,
00227   TexUnifiedCubeS32FloatLevel,
00228   TexUnifiedCubeU32Float,
00229   TexUnifiedCubeU32FloatLevel,
00230   TexUnifiedCubeArrayFloatFloat,
00231   TexUnifiedCubeArrayFloatFloatLevel,
00232   TexUnifiedCubeArrayS32Float,
00233   TexUnifiedCubeArrayS32FloatLevel,
00234   TexUnifiedCubeArrayU32Float,
00235   TexUnifiedCubeArrayU32FloatLevel,
00236   Tld4UnifiedR2DFloatFloat,
00237   Tld4UnifiedG2DFloatFloat,
00238   Tld4UnifiedB2DFloatFloat,
00239   Tld4UnifiedA2DFloatFloat,
00240   Tld4UnifiedR2DS64Float,
00241   Tld4UnifiedG2DS64Float,
00242   Tld4UnifiedB2DS64Float,
00243   Tld4UnifiedA2DS64Float,
00244   Tld4UnifiedR2DU64Float,
00245   Tld4UnifiedG2DU64Float,
00246   Tld4UnifiedB2DU64Float,
00247   Tld4UnifiedA2DU64Float,
00248 
00249   // Surface intrinsics
00250   Suld1DI8Clamp,
00251   Suld1DI16Clamp,
00252   Suld1DI32Clamp,
00253   Suld1DI64Clamp,
00254   Suld1DV2I8Clamp,
00255   Suld1DV2I16Clamp,
00256   Suld1DV2I32Clamp,
00257   Suld1DV2I64Clamp,
00258   Suld1DV4I8Clamp,
00259   Suld1DV4I16Clamp,
00260   Suld1DV4I32Clamp,
00261 
00262   Suld1DArrayI8Clamp,
00263   Suld1DArrayI16Clamp,
00264   Suld1DArrayI32Clamp,
00265   Suld1DArrayI64Clamp,
00266   Suld1DArrayV2I8Clamp,
00267   Suld1DArrayV2I16Clamp,
00268   Suld1DArrayV2I32Clamp,
00269   Suld1DArrayV2I64Clamp,
00270   Suld1DArrayV4I8Clamp,
00271   Suld1DArrayV4I16Clamp,
00272   Suld1DArrayV4I32Clamp,
00273 
00274   Suld2DI8Clamp,
00275   Suld2DI16Clamp,
00276   Suld2DI32Clamp,
00277   Suld2DI64Clamp,
00278   Suld2DV2I8Clamp,
00279   Suld2DV2I16Clamp,
00280   Suld2DV2I32Clamp,
00281   Suld2DV2I64Clamp,
00282   Suld2DV4I8Clamp,
00283   Suld2DV4I16Clamp,
00284   Suld2DV4I32Clamp,
00285 
00286   Suld2DArrayI8Clamp,
00287   Suld2DArrayI16Clamp,
00288   Suld2DArrayI32Clamp,
00289   Suld2DArrayI64Clamp,
00290   Suld2DArrayV2I8Clamp,
00291   Suld2DArrayV2I16Clamp,
00292   Suld2DArrayV2I32Clamp,
00293   Suld2DArrayV2I64Clamp,
00294   Suld2DArrayV4I8Clamp,
00295   Suld2DArrayV4I16Clamp,
00296   Suld2DArrayV4I32Clamp,
00297 
00298   Suld3DI8Clamp,
00299   Suld3DI16Clamp,
00300   Suld3DI32Clamp,
00301   Suld3DI64Clamp,
00302   Suld3DV2I8Clamp,
00303   Suld3DV2I16Clamp,
00304   Suld3DV2I32Clamp,
00305   Suld3DV2I64Clamp,
00306   Suld3DV4I8Clamp,
00307   Suld3DV4I16Clamp,
00308   Suld3DV4I32Clamp,
00309 
00310   Suld1DI8Trap,
00311   Suld1DI16Trap,
00312   Suld1DI32Trap,
00313   Suld1DI64Trap,
00314   Suld1DV2I8Trap,
00315   Suld1DV2I16Trap,
00316   Suld1DV2I32Trap,
00317   Suld1DV2I64Trap,
00318   Suld1DV4I8Trap,
00319   Suld1DV4I16Trap,
00320   Suld1DV4I32Trap,
00321 
00322   Suld1DArrayI8Trap,
00323   Suld1DArrayI16Trap,
00324   Suld1DArrayI32Trap,
00325   Suld1DArrayI64Trap,
00326   Suld1DArrayV2I8Trap,
00327   Suld1DArrayV2I16Trap,
00328   Suld1DArrayV2I32Trap,
00329   Suld1DArrayV2I64Trap,
00330   Suld1DArrayV4I8Trap,
00331   Suld1DArrayV4I16Trap,
00332   Suld1DArrayV4I32Trap,
00333 
00334   Suld2DI8Trap,
00335   Suld2DI16Trap,
00336   Suld2DI32Trap,
00337   Suld2DI64Trap,
00338   Suld2DV2I8Trap,
00339   Suld2DV2I16Trap,
00340   Suld2DV2I32Trap,
00341   Suld2DV2I64Trap,
00342   Suld2DV4I8Trap,
00343   Suld2DV4I16Trap,
00344   Suld2DV4I32Trap,
00345 
00346   Suld2DArrayI8Trap,
00347   Suld2DArrayI16Trap,
00348   Suld2DArrayI32Trap,
00349   Suld2DArrayI64Trap,
00350   Suld2DArrayV2I8Trap,
00351   Suld2DArrayV2I16Trap,
00352   Suld2DArrayV2I32Trap,
00353   Suld2DArrayV2I64Trap,
00354   Suld2DArrayV4I8Trap,
00355   Suld2DArrayV4I16Trap,
00356   Suld2DArrayV4I32Trap,
00357 
00358   Suld3DI8Trap,
00359   Suld3DI16Trap,
00360   Suld3DI32Trap,
00361   Suld3DI64Trap,
00362   Suld3DV2I8Trap,
00363   Suld3DV2I16Trap,
00364   Suld3DV2I32Trap,
00365   Suld3DV2I64Trap,
00366   Suld3DV4I8Trap,
00367   Suld3DV4I16Trap,
00368   Suld3DV4I32Trap,
00369 
00370   Suld1DI8Zero,
00371   Suld1DI16Zero,
00372   Suld1DI32Zero,
00373   Suld1DI64Zero,
00374   Suld1DV2I8Zero,
00375   Suld1DV2I16Zero,
00376   Suld1DV2I32Zero,
00377   Suld1DV2I64Zero,
00378   Suld1DV4I8Zero,
00379   Suld1DV4I16Zero,
00380   Suld1DV4I32Zero,
00381 
00382   Suld1DArrayI8Zero,
00383   Suld1DArrayI16Zero,
00384   Suld1DArrayI32Zero,
00385   Suld1DArrayI64Zero,
00386   Suld1DArrayV2I8Zero,
00387   Suld1DArrayV2I16Zero,
00388   Suld1DArrayV2I32Zero,
00389   Suld1DArrayV2I64Zero,
00390   Suld1DArrayV4I8Zero,
00391   Suld1DArrayV4I16Zero,
00392   Suld1DArrayV4I32Zero,
00393 
00394   Suld2DI8Zero,
00395   Suld2DI16Zero,
00396   Suld2DI32Zero,
00397   Suld2DI64Zero,
00398   Suld2DV2I8Zero,
00399   Suld2DV2I16Zero,
00400   Suld2DV2I32Zero,
00401   Suld2DV2I64Zero,
00402   Suld2DV4I8Zero,
00403   Suld2DV4I16Zero,
00404   Suld2DV4I32Zero,
00405 
00406   Suld2DArrayI8Zero,
00407   Suld2DArrayI16Zero,
00408   Suld2DArrayI32Zero,
00409   Suld2DArrayI64Zero,
00410   Suld2DArrayV2I8Zero,
00411   Suld2DArrayV2I16Zero,
00412   Suld2DArrayV2I32Zero,
00413   Suld2DArrayV2I64Zero,
00414   Suld2DArrayV4I8Zero,
00415   Suld2DArrayV4I16Zero,
00416   Suld2DArrayV4I32Zero,
00417 
00418   Suld3DI8Zero,
00419   Suld3DI16Zero,
00420   Suld3DI32Zero,
00421   Suld3DI64Zero,
00422   Suld3DV2I8Zero,
00423   Suld3DV2I16Zero,
00424   Suld3DV2I32Zero,
00425   Suld3DV2I64Zero,
00426   Suld3DV4I8Zero,
00427   Suld3DV4I16Zero,
00428   Suld3DV4I32Zero
00429 };
00430 }
00431 
00432 class NVPTXSubtarget;
00433 
00434 //===--------------------------------------------------------------------===//
00435 // TargetLowering Implementation
00436 //===--------------------------------------------------------------------===//
00437 class NVPTXTargetLowering : public TargetLowering {
00438 public:
00439   explicit NVPTXTargetLowering(const NVPTXTargetMachine &TM);
00440   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
00441 
00442   SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
00443   SDValue LowerGlobalAddress(const GlobalValue *GV, int64_t Offset,
00444                              SelectionDAG &DAG) const;
00445 
00446   const char *getTargetNodeName(unsigned Opcode) const override;
00447 
00448   bool isTypeSupportedInIntrinsic(MVT VT) const;
00449 
00450   bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
00451                           unsigned Intrinsic) const override;
00452 
00453   /// isLegalAddressingMode - Return true if the addressing mode represented
00454   /// by AM is legal for this target, for a load/store of the specified type
00455   /// Used to guide target specific optimizations, like loop strength
00456   /// reduction (LoopStrengthReduce.cpp) and memory optimization for
00457   /// address mode (CodeGenPrepare.cpp)
00458   bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
00459 
00460   /// getFunctionAlignment - Return the Log2 alignment of this function.
00461   unsigned getFunctionAlignment(const Function *F) const;
00462 
00463   EVT getSetCCResultType(LLVMContext &Ctx, EVT VT) const override {
00464     if (VT.isVector())
00465       return EVT::getVectorVT(Ctx, MVT::i1, VT.getVectorNumElements());
00466     return MVT::i1;
00467   }
00468 
00469   ConstraintType
00470   getConstraintType(const std::string &Constraint) const override;
00471   std::pair<unsigned, const TargetRegisterClass *>
00472   getRegForInlineAsmConstraint(const std::string &Constraint,
00473                                MVT VT) const override;
00474 
00475   SDValue LowerFormalArguments(
00476       SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
00477       const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG,
00478       SmallVectorImpl<SDValue> &InVals) const override;
00479 
00480   SDValue LowerCall(CallLoweringInfo &CLI,
00481                     SmallVectorImpl<SDValue> &InVals) const override;
00482 
00483   std::string getPrototype(Type *, const ArgListTy &,
00484                            const SmallVectorImpl<ISD::OutputArg> &,
00485                            unsigned retAlignment,
00486                            const ImmutableCallSite *CS) const;
00487 
00488   SDValue
00489   LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
00490               const SmallVectorImpl<ISD::OutputArg> &Outs,
00491               const SmallVectorImpl<SDValue> &OutVals, SDLoc dl,
00492               SelectionDAG &DAG) const override;
00493 
00494   void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint,
00495                                     std::vector<SDValue> &Ops,
00496                                     SelectionDAG &DAG) const override;
00497 
00498   const NVPTXTargetMachine *nvTM;
00499 
00500   // PTX always uses 32-bit shift amounts
00501   MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i32; }
00502 
00503   TargetLoweringBase::LegalizeTypeAction
00504   getPreferredVectorAction(EVT VT) const override;
00505 
00506   bool allowFMA(MachineFunction &MF, CodeGenOpt::Level OptLevel) const;
00507 
00508   bool isFMAFasterThanFMulAndFAdd(EVT) const override { return true; }
00509 
00510 private:
00511   const NVPTXSubtarget &nvptxSubtarget; // cache the subtarget here
00512 
00513   SDValue getExtSymb(SelectionDAG &DAG, const char *name, int idx,
00514                      EVT = MVT::i32) const;
00515   SDValue getParamSymbol(SelectionDAG &DAG, int idx, EVT) const;
00516   SDValue getParamHelpSymbol(SelectionDAG &DAG, int idx);
00517 
00518   SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
00519 
00520   SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
00521   SDValue LowerLOADi1(SDValue Op, SelectionDAG &DAG) const;
00522 
00523   SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
00524   SDValue LowerSTOREi1(SDValue Op, SelectionDAG &DAG) const;
00525   SDValue LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const;
00526 
00527   SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const;
00528   SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const;
00529 
00530   void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
00531                           SelectionDAG &DAG) const override;
00532   SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
00533 
00534   unsigned getArgumentAlignment(SDValue Callee, const ImmutableCallSite *CS,
00535                                 Type *Ty, unsigned Idx) const;
00536 };
00537 } // namespace llvm
00538 
00539 #endif

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