LLVM API Documentation

Thumb1RegisterInfo.h
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00001 //===- Thumb1RegisterInfo.h - Thumb-1 Register Information Impl -*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file contains the Thumb-1 implementation of the TargetRegisterInfo
00011 // class.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
00016 #define LLVM_LIB_TARGET_ARM_THUMB1REGISTERINFO_H
00017 
00018 #include "ARMBaseRegisterInfo.h"
00019 #include "llvm/Target/TargetRegisterInfo.h"
00020 
00021 namespace llvm {
00022   class ARMSubtarget;
00023   class ARMBaseInstrInfo;
00024 
00025 struct Thumb1RegisterInfo : public ARMBaseRegisterInfo {
00026 public:
00027   Thumb1RegisterInfo(const ARMSubtarget &STI);
00028 
00029   const TargetRegisterClass *
00030   getLargestLegalSuperClass(const TargetRegisterClass *RC) const override;
00031 
00032   const TargetRegisterClass *
00033   getPointerRegClass(const MachineFunction &MF,
00034                      unsigned Kind = 0) const override;
00035 
00036   /// emitLoadConstPool - Emits a load from constpool to materialize the
00037   /// specified immediate.
00038   void
00039   emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
00040                     DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val,
00041                     ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0,
00042                     unsigned MIFlags = MachineInstr::NoFlags) const override;
00043 
00044   // rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
00045   // however much remains to be handled. Return 'true' if no further
00046   // work is required.
00047   bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
00048                          unsigned FrameReg, int &Offset,
00049                          const ARMBaseInstrInfo &TII) const;
00050   void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
00051                          int64_t Offset) const override;
00052   bool saveScavengerRegister(MachineBasicBlock &MBB,
00053                              MachineBasicBlock::iterator I,
00054                              MachineBasicBlock::iterator &UseMI,
00055                              const TargetRegisterClass *RC,
00056                              unsigned Reg) const override;
00057   void eliminateFrameIndex(MachineBasicBlock::iterator II,
00058                            int SPAdj, unsigned FIOperandNum,
00059                            RegScavenger *RS = nullptr) const override;
00060 };
00061 }
00062 
00063 #endif