- g -

• G : MD5.cpp
• G_00B848_DEBUG_MODE : SIDefines.h
• G_00B848_DX10_CLAMP : SIDefines.h
• G_00B848_FLOAT_MODE : SIDefines.h
• G_00B848_IEEE_MODE : SIDefines.h
• G_00B848_PRIORITY : SIDefines.h
• G_00B848_PRIV : SIDefines.h
• G_00B848_SGPRS : SIDefines.h
• G_00B848_VGPRS : SIDefines.h
• GCC_INSTALL_PREFIX : config.h
• GENERIC_FIXUP_FUNC : X86DisassemblerDecoder.cpp
• GET : MD5.cpp
• GET_ASSEMBLER_HEADER : PPCAsmParser.cpp , SparcAsmParser.cpp , SystemZAsmParser.cpp , X86AsmParser.cpp , AArch64AsmParser.cpp , ARMAsmParser.cpp , MipsAsmParser.cpp
• GET_FLAG_OPERAND_IDX : R600Defines.h
• GET_FUNCTION_RECOGNIZER : Function.cpp , AMDGPUIntrinsicInfo.cpp
• GET_INSTRINFO_CTOR_DTOR : SparcInstrInfo.cpp , SystemZInstrInfo.cpp , X86InstrInfo.cpp , XCoreInstrInfo.cpp , AArch64InstrInfo.cpp , ARMBaseInstrInfo.cpp , HexagonInstrInfo.cpp , MipsInstrInfo.cpp , MSP430InstrInfo.cpp , NVPTXInstrInfo.cpp , PPCInstrInfo.cpp , AMDGPUInstrInfo.cpp , R600InstrInfo.cpp
• GET_INSTRINFO_ENUM : AArch64MCTargetDesc.h , ARMMCTargetDesc.h , HexagonMCTargetDesc.h , MipsMCTargetDesc.h , MSP430MCTargetDesc.h , NVPTXMCTargetDesc.h , NVPTX.h , PPCMCTargetDesc.h , AMDGPUInstrInfo.h , AMDGPUMCTargetDesc.h , SparcMCTargetDesc.h , SystemZMCTargetDesc.h , X86Disassembler.cpp , X86MCTargetDesc.h , XCoreMCTargetDesc.h
• GET_INSTRINFO_HEADER : AArch64InstrInfo.h , ARMBaseInstrInfo.h , HexagonInstrInfo.h , MipsInstrInfo.h , MSP430InstrInfo.h , NVPTXInstrInfo.h , PPCInstrInfo.h , AMDGPUInstrInfo.h , SparcInstrInfo.h , SystemZInstrInfo.h , X86InstrInfo.h , XCoreInstrInfo.h
• GET_INSTRINFO_MC_DESC : ARMMCTargetDesc.cpp , HexagonMCTargetDesc.cpp , MipsMCTargetDesc.cpp , MSP430MCTargetDesc.cpp , NVPTXMCTargetDesc.cpp , PPCMCTargetDesc.cpp , AMDGPUMCTargetDesc.cpp , SparcMCTargetDesc.cpp , SystemZMCTargetDesc.cpp , X86MCTargetDesc.cpp , XCoreMCTargetDesc.cpp , AArch64MCTargetDesc.cpp
• GET_INSTRINFO_NAMED_OPS : AMDGPUInstrInfo.cpp
• GET_INSTRINFO_OPERAND_ENUM : AMDGPUInstrInfo.h
• GET_INSTRMAP_INFO : HexagonInstrInfo.cpp , MipsMCCodeEmitter.cpp , PPCInstrInfo.cpp , AMDGPUInstrInfo.cpp , SystemZInstrInfo.cpp
• GET_INSTRUCTION_NAME : AArch64InstPrinter.cpp , HexagonInstPrinter.cpp , SparcInstPrinter.cpp
• GET_INTRINSIC_ATTRIBUTES : Function.cpp
• GET_INTRINSIC_ENUM_VALUES : Intrinsics.h , AMDGPUIntrinsicInfo.h
• GET_INTRINSIC_GENERATOR_GLOBAL : Function.cpp
• GET_INTRINSIC_MODREF_BEHAVIOR : BasicAliasAnalysis.cpp , MemorySanitizer.cpp
• GET_INTRINSIC_NAME_TABLE : Function.cpp , AMDGPUIntrinsicInfo.cpp
• GET_INTRINSIC_OVERLOAD_TABLE : Function.cpp , AMDGPUIntrinsicInfo.cpp
• GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN : Function.cpp , AMDGPUIntrinsicInfo.cpp
• GET_LLVM_INTRINSIC_FOR_MS_BUILTIN : Function.cpp
• GET_MATCHER_IMPLEMENTATION : AArch64AsmParser.cpp , ARMAsmParser.cpp , MipsAsmParser.cpp , PPCAsmParser.cpp , SparcAsmParser.cpp , SystemZAsmParser.cpp , X86AsmParser.cpp
• GET_OPERAND_DIAGNOSTIC_TYPES : AArch64AsmParser.cpp , ARMAsmParser.cpp , MipsAsmParser.cpp
• GET_REG_CHAN : R600Defines.h
• GET_REG_INDEX : R600Defines.h
• GET_REGINFO_ENUM : AArch64MCTargetDesc.h , ARMMCTargetDesc.h , HexagonMCTargetDesc.h , MipsMCTargetDesc.h , MSP430MCTargetDesc.h , NVPTXMCTargetDesc.h , X86Disassembler.cpp , NVPTX.h , PPCMCTargetDesc.h , AMDGPURegisterInfo.h , AMDGPUMCTargetDesc.h , SparcMCTargetDesc.h , SystemZMCTargetDesc.h , X86MCTargetDesc.h , XCoreMCTargetDesc.h
• GET_REGINFO_HEADER : HexagonRegisterInfo.h , MipsRegisterInfo.h , MSP430RegisterInfo.h , NVPTXRegisterInfo.h , PPCRegisterInfo.h , AMDGPURegisterInfo.h , SparcRegisterInfo.h , X86RegisterInfo.h , XCoreRegisterInfo.h , SystemZRegisterInfo.h , ARMBaseRegisterInfo.h , AArch64RegisterInfo.h
• GET_REGINFO_MC_DESC : AArch64MCTargetDesc.cpp , HexagonMCTargetDesc.cpp , MipsMCTargetDesc.cpp , MSP430MCTargetDesc.cpp , PPCMCTargetDesc.cpp , AMDGPUMCTargetDesc.cpp , SparcMCTargetDesc.cpp , SystemZMCTargetDesc.cpp , X86MCTargetDesc.cpp , XCoreMCTargetDesc.cpp , ARMMCTargetDesc.cpp , NVPTXMCTargetDesc.cpp
• GET_REGINFO_TARGET_DESC : AArch64RegisterInfo.cpp , HexagonRegisterInfo.cpp , MipsRegisterInfo.cpp , MSP430RegisterInfo.cpp , PPCRegisterInfo.cpp , AMDGPURegisterInfo.cpp , SparcRegisterInfo.cpp , NVPTXRegisterInfo.cpp , X86RegisterInfo.cpp , XCoreRegisterInfo.cpp , SystemZRegisterInfo.cpp , ARMBaseRegisterInfo.cpp
• GET_REGISTER_MATCHER : SystemZAsmParser.cpp , AArch64AsmParser.cpp , MipsAsmParser.cpp , SparcAsmParser.cpp , X86AsmParser.cpp , PPCAsmParser.cpp , ARMAsmParser.cpp
• GET_SUBTARGET_FEATURE_NAME : ARMAsmParser.cpp , AArch64AsmParser.cpp , X86AsmParser.cpp , SystemZAsmParser.cpp
• GET_SUBTARGETINFO_CTOR : AArch64Subtarget.cpp , NVPTXSubtarget.cpp , MipsSubtarget.cpp , MSP430Subtarget.cpp , AMDGPUSubtarget.cpp , XCoreSubtarget.cpp , ARMSubtarget.cpp , HexagonSubtarget.cpp , X86Subtarget.cpp , SparcSubtarget.cpp , PPCSubtarget.cpp , SystemZSubtarget.cpp
• GET_SUBTARGETINFO_ENUM : AMDGPUSubtarget.cpp , SparcMCTargetDesc.h , MSP430MCTargetDesc.h , AMDGPUMCTargetDesc.h , ARMMCTargetDesc.h , XCoreMCTargetDesc.h , X86Disassembler.cpp , NVPTXSubtarget.cpp , PPCMCTargetDesc.h , SystemZMCTargetDesc.h , HexagonMCTargetDesc.h , NVPTXMCTargetDesc.h , MipsMCTargetDesc.h , X86MCTargetDesc.h , AArch64MCTargetDesc.h
• GET_SUBTARGETINFO_HEADER : SparcSubtarget.h , HexagonSubtarget.h , MipsSubtarget.h , XCoreSubtarget.h , X86Subtarget.h , NVPTXSubtarget.h , ARMSubtarget.h , MSP430Subtarget.h , AArch64Subtarget.h , PPCSubtarget.h , SystemZSubtarget.h , AMDGPUSubtarget.h
• GET_SUBTARGETINFO_MC_DESC : AMDGPUMCTargetDesc.cpp , MSP430MCTargetDesc.cpp , AArch64MCTargetDesc.cpp , NVPTXMCTargetDesc.cpp , SystemZMCTargetDesc.cpp , MipsMCTargetDesc.cpp , HexagonMCTargetDesc.cpp , ARMMCTargetDesc.cpp , SparcMCTargetDesc.cpp , PPCMCTargetDesc.cpp , XCoreMCTargetDesc.cpp , X86MCTargetDesc.cpp
• GET_SUBTARGETINFO_TARGET_DESC : AArch64Subtarget.cpp , ARMSubtarget.cpp , SparcSubtarget.cpp , AMDGPUSubtarget.cpp , XCoreSubtarget.cpp , NVPTXSubtarget.cpp , MSP430Subtarget.cpp , SystemZSubtarget.cpp , HexagonSubtarget.cpp , MipsSubtarget.cpp , X86Subtarget.cpp , PPCSubtarget.cpp
• GETNEXT : regcomp.c
• GOODFLAGS : regcomp.c , regexec.c