LLVM API Documentation

Defines | Functions
R600InstrInfo.cpp File Reference

R600 Implementation of TargetInstrInfo. More...

#include "R600InstrInfo.h"
#include "AMDGPU.h"
#include "AMDGPUSubtarget.h"
#include "AMDGPUTargetMachine.h"
#include "R600Defines.h"
#include "R600MachineFunctionInfo.h"
#include "R600RegisterInfo.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "AMDGPUGenDFAPacketizer.inc"
Include dependency graph for R600InstrInfo.cpp:

Go to the source code of this file.

Defines

#define GET_INSTRINFO_CTOR_DTOR
#define SRC_SEL_ROWS   11
#define OPERAND_CASE(Label)

Functions

static std::vector< std::pair
< int, unsigned > > 
Swizzle (std::vector< std::pair< int, unsigned > > Src, R600InstrInfo::BankSwizzle Swz)
static unsigned getTransSwizzle (R600InstrInfo::BankSwizzle Swz, unsigned Op)
static bool NextPossibleSolution (std::vector< R600InstrInfo::BankSwizzle > &SwzCandidate, unsigned Idx)
static bool isConstCompatible (R600InstrInfo::BankSwizzle TransSwz, const std::vector< std::pair< int, unsigned > > &TransOps, unsigned ConstCount)
static bool isPredicateSetter (unsigned Opcode)
static MachineInstrfindFirstPredicateSetterFrom (MachineBasicBlock &MBB, MachineBasicBlock::iterator I)
static bool isJump (unsigned Opcode)
static bool isBranch (unsigned Opcode)
static MachineBasicBlock::iterator FindLastAluClause (MachineBasicBlock &MBB)
static unsigned getSlotedOps (unsigned Op, unsigned Slot)

Detailed Description

R600 Implementation of TargetInstrInfo.

Definition in file R600InstrInfo.cpp.


Define Documentation

Definition at line 28 of file R600InstrInfo.cpp.

#define OPERAND_CASE (   Label)
Value:
case Label: { \
    static const unsigned Ops[] = \
    { \
      Label##_X, \
      Label##_Y, \
      Label##_Z, \
      Label##_W \
    }; \
    return Ops[Slot]; \
  }

Definition at line 1227 of file R600InstrInfo.cpp.

Referenced by getSlotedOps().

#define SRC_SEL_ROWS   11

Definition at line 271 of file R600InstrInfo.cpp.

Referenced by llvm::R600InstrInfo::getSelIdx().


Function Documentation

static unsigned getSlotedOps ( unsigned  Op,
unsigned  Slot 
) [static]
static unsigned getTransSwizzle ( R600InstrInfo::BankSwizzle  Swz,
unsigned  Op 
) [static]
static bool isBranch ( unsigned  Opcode) [static]

Definition at line 692 of file R600InstrInfo.cpp.

Referenced by llvm::R600InstrInfo::AnalyzeBranch(), and translateImmediate().

static bool isConstCompatible ( R600InstrInfo::BankSwizzle  TransSwz,
const std::vector< std::pair< int, unsigned > > &  TransOps,
unsigned  ConstCount 
) [static]

Instructions in Trans slot can't read gpr at cycle 0 if they also read a const, and can't read a gpr at cycle 1 if they read 2 const.

Definition at line 532 of file R600InstrInfo.cpp.

References getTransSwizzle().

Referenced by llvm::R600InstrInfo::fitsReadPortLimitations().

static bool isJump ( unsigned  Opcode) [static]

Definition at line 688 of file R600InstrInfo.cpp.

Referenced by llvm::R600InstrInfo::AnalyzeBranch().

static bool isPredicateSetter ( unsigned  Opcode) [static]
static bool NextPossibleSolution ( std::vector< R600InstrInfo::BankSwizzle > &  SwzCandidate,
unsigned  Idx 
) [static]

Given a swizzle sequence SwzCandidate and an index Idx, returns the next (in lexicographic term) swizzle sequence assuming that all swizzles after Idx can be skipped

Definition at line 496 of file R600InstrInfo.cpp.

References llvm::R600InstrInfo::ALU_VEC_012_SCL_210, and llvm::R600InstrInfo::ALU_VEC_210.

Referenced by llvm::R600InstrInfo::FindSwizzleForVectorSlot().

static std::vector<std::pair<int, unsigned> > Swizzle ( std::vector< std::pair< int, unsigned > >  Src,
R600InstrInfo::BankSwizzle  Swz 
) [static]