Index

#, see Section 4.3 Comments
#APP, see Section 4.1 Preprocessing
#NO_APP, see Section 4.1 Preprocessing
$ in symbol names, see Section 36.2.1 Special Characters
$ in symbol names, see Section 35.2.1 Special Characters
$ in symbol names, see Section 18.2.1 Special Characters
$ in symbol names, see Section 16.2.3 Special Characters
$ in symbol names, see Section 15.2.3 Special Characters
$a, see Section 13.6 Mapping Symbols
$acos math builtin, TIC54X, see Section 38.7 Math Builtins
$asin math builtin, TIC54X, see Section 38.7 Math Builtins
$atan math builtin, TIC54X, see Section 38.7 Math Builtins
$atan2 math builtin, TIC54X, see Section 38.7 Math Builtins
$ceil math builtin, TIC54X, see Section 38.7 Math Builtins
$cos math builtin, TIC54X, see Section 38.7 Math Builtins
$cosh math builtin, TIC54X, see Section 38.7 Math Builtins
$cvf math builtin, TIC54X, see Section 38.7 Math Builtins
$cvi math builtin, TIC54X, see Section 38.7 Math Builtins
$d, see Section 13.6 Mapping Symbols
$exp math builtin, TIC54X, see Section 38.7 Math Builtins
$fabs math builtin, TIC54X, see Section 38.7 Math Builtins
$firstch subsym builtin, TIC54X, see Section 38.10 Macros
$floor math builtin, TIC54X, see Section 38.7 Math Builtins
$fmod math builtin, TIC54X, see Section 38.7 Math Builtins
$int math builtin, TIC54X, see Section 38.7 Math Builtins
$iscons subsym builtin, TIC54X, see Section 38.10 Macros
$isdefed subsym builtin, TIC54X, see Section 38.10 Macros
$ismember subsym builtin, TIC54X, see Section 38.10 Macros
$isname subsym builtin, TIC54X, see Section 38.10 Macros
$isreg subsym builtin, TIC54X, see Section 38.10 Macros
$lastch subsym builtin, TIC54X, see Section 38.10 Macros
$ldexp math builtin, TIC54X, see Section 38.7 Math Builtins
$log math builtin, TIC54X, see Section 38.7 Math Builtins
$log10 math builtin, TIC54X, see Section 38.7 Math Builtins
$max math builtin, TIC54X, see Section 38.7 Math Builtins
$min math builtin, TIC54X, see Section 38.7 Math Builtins
$pow math builtin, TIC54X, see Section 38.7 Math Builtins
$round math builtin, TIC54X, see Section 38.7 Math Builtins
$sgn math builtin, TIC54X, see Section 38.7 Math Builtins
$sin math builtin, TIC54X, see Section 38.7 Math Builtins
$sinh math builtin, TIC54X, see Section 38.7 Math Builtins
$sqrt math builtin, TIC54X, see Section 38.7 Math Builtins
$structacc subsym builtin, TIC54X, see Section 38.10 Macros
$structsz subsym builtin, TIC54X, see Section 38.10 Macros
$symcmp subsym builtin, TIC54X, see Section 38.10 Macros
$symlen subsym builtin, TIC54X, see Section 38.10 Macros
$t, see Section 13.6 Mapping Symbols
$tan math builtin, TIC54X, see Section 38.7 Math Builtins
$tanh math builtin, TIC54X, see Section 38.7 Math Builtins
$trunc math builtin, TIC54X, see Section 38.7 Math Builtins
-, see Section 2.4 Command Line
-+ option, VAX/VMS, see Section 40.1 VAX Command-Line Options
-1 option, VAX/VMS, see Section 40.1 VAX Command-Line Options
-32 option, i386, see Section 21.1 Options
-32 option, x86-64, see Section 21.1 Options
-32addr command line option, Alpha, see Section 11.2 Options
-64 option, i386, see Section 21.1 Options
-64 option, x86-64, see Section 21.1 Options
-a, see Section 3.1 Enable Listings: -a[cdhlns]
-A options, i960, see Section 23.1 i960 Command-line Options
-ac, see Section 3.1 Enable Listings: -a[cdhlns]
-ad, see Section 3.1 Enable Listings: -a[cdhlns]
-ah, see Section 3.1 Enable Listings: -a[cdhlns]
-al, see Section 3.1 Enable Listings: -a[cdhlns]
-alternate, see Section 3.2 -alternate
-an, see Section 3.1 Enable Listings: -a[cdhlns]
-as, see Section 3.1 Enable Listings: -a[cdhlns]
-Asparclet, see Section 37.1 Options
-Asparclite, see Section 37.1 Options
-Av6, see Section 37.1 Options
-Av8, see Section 37.1 Options
-Av9, see Section 37.1 Options
-Av9a, see Section 37.1 Options
-b option, i960, see Section 23.1 i960 Command-line Options
-base-size-default-16, see Section 26.1 M680x0 Options
-base-size-default-32, see Section 26.1 M680x0 Options
-big, see Section 35.1 Options
-big option, M32R, see Section 25.1 M32R Options
-bitwise-or option, M680x0, see Section 26.1 M680x0 Options
-construct-floats, see Section 29.1 Assembler options
-D, see Section 3.3 -D
-D, ignored on VAX, see Section 40.1 VAX Command-Line Options
-d, VAX option, see Section 40.1 VAX Command-Line Options
-density, see Section 42.1 Command Line Options
-disp-size-default-16, see Section 26.1 M680x0 Options
-disp-size-default-32, see Section 26.1 M680x0 Options
-dsp, see Section 35.1 Options
-eabi= command line option, ARM, see Section 13.1 Options
-EB command line option, ARC, see Section 12.1 Options
-EB command line option, ARM, see Section 13.1 Options
-EB option (MIPS), see Section 29.1 Assembler options
-EB option, M32R, see Section 25.1 M32R Options
-EL command line option, ARC, see Section 12.1 Options
-EL command line option, ARM, see Section 13.1 Options
-EL option (MIPS), see Section 29.1 Assembler options
-EL option, M32R, see Section 25.1 M32R Options
-emulation=crisaout command line option, CRIS, see Section 14.1 Command-line Options
-emulation=criself command line option, CRIS, see Section 14.1 Command-line Options
-enforce-aligned-data, see Section 37.2 Enforcing aligned data
-f, see Section 3.4 Work Faster: -f
-F command line option, Alpha, see Section 11.2 Options
-fatal-warnings, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
-fixed-special-register-names command line option, MMIX, see Section 30.1 Command-line Options
-force-long-branchs, see Section 27.1 M68HC11 and M68HC12 Options
-G command line option, Alpha, see Section 11.2 Options
-g command line option, Alpha, see Section 11.2 Options
-G option (MIPS), see Section 29.1 Assembler options
-generate-example, see Section 27.1 M68HC11 and M68HC12 Options
-generics, see Section 42.1 Command Line Options
-globalize-symbols command line option, MMIX, see Section 30.1 Command-line Options
-gnu-syntax command line option, MMIX, see Section 30.1 Command-line Options
-H option, VAX/VMS, see Section 40.1 VAX Command-Line Options
-h option, VAX/VMS, see Section 40.1 VAX Command-Line Options
-I path, see Section 3.5 .includeSearch Path: -Ipath
-ignore-parallel-conflicts option, M32RX, see Section 25.1 M32R Options
-Ip option, M32RX, see Section 25.1 M32R Options
-J, ignored on VAX, see Section 40.1 VAX Command-Line Options
-K, see Section 3.6 Difference Tables: -K
-k command line option, ARM, see Section 13.1 Options
-KPIC option, M32R, see Section 25.1 M32R Options
-L, see Section 3.7 Include Local Labels: -L
-l option, M680x0, see Section 26.1 M680x0 Options
-linker-allocated-gregs command line option, MMIX, see Section 30.1 Command-line Options
-listing-cont-lines, see Section 3.8 Configuring listing output: -listing
-listing-lhs-width, see Section 3.8 Configuring listing output: -listing
-listing-lhs-width2, see Section 3.8 Configuring listing output: -listing
-listing-rhs-width, see Section 3.8 Configuring listing output: -listing
-little, see Section 35.1 Options
-little option, M32R, see Section 25.1 M32R Options
-longcalls, see Section 42.1 Command Line Options
-M, see Section 3.9 Assemble in MRI Compatibility Mode: -M
-m11/03, see Section 32.1 Options
-m11/04, see Section 32.1 Options
-m11/05, see Section 32.1 Options
-m11/10, see Section 32.1 Options
-m11/15, see Section 32.1 Options
-m11/20, see Section 32.1 Options
-m11/21, see Section 32.1 Options
-m11/23, see Section 32.1 Options
-m11/24, see Section 32.1 Options
-m11/34, see Section 32.1 Options
-m11/34a, see Section 32.1 Options
-m11/35, see Section 32.1 Options
-m11/40, see Section 32.1 Options
-m11/44, see Section 32.1 Options
-m11/45, see Section 32.1 Options
-m11/50, see Section 32.1 Options
-m11/53, see Section 32.1 Options
-m11/55, see Section 32.1 Options
-m11/60, see Section 32.1 Options
-m11/70, see Section 32.1 Options
-m11/73, see Section 32.1 Options
-m11/83, see Section 32.1 Options
-m11/84, see Section 32.1 Options
-m11/93, see Section 32.1 Options
-m11/94, see Section 32.1 Options
-m32r option, M32R, see Section 25.1 M32R Options
-m32rx option, M32R2, see Section 25.1 M32R Options
-m32rx option, M32RX, see Section 25.1 M32R Options
-m68000 and related options, see Section 26.1 M680x0 Options
-m68hc11, see Section 27.1 M68HC11 and M68HC12 Options
-m68hc12, see Section 27.1 M68HC11 and M68HC12 Options
-m68hcs12, see Section 27.1 M68HC11 and M68HC12 Options
-mall, see Section 32.1 Options
-mall-extensions, see Section 32.1 Options
-mapcs command line option, ARM, see Section 13.1 Options
-mapcs-float command line option, ARM, see Section 13.1 Options
-mapcs-reentrant command line option, ARM, see Section 13.1 Options
-marc[5|6|7|8] command line option, ARC, see Section 12.1 Options
-march= command line option, ARM, see Section 13.1 Options
-matpcs command line option, ARM, see Section 13.1 Options
-mcis, see Section 32.1 Options
-mcpu command line option, Alpha, see Section 11.2 Options
-mcpu option, cpu, see Section 38.1 Options
-mcpu= command line option, ARM, see Section 13.1 Options
-mcsm, see Section 32.1 Options
-MD, see Section 3.10 Dependency Tracking: -MD
-mdebug command line option, Alpha, see Section 11.2 Options
-me option, stderr redirect, see Section 38.1 Options
-meis, see Section 32.1 Options
-merrors-to-file option, stderr redirect, see Section 38.1 Options
-mf option, far-mode, see Section 38.1 Options
-mf11, see Section 32.1 Options
-mfar-mode option, far-mode, see Section 38.1 Options
-mfis, see Section 32.1 Options
-mfloat-abi= command line option, ARM, see Section 13.1 Options
-mfp-11, see Section 32.1 Options
-mfpp, see Section 32.1 Options
-mfpu, see Section 32.1 Options
-mfpu= command line option, ARM, see Section 13.1 Options
-mip2022 option, IP2K, see Section 24.1 IP2K Options
-mip2022ext option, IP2022, see Section 24.1 IP2K Options
-mj11, see Section 32.1 Options
-mka11, see Section 32.1 Options
-mkb11, see Section 32.1 Options
-mkd11a, see Section 32.1 Options
-mkd11b, see Section 32.1 Options
-mkd11d, see Section 32.1 Options
-mkd11e, see Section 32.1 Options
-mkd11f, see Section 32.1 Options
-mkd11h, see Section 32.1 Options
-mkd11k, see Section 32.1 Options
-mkd11q, see Section 32.1 Options
-mkd11z, see Section 32.1 Options
-mkev11, see Section 32.1 Options
-mlimited-eis, see Section 32.1 Options
-mlong, see Section 27.1 M68HC11 and M68HC12 Options
-mlong-double, see Section 27.1 M68HC11 and M68HC12 Options
-mmfpt, see Section 32.1 Options
-mmicrocode, see Section 32.1 Options
-mmutiproc, see Section 32.1 Options
-mmxps, see Section 32.1 Options
-mno-cis, see Section 32.1 Options
-mno-csm, see Section 32.1 Options
-mno-eis, see Section 32.1 Options
-mno-extensions, see Section 32.1 Options
-mno-fis, see Section 32.1 Options
-mno-fp-11, see Section 32.1 Options
-mno-fpp, see Section 32.1 Options
-mno-fpu, see Section 32.1 Options
-mno-kev11, see Section 32.1 Options
-mno-limited-eis, see Section 32.1 Options
-mno-mfpt, see Section 32.1 Options
-mno-microcode, see Section 32.1 Options
-mno-mutiproc, see Section 32.1 Options
-mno-mxps, see Section 32.1 Options
-mno-pic, see Section 32.1 Options
-mno-spl, see Section 32.1 Options
-moabi command line option, ARM, see Section 13.1 Options
-mpic, see Section 32.1 Options
-mrelax command line option, V850, see Section 41.1 Options
-mshort, see Section 27.1 M68HC11 and M68HC12 Options
-mshort-double, see Section 27.1 M68HC11 and M68HC12 Options
-mspl, see Section 32.1 Options
-mt11, see Section 32.1 Options
-mthumb command line option, ARM, see Section 13.1 Options
-mthumb-interwork command line option, ARM, see Section 13.1 Options
-mul-bug-abort command line option, CRIS, see Section 14.1 Command-line Options
-mv850 command line option, V850, see Section 41.1 Options
-mv850any command line option, V850, see Section 41.1 Options
-mv850e command line option, V850, see Section 41.1 Options
-mv850e1 command line option, V850, see Section 41.1 Options
-N command line option, CRIS, see Section 14.1 Command-line Options
-nIp option, M32RX, see Section 25.1 M32R Options
-no-bitinst, M32R2, see Section 25.1 M32R Options
-no-construct-floats, see Section 29.1 Assembler options
-no-density, see Section 42.1 Command Line Options
-no-expand command line option, MMIX, see Section 30.1 Command-line Options
-no-generics, see Section 42.1 Command Line Options
-no-ignore-parallel-conflicts option, M32RX, see Section 25.1 M32R Options
-no-longcalls, see Section 42.1 Command Line Options
-no-mdebug command line option, Alpha, see Section 11.2 Options
-no-merge-gregs command line option, MMIX, see Section 30.1 Command-line Options
-no-mul-bug-abort command line option, CRIS, see Section 14.1 Command-line Options
-no-parallel option, M32RX, see Section 25.1 M32R Options
-no-predefined-syms command line option, MMIX, see Section 30.1 Command-line Options
-no-pushj-stubs command line option, MMIX, see Section 30.1 Command-line Options
-no-relax, see Section 42.1 Command Line Options
-no-relax option, i960, see Section 23.1 i960 Command-line Options
-no-stubs command line option, MMIX, see Section 30.1 Command-line Options
-no-target-align, see Section 42.1 Command Line Options
-no-text-section-literals, see Section 42.1 Command Line Options
-no-underscore command line option, CRIS, see Section 14.1 Command-line Options
-no-warn, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
-no-warn-explicit-parallel-conflicts option, M32RX, see Section 25.1 M32R Options
-no-warn-unmatched-high option, M32R, see Section 25.1 M32R Options
-nocpp ignored (MIPS), see Section 29.1 Assembler options
-o, see Section 3.11 Name the Object File: -o
-O option, M32RX, see Section 25.1 M32R Options
-parallel option, M32RX, see Section 25.1 M32R Options
-pcrel, see Section 26.1 M680x0 Options
-pic command line option, CRIS, see Section 14.1 Command-line Options
-print-insn-syntax, see Section 27.1 M68HC11 and M68HC12 Options
-print-opcodes, see Section 27.1 M68HC11 and M68HC12 Options
-R, see Section 3.12 Join Data and Text Sections: -R
-register-prefix-optional option, M680x0, see Section 26.1 M680x0 Options
-relax, see Section 42.1 Command Line Options
-relax, see Section 35.1 Options
-relax command line option, Alpha, see Section 11.2 Options
-relax command line option, MMIX, see Section 30.1 Command-line Options
-renesas, see Section 35.1 Options
-S, ignored on VAX, see Section 40.1 VAX Command-Line Options
-short-branchs, see Section 27.1 M68HC11 and M68HC12 Options
-small, see Section 35.1 Options
-statistics, see Section 3.13 Display Assembly Statistics: -statistics
-strict-direct-mode, see Section 27.1 M68HC11 and M68HC12 Options
-t, ignored on VAX, see Section 40.1 VAX Command-Line Options
-T, ignored on VAX, see Section 40.1 VAX Command-Line Options
-target-align, see Section 42.1 Command Line Options
-text-section-literals, see Section 42.1 Command Line Options
-traditional-format, see Section 3.14 Compatible Output: -traditional-format
-underscore command line option, CRIS, see Section 14.1 Command-line Options
-v, see Section 3.15 Announce Version: -v
-V, redundant on VAX, see Section 40.1 VAX Command-Line Options
-version, see Section 3.15 Announce Version: -v
-W, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
-warn, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
-warn-explicit-parallel-conflicts option, M32RX, see Section 25.1 M32R Options
-warn-unmatched-high option, M32R, see Section 25.1 M32R Options
-Wnp option, M32RX, see Section 25.1 M32R Options
-Wnuh option, M32RX, see Section 25.1 M32R Options
-Wp option, M32RX, see Section 25.1 M32R Options
-wsigned_overflow command line option, V850, see Section 41.1 Options
-Wuh option, M32RX, see Section 25.1 M32R Options
-wunsigned_overflow command line option, V850, see Section 41.1 Options
-x command line option, MMIX, see Section 30.1 Command-line Options
-z8001 command line option, Z8000, see Section 39.1 Options
-z8002 command line option, Z8000, see Section 39.1 Options
. (symbol), see Section 6.4 The Special Dot Symbol
.big directive, M32RX, see Section 25.2 M32R Directives
.insn, see Section 29.6 Directive to mark data as an instruction
.little directive, M32RX, see Section 25.2 M32R Directives
.ltorg directive, ARM, see Section 13.4 ARM Machine Directives
.m32r directive, M32R, see Section 25.2 M32R Directives
.m32r2 directive, M32R2, see Section 25.2 M32R Directives
.m32rx directive, M32RX, see Section 25.2 M32R Directives
.o, see Section 2.6 Output (Object) File
.param on HPPA, see Section 19.5 HPPA Assembler Directives
.pool directive, ARM, see Section 13.4 ARM Machine Directives
.set autoextend, see Section 29.5 Directives for extending MIPS 16 bit instructions
.set mdmx, see Section 29.8 Directives to control generation of MIPS ASE instructions
.set mips3d, see Section 29.8 Directives to control generation of MIPS ASE instructions
.set mipsn, see Section 29.4 Directives to override the ISA level
.set noautoextend, see Section 29.5 Directives for extending MIPS 16 bit instructions
.set nomdmx, see Section 29.8 Directives to control generation of MIPS ASE instructions
.set nomips3d, see Section 29.8 Directives to control generation of MIPS ASE instructions
.set pop, see Section 29.7 Directives to save and restore options
.set push, see Section 29.7 Directives to save and restore options
.v850 directive, V850, see Section 41.4 V850 Machine Directives
.v850e directive, V850, see Section 41.4 V850 Machine Directives
.v850e1 directive, V850, see Section 41.4 V850 Machine Directives
.z8001, see Section 39.3 Assembler Directives for the Z8000
.z8002, see Section 39.3 Assembler Directives for the Z8000
16-bit code, i386, see Section 21.10 Writing 16-bit Code
29K support, see Chapter 10 AMD 29K Dependent Features
2byte directive, ARC, see Section 12.4 ARC Machine Directives
3byte directive, ARC, see Section 12.4 ARC Machine Directives
3DNow!, i386, see Section 21.9 Intel's MMX and AMD's 3DNow! SIMD Operations
3DNow!, x86-64, see Section 21.9 Intel's MMX and AMD's 3DNow! SIMD Operations
430 support, see Chapter 31 MSP 430 Dependent Features
4byte directive, ARC, see Section 12.4 ARC Machine Directives
: (label), see Section 4.5 Statements
@word modifier, D10V, see Section 15.2.6 @WORD Modifier
\" (doublequote character), see Section 4.6.1.1 Strings
\\ (\ character), see Section 4.6.1.1 Strings
\b (backspace character), see Section 4.6.1.1 Strings
\ddd (octal character code), see Section 4.6.1.1 Strings
\f (formfeed character), see Section 4.6.1.1 Strings
\n (newline character), see Section 4.6.1.1 Strings
\r (carriage return character), see Section 4.6.1.1 Strings
\t (tab), see Section 4.6.1.1 Strings
\xd... (hex character code), see Section 4.6.1.1 Strings
_ opcode prefix, see Section 42.2.1 Opcode Names

A

a.out, see Section 2.6 Output (Object) File
a.out symbol attributes, see Section 6.5.3 Symbol Attributes: a.out
A_DIR environment variable, TIC54X, see Section 38.3 Environment Settings
ABI options, SH64, see Section 36.1 Options
ABORT directive, see Section 8.2 .ABORT
abort directive, see Section 8.2 .ABORT
absolute section, see Section 5.2 Linker Sections
ADDI instructions, relaxation, see Section 42.4.3 Other Immediate Field Relaxation
addition, permitted arguments, see Section 7.2.4 Infix Operators
addresses, see Chapter 7 Expressions
addresses, format of, see Section 5.1 Background
addressing modes, D10V, see Section 15.2.5 Addressing Modes
addressing modes, D30V, see Section 16.2.6 Addressing Modes
addressing modes, H8/300, see Section 17.2.3 Addressing Modes
addressing modes, H8/500, see Section 18.2.3 Addressing Modes
addressing modes, M680x0, see Section 26.2 Syntax
addressing modes, M68HC11, see Section 27.2 Syntax
addressing modes, SH, see Section 35.2.3 Addressing Modes
addressing modes, SH64, see Section 36.2.3 Addressing Modes
addressing modes, Z8000, see Section 39.2.3 Addressing Modes
ADR reg,<label> pseudo op, ARM, see Section 13.5 Opcodes
ADRL reg,<label> pseudo op, ARM, see Section 13.5 Opcodes
advancing location counter, see Section 8.65 .org new-lc, fill
align directive, see Section 8.3 .align abs-expr, abs-expr, abs-expr
align directive, ARM, see Section 13.4 ARM Machine Directives
align directive, M88K, see Section 28.1 M88K Machine Directives
align directive, SPARC, see Section 37.4 Sparc Machine Directives
align directive, TIC54X, see Section 38.9 Directives
alignment of branch targets, see Section 42.3.2 Automatic Instruction Alignment
alignment of ENTRY instructions, see Section 42.3.2 Automatic Instruction Alignment
alignment of LOOP instructions, see Section 42.3.2 Automatic Instruction Alignment
Alpha floating point (ieee), see Section 11.4 Floating Point
Alpha line comment character, see Section 11.3.1 Special Characters
Alpha line separator, see Section 11.3.1 Special Characters
Alpha notes, see Section 11.1 Notes
Alpha options, see Section 11.2 Options
Alpha registers, see Section 11.3.2 Register Names
Alpha relocations, see Section 11.3.3 Relocations
Alpha support, see Chapter 11 Alpha Dependent Features
Alpha Syntax, see Section 11.2 Options
Alpha-only directives, see Section 11.5 Alpha Assembler Directives
altered difference tables, see Section 8.101 .word expressions
alternate syntax for the 680x0, see Section 26.3 Motorola Syntax
AMD 29K floating point (ieee), see Section 10.3 Floating Point
AMD 29K identifiers, see Section 10.2.2 Special Characters
AMD 29K line comment character, see Section 10.2.2 Special Characters
AMD 29K machine directives, see Section 10.4 AMD 29K Machine Directives
AMD 29K macros, see Section 10.2.1 Macros
AMD 29K opcodes, see Section 10.5 Opcodes
AMD 29K options (none), see Section 10.1 Options
AMD 29K protected registers, see Section 10.2.3 Register Names
AMD 29K register names, see Section 10.2.3 Register Names
AMD 29K special purpose registers, see Section 10.2.3 Register Names
AMD 29K support, see Chapter 10 AMD 29K Dependent Features
ARC floating point (ieee), see Section 12.3 Floating Point
ARC machine directives, see Section 12.4 ARC Machine Directives
ARC opcodes, see Section 12.5 Opcodes
ARC options (none), see Section 12.1 Options
ARC register names, see Section 12.2.2 Register Names
ARC special characters, see Section 12.2.1 Special Characters
ARC support, see Chapter 12 ARC Dependent Features
arc5 arc5, ARC, see Section 12.1 Options
arc6 arc6, ARC, see Section 12.1 Options
arc7 arc7, ARC, see Section 12.1 Options
arc8 arc8, ARC, see Section 12.1 Options
arch directive, i386, see Section 21.12 Specifying CPU Architecture
arch directive, x86-64, see Section 21.12 Specifying CPU Architecture
architecture options, i960, see Section 23.1 i960 Command-line Options
architecture options, IP2022, see Section 24.1 IP2K Options
architecture options, IP2K, see Section 24.1 IP2K Options
architecture options, M32R, see Section 25.1 M32R Options
architecture options, M32R2, see Section 25.1 M32R Options
architecture options, M32RX, see Section 25.1 M32R Options
architecture options, M680x0, see Section 26.1 M680x0 Options
architectures, PowerPC, see Section 34.1 Options
architectures, SPARC, see Section 37.1 Options
arguments for addition, see Section 7.2.4 Infix Operators
arguments for subtraction, see Section 7.2.4 Infix Operators
arguments in expressions, see Section 7.2.1 Arguments
arithmetic functions, see Section 7.2.2 Operators
arithmetic operands, see Section 7.2.1 Arguments
arm directive, ARM, see Section 13.4 ARM Machine Directives
ARM floating point (ieee), see Section 13.3 Floating Point
ARM identifiers, see Section 13.2.1 Special Characters
ARM immediate character, see Section 13.2.1 Special Characters
ARM line comment character, see Section 13.2.1 Special Characters
ARM line separator, see Section 13.2.1 Special Characters
ARM machine directives, see Section 13.4 ARM Machine Directives
ARM opcodes, see Section 13.5 Opcodes
ARM options (none), see Section 13.1 Options
ARM register names, see Section 13.2.2 Register Names
ARM support, see Chapter 13 ARM Dependent Features
ascii directive, see Section 8.4 .ascii "string"
asciz directive, see Section 8.5 .asciz "string"
asg directive, TIC54X, see Section 38.9 Directives
assembler bugs, reporting, see Section 43.2 How to Report Bugs
assembler crash, see Section 43.1 Have You Found a Bug?
assembler directive .dword, CRIS, see Section 14.3.4 Assembler Directives
assembler directive .far, M68HC11, see Section 27.4 Assembler Directives
assembler directive .interrupt, M68HC11, see Section 27.4 Assembler Directives
assembler directive .mode, M68HC11, see Section 27.4 Assembler Directives
assembler directive .relax, M68HC11, see Section 27.4 Assembler Directives
assembler directive .syntax, CRIS, see Section 14.3.4 Assembler Directives
assembler directive .xrefb, M68HC11, see Section 27.4 Assembler Directives
assembler directive BSPEC, MMIX, see Section 30.3.4 Assembler Directives
assembler directive BYTE, MMIX, see Section 30.3.4 Assembler Directives
assembler directive ESPEC, MMIX, see Section 30.3.4 Assembler Directives
assembler directive GREG, MMIX, see Section 30.3.4 Assembler Directives
assembler directive IS, MMIX, see Section 30.3.4 Assembler Directives
assembler directive LOC, MMIX, see Section 30.3.4 Assembler Directives
assembler directive LOCAL, MMIX, see Section 30.3.4 Assembler Directives
assembler directive OCTA, MMIX, see Section 30.3.4 Assembler Directives
assembler directive PREFIX, MMIX, see Section 30.3.4 Assembler Directives
assembler directive TETRA, MMIX, see Section 30.3.4 Assembler Directives
assembler directive WYDE, MMIX, see Section 30.3.4 Assembler Directives
assembler directives, CRIS, see Section 14.3.4 Assembler Directives
assembler directives, M68HC11, see Section 27.4 Assembler Directives
assembler directives, M68HC12, see Section 27.4 Assembler Directives
assembler directives, MMIX, see Section 30.3.4 Assembler Directives
assembler internal logic error, see Section 5.3 Assembler Internal Sections
assembler version, see Section 3.15 Announce Version: -v
assembler, and linker, see Section 5.1 Background
assembly listings, enabling, see Section 3.1 Enable Listings: -a[cdhlns]
assigning values to symbols, see Section 8.31 .equ symbol, expression
assigning values to symbols, see Section 6.2 Giving Symbols Other Values
atmp directive, i860, see Section 22.3 i860 Machine Directives
att_syntax pseudo op, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
att_syntax pseudo op, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
attributes, symbol, see Section 6.5 Symbol Attributes
auxiliary attributes, COFF symbols, see Section 6.5.4 Symbol Attributes for COFF
auxiliary symbol information, COFF, see Section 8.22 .dim
Av7, see Section 37.1 Options

B

backslash (\\), see Section 4.6.1.1 Strings
backspace (\b), see Section 4.6.1.1 Strings
balign directive, see Section 8.6 .balign[wl] abs-expr, abs-expr, abs-expr
balignl directive, see Section 8.6 .balign[wl] abs-expr, abs-expr, abs-expr
balignw directive, see Section 8.6 .balign[wl] abs-expr, abs-expr, abs-expr
bes directive, TIC54X, see Section 38.9 Directives
big endian output, MIPS, see Chapter 2 Overview
big endian output, PJ, see Chapter 2 Overview
big-endian output, MIPS, see Section 29.1 Assembler options
bignums, see Section 4.6.2.2 Bignums
binary constants, TIC54X, see Section 38.4 Constants Syntax
binary files, including, see Section 8.46 .incbin "file"[,skip[,count]]
binary integers, see Section 4.6.2.1 Integers
bitfields, not supported on VAX, see Section 40.7 Not Supported on VAX
block, see Section 39.3 Assembler Directives for the Z8000
block directive, AMD 29K, see Section 10.4 AMD 29K Machine Directives
branch improvement, M680x0, see Section 26.6.1 Branch Improvement
branch improvement, M68HC11, see Section 27.6.1 Branch Improvement
branch improvement, VAX, see Section 40.5 VAX Branch Improvement
branch instructions, relaxation, see Section 42.4.1 Conditional Branch Relaxation
branch recording, i960, see Section 23.1 i960 Command-line Options
branch statistics table, i960, see Section 23.1 i960 Command-line Options
branch target alignment, see Section 42.3.2 Automatic Instruction Alignment
break directive, TIC54X, see Section 38.9 Directives
BSD syntax, see Section 32.3 PDP-11 Assembly Language Syntax
bss directive, i960, see Section 23.3 i960 Machine Directives
bss directive, M88K, see Section 28.1 M88K Machine Directives
bss directive, TIC54X, see Section 38.9 Directives
bss section, see Section 5.5 bss Section
bss section, see Section 5.2 Linker Sections
bug criteria, see Section 43.1 Have You Found a Bug?
bug reports, see Section 43.2 How to Report Bugs
bugs in assembler, see Chapter 43 Reporting Bugs
builtin math functions, TIC54X, see Section 38.7 Math Builtins
builtin subsym functions, TIC54X, see Section 38.10 Macros
bus lock prefixes, i386, see Section 21.5 Instruction Prefixes
bval, see Section 39.3 Assembler Directives for the Z8000
byte directive, see Section 8.7 .byte expressions
byte directive, TIC54X, see Section 38.9 Directives
C54XDSP_DIR environment variable, TIC54X, see Section 38.3 Environment Settings
c_mode directive, TIC54X, see Section 38.9 Directives

C

call instructions, i386, see Section 21.3 Instruction Naming
call instructions, relaxation, see Section 42.4.2 Function Call Relaxation
call instructions, x86-64, see Section 21.3 Instruction Naming
callj, i960 pseudo-opcode, see Section 23.4.1 callj
carriage return (\r), see Section 4.6.1.1 Strings
cfi_endproc directive, see Section 8.9 .cfi_startproc
cfi_startproc directive, see Section 8.9 .cfi_startproc
char directive, TIC54X, see Section 38.9 Directives
character constants, see Section 4.6.1 Character Constants
character escape codes, see Section 4.6.1.1 Strings
character, single, see Section 4.6.1.2 Characters
characters used in symbols, see Section 4.4 Symbols
clink directive, TIC54X, see Section 38.9 Directives
code directive, ARM, see Section 13.4 ARM Machine Directives
code16 directive, i386, see Section 21.10 Writing 16-bit Code
code16gcc directive, i386, see Section 21.10 Writing 16-bit Code
code32 directive, i386, see Section 21.10 Writing 16-bit Code
code64 directive, i386, see Section 21.10 Writing 16-bit Code
code64 directive, x86-64, see Section 21.10 Writing 16-bit Code
COFF auxiliary symbol information, see Section 8.22 .dim
COFF structure debugging, see Section 8.91 .tag structname
COFF symbol attributes, see Section 6.5.4 Symbol Attributes for COFF
COFF symbol descriptor, see Section 8.21 .desc symbol, abs-expression
COFF symbol storage class, see Section 8.77 .scl class
COFF symbol type, see Section 8.94 .type
COFF symbols, debugging, see Section 8.20 .def name
COFF value attribute, see Section 8.96 .val addr
COMDAT, see Section 8.55 .linkonce [type]
comm directive, see Section 8.8 .comm symbol, length
command line conventions, see Section 2.4 Command Line
command line options, V850, see Section 41.1 Options
command-line options ignored, VAX, see Section 40.1 VAX Command-Line Options
comments, see Section 4.3 Comments
comments, M680x0, see Section 26.6.2 Special Characters
comments, removed by preprocessor, see Section 4.1 Preprocessing
common directive, SPARC, see Section 37.4 Sparc Machine Directives
common sections, see Section 8.55 .linkonce [type]
common variable storage, see Section 5.5 bss Section
compare and jump expansions, i960, see Section 23.4.2 Compare-and-Branch
compare/branch instructions, i960, see Section 23.4.2 Compare-and-Branch
comparison expressions, see Section 7.2.4 Infix Operators
conditional assembly, see Section 8.45 .if absolute expression
constant, single character, see Section 4.6.1.2 Characters
constants, see Section 4.6 Constants
constants, bignum, see Section 4.6.2.2 Bignums
constants, character, see Section 4.6.1 Character Constants
constants, converted by preprocessor, see Section 4.1 Preprocessing
constants, floating point, see Section 4.6.2.3 Flonums
constants, integer, see Section 4.6.2.1 Integers
constants, number, see Section 4.6.2 Number Constants
constants, string, see Section 4.6.1.1 Strings
constants, TIC54X, see Section 38.4 Constants Syntax
conversion instructions, i386, see Section 21.3 Instruction Naming
conversion instructions, x86-64, see Section 21.3 Instruction Naming
coprocessor wait, i386, see Section 21.5 Instruction Prefixes
copy directive, TIC54X, see Section 38.9 Directives
cputype directive, AMD 29K, see Section 10.4 AMD 29K Machine Directives
crash of assembler, see Section 43.1 Have You Found a Bug?
CRIS -emulation=crisaout command line option, see Section 14.1 Command-line Options
CRIS -emulation=criself command line option, see Section 14.1 Command-line Options
CRIS -mul-bug-abort command line option, see Section 14.1 Command-line Options
CRIS -N command line option, see Section 14.1 Command-line Options
CRIS -no-mul-bug-abort command line option, see Section 14.1 Command-line Options
CRIS -no-underscore command line option, see Section 14.1 Command-line Options
CRIS -pic command line option, see Section 14.1 Command-line Options
CRIS -underscore command line option, see Section 14.1 Command-line Options
CRIS assembler directive .dword, see Section 14.3.4 Assembler Directives
CRIS assembler directive .syntax, see Section 14.3.4 Assembler Directives
CRIS assembler directives, see Section 14.3.4 Assembler Directives
CRIS instruction expansion, see Section 14.2 Instruction expansion
CRIS line comment characters, see Section 14.3.1 Special Characters
CRIS options, see Section 14.1 Command-line Options
CRIS position-independent code, see Section 14.1 Command-line Options
CRIS pseudo-op .dword, see Section 14.3.4 Assembler Directives
CRIS pseudo-op .syntax, see Section 14.3.4 Assembler Directives
CRIS pseudo-ops, see Section 14.3.4 Assembler Directives
CRIS register names, see Section 14.3.3 Register names
CRIS support, see Chapter 14 CRIS Dependent Features
CRIS symbols in position-independent code, see Section 14.3.2 Symbols in position-independent code
ctbp register, V850, see Section 41.2.2 Register Names
ctoff pseudo-op, V850, see Section 41.5 Opcodes
ctpc register, V850, see Section 41.2.2 Register Names
ctpsw register, V850, see Section 41.2.2 Register Names
current address, see Section 6.4 The Special Dot Symbol
current address, advancing, see Section 8.65 .org new-lc, fill

D

D10V @word modifier, see Section 15.2.6 @WORD Modifier
D10V addressing modes, see Section 15.2.5 Addressing Modes
D10V floating point, see Section 15.3 Floating Point
D10V line comment character, see Section 15.2.3 Special Characters
D10V opcode summary, see Section 15.4 Opcodes
D10V optimization, see Chapter 2 Overview
D10V options, see Section 15.1 D10V Options
D10V registers, see Section 15.2.4 Register Names
D10V size modifiers, see Section 15.2.1 Size Modifiers
D10V sub-instruction ordering, see Section 15.2.3 Special Characters
D10V sub-instructions, see Section 15.2.2 Sub-Instructions
D10V support, see Chapter 15 D10V Dependent Features
D10V syntax, see Section 15.2 Syntax
D30V addressing modes, see Section 16.2.6 Addressing Modes
D30V floating point, see Section 16.3 Floating Point
D30V Guarded Execution, see Section 16.2.4 Guarded Execution
D30V line comment character, see Section 16.2.3 Special Characters
D30V nops, see Chapter 2 Overview
D30V nops after 32-bit multiply, see Chapter 2 Overview
D30V opcode summary, see Section 16.4 Opcodes
D30V optimization, see Chapter 2 Overview
D30V options, see Section 16.1 D30V Options
D30V registers, see Section 16.2.5 Register Names
D30V size modifiers, see Section 16.2.1 Size Modifiers
D30V sub-instruction ordering, see Section 16.2.3 Special Characters
D30V sub-instructions, see Section 16.2.2 Sub-Instructions
D30V support, see Chapter 16 D30V Dependent Features
D30V syntax, see Section 16.2 Syntax
data alignment on SPARC, see Section 37.2 Enforcing aligned data
data and text sections, joining, see Section 3.12 Join Data and Text Sections: -R
data directive, see Section 8.19 .data subsection
data directive, TIC54X, see Section 38.9 Directives
data section, see Section 5.2 Linker Sections
data1 directive, M680x0, see Section 26.5 680x0 Machine Directives
data2 directive, M680x0, see Section 26.5 680x0 Machine Directives
datalabel, SH64, see Section 36.2.3 Addressing Modes
dbpc register, V850, see Section 41.2.2 Register Names
dbpsw register, V850, see Section 41.2.2 Register Names
debuggers, and symbol order, see Chapter 6 Symbols
debugging COFF symbols, see Section 8.20 .def name
DEC syntax, see Section 32.3 PDP-11 Assembly Language Syntax
decimal integers, see Section 4.6.2.1 Integers
def directive, see Section 8.20 .def name
def directive, M88K, see Section 28.1 M88K Machine Directives
def directive, TIC54X, see Section 38.9 Directives
density directive, see Section 42.5.1 density
density instructions, see Section 42.3.1 Using Density Instructions
density option, Xtensa, see Section 42.1 Command Line Options
dependency tracking, see Section 3.10 Dependency Tracking: -MD
deprecated directives, see Section 8.102 Deprecated Directives
desc directive, see Section 8.21 .desc symbol, abs-expression
descriptor, of a.out symbol, see Section 6.5.3.1 Descriptor
dfloat directive, M88K, see Section 28.1 M88K Machine Directives
dfloat directive, VAX, see Section 40.3 Vax Machine Directives
difference tables altered, see Section 8.101 .word expressions
difference tables, warning, see Section 3.6 Difference Tables: -K
differences, mmixal, see Section 30.4 Differences to mmixal
dim directive, see Section 8.22 .dim
directives and instructions, see Section 4.5 Statements
directives for PowerPC, see Section 34.2 PowerPC Assembler Directives
directives, M32R, see Section 25.2 M32R Directives
directives, M680x0, see Section 26.5 680x0 Machine Directives
directives, machine independent, see Chapter 8 Assembler Directives
directives, precedence, see Section 42.5 Directives
directives, Xtensa, see Section 42.5 Directives
directives, Z8000, see Section 39.3 Assembler Directives for the Z8000
displacement sizing character, VAX, see Section 40.6 VAX Operands
dollar local symbols, see Section 6.3 Symbol Names
dot (symbol), see Section 6.4 The Special Dot Symbol
double directive, see Section 8.23 .double flonums
double directive, i386, see Section 21.8 Floating Point
double directive, M680x0, see Section 26.4 Floating Point
double directive, M68HC11, see Section 27.5 Floating Point
double directive, TIC54X, see Section 38.9 Directives
double directive, VAX, see Section 40.2 VAX Floating Point
double directive, x86-64, see Section 21.8 Floating Point
doublequote (\"), see Section 4.6.1.1 Strings
drlist directive, TIC54X, see Section 38.9 Directives
drnolist directive, TIC54X, see Section 38.9 Directives
dual directive, i860, see Section 22.3 i860 Machine Directives

E

ECOFF sections, see Section 29.2 MIPS ECOFF object code
ecr register, V850, see Section 41.2.2 Register Names
eight-byte integer, see Section 8.74 .quad bignums
eipc register, V850, see Section 41.2.2 Register Names
eipsw register, V850, see Section 41.2.2 Register Names
eject directive, see Section 8.24 .eject
ELF symbol type, see Section 8.94 .type
else directive, see Section 8.25 .else
elseif directive, see Section 8.26 .elseif
empty expressions, see Section 7.1 Empty Expressions
emsg directive, TIC54X, see Section 38.9 Directives
emulation, see Chapter 2 Overview
end directive, see Section 8.27 .end
enddual directive, i860, see Section 22.3 i860 Machine Directives
endef directive, see Section 8.28 .endef
endfunc directive, see Section 8.29 .endfunc
endianness, MIPS, see Chapter 2 Overview
endianness, PJ, see Chapter 2 Overview
endif directive, see Section 8.30 .endif
endloop directive, TIC54X, see Section 38.9 Directives
endm directive, see Section 8.60 .macro
endm directive, TIC54X, see Section 38.9 Directives
endstruct directive, TIC54X, see Section 38.9 Directives
endunion directive, TIC54X, see Section 38.9 Directives
ENTRY instructions, alignment, see Section 42.3.2 Automatic Instruction Alignment
environment settings, TIC54X, see Section 38.3 Environment Settings
EOF, newline must precede, see Section 4.5 Statements
ep register, V850, see Section 41.2.2 Register Names
equ directive, see Section 8.31 .equ symbol, expression
equ directive, TIC54X, see Section 38.9 Directives
equiv directive, see Section 8.32 .equiv symbol, expression
err directive, see Section 8.33 .err
error messages, see Section 2.7 Error and Warning Messages
error on valid input, see Section 43.1 Have You Found a Bug?
errors, caused by warnings, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
errors, continuing after, see Section 3.17 Generate Object File in Spite of Errors: -Z
ESA/390 floating point (ieee), see Section 20.4 Floating Point
ESA/390 support, see Chapter 20 ESA/390 Dependent Features
ESA/390 Syntax, see Section 20.2 Options
ESA/390-only directives, see Section 20.5 ESA/390 Assembler Directives
escape codes, character, see Section 4.6.1.1 Strings
eval directive, TIC54X, see Section 38.9 Directives
even, see Section 39.3 Assembler Directives for the Z8000
even directive, M680x0, see Section 26.5 680x0 Machine Directives
even directive, TIC54X, see Section 38.9 Directives
exitm directive, see Section 8.60 .macro
expr (internal section), see Section 5.3 Assembler Internal Sections
expression arguments, see Section 7.2.1 Arguments
expressions, see Chapter 7 Expressions
expressions, comparison, see Section 7.2.4 Infix Operators
expressions, empty, see Section 7.1 Empty Expressions
expressions, integer, see Section 7.2 Integer Expressions
extAuxRegister directive, ARC, see Section 12.4 ARC Machine Directives
extCondCode directive, ARC, see Section 12.4 ARC Machine Directives
extCoreRegister directive, ARC, see Section 12.4 ARC Machine Directives
extend directive M680x0, see Section 26.4 Floating Point
extend directive M68HC11, see Section 27.5 Floating Point
extended directive, i960, see Section 23.3 i960 Machine Directives
extern directive, see Section 8.35 .extern
extInstruction directive, ARC, see Section 12.4 ARC Machine Directives
fail directive, see Section 8.36 .fail expression
far_mode directive, TIC54X, see Section 38.9 Directives

F

faster processing (-f), see Section 3.4 Work Faster: -f
fatal signal, see Section 43.1 Have You Found a Bug?
fclist directive, TIC54X, see Section 38.9 Directives
fcnolist directive, TIC54X, see Section 38.9 Directives
fepc register, V850, see Section 41.2.2 Register Names
fepsw register, V850, see Section 41.2.2 Register Names
ffloat directive, M88K, see Section 28.1 M88K Machine Directives
ffloat directive, VAX, see Section 40.3 Vax Machine Directives
field directive, TIC54X, see Section 38.9 Directives
file directive, see Section 8.37 .file string
file directive, AMD 29K, see Section 10.4 AMD 29K Machine Directives
file directive, MSP 430, see Section 31.4 MSP 430 Machine Directives
file name, logical, see Section 8.37 .file string
files, including, see Section 8.47 .include "file"
files, input, see Section 2.5 Input Files
fill directive, see Section 8.38 .fill repeat, size, value
filling memory, see Section 8.85 .space size, fill
filling memory, see Section 8.84 .skip size, fill
float directive, see Section 8.39 .float flonums
float directive, i386, see Section 21.8 Floating Point
float directive, M680x0, see Section 26.4 Floating Point
float directive, M68HC11, see Section 27.5 Floating Point
float directive, TIC54X, see Section 38.9 Directives
float directive, VAX, see Section 40.2 VAX Floating Point
float directive, x86-64, see Section 21.8 Floating Point
floating point numbers, see Section 4.6.2.3 Flonums
floating point numbers (double), see Section 8.23 .double flonums
floating point numbers (single), see Section 8.81 .single flonums
floating point numbers (single), see Section 8.39 .float flonums
floating point, Alpha (ieee), see Section 11.4 Floating Point
floating point, AMD 29K (ieee), see Section 10.3 Floating Point
floating point, ARC (ieee), see Section 12.3 Floating Point
floating point, ARM (ieee), see Section 13.3 Floating Point
floating point, D10V, see Section 15.3 Floating Point
floating point, D30V, see Section 16.3 Floating Point
floating point, ESA/390 (ieee), see Section 20.4 Floating Point
floating point, H8/300 (ieee), see Section 17.3 Floating Point
floating point, H8/500 (ieee), see Section 18.3 Floating Point
floating point, HPPA (ieee), see Section 19.4 Floating Point
floating point, i386, see Section 21.8 Floating Point
floating point, i960 (ieee), see Section 23.2 Floating Point
floating point, M680x0, see Section 26.4 Floating Point
floating point, M68HC11, see Section 27.5 Floating Point
floating point, MSP 430 (ieee), see Section 31.3 Floating Point
floating point, SH (ieee), see Section 35.3 Floating Point
floating point, SPARC (ieee), see Section 37.3 Floating Point
floating point, V850 (ieee), see Section 41.3 Floating Point
floating point, VAX, see Section 40.2 VAX Floating Point
floating point, x86-64, see Section 21.8 Floating Point
flonums, see Section 4.6.2.3 Flonums
force_thumb directive, ARM, see Section 13.4 ARM Machine Directives
format of error messages, see Section 2.7 Error and Warning Messages
format of warning messages, see Section 2.7 Error and Warning Messages
formfeed (\f), see Section 4.6.1.1 Strings
frame directive, see Section 42.5.9 frame
freeregs directive, see Section 42.5.8 freeregs
func directive, see Section 8.40 .func name[,label]
functions, in expressions, see Section 7.2.2 Operators
gbr960, i960 postprocessor, see Section 23.1 i960 Command-line Options

G

generic opcodes, see Section 42.2.1 Opcode Names
generics directive, see Section 42.5.4 generics
gfloat directive, VAX, see Section 40.3 Vax Machine Directives
global, see Section 39.3 Assembler Directives for the Z8000
global directive, see Section 8.41 .global symbol, .globl symbol
global directive, TIC54X, see Section 38.9 Directives
gp register, MIPS, see Section 29.2 MIPS ECOFF object code
gp register, V850, see Section 41.2.2 Register Names
grouping data, see Section 5.4 Sub-Sections

H

H8/300 addressing modes, see Section 17.2.3 Addressing Modes
H8/300 floating point (ieee), see Section 17.3 Floating Point
H8/300 line comment character, see Section 17.2.1 Special Characters
H8/300 line separator, see Section 17.2.1 Special Characters
H8/300 machine directives (none), see Section 17.4 H8/300 Machine Directives
H8/300 opcode summary, see Section 17.5 Opcodes
H8/300 options (none), see Section 17.1 Options
H8/300 registers, see Section 17.2.2 Register Names
H8/300 size suffixes, see Section 17.5 Opcodes
H8/300 support, see Chapter 17 H8/300 Dependent Features
H8/300H, assembling for, see Section 17.4 H8/300 Machine Directives
H8/500 addressing modes, see Section 18.2.3 Addressing Modes
H8/500 floating point (ieee), see Section 18.3 Floating Point
H8/500 line comment character, see Section 18.2.1 Special Characters
H8/500 line separator, see Section 18.2.1 Special Characters
H8/500 machine directives (none), see Section 18.4 H8/500 Machine Directives
H8/500 opcode summary, see Section 18.5 Opcodes
H8/500 options (none), see Section 18.1 Options
H8/500 registers, see Section 18.2.2 Register Names
H8/500 support, see Chapter 18 H8/500 Dependent Features
half directive, ARC, see Section 12.4 ARC Machine Directives
half directive, M88K, see Section 28.1 M88K Machine Directives
half directive, SPARC, see Section 37.4 Sparc Machine Directives
half directive, TIC54X, see Section 38.9 Directives
hex character code (\xd...), see Section 4.6.1.1 Strings
hexadecimal integers, see Section 4.6.2.1 Integers
hfloat directive, VAX, see Section 40.3 Vax Machine Directives
hi pseudo-op, V850, see Section 41.5 Opcodes
hi0 pseudo-op, V850, see Section 41.5 Opcodes
hidden directive, see Section 8.42 .hidden names
high directive, M32R, see Section 25.2 M32R Directives
hilo pseudo-op, V850, see Section 41.5 Opcodes
HPPA directives not supported, see Section 19.5 HPPA Assembler Directives
HPPA floating point (ieee), see Section 19.4 Floating Point
HPPA Syntax, see Section 19.2 Options
HPPA-only directives, see Section 19.5 HPPA Assembler Directives
hword directive, see Section 8.43 .hword expressions

I

i370 support, see Chapter 20 ESA/390 Dependent Features
i386 16-bit code, see Section 21.10 Writing 16-bit Code
i386 arch directive, see Section 21.12 Specifying CPU Architecture
i386 att_syntax pseudo op, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 conversion instructions, see Section 21.3 Instruction Naming
i386 floating point, see Section 21.8 Floating Point
i386 immediate operands, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 instruction naming, see Section 21.3 Instruction Naming
i386 instruction prefixes, see Section 21.5 Instruction Prefixes
i386 intel_syntax pseudo op, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 jump optimization, see Section 21.7 Handling of Jump Instructions
i386 jump, call, return, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 jump/call operands, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 memory references, see Section 21.6 Memory References
i386 mul, imul instructions, see Section 21.13 Notes
i386 options, see Section 21.1 Options
i386 register operands, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 registers, see Section 21.4 Register Naming
i386 sections, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 size suffixes, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 source, destination operands, see Section 21.2 AT&T Syntax versus Intel Syntax
i386 support, see Chapter 21 80386 Dependent Features
i386 syntax compatibility, see Section 21.2 AT&T Syntax versus Intel Syntax
i80306 support, see Chapter 21 80386 Dependent Features
i860 machine directives, see Section 22.3 i860 Machine Directives
i860 opcodes, see Section 22.4 i860 Opcodes
i860 support, see Chapter 22 Intel i860 Dependent Features
i960 architecture options, see Section 23.1 i960 Command-line Options
i960 branch recording, see Section 23.1 i960 Command-line Options
i960 callj pseudo-opcode, see Section 23.4.1 callj
i960 compare and jump expansions, see Section 23.4.2 Compare-and-Branch
i960 compare/branch instructions, see Section 23.4.2 Compare-and-Branch
i960 floating point (ieee), see Section 23.2 Floating Point
i960 machine directives, see Section 23.3 i960 Machine Directives
i960 opcodes, see Section 23.4 i960 Opcodes
i960 options, see Section 23.1 i960 Command-line Options
i960 support, see Chapter 23 Intel 80960 Dependent Features
ident directive, see Section 8.44 .ident
identifiers, AMD 29K, see Section 10.2.2 Special Characters
identifiers, ARM, see Section 13.2.1 Special Characters
identifiers, MSP 430, see Section 31.2.2 Special Characters
if directive, see Section 8.45 .if absolute expression
ifc directive, see Section 8.45 .if absolute expression
ifdef directive, see Section 8.45 .if absolute expression
ifeq directive, see Section 8.45 .if absolute expression
ifeqs directive, see Section 8.45 .if absolute expression
ifge directive, see Section 8.45 .if absolute expression
ifgt directive, see Section 8.45 .if absolute expression
ifle directive, see Section 8.45 .if absolute expression
iflt directive, see Section 8.45 .if absolute expression
ifnc directive, see Section 8.45 .if absolute expression
ifndef directive, see Section 8.45 .if absolute expression
ifne directive, see Section 8.45 .if absolute expression
ifnes directive, see Section 8.45 .if absolute expression
ifnotdef directive, see Section 8.45 .if absolute expression
immediate character, ARM, see Section 13.2.1 Special Characters
immediate character, M680x0, see Section 26.6.2 Special Characters
immediate character, VAX, see Section 40.6 VAX Operands
immediate fields, relaxation, see Section 42.4.3 Other Immediate Field Relaxation
immediate operands, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
immediate operands, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
imul instruction, i386, see Section 21.13 Notes
imul instruction, x86-64, see Section 21.13 Notes
incbin directive, see Section 8.46 .incbin "file"[,skip[,count]]
include directive, see Section 8.47 .include "file"
include directive search path, see Section 3.5 .includeSearch Path: -Ipath
indirect character, VAX, see Section 40.6 VAX Operands
infix operators, see Section 7.2.4 Infix Operators
inhibiting interrupts, i386, see Section 21.5 Instruction Prefixes
input, see Section 2.5 Input Files
input file linenumbers, see Section 2.5 Input Files
instruction expansion, CRIS, see Section 14.2 Instruction expansion
instruction expansion, MMIX, see Section 30.2 Instruction expansion
instruction naming, i386, see Section 21.3 Instruction Naming
instruction naming, x86-64, see Section 21.3 Instruction Naming
instruction prefixes, i386, see Section 21.5 Instruction Prefixes
instruction set, M680x0, see Section 26.6 Opcodes
instruction set, M68HC11, see Section 27.6 Opcodes
instruction summary, D10V, see Section 15.4 Opcodes
instruction summary, D30V, see Section 16.4 Opcodes
instruction summary, H8/300, see Section 17.5 Opcodes
instruction summary, H8/500, see Section 18.5 Opcodes
instruction summary, SH, see Section 35.5 Opcodes
instruction summary, SH64, see Section 36.4 Opcodes
instruction summary, Z8000, see Section 39.4 Opcodes
instructions and directives, see Section 4.5 Statements
int directive, see Section 8.48 .int expressions
int directive, H8/300, see Section 17.4 H8/300 Machine Directives
int directive, H8/500, see Section 18.4 H8/500 Machine Directives
int directive, i386, see Section 21.8 Floating Point
int directive, TIC54X, see Section 38.9 Directives
int directive, x86-64, see Section 21.8 Floating Point
integer expressions, see Section 7.2 Integer Expressions
integer, 16-byte, see Section 8.64 .octa bignums
integer, 8-byte, see Section 8.74 .quad bignums
integers, see Section 4.6.2.1 Integers
integers, 16-bit, see Section 8.43 .hword expressions
integers, 32-bit, see Section 8.48 .int expressions
integers, binary, see Section 4.6.2.1 Integers
integers, decimal, see Section 4.6.2.1 Integers
integers, hexadecimal, see Section 4.6.2.1 Integers
integers, octal, see Section 4.6.2.1 Integers
integers, one byte, see Section 8.7 .byte expressions
intel_syntax pseudo op, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
intel_syntax pseudo op, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
internal assembler sections, see Section 5.3 Assembler Internal Sections
internal directive, see Section 8.49 .internal names
invalid input, see Section 43.1 Have You Found a Bug?
invocation summary, see Chapter 2 Overview
IP2K architecture options, see Section 24.1 IP2K Options
IP2K options, see Section 24.1 IP2K Options
IP2K support, see Chapter 24 IP2K Dependent Features
irp directive, see Section 8.50 .irp symbol,values
irpc directive, see Section 8.51 .irpc symbol,values
ISA options, SH64, see Section 36.1 Options

J

joining text and data sections, see Section 3.12 Join Data and Text Sections: -R
jump instructions, i386, see Section 21.3 Instruction Naming
jump instructions, x86-64, see Section 21.3 Instruction Naming
jump optimization, i386, see Section 21.7 Handling of Jump Instructions
jump optimization, x86-64, see Section 21.7 Handling of Jump Instructions
jump/call operands, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
jump/call operands, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
L16SI instructions, relaxation, see Section 42.4.3 Other Immediate Field Relaxation
L16UI instructions, relaxation, see Section 42.4.3 Other Immediate Field Relaxation
L32I instructions, relaxation, see Section 42.4.3 Other Immediate Field Relaxation
L8UI instructions, relaxation, see Section 42.4.3 Other Immediate Field Relaxation

L

label (:), see Section 4.5 Statements
label directive, TIC54X, see Section 38.9 Directives
labels, see Section 6.1 Labels
lcomm directive, see Section 8.52 .lcomm symbol, length
ld, see Section 2.6 Output (Object) File
ldouble directive M680x0, see Section 26.4 Floating Point
ldouble directive M68HC11, see Section 27.5 Floating Point
ldouble directive, TIC54X, see Section 38.9 Directives
LDR reg,=<label> pseudo op, ARM, see Section 13.5 Opcodes
leafproc directive, i960, see Section 23.3 i960 Machine Directives
length directive, TIC54X, see Section 38.9 Directives
length of symbols, see Section 4.4 Symbols
lflags directive (ignored), see Section 8.53 .lflags
line comment character, see Section 4.3 Comments
line comment character, Alpha, see Section 11.3.1 Special Characters
line comment character, AMD 29K, see Section 10.2.2 Special Characters
line comment character, ARM, see Section 13.2.1 Special Characters
line comment character, D10V, see Section 15.2.3 Special Characters
line comment character, D30V, see Section 16.2.3 Special Characters
line comment character, H8/300, see Section 17.2.1 Special Characters
line comment character, H8/500, see Section 18.2.1 Special Characters
line comment character, M680x0, see Section 26.6.2 Special Characters
line comment character, MSP 430, see Section 31.2.2 Special Characters
line comment character, SH, see Section 35.2.1 Special Characters
line comment character, SH64, see Section 36.2.1 Special Characters
line comment character, V850, see Section 41.2.1 Special Characters
line comment character, Z8000, see Section 39.2.1 Special Characters
line comment characters, CRIS, see Section 14.3.1 Special Characters
line comment characters, MMIX, see Section 30.3.1 Special Characters
line directive, see Section 8.54 .line line-number
line directive, AMD 29K, see Section 10.4 AMD 29K Machine Directives
line directive, MSP 430, see Section 31.4 MSP 430 Machine Directives
line numbers, in input files, see Section 2.5 Input Files
line numbers, in warnings/errors, see Section 2.7 Error and Warning Messages
line separator character, see Section 4.5 Statements
line separator, Alpha, see Section 11.3.1 Special Characters
line separator, ARM, see Section 13.2.1 Special Characters
line separator, H8/300, see Section 17.2.1 Special Characters
line separator, H8/500, see Section 18.2.1 Special Characters
line separator, SH, see Section 35.2.1 Special Characters
line separator, SH64, see Section 36.2.1 Special Characters
line separator, Z8000, see Section 39.2.1 Special Characters
lines starting with #, see Section 4.3 Comments
linker, see Section 2.6 Output (Object) File
linker, and assembler, see Section 5.1 Background
linkonce directive, see Section 8.55 .linkonce [type]
list directive, see Section 8.58 .list
list directive, TIC54X, see Section 38.9 Directives
listing control, turning off, see Section 8.63 .nolist
listing control, turning on, see Section 8.58 .list
listing control: new page, see Section 8.24 .eject
listing control: paper size, see Section 8.71 .psize lines, columns
listing control: subtitle, see Section 8.76 .sbttl "subheading"
listing control: title line, see Section 8.93 .title "heading"
listings, enabling, see Section 3.1 Enable Listings: -a[cdhlns]
literal directive, see Section 42.5.5 literal
literal_position directive, see Section 42.5.6 literal_position
literal_prefix directive, see Section 42.5.7 literal_prefix
little endian output, MIPS, see Chapter 2 Overview
little endian output, PJ, see Chapter 2 Overview
little-endian output, MIPS, see Section 29.1 Assembler options
ln directive, see Section 8.56 .ln line-number
lo pseudo-op, V850, see Section 41.5 Opcodes
local common symbols, see Section 8.52 .lcomm symbol, length
local labels, retaining in output, see Section 3.7 Include Local Labels: -L
local symbol names, see Section 6.3 Symbol Names
location counter, see Section 6.4 The Special Dot Symbol
location counter, advancing, see Section 8.65 .org new-lc, fill
logical file name, see Section 8.37 .file string
logical line number, see Section 8.54 .line line-number
logical line numbers, see Section 4.3 Comments
long directive, see Section 8.59 .long expressions
long directive, ARC, see Section 12.4 ARC Machine Directives
long directive, i386, see Section 21.8 Floating Point
long directive, TIC54X, see Section 38.9 Directives
long directive, x86-64, see Section 21.8 Floating Point
longcall pseudo-op, V850, see Section 41.5 Opcodes
longcalls directive, see Section 42.5.3 longcalls
longjump pseudo-op, V850, see Section 41.5 Opcodes
loop directive, TIC54X, see Section 38.9 Directives
LOOP instructions, alignment, see Section 42.3.2 Automatic Instruction Alignment
low directive, M32R, see Section 25.2 M32R Directives
lp register, V850, see Section 41.2.2 Register Names
lval, see Section 39.3 Assembler Directives for the Z8000

M

M32R architecture options, see Section 25.1 M32R Options
M32R directives, see Section 25.2 M32R Directives
M32R options, see Section 25.1 M32R Options
M32R support, see Chapter 25 M32R Dependent Features
M32R warnings, see Section 25.3 M32R Warnings
M680x0 addressing modes, see Section 26.2 Syntax
M680x0 architecture options, see Section 26.1 M680x0 Options
M680x0 branch improvement, see Section 26.6.1 Branch Improvement
M680x0 directives, see Section 26.5 680x0 Machine Directives
M680x0 floating point, see Section 26.4 Floating Point
M680x0 immediate character, see Section 26.6.2 Special Characters
M680x0 line comment character, see Section 26.6.2 Special Characters
M680x0 opcodes, see Section 26.6 Opcodes
M680x0 options, see Section 26.1 M680x0 Options
M680x0 pseudo-opcodes, see Section 26.6.1 Branch Improvement
M680x0 size modifiers, see Section 26.2 Syntax
M680x0 support, see Chapter 26 M680x0 Dependent Features
M680x0 syntax, see Section 26.2 Syntax
M68HC11 addressing modes, see Section 27.2 Syntax
M68HC11 and M68HC12 support, see Chapter 27 M68HC11 and M68HC12 Dependent Features
M68HC11 assembler directive .far, see Section 27.4 Assembler Directives
M68HC11 assembler directive .interrupt, see Section 27.4 Assembler Directives
M68HC11 assembler directive .mode, see Section 27.4 Assembler Directives
M68HC11 assembler directive .relax, see Section 27.4 Assembler Directives
M68HC11 assembler directive .xrefb, see Section 27.4 Assembler Directives
M68HC11 assembler directives, see Section 27.4 Assembler Directives
M68HC11 branch improvement, see Section 27.6.1 Branch Improvement
M68HC11 floating point, see Section 27.5 Floating Point
M68HC11 modifiers, see Section 27.3 Symbolic Operand Modifiers
M68HC11 opcodes, see Section 27.6 Opcodes
M68HC11 options, see Section 27.1 M68HC11 and M68HC12 Options
M68HC11 pseudo-opcodes, see Section 27.6.1 Branch Improvement
M68HC11 syntax, see Section 27.2 Syntax
M68HC12 assembler directives, see Section 27.4 Assembler Directives
M88K support, see Chapter 28 Motorola M88K Dependent Features
machine dependencies, see Chapter 9 Machine Dependent Features
machine directives, AMD 29K, see Section 10.4 AMD 29K Machine Directives
machine directives, ARC, see Section 12.4 ARC Machine Directives
machine directives, ARM, see Section 13.4 ARM Machine Directives
machine directives, H8/300 (none), see Section 17.4 H8/300 Machine Directives
machine directives, H8/500 (none), see Section 18.4 H8/500 Machine Directives
machine directives, i860, see Section 22.3 i860 Machine Directives
machine directives, i960, see Section 23.3 i960 Machine Directives
machine directives, MSP 430, see Section 31.4 MSP 430 Machine Directives
machine directives, SH, see Section 35.4 SH Machine Directives
machine directives, SH64, see Section 36.3 SH64 Machine Directives
machine directives, SPARC, see Section 37.4 Sparc Machine Directives
machine directives, TIC54X, see Section 38.9 Directives
machine directives, V850, see Section 41.4 V850 Machine Directives
machine directives, VAX, see Section 40.3 Vax Machine Directives
machine independent directives, see Chapter 8 Assembler Directives
machine instructions (not covered), see Section 2.1 Structure of this Manual
machine-independent syntax, see Chapter 4 Syntax
macro directive, see Section 8.60 .macro
macro directive, TIC54X, see Section 38.9 Directives
macros, see Section 8.60 .macro
Macros, AMD 29K, see Section 10.2.1 Macros
macros, count executed, see Section 8.60 .macro
Macros, MSP 430, see Section 31.2.1 Macros
macros, TIC54X, see Section 38.10 Macros
make rules, see Section 3.10 Dependency Tracking: -MD
manual, structure and purpose, see Section 2.1 Structure of this Manual
math builtins, TIC54X, see Section 38.7 Math Builtins
Maximum number of continuation lines, see Section 3.8 Configuring listing output: -listing
memory references, i386, see Section 21.6 Memory References
memory references, x86-64, see Section 21.6 Memory References
memory-mapped registers, TIC54X, see Section 38.11 Memory-mapped Registers
merging text and data sections, see Section 3.12 Join Data and Text Sections: -R
messages from assembler, see Section 2.7 Error and Warning Messages
minus, permitted arguments, see Section 7.2.4 Infix Operators
MIPS architecture options, see Section 29.1 Assembler options
MIPS big-endian output, see Section 29.1 Assembler options
MIPS debugging directives, see Section 29.3 Directives for debugging information
MIPS ECOFF sections, see Section 29.2 MIPS ECOFF object code
MIPS endianness, see Chapter 2 Overview
MIPS ISA, see Chapter 2 Overview
MIPS ISA override, see Section 29.4 Directives to override the ISA level
MIPS little-endian output, see Section 29.1 Assembler options
MIPS MDMX instruction generation override, see Section 29.8 Directives to control generation of MIPS ASE instructions
MIPS MIPS-3D instruction generation override, see Section 29.8 Directives to control generation of MIPS ASE instructions
MIPS option stack, see Section 29.7 Directives to save and restore options
MIPS processor, see Chapter 29 MIPS Dependent Features
mit, see Section 26.2 Syntax
mlib directive, TIC54X, see Section 38.9 Directives
mlist directive, TIC54X, see Section 38.9 Directives
MMIX assembler directive BSPEC, see Section 30.3.4 Assembler Directives
MMIX assembler directive BYTE, see Section 30.3.4 Assembler Directives
MMIX assembler directive ESPEC, see Section 30.3.4 Assembler Directives
MMIX assembler directive GREG, see Section 30.3.4 Assembler Directives
MMIX assembler directive IS, see Section 30.3.4 Assembler Directives
MMIX assembler directive LOC, see Section 30.3.4 Assembler Directives
MMIX assembler directive LOCAL, see Section 30.3.4 Assembler Directives
MMIX assembler directive OCTA, see Section 30.3.4 Assembler Directives
MMIX assembler directive PREFIX, see Section 30.3.4 Assembler Directives
MMIX assembler directive TETRA, see Section 30.3.4 Assembler Directives
MMIX assembler directive WYDE, see Section 30.3.4 Assembler Directives
MMIX assembler directives, see Section 30.3.4 Assembler Directives
MMIX line comment characters, see Section 30.3.1 Special Characters
MMIX options, see Section 30.1 Command-line Options
MMIX pseudo-op BSPEC, see Section 30.3.4 Assembler Directives
MMIX pseudo-op BYTE, see Section 30.3.4 Assembler Directives
MMIX pseudo-op ESPEC, see Section 30.3.4 Assembler Directives
MMIX pseudo-op GREG, see Section 30.3.4 Assembler Directives
MMIX pseudo-op IS, see Section 30.3.4 Assembler Directives
MMIX pseudo-op LOC, see Section 30.3.4 Assembler Directives
MMIX pseudo-op LOCAL, see Section 30.3.4 Assembler Directives
MMIX pseudo-op OCTA, see Section 30.3.4 Assembler Directives
MMIX pseudo-op PREFIX, see Section 30.3.4 Assembler Directives
MMIX pseudo-op TETRA, see Section 30.3.4 Assembler Directives
MMIX pseudo-op WYDE, see Section 30.3.4 Assembler Directives
MMIX pseudo-ops, see Section 30.3.4 Assembler Directives
MMIX register names, see Section 30.3.3 Register names
MMIX support, see Chapter 30 MMIX Dependent Features
mmixal differences, see Section 30.4 Differences to mmixal
mmregs directive, TIC54X, see Section 38.9 Directives
mmsg directive, TIC54X, see Section 38.9 Directives
MMX, i386, see Section 21.9 Intel's MMX and AMD's 3DNow! SIMD Operations
MMX, x86-64, see Section 21.9 Intel's MMX and AMD's 3DNow! SIMD Operations
mnemonic suffixes, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
mnemonic suffixes, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
mnemonics for opcodes, VAX, see Section 40.4 VAX Opcodes
mnemonics, D10V, see Section 15.4 Opcodes
mnemonics, D30V, see Section 16.4 Opcodes
mnemonics, H8/300, see Section 17.5 Opcodes
mnemonics, H8/500, see Section 18.5 Opcodes
mnemonics, SH, see Section 35.5 Opcodes
mnemonics, SH64, see Section 36.4 Opcodes
mnemonics, Z8000, see Section 39.4 Opcodes
mnolist directive, TIC54X, see Section 38.9 Directives
Motorola syntax for the 680x0, see Section 26.3 Motorola Syntax
MOVI instructions, relaxation, see Section 42.4.3 Other Immediate Field Relaxation
MRI compatibility mode, see Section 3.9 Assemble in MRI Compatibility Mode: -M
mri directive, see Section 8.57 .mri val
MRI mode, temporarily, see Section 8.57 .mri val
MSP 430 floating point (ieee), see Section 31.3 Floating Point
MSP 430 identifiers, see Section 31.2.2 Special Characters
MSP 430 line comment character, see Section 31.2.2 Special Characters
MSP 430 machine directives, see Section 31.4 MSP 430 Machine Directives
MSP 430 macros, see Section 31.2.1 Macros
MSP 430 opcodes, see Section 31.5 Opcodes
MSP 430 options (none), see Section 31.1 Options
MSP 430 profiling capability, see Section 31.6 Profiling Capability
MSP 430 register names, see Section 31.2.3 Register Names
MSP 430 support, see Chapter 31 MSP 430 Dependent Features
MSP430 Assembler Extensions, see Section 31.2.4 Assembler Extensions
mul instruction, i386, see Section 21.13 Notes
mul instruction, x86-64, see Section 21.13 Notes

N

name, see Section 39.3 Assembler Directives for the Z8000
named section, see Section 8.78 .section name
named sections, see Section 5.2 Linker Sections
names, symbol, see Section 6.3 Symbol Names
naming object file, see Section 3.11 Name the Object File: -o
new page, in listings, see Section 8.24 .eject
newblock directive, TIC54X, see Section 38.9 Directives
newline (\n), see Section 4.6.1.1 Strings
newline, required at file end, see Section 4.5 Statements
no-density directive, see Section 42.5.1 density
no-generics directive, see Section 42.5.4 generics
no-longcalls directive, see Section 42.5.3 longcalls
no-relax directive, see Section 42.5.2 relax
nolist directive, see Section 8.63 .nolist
nolist directive, TIC54X, see Section 38.9 Directives
NOP pseudo op, ARM, see Section 13.5 Opcodes
notes for Alpha, see Section 11.1 Notes
null-terminated strings, see Section 8.5 .asciz "string"
number constants, see Section 4.6.2 Number Constants
number of macros executed, see Section 8.60 .macro
numbered subsections, see Section 5.4 Sub-Sections
numbers, 16-bit, see Section 8.43 .hword expressions
numeric values, see Chapter 7 Expressions
nword directive, SPARC, see Section 37.4 Sparc Machine Directives

O

object file, see Section 2.6 Output (Object) File
object file format, see Section 2.3 Object File Formats
object file name, see Section 3.11 Name the Object File: -o
object file, after errors, see Section 3.17 Generate Object File in Spite of Errors: -Z
obsolescent directives, see Section 8.102 Deprecated Directives
octa directive, see Section 8.64 .octa bignums
octal character code (\ddd), see Section 4.6.1.1 Strings
octal integers, see Section 4.6.2.1 Integers
offset directive, V850, see Section 41.4 V850 Machine Directives
opcode mnemonics, VAX, see Section 40.4 VAX Opcodes
opcode names, Xtenxa, see Section 42.2.1 Opcode Names
opcode summary, D10V, see Section 15.4 Opcodes
opcode summary, D30V, see Section 16.4 Opcodes
opcode summary, H8/300, see Section 17.5 Opcodes
opcode summary, H8/500, see Section 18.5 Opcodes
opcode summary, SH, see Section 35.5 Opcodes
opcode summary, SH64, see Section 36.4 Opcodes
opcode summary, Z8000, see Section 39.4 Opcodes
opcodes for AMD 29K, see Section 10.5 Opcodes
opcodes for ARC, see Section 12.5 Opcodes
opcodes for ARM, see Section 13.5 Opcodes
opcodes for MSP 430, see Section 31.5 Opcodes
opcodes for V850, see Section 41.5 Opcodes
opcodes, i860, see Section 22.4 i860 Opcodes
opcodes, i960, see Section 23.4 i960 Opcodes
opcodes, M680x0, see Section 26.6 Opcodes
opcodes, M68HC11, see Section 27.6 Opcodes
operand delimiters, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
operand delimiters, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
operand notation, VAX, see Section 40.6 VAX Operands
operands in expressions, see Section 7.2.1 Arguments
operator precedence, see Section 7.2.4 Infix Operators
operators, in expressions, see Section 7.2.2 Operators
operators, permitted arguments, see Section 7.2.4 Infix Operators
optimization, D10V, see Chapter 2 Overview
optimization, D30V, see Chapter 2 Overview
optimizations, see Section 42.3 Xtensa Optimizations
option directive, ARC, see Section 12.4 ARC Machine Directives
option directive, TIC54X, see Section 38.9 Directives
option summary, see Chapter 2 Overview
options for Alpha, see Section 11.2 Options
options for AMD29K (none), see Section 10.1 Options
options for ARC (none), see Section 12.1 Options
options for ARM (none), see Section 13.1 Options
options for i386, see Section 21.1 Options
options for MSP430 (none), see Section 31.1 Options
options for PDP-11, see Section 32.1 Options
options for PowerPC, see Section 34.1 Options
options for SPARC, see Section 37.1 Options
options for V850 (none), see Section 41.1 Options
options for VAX/VMS, see Section 40.1 VAX Command-Line Options
options for x86-64, see Section 21.1 Options
options, all versions of assembler, see Chapter 3 Command-Line Options
options, command line, see Section 2.4 Command Line
options, CRIS, see Section 14.1 Command-line Options
options, D10V, see Section 15.1 D10V Options
options, D30V, see Section 16.1 D30V Options
options, H8/300 (none), see Section 17.1 Options
options, H8/500 (none), see Section 18.1 Options
options, i960, see Section 23.1 i960 Command-line Options
options, IP2K, see Section 24.1 IP2K Options
options, M32R, see Section 25.1 M32R Options
options, M680x0, see Section 26.1 M680x0 Options
options, M68HC11, see Section 27.1 M68HC11 and M68HC12 Options
options, MMIX, see Section 30.1 Command-line Options
options, PJ, see Section 33.1 Options
options, SH, see Section 35.1 Options
options, SH64, see Section 36.1 Options
options, TIC54X, see Section 38.1 Options
options, Z8000, see Section 39.1 Options
org directive, see Section 8.65 .org new-lc, fill
other attribute, of a.out symbol, see Section 6.5.3.2 Other
output file, see Section 2.6 Output (Object) File
p2align directive, see Section 8.66 .p2align[wl] abs-expr, abs-expr, abs-expr
p2alignl directive, see Section 8.66 .p2align[wl] abs-expr, abs-expr, abs-expr
p2alignw directive, see Section 8.66 .p2align[wl] abs-expr, abs-expr, abs-expr

P

padding the location counter, see Section 8.3 .align abs-expr, abs-expr, abs-expr
padding the location counter given a power of two, see Section 8.66 .p2align[wl] abs-expr, abs-expr, abs-expr
padding the location counter given number of bytes, see Section 8.6 .balign[wl] abs-expr, abs-expr, abs-expr
page, in listings, see Section 8.24 .eject
paper size, for listings, see Section 8.71 .psize lines, columns
paths for .include, see Section 3.5 .includeSearch Path: -Ipath
patterns, writing in memory, see Section 8.38 .fill repeat, size, value
PDP-11 comments, see Section 32.3 PDP-11 Assembly Language Syntax
PDP-11 floating-point register syntax, see Section 32.3 PDP-11 Assembly Language Syntax
PDP-11 general-purpose register syntax, see Section 32.3 PDP-11 Assembly Language Syntax
PDP-11 instruction naming, see Section 32.4 Instruction Naming
PDP-11 support, see Chapter 32 PDP-11 Dependent Features
PDP-11 syntax, see Section 32.3 PDP-11 Assembly Language Syntax
PIC code generation for ARM, see Section 13.1 Options
PIC code generation for M32R, see Section 25.1 M32R Options
PJ endianness, see Chapter 2 Overview
PJ options, see Section 33.1 Options
PJ support, see Chapter 33 picoJava Dependent Features
plus, permitted arguments, see Section 7.2.4 Infix Operators
popsection directive, see Section 8.68 .popsection
Position-independent code, CRIS, see Section 14.1 Command-line Options
Position-independent code, symbols in, CRIS, see Section 14.3.2 Symbols in position-independent code
PowerPC architectures, see Section 34.1 Options
PowerPC directives, see Section 34.2 PowerPC Assembler Directives
PowerPC options, see Section 34.1 Options
PowerPC support, see Chapter 34 PowerPC Dependent Features
precedence of directives, see Section 42.5 Directives
precedence of operators, see Section 7.2.4 Infix Operators
precision, floating point, see Section 4.6.2.3 Flonums
prefix operators, see Section 7.2.3 Prefix Operator
prefixes, i386, see Section 21.5 Instruction Prefixes
preprocessing, see Section 4.1 Preprocessing
preprocessing, turning on and off, see Section 4.1 Preprocessing
previous directive, see Section 8.67 .previous
primary attributes, COFF symbols, see Section 6.5.4 Symbol Attributes for COFF
print directive, see Section 8.69 .print string
proc directive, SPARC, see Section 37.4 Sparc Machine Directives
profiler directive, MSP 430, see Section 31.4 MSP 430 Machine Directives
profiling capability for MSP 430, see Section 31.6 Profiling Capability
protected directive, see Section 8.70 .protected names
protected registers, AMD 29K, see Section 10.2.3 Register Names
pseudo-op .dword, CRIS, see Section 14.3.4 Assembler Directives
pseudo-op .syntax, CRIS, see Section 14.3.4 Assembler Directives
pseudo-op BSPEC, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op BYTE, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op ESPEC, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op GREG, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op IS, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op LOC, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op LOCAL, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op OCTA, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op PREFIX, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op TETRA, MMIX, see Section 30.3.4 Assembler Directives
pseudo-op WYDE, MMIX, see Section 30.3.4 Assembler Directives
pseudo-opcodes, M680x0, see Section 26.6.1 Branch Improvement
pseudo-opcodes, M68HC11, see Section 27.6.1 Branch Improvement
pseudo-ops for branch, VAX, see Section 40.5 VAX Branch Improvement
pseudo-ops, CRIS, see Section 14.3.4 Assembler Directives
pseudo-ops, machine independent, see Chapter 8 Assembler Directives
pseudo-ops, MMIX, see Section 30.3.4 Assembler Directives
psize directive, see Section 8.71 .psize lines, columns
pstring directive, TIC54X, see Section 38.9 Directives
psw register, V850, see Section 41.2.2 Register Names
purgem directive, see Section 8.72 .purgem name
purpose of gnu assembler, see Section 2.2 The GNU Assembler
pushsection directive, see Section 8.73 .pushsection name, subsection
quad directive, see Section 8.74 .quad bignums
quad directive, i386, see Section 21.8 Floating Point
quad directive, x86-64, see Section 21.8 Floating Point

R

real-mode code, i386, see Section 21.10 Writing 16-bit Code
ref directive, TIC54X, see Section 38.9 Directives
register directive, SPARC, see Section 37.4 Sparc Machine Directives
register names, Alpha, see Section 11.3.2 Register Names
register names, AMD 29K, see Section 10.2.3 Register Names
register names, ARC, see Section 12.2.2 Register Names
register names, ARM, see Section 13.2.2 Register Names
register names, CRIS, see Section 14.3.3 Register names
register names, H8/300, see Section 17.2.2 Register Names
register names, MMIX, see Section 30.3.3 Register names
register names, MSP 430, see Section 31.2.3 Register Names
register names, V850, see Section 41.2.2 Register Names
register names, VAX, see Section 40.6 VAX Operands
register names, Xtensa, see Section 42.2.2 Register Names
register operands, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
register operands, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
registers, D10V, see Section 15.2.4 Register Names
registers, D30V, see Section 16.2.5 Register Names
registers, H8/500, see Section 18.2.2 Register Names
registers, i386, see Section 21.4 Register Naming
registers, SH, see Section 35.2.2 Register Names
registers, SH64, see Section 36.2.2 Register Names
registers, TIC54X memory-mapped, see Section 38.11 Memory-mapped Registers
registers, x86-64, see Section 21.4 Register Naming
registers, Z8000, see Section 39.2.2 Register Names
relax directive, see Section 42.5.2 relax
relaxation, see Section 42.4 Xtensa Relaxation
relaxation of ADDI instructions, see Section 42.4.3 Other Immediate Field Relaxation
relaxation of branch instructions, see Section 42.4.1 Conditional Branch Relaxation
relaxation of call instructions, see Section 42.4.2 Function Call Relaxation
relaxation of immediate fields, see Section 42.4.3 Other Immediate Field Relaxation
relaxation of L16SI instructions, see Section 42.4.3 Other Immediate Field Relaxation
relaxation of L16UI instructions, see Section 42.4.3 Other Immediate Field Relaxation
relaxation of L32I instructions, see Section 42.4.3 Other Immediate Field Relaxation
relaxation of L8UI instructions, see Section 42.4.3 Other Immediate Field Relaxation
relaxation of MOVI instructions, see Section 42.4.3 Other Immediate Field Relaxation
relocation, see Chapter 5 Sections and Relocation
relocation example, see Section 5.2 Linker Sections
relocations, Alpha, see Section 11.3.3 Relocations
repeat prefixes, i386, see Section 21.5 Instruction Prefixes
reporting bugs in assembler, see Chapter 43 Reporting Bugs
rept directive, see Section 8.75 .rept count
req directive, ARM, see Section 13.4 ARM Machine Directives
reserve directive, SPARC, see Section 37.4 Sparc Machine Directives
return instructions, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
return instructions, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
REX prefixes, i386, see Section 21.5 Instruction Prefixes
rsect, see Section 39.3 Assembler Directives for the Z8000
sblock directive, TIC54X, see Section 38.9 Directives
sbttl directive, see Section 8.76 .sbttl "subheading"
scl directive, see Section 8.77 .scl class
sdaoff pseudo-op, V850, see Section 41.5 Opcodes

S

search path for .include, see Section 3.5 .includeSearch Path: -Ipath
sect directive, AMD 29K, see Section 10.4 AMD 29K Machine Directives
sect directive, MSP 430, see Section 31.4 MSP 430 Machine Directives
sect directive, TIC54X, see Section 38.9 Directives
section directive (COFF version), see Section 8.78 .section name
section directive (ELF version), see Section 8.78 .section name
section directive, V850, see Section 41.4 V850 Machine Directives
section override prefixes, i386, see Section 21.5 Instruction Prefixes
Section Stack, see Section 8.89 .subsection name
Section Stack, see Section 8.78 .section name
Section Stack, see Section 8.73 .pushsection name, subsection
Section Stack, see Section 8.68 .popsection
Section Stack, see Section 8.67 .previous
section-relative addressing, see Section 5.1 Background
sections, see Chapter 5 Sections and Relocation
sections in messages, internal, see Section 5.3 Assembler Internal Sections
sections, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
sections, named, see Section 5.2 Linker Sections
sections, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
seg directive, SPARC, see Section 37.4 Sparc Machine Directives
segm, see Section 39.3 Assembler Directives for the Z8000
set directive, see Section 8.79 .set symbol, expression
set directive, M88K, see Section 28.1 M88K Machine Directives
set directive, TIC54X, see Section 38.9 Directives
SH addressing modes, see Section 35.2.3 Addressing Modes
SH floating point (ieee), see Section 35.3 Floating Point
SH line comment character, see Section 35.2.1 Special Characters
SH line separator, see Section 35.2.1 Special Characters
SH machine directives, see Section 35.4 SH Machine Directives
SH opcode summary, see Section 35.5 Opcodes
SH options, see Section 35.1 Options
SH registers, see Section 35.2.2 Register Names
SH support, see Chapter 35 Renesas / SuperH SH Dependent Features
SH64 ABI options, see Section 36.1 Options
SH64 addressing modes, see Section 36.2.3 Addressing Modes
SH64 ISA options, see Section 36.1 Options
SH64 line comment character, see Section 36.2.1 Special Characters
SH64 line separator, see Section 36.2.1 Special Characters
SH64 machine directives, see Section 36.3 SH64 Machine Directives
SH64 opcode summary, see Section 36.4 Opcodes
SH64 options, see Section 36.1 Options
SH64 registers, see Section 36.2.2 Register Names
SH64 support, see Chapter 36 SuperH SH64 Dependent Features
shigh directive, M32R, see Section 25.2 M32R Directives
short directive, see Section 8.80 .short expressions
short directive, ARC, see Section 12.4 ARC Machine Directives
short directive, TIC54X, see Section 38.9 Directives
SIMD, i386, see Section 21.9 Intel's MMX and AMD's 3DNow! SIMD Operations
SIMD, x86-64, see Section 21.9 Intel's MMX and AMD's 3DNow! SIMD Operations
single character constant, see Section 4.6.1.2 Characters
single directive, see Section 8.81 .single flonums
single directive, i386, see Section 21.8 Floating Point
single directive, x86-64, see Section 21.8 Floating Point
sixteen bit integers, see Section 8.43 .hword expressions
sixteen byte integer, see Section 8.64 .octa bignums
size directive (COFF version), see Section 8.82 .size
size directive (ELF version), see Section 8.82 .size
size modifiers, D10V, see Section 15.2.1 Size Modifiers
size modifiers, D30V, see Section 16.2.1 Size Modifiers
size modifiers, M680x0, see Section 26.2 Syntax
size prefixes, i386, see Section 21.5 Instruction Prefixes
size suffixes, H8/300, see Section 17.5 Opcodes
sizes operands, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
sizes operands, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
skip directive, see Section 8.84 .skip size, fill
skip directive, M680x0, see Section 26.5 680x0 Machine Directives
skip directive, SPARC, see Section 37.4 Sparc Machine Directives
sleb128 directive, see Section 8.83 .sleb128 expressions
small objects, MIPS ECOFF, see Section 29.2 MIPS ECOFF object code
SOM symbol attributes, see Section 6.5.5 Symbol Attributes for SOM
source program, see Section 2.5 Input Files
source, destination operands; i386, see Section 21.2 AT&T Syntax versus Intel Syntax
source, destination operands; x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
sp register, see Section 42.2.2 Register Names
sp register, V850, see Section 41.2.2 Register Names
space directive, see Section 8.85 .space size, fill
space directive, TIC54X, see Section 38.9 Directives
space used, maximum for assembly, see Section 3.13 Display Assembly Statistics: -statistics
SPARC architectures, see Section 37.1 Options
SPARC data alignment, see Section 37.2 Enforcing aligned data
SPARC floating point (ieee), see Section 37.3 Floating Point
SPARC machine directives, see Section 37.4 Sparc Machine Directives
SPARC options, see Section 37.1 Options
SPARC support, see Chapter 37 SPARC Dependent Features
special characters, ARC, see Section 12.2.1 Special Characters
special characters, M680x0, see Section 26.6.2 Special Characters
special purpose registers, AMD 29K, see Section 10.2.3 Register Names
special purpose registers, MSP 430, see Section 31.2.3 Register Names
specific opcodes, see Section 42.2.1 Opcode Names
sslist directive, TIC54X, see Section 38.9 Directives
ssnolist directive, TIC54X, see Section 38.9 Directives
stabd directive, see Section 8.86 .stabd, .stabn, .stabs
stabn directive, see Section 8.86 .stabd, .stabn, .stabs
stabs directive, see Section 8.86 .stabd, .stabn, .stabs
stabx directives, see Section 8.86 .stabd, .stabn, .stabs
standard assembler sections, see Section 5.1 Background
standard input, as input file, see Section 2.4 Command Line
statement separator character, see Section 4.5 Statements
statement separator, Alpha, see Section 11.3.1 Special Characters
statement separator, ARM, see Section 13.2.1 Special Characters
statement separator, H8/300, see Section 17.2.1 Special Characters
statement separator, H8/500, see Section 18.2.1 Special Characters
statement separator, SH, see Section 35.2.1 Special Characters
statement separator, SH64, see Section 36.2.1 Special Characters
statement separator, Z8000, see Section 39.2.1 Special Characters
statements, structure of, see Section 4.5 Statements
statistics, about assembly, see Section 3.13 Display Assembly Statistics: -statistics
stopping the assembly, see Section 8.2 .ABORT
string constants, see Section 4.6.1.1 Strings
string directive, see Section 8.87 .string"str"
string directive on HPPA, see Section 19.5 HPPA Assembler Directives
string directive, M88K, see Section 28.1 M88K Machine Directives
string directive, TIC54X, see Section 38.9 Directives
string literals, see Section 8.4 .ascii "string"
string, copying to object file, see Section 8.87 .string"str"
struct directive, see Section 8.88 .struct expression
struct directive, TIC54X, see Section 38.9 Directives
structure debugging, COFF, see Section 8.91 .tag structname
sub-instruction ordering, D10V, see Section 15.2.3 Special Characters
sub-instruction ordering, D30V, see Section 16.2.3 Special Characters
sub-instructions, D10V, see Section 15.2.2 Sub-Instructions
sub-instructions, D30V, see Section 16.2.2 Sub-Instructions
subexpressions, see Section 7.2.1 Arguments
subsection directive, see Section 8.89 .subsection name
subsym builtins, TIC54X, see Section 38.10 Macros
subtitles for listings, see Section 8.76 .sbttl "subheading"
subtraction, permitted arguments, see Section 7.2.4 Infix Operators
summary of options, see Chapter 2 Overview
support, see Chapter 19 HPPA Dependent Features
supporting files, including, see Section 8.47 .include "file"
suppressing warnings, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
sval, see Section 39.3 Assembler Directives for the Z8000
symbol attributes, see Section 6.5 Symbol Attributes
symbol attributes, a.out, see Section 6.5.3 Symbol Attributes: a.out
symbol attributes, COFF, see Section 6.5.4 Symbol Attributes for COFF
symbol attributes, SOM, see Section 6.5.5 Symbol Attributes for SOM
symbol descriptor, COFF, see Section 8.21 .desc symbol, abs-expression
symbol modifiers, see Section 27.3 Symbolic Operand Modifiers
symbol names, see Section 6.3 Symbol Names
symbol names, $ in, see Section 36.2.1 Special Characters
symbol names, $ in, see Section 35.2.1 Special Characters
symbol names, $ in, see Section 18.2.1 Special Characters
symbol names, $ in, see Section 16.2.3 Special Characters
symbol names, $ in, see Section 15.2.3 Special Characters
symbol names, local, see Section 6.3 Symbol Names
symbol names, temporary, see Section 6.3 Symbol Names
symbol storage class (COFF), see Section 8.77 .scl class
symbol type, see Section 6.5.2 Type
symbol type, COFF, see Section 8.94 .type
symbol type, ELF, see Section 8.94 .type
symbol value, see Section 6.5.1 Value
symbol value, setting, see Section 8.79 .set symbol, expression
symbol values, assigning, see Section 6.2 Giving Symbols Other Values
symbol versioning, see Section 8.90 .symver
symbol, common, see Section 8.8 .comm symbol, length
symbol, making visible to linker, see Section 8.41 .global symbol, .globl symbol
symbolic debuggers, information for, see Section 8.86 .stabd, .stabn, .stabs
symbols, see Chapter 6 Symbols
Symbols in position-independent code, CRIS, see Section 14.3.2 Symbols in position-independent code
symbols with uppercase, VAX/VMS, see Section 40.1 VAX Command-Line Options
symbols, assigning values to, see Section 8.31 .equ symbol, expression
symbols, local common, see Section 8.52 .lcomm symbol, length
symver directive, see Section 8.90 .symver
syntax compatibility, i386, see Section 21.2 AT&T Syntax versus Intel Syntax
syntax compatibility, x86-64, see Section 21.2 AT&T Syntax versus Intel Syntax
syntax, D10V, see Section 15.2 Syntax
syntax, D30V, see Section 16.2 Syntax
syntax, M680x0, see Section 26.2 Syntax
syntax, M68HC11, see Section 27.3 Symbolic Operand Modifiers
syntax, M68HC11, see Section 27.2 Syntax
syntax, machine-independent, see Chapter 4 Syntax
syntax, Xtensa assembler, see Section 42.2 Assembler Syntax
sysproc directive, i960, see Section 23.3 i960 Machine Directives

T

tab (\t), see Section 4.6.1.1 Strings
tab directive, TIC54X, see Section 38.9 Directives
tag directive, see Section 8.91 .tag structname
tag directive, TIC54X, see Section 38.9 Directives
tdaoff pseudo-op, V850, see Section 41.5 Opcodes
temporary symbol names, see Section 6.3 Symbol Names
text and data sections, joining, see Section 3.12 Join Data and Text Sections: -R
text directive, see Section 8.92 .text subsection
text section, see Section 5.2 Linker Sections
tfloat directive, i386, see Section 21.8 Floating Point
tfloat directive, x86-64, see Section 21.8 Floating Point
thumb directive, ARM, see Section 13.4 ARM Machine Directives
Thumb support, see Chapter 13 ARM Dependent Features
thumb_func directive, ARM, see Section 13.4 ARM Machine Directives
thumb_set directive, ARM, see Section 13.4 ARM Machine Directives
TIC54X builtin math functions, see Section 38.7 Math Builtins
TIC54X machine directives, see Section 38.9 Directives
TIC54X memory-mapped registers, see Section 38.11 Memory-mapped Registers
TIC54X options, see Section 38.1 Options
TIC54X subsym builtins, see Section 38.10 Macros
TIC54X support, see Chapter 38 TIC54X Dependent Features
TIC54X-specific macros, see Section 38.10 Macros
time, total for assembly, see Section 3.13 Display Assembly Statistics: -statistics
title directive, see Section 8.93 .title "heading"
tp register, V850, see Section 41.2.2 Register Names
trusted compiler, see Section 3.4 Work Faster: -f
turning preprocessing on and off, see Section 4.1 Preprocessing
type directive (COFF version), see Section 8.94 .type
type directive (ELF version), see Section 8.94 .type
type of a symbol, see Section 6.5.2 Type
ualong directive, SH, see Section 35.4 SH Machine Directives
uaword directive, SH, see Section 35.4 SH Machine Directives
ubyte directive, TIC54X, see Section 38.9 Directives
uchar directive, TIC54X, see Section 38.9 Directives
uhalf directive, TIC54X, see Section 38.9 Directives
uint directive, TIC54X, see Section 38.9 Directives
uleb128 directive, see Section 8.95 .uleb128 expressions
ulong directive, TIC54X, see Section 38.9 Directives

U

undefined section, see Section 5.2 Linker Sections
union directive, TIC54X, see Section 38.9 Directives
unreq directive, ARM, see Section 13.4 ARM Machine Directives
unsegm, see Section 39.3 Assembler Directives for the Z8000
use directive, AMD 29K, see Section 10.4 AMD 29K Machine Directives
usect directive, TIC54X, see Section 38.9 Directives
ushort directive, TIC54X, see Section 38.9 Directives
uword directive, TIC54X, see Section 38.9 Directives

V

V850 command line options, see Section 41.1 Options
V850 floating point (ieee), see Section 41.3 Floating Point
V850 line comment character, see Section 41.2.1 Special Characters
V850 machine directives, see Section 41.4 V850 Machine Directives
V850 opcodes, see Section 41.5 Opcodes
V850 options (none), see Section 41.1 Options
V850 register names, see Section 41.2.2 Register Names
V850 support, see Chapter 41 v850 Dependent Features
val directive, see Section 8.96 .val addr
value attribute, COFF, see Section 8.96 .val addr
value of a symbol, see Section 6.5.1 Value
var directive, TIC54X, see Section 38.9 Directives
VAX bitfields not supported, see Section 40.7 Not Supported on VAX
VAX branch improvement, see Section 40.5 VAX Branch Improvement
VAX command-line options ignored, see Section 40.1 VAX Command-Line Options
VAX displacement sizing character, see Section 40.6 VAX Operands
VAX floating point, see Section 40.2 VAX Floating Point
VAX immediate character, see Section 40.6 VAX Operands
VAX indirect character, see Section 40.6 VAX Operands
VAX machine directives, see Section 40.3 Vax Machine Directives
VAX opcode mnemonics, see Section 40.4 VAX Opcodes
VAX operand notation, see Section 40.6 VAX Operands
VAX register names, see Section 40.6 VAX Operands
VAX support, see Chapter 40 VAX Dependent Features
Vax-11 C compatibility, see Section 40.1 VAX Command-Line Options
VAX/VMS options, see Section 40.1 VAX Command-Line Options
version directive, see Section 8.97 .version "string"
version directive, TIC54X, see Section 38.9 Directives
version of assembler, see Section 3.15 Announce Version: -v
versions of symbols, see Section 8.90 .symver
visibility, see Section 8.70 .protected names
visibility, see Section 8.49 .internal names
visibility, see Section 8.42 .hidden names
VMS (VAX) options, see Section 40.1 VAX Command-Line Options
vtable_entry, see Section 8.98 .vtable_entry table, offset
vtable_inherit, see Section 8.99 .vtable_inherit child, parent

W

warning for altered difference tables, see Section 3.6 Difference Tables: -K
warning messages, see Section 2.7 Error and Warning Messages
warnings, causing error, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
warnings, M32R, see Section 25.3 M32R Warnings
warnings, suppressing, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
warnings, switching on, see Section 3.16 Control Warnings: -W, -warn, -no-warn, -fatal-warnings
weak directive, see Section 8.100 .weak names
whitespace, see Section 4.2 Whitespace
whitespace, removed by preprocessor, see Section 4.1 Preprocessing
wide floating point directives, VAX, see Section 40.3 Vax Machine Directives
width directive, TIC54X, see Section 38.9 Directives
Width of continuation lines of disassembly output, see Section 3.8 Configuring listing output: -listing
Width of first line disassembly output, see Section 3.8 Configuring listing output: -listing
Width of source line output, see Section 3.8 Configuring listing output: -listing
wmsg directive, TIC54X, see Section 38.9 Directives
word directive, see Section 8.101 .word expressions
word directive, ARC, see Section 12.4 ARC Machine Directives
word directive, H8/300, see Section 17.4 H8/300 Machine Directives
word directive, H8/500, see Section 18.4 H8/500 Machine Directives
word directive, i386, see Section 21.8 Floating Point
word directive, M88K, see Section 28.1 M88K Machine Directives
word directive, SPARC, see Section 37.4 Sparc Machine Directives
word directive, TIC54X, see Section 38.9 Directives
word directive, x86-64, see Section 21.8 Floating Point
writing patterns in memory, see Section 8.38 .fill repeat, size, value
wval, see Section 39.3 Assembler Directives for the Z8000

X

x86-64 arch directive, see Section 21.12 Specifying CPU Architecture
x86-64 att_syntax pseudo op, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 conversion instructions, see Section 21.3 Instruction Naming
x86-64 floating point, see Section 21.8 Floating Point
x86-64 immediate operands, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 instruction naming, see Section 21.3 Instruction Naming
x86-64 intel_syntax pseudo op, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 jump optimization, see Section 21.7 Handling of Jump Instructions
x86-64 jump, call, return, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 jump/call operands, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 memory references, see Section 21.6 Memory References
x86-64 options, see Section 21.1 Options
x86-64 register operands, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 registers, see Section 21.4 Register Naming
x86-64 sections, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 size suffixes, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 source, destination operands, see Section 21.2 AT&T Syntax versus Intel Syntax
x86-64 support, see Chapter 21 80386 Dependent Features
x86-64 syntax compatibility, see Section 21.2 AT&T Syntax versus Intel Syntax
xfloat directive, TIC54X, see Section 38.9 Directives
xlong directive, TIC54X, see Section 38.9 Directives
Xtensa architecture, see Chapter 42 Xtensa Dependent Features
Xtensa assembler syntax, see Section 42.2 Assembler Syntax
Xtensa density option, see Section 42.1 Command Line Options
Xtensa directives, see Section 42.5 Directives
Xtensa opcode names, see Section 42.2.1 Opcode Names
Xtensa register names, see Section 42.2.2 Register Names
xword directive, SPARC, see Section 37.4 Sparc Machine Directives

Z

Z800 addressing modes, see Section 39.2.3 Addressing Modes
Z8000 directives, see Section 39.3 Assembler Directives for the Z8000
Z8000 line comment character, see Section 39.2.1 Special Characters
Z8000 line separator, see Section 39.2.1 Special Characters
Z8000 opcode summary, see Section 39.4 Opcodes
Z8000 options, see Section 39.1 Options
Z8000 registers, see Section 39.2.2 Register Names
Z8000 support, see Chapter 39 Z8000 Dependent Features
zdaoff pseudo-op, V850, see Section 41.5 Opcodes
zero register, V850, see Section 41.2.2 Register Names
zero-terminated strings, see Section 8.5 .asciz "string"