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catc.c File Reference
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/ethtool.h>
#include <linux/crc32.h>
#include <linux/bitops.h>
#include <linux/gfp.h>
#include <asm/uaccess.h>
#include <linux/usb.h>

Go to the source code of this file.

Data Structures

struct  catc
 
struct  catc::ctrl_queue
 

Macros

#define DRIVER_VERSION   "v2.8"
 
#define DRIVER_AUTHOR   "Vojtech Pavlik <[email protected]>"
 
#define DRIVER_DESC   "CATC EL1210A NetMate USB Ethernet driver"
 
#define SHORT_DRIVER_DESC   "EL1210A NetMate USB Ethernet"
 
#define STATS_UPDATE   (HZ) /* Time between stats updates */
 
#define TX_TIMEOUT   (5*HZ) /* Max time the queue can be stopped */
 
#define PKT_SZ   1536 /* Max Ethernet packet size */
 
#define RX_MAX_BURST   15 /* Max packets per rx buffer (> 0, < 16) */
 
#define TX_MAX_BURST   15 /* Max full sized packets per tx buffer (> 0) */
 
#define CTRL_QUEUE   16 /* Max control requests in flight (power of two) */
 
#define RX_PKT_SZ   1600 /* Max size of receive packet for F5U011 */
 
#define CTRL_RUNNING   0
 
#define RX_RUNNING   1
 
#define TX_RUNNING   2
 
#define catc_get_mac(catc, mac)   catc_ctrl_msg(catc, USB_DIR_IN, GetMac, 0, 0, mac, 6)
 
#define catc_reset(catc)   catc_ctrl_msg(catc, USB_DIR_OUT, Reset, 0, 0, NULL, 0)
 
#define catc_set_reg(catc, reg, val)   catc_ctrl_msg(catc, USB_DIR_OUT, SetReg, val, reg, NULL, 0)
 
#define catc_get_reg(catc, reg, buf)   catc_ctrl_msg(catc, USB_DIR_IN, GetReg, 0, reg, buf, 1)
 
#define catc_write_mem(catc, addr, buf, size)   catc_ctrl_msg(catc, USB_DIR_OUT, WriteMem, 0, addr, buf, size)
 
#define catc_read_mem(catc, addr, buf, size)   catc_ctrl_msg(catc, USB_DIR_IN, ReadMem, 0, addr, buf, size)
 
#define f5u011_rxmode(catc, rxmode)   catc_ctrl_msg(catc, USB_DIR_OUT, SetRxMode, 0, 1, rxmode, 2)
 
#define f5u011_rxmode_async(catc, rxmode)   catc_ctrl_async(catc, USB_DIR_OUT, SetRxMode, 0, 1, &rxmode, 2, NULL)
 
#define f5u011_mchash_async(catc, hash)   catc_ctrl_async(catc, USB_DIR_OUT, SetRxMode, 0, 2, &hash, 8, NULL)
 
#define catc_set_reg_async(catc, reg, val)   catc_ctrl_async(catc, USB_DIR_OUT, SetReg, val, reg, NULL, 0, NULL)
 
#define catc_get_reg_async(catc, reg, cb)   catc_ctrl_async(catc, USB_DIR_IN, GetReg, 0, reg, NULL, 1, cb)
 
#define catc_write_mem_async(catc, addr, buf, size)   catc_ctrl_async(catc, USB_DIR_OUT, WriteMem, 0, addr, buf, size, NULL)
 

Enumerations

enum  control_requests {
  ReadMem = 0xf1, GetMac = 0xf2, Reset = 0xf4, SetMac = 0xf5,
  SetRxMode = 0xf5, WriteROM = 0xf8, SetReg = 0xfa, GetReg = 0xfb,
  WriteMem = 0xfc, ReadROM = 0xfd, USB_REQ_WRITE_REGS = 0x21, USB_REQ_READ_REGS = 0x22,
  USB_REQ_WRITE_RF = 0x23, USB_REQ_PROG_FLASH = 0x24, USB_REQ_EEPROM_START = 0x0128, USB_REQ_EEPROM_MID = 0x28,
  USB_REQ_EEPROM_END = 0x0228, USB_REQ_FIRMWARE_DOWNLOAD = 0x30, USB_REQ_FIRMWARE_CONFIRM = 0x31, USB_REQ_FIRMWARE_READ_DATA = 0x32
}
 
enum  register_offsets {
  PCIDeviceConfig =0x50040, GenCtrl =0x50070, IntrTimerCtrl =0x50074, IntrClear =0x50080,
  IntrStatus =0x50084, IntrEnable =0x50088, MIICtrl =0x52000, TxStationAddr =0x50120,
  EEPROMCtrl =0x51000, GPIOCtrl =0x5008C, TxDescCtrl =0x50090, TxRingPtr =0x50098,
  HiPriTxRingPtr =0x50094, TxRingHiAddr =0x5009C, TxProducerIdx =0x500A0, TxConsumerIdx =0x500A4,
  TxThreshold =0x500B0, CompletionHiAddr =0x500B4, TxCompletionAddr =0x500B8, RxCompletionAddr =0x500BC,
  RxCompletionQ2Addr =0x500C0, CompletionQConsumerIdx =0x500C4, RxDMACtrl =0x500D0, RxDescQCtrl =0x500D4,
  RxDescQHiAddr =0x500DC, RxDescQAddr =0x500E0, RxDescQIdx =0x500E8, RxDMAStatus =0x500F0,
  RxFilterMode =0x500F4, TxMode =0x55000, VlanType =0x55064, PerfFilterTable =0x56000,
  HashTable =0x56100, TxGfpMem =0x58000, RxGfpMem =0x5a000, ChipCmd = 0x00,
  ChipConfig = 0x04, EECtrl = 0x08, PCIBusCfg = 0x0C, IntrStatus = 0x10,
  IntrMask = 0x14, IntrEnable = 0x18, IntrHoldoff = 0x1C, TxRingPtr = 0x20,
  TxConfig = 0x24, RxRingPtr = 0x30, RxConfig = 0x34, ClkRun = 0x3C,
  WOLCmd = 0x40, PauseCmd = 0x44, RxFilterAddr = 0x48, RxFilterData = 0x4C,
  BootRomAddr = 0x50, BootRomData = 0x54, SiliconRev = 0x58, StatsCtrl = 0x5C,
  StatsData = 0x60, RxPktErrs = 0x60, RxMissed = 0x68, RxCRCErrs = 0x64,
  BasicControl = 0x80, BasicStatus = 0x84, AnegAdv = 0x90, AnegPeer = 0x94,
  PhyStatus = 0xC0, MIntrCtrl = 0xC4, MIntrStatus = 0xC8, PhyCtrl = 0xE4,
  PGSEL = 0xCC, PMDCSR = 0xE4, TSTDAT = 0xFC, DSPCFG = 0xF4,
  SDCFG = 0xF8, StationAddr =0x00, RxConfig =0x06, TxConfig =0x07,
  ChipCmd =0x08, ChipCmd1 =0x09, TQWake =0x0A, IntrStatus =0x0C,
  IntrEnable =0x0E, MulticastFilter0 =0x10, MulticastFilter1 =0x14, RxRingPtr =0x18,
  TxRingPtr =0x1C, GFIFOTest =0x54, MIIPhyAddr =0x6C, MIIStatus =0x6D,
  PCIBusConfig =0x6E, PCIBusConfig1 =0x6F, MIICmd =0x70, MIIRegAddr =0x71,
  MIIData =0x72, MACRegEEcsr =0x74, ConfigA =0x78, ConfigB =0x79,
  ConfigC =0x7A, ConfigD =0x7B, RxMissed =0x7C, RxCRCErrs =0x7E,
  MiscCmd =0x81, StickyHW =0x83, IntrStatus2 =0x84, CamMask =0x88,
  CamCon =0x92, CamAddr =0x93, WOLcrSet =0xA0, PwcfgSet =0xA1,
  WOLcgSet =0xA3, WOLcrClr =0xA4, WOLcrClr1 =0xA6, WOLcgClr =0xA7,
  PwrcsrSet =0xA8, PwrcsrSet1 =0xA9, PwrcsrClr =0xAC, PwrcsrClr1 =0xAD,
  TxBufCount = 0x20, RxBufCount = 0x21, OpModes = 0x22, TxQed = 0x23,
  RxQed = 0x24, MaxBurst = 0x25, RxUnit = 0x60, EthStatus = 0x61,
  StationAddr0 = 0x67, EthStats = 0x69, LEDCtrl = 0x81
}
 
enum  eth_stats { TxSingleColl = 0x00, TxMultiColl = 0x02, TxExcessColl = 0x04, RxFramErr = 0x06 }
 
enum  op_mode_bits {
  Op3MemWaits = 0x03, OpLenInclude = 0x08, OpRxMerge = 0x10, OpTxMerge = 0x20,
  OpWin95bugfix = 0x40, OpLoopback = 0x80
}
 
enum  rx_filter_bits {
  RxEnable = 0x01, RxPolarity = 0x02, RxForceOK = 0x04, RxMultiCast = 0x08,
  RxPromisc = 0x10, AltRxPromisc = 0x20
}
 
enum  led_values {
  LEDFast = 0x01, LEDSlow = 0x02, LEDFlash = 0x03, LEDPulse = 0x04,
  LEDLink = 0x08
}
 
enum  link_status { LinkNoChange = 0, LinkGood = 1, LinkBad = 2 }
 

Functions

 MODULE_AUTHOR (DRIVER_AUTHOR)
 
 MODULE_DESCRIPTION (DRIVER_DESC)
 
 MODULE_LICENSE ("GPL")
 
 MODULE_DEVICE_TABLE (usb, catc_id_table)
 
 module_usb_driver (catc_driver)
 

Macro Definition Documentation

#define catc_get_mac (   catc,
  mac 
)    catc_ctrl_msg(catc, USB_DIR_IN, GetMac, 0, 0, mac, 6)

Definition at line 206 of file catc.c.

#define catc_get_reg (   catc,
  reg,
  buf 
)    catc_ctrl_msg(catc, USB_DIR_IN, GetReg, 0, reg, buf, 1)

Definition at line 209 of file catc.c.

#define catc_get_reg_async (   catc,
  reg,
  cb 
)    catc_ctrl_async(catc, USB_DIR_IN, GetReg, 0, reg, NULL, 1, cb)

Definition at line 218 of file catc.c.

#define catc_read_mem (   catc,
  addr,
  buf,
  size 
)    catc_ctrl_msg(catc, USB_DIR_IN, ReadMem, 0, addr, buf, size)

Definition at line 211 of file catc.c.

#define catc_reset (   catc)    catc_ctrl_msg(catc, USB_DIR_OUT, Reset, 0, 0, NULL, 0)

Definition at line 207 of file catc.c.

#define catc_set_reg (   catc,
  reg,
  val 
)    catc_ctrl_msg(catc, USB_DIR_OUT, SetReg, val, reg, NULL, 0)

Definition at line 208 of file catc.c.

#define catc_set_reg_async (   catc,
  reg,
  val 
)    catc_ctrl_async(catc, USB_DIR_OUT, SetReg, val, reg, NULL, 0, NULL)

Definition at line 217 of file catc.c.

#define catc_write_mem (   catc,
  addr,
  buf,
  size 
)    catc_ctrl_msg(catc, USB_DIR_OUT, WriteMem, 0, addr, buf, size)

Definition at line 210 of file catc.c.

#define catc_write_mem_async (   catc,
  addr,
  buf,
  size 
)    catc_ctrl_async(catc, USB_DIR_OUT, WriteMem, 0, addr, buf, size, NULL)

Definition at line 219 of file catc.c.

#define CTRL_QUEUE   16 /* Max control requests in flight (power of two) */

Definition at line 77 of file catc.c.

#define CTRL_RUNNING   0

Definition at line 158 of file catc.c.

#define DRIVER_AUTHOR   "Vojtech Pavlik <[email protected]>"

Definition at line 58 of file catc.c.

#define DRIVER_DESC   "CATC EL1210A NetMate USB Ethernet driver"

Definition at line 59 of file catc.c.

#define DRIVER_VERSION   "v2.8"

Definition at line 57 of file catc.c.

#define f5u011_mchash_async (   catc,
  hash 
)    catc_ctrl_async(catc, USB_DIR_OUT, SetRxMode, 0, 2, &hash, 8, NULL)

Definition at line 215 of file catc.c.

#define f5u011_rxmode (   catc,
  rxmode 
)    catc_ctrl_msg(catc, USB_DIR_OUT, SetRxMode, 0, 1, rxmode, 2)

Definition at line 213 of file catc.c.

#define f5u011_rxmode_async (   catc,
  rxmode 
)    catc_ctrl_async(catc, USB_DIR_OUT, SetRxMode, 0, 1, &rxmode, 2, NULL)

Definition at line 214 of file catc.c.

#define PKT_SZ   1536 /* Max Ethernet packet size */

Definition at line 74 of file catc.c.

#define RX_MAX_BURST   15 /* Max packets per rx buffer (> 0, < 16) */

Definition at line 75 of file catc.c.

#define RX_PKT_SZ   1600 /* Max size of receive packet for F5U011 */

Definition at line 78 of file catc.c.

#define RX_RUNNING   1

Definition at line 159 of file catc.c.

#define SHORT_DRIVER_DESC   "EL1210A NetMate USB Ethernet"

Definition at line 60 of file catc.c.

#define STATS_UPDATE   (HZ) /* Time between stats updates */

Definition at line 72 of file catc.c.

#define TX_MAX_BURST   15 /* Max full sized packets per tx buffer (> 0) */

Definition at line 76 of file catc.c.

#define TX_RUNNING   2

Definition at line 160 of file catc.c.

#define TX_TIMEOUT   (5*HZ) /* Max time the queue can be stopped */

Definition at line 73 of file catc.c.

Enumeration Type Documentation

enum control_requests
Enumerator:
ReadMem 
GetMac 
Reset 
SetMac 
SetRxMode 
WriteROM 
SetReg 
GetReg 
WriteMem 
ReadROM 
USB_REQ_WRITE_REGS 
USB_REQ_READ_REGS 
USB_REQ_WRITE_RF 
USB_REQ_PROG_FLASH 
USB_REQ_EEPROM_START 
USB_REQ_EEPROM_MID 
USB_REQ_EEPROM_END 
USB_REQ_FIRMWARE_DOWNLOAD 
USB_REQ_FIRMWARE_CONFIRM 
USB_REQ_FIRMWARE_READ_DATA 

Definition at line 84 of file catc.c.

enum eth_stats
Enumerator:
TxSingleColl 
TxMultiColl 
TxExcessColl 
RxFramErr 

Definition at line 115 of file catc.c.

enum led_values
Enumerator:
LEDFast 
LEDSlow 
LEDFlash 
LEDPulse 
LEDLink 

Definition at line 140 of file catc.c.

enum link_status
Enumerator:
LinkNoChange 
LinkGood 
LinkBad 

Definition at line 148 of file catc.c.

enum op_mode_bits
Enumerator:
Op3MemWaits 
OpLenInclude 
OpRxMerge 
OpTxMerge 
OpWin95bugfix 
OpLoopback 

Definition at line 122 of file catc.c.

enum register_offsets
Enumerator:
PCIDeviceConfig 
GenCtrl 
IntrTimerCtrl 
IntrClear 
IntrStatus 
IntrEnable 
MIICtrl 
TxStationAddr 
EEPROMCtrl 
GPIOCtrl 
TxDescCtrl 
TxRingPtr 
HiPriTxRingPtr 
TxRingHiAddr 
TxProducerIdx 
TxConsumerIdx 
TxThreshold 
CompletionHiAddr 
TxCompletionAddr 
RxCompletionAddr 
RxCompletionQ2Addr 
CompletionQConsumerIdx 
RxDMACtrl 
RxDescQCtrl 
RxDescQHiAddr 
RxDescQAddr 
RxDescQIdx 
RxDMAStatus 
RxFilterMode 
TxMode 
VlanType 
PerfFilterTable 
HashTable 
TxGfpMem 
RxGfpMem 
ChipCmd 
ChipConfig 
EECtrl 
PCIBusCfg 
IntrStatus 
IntrMask 
IntrEnable 
IntrHoldoff 
TxRingPtr 
TxConfig 
RxRingPtr 
RxConfig 
ClkRun 
WOLCmd 
PauseCmd 
RxFilterAddr 
RxFilterData 
BootRomAddr 
BootRomData 
SiliconRev 
StatsCtrl 
StatsData 
RxPktErrs 
RxMissed 
RxCRCErrs 
BasicControl 
BasicStatus 
AnegAdv 
AnegPeer 
PhyStatus 
MIntrCtrl 
MIntrStatus 
PhyCtrl 
PGSEL 
PMDCSR 
TSTDAT 
DSPCFG 
SDCFG 
StationAddr 
RxConfig 
TxConfig 
ChipCmd 
ChipCmd1 
TQWake 
IntrStatus 
IntrEnable 
MulticastFilter0 
MulticastFilter1 
RxRingPtr 
TxRingPtr 
GFIFOTest 
MIIPhyAddr 
MIIStatus 
PCIBusConfig 
PCIBusConfig1 
MIICmd 
MIIRegAddr 
MIIData 
MACRegEEcsr 
ConfigA 
ConfigB 
ConfigC 
ConfigD 
RxMissed 
RxCRCErrs 
MiscCmd 
StickyHW 
IntrStatus2 
CamMask 
CamCon 
CamAddr 
WOLcrSet 
PwcfgSet 
WOLcgSet 
WOLcrClr 
WOLcrClr1 
WOLcgClr 
PwrcsrSet 
PwrcsrSet1 
PwrcsrClr 
PwrcsrClr1 
TxBufCount 
RxBufCount 
OpModes 
TxQed 
RxQed 
MaxBurst 
RxUnit 
EthStatus 
StationAddr0 
EthStats 
LEDCtrl 

Definition at line 101 of file catc.c.

enum rx_filter_bits
Enumerator:
RxEnable 
RxPolarity 
RxForceOK 
RxMultiCast 
RxPromisc 
AltRxPromisc 

Definition at line 131 of file catc.c.

Function Documentation

MODULE_AUTHOR ( DRIVER_AUTHOR  )
MODULE_DESCRIPTION ( DRIVER_DESC  )
MODULE_DEVICE_TABLE ( usb  ,
catc_id_table   
)
MODULE_LICENSE ( "GPL"  )
module_usb_driver ( catc_driver  )
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