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cx23885.h
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1 /*
2  * Driver for the Conexant CX23885 PCIe bridge
3  *
4  * Copyright (c) 2006 Steven Toth <[email protected]>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  *
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21 
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/kdev_t.h>
25 #include <linux/slab.h>
26 
27 #include <media/v4l2-device.h>
28 #include <media/tuner.h>
29 #include <media/tveeprom.h>
30 #include <media/videobuf-dma-sg.h>
31 #include <media/videobuf-dvb.h>
32 #include <media/rc-core.h>
33 
34 #include "btcx-risc.h"
35 #include "cx23885-reg.h"
36 #include "media/cx2341x.h"
37 
38 #include <linux/mutex.h>
39 
40 #define CX23885_VERSION "0.0.3"
41 
42 #define UNSET (-1U)
43 
44 #define CX23885_MAXBOARDS 8
45 
46 /* Max number of inputs by card */
47 #define MAX_CX23885_INPUT 8
48 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49 #define RESOURCE_OVERLAY 1
50 #define RESOURCE_VIDEO 2
51 #define RESOURCE_VBI 4
52 
53 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
54 
55 #define CX23885_BOARD_NOAUTO UNSET
56 #define CX23885_BOARD_UNKNOWN 0
57 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
59 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
60 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
61 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
63 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
64 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
65 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
66 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
68 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
69 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
70 #define CX23885_BOARD_TBS_6920 14
71 #define CX23885_BOARD_TEVII_S470 15
72 #define CX23885_BOARD_DVBWORLD_2005 16
73 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
74 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
75 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
76 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
77 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
78 #define CX23885_BOARD_MYGICA_X8506 22
79 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
80 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
81 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
82 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26
83 #define CX23885_BOARD_MYGICA_X8558PRO 27
84 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
85 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
86 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
87 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
88 #define CX23885_BOARD_MPX885 32
89 #define CX23885_BOARD_MYGICA_X8507 33
90 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
91 #define CX23885_BOARD_TEVII_S471 35
92 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
93 #define CX23885_BOARD_PROF_8000 37
94 
95 #define GPIO_0 0x00000001
96 #define GPIO_1 0x00000002
97 #define GPIO_2 0x00000004
98 #define GPIO_3 0x00000008
99 #define GPIO_4 0x00000010
100 #define GPIO_5 0x00000020
101 #define GPIO_6 0x00000040
102 #define GPIO_7 0x00000080
103 #define GPIO_8 0x00000100
104 #define GPIO_9 0x00000200
105 #define GPIO_10 0x00000400
106 #define GPIO_11 0x00000800
107 #define GPIO_12 0x00001000
108 #define GPIO_13 0x00002000
109 #define GPIO_14 0x00004000
110 #define GPIO_15 0x00008000
111 
112 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
113 #define CX23885_NORMS (\
114  V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
115  V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
116  V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
117  V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
118 
119 struct cx23885_fmt {
120  char *name;
121  u32 fourcc; /* v4l2 format id */
122  int depth;
123  int flags;
124  u32 cxformat;
125 };
126 
127 struct cx23885_ctrl {
128  struct v4l2_queryctrl v;
129  u32 off;
130  u32 reg;
131  u32 mask;
132  u32 shift;
133 };
134 
135 struct cx23885_tvnorm {
136  char *name;
137  v4l2_std_id id;
138  u32 cxiformat;
139  u32 cxoformat;
140 };
141 
142 struct cx23885_fh {
143  struct cx23885_dev *dev;
144  enum v4l2_buf_type type;
145  int radio;
146  u32 resources;
147 
148  /* video overlay */
149  struct v4l2_window win;
150  struct v4l2_clip *clips;
151  unsigned int nclips;
152 
153  /* video capture */
154  struct cx23885_fmt *fmt;
155  unsigned int width, height;
156 
157  /* vbi capture */
158  struct videobuf_queue vidq;
159  struct videobuf_queue vbiq;
160 
161  /* MPEG Encoder specifics ONLY */
162  struct videobuf_queue mpegq;
163  atomic_t v4l_reading;
164 };
165 
166 enum cx23885_itype {
167  CX23885_VMUX_COMPOSITE1 = 1,
168  CX23885_VMUX_COMPOSITE2,
169  CX23885_VMUX_COMPOSITE3,
170  CX23885_VMUX_COMPOSITE4,
171  CX23885_VMUX_SVIDEO,
172  CX23885_VMUX_COMPONENT,
173  CX23885_VMUX_TELEVISION,
174  CX23885_VMUX_CABLE,
175  CX23885_VMUX_DVB,
176  CX23885_VMUX_DEBUG,
177  CX23885_RADIO,
178 };
179 
180 enum cx23885_src_sel_type {
181  CX23885_SRC_SEL_EXT_656_VIDEO = 0,
182  CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
183 };
184 
185 /* buffer for one video frame */
186 struct cx23885_buffer {
187  /* common v4l buffer stuff -- must be first */
188  struct videobuf_buffer vb;
189 
190  /* cx23885 specific */
191  unsigned int bpl;
192  struct btcx_riscmem risc;
193  struct cx23885_fmt *fmt;
194  u32 count;
195 };
196 
197 struct cx23885_input {
198  enum cx23885_itype type;
199  unsigned int vmux;
200  unsigned int amux;
201  u32 gpio0, gpio1, gpio2, gpio3;
202 };
203 
204 typedef enum {
205  CX23885_MPEG_UNDEFINED = 0,
206  CX23885_MPEG_DVB,
207  CX23885_ANALOG_VIDEO,
208  CX23885_MPEG_ENCODER,
209 } port_t;
210 
211 struct cx23885_board {
212  char *name;
213  port_t porta, portb, portc;
214  int num_fds_portb, num_fds_portc;
215  unsigned int tuner_type;
216  unsigned int radio_type;
217  unsigned char tuner_addr;
218  unsigned char radio_addr;
219  unsigned int tuner_bus;
220 
221  /* Vendors can and do run the PCIe bridge at different
222  * clock rates, driven physically by crystals on the PCBs.
223  * The core has to accommodate this. This allows the user
224  * to add new boards with new frequencys. The value is
225  * expressed in Hz.
226  *
227  * The core framework will default this value based on
228  * current designs, but it can vary.
229  */
230  u32 clk_freq;
231  struct cx23885_input input[MAX_CX23885_INPUT];
232  int ci_type; /* for NetUP */
233  /* Force bottom field first during DMA (888 workaround) */
234  u32 force_bff;
235 };
236 
237 struct cx23885_subid {
238  u16 subvendor;
239  u16 subdevice;
240  u32 card;
241 };
242 
243 struct cx23885_i2c {
244  struct cx23885_dev *dev;
245 
246  int nr;
247 
248  /* i2c i/o */
249  struct i2c_adapter i2c_adap;
250  struct i2c_client i2c_client;
251  u32 i2c_rc;
252 
253  /* 885 registers used for raw addess */
254  u32 i2c_period;
255  u32 reg_ctrl;
256  u32 reg_stat;
257  u32 reg_addr;
258  u32 reg_rdata;
259  u32 reg_wdata;
260 };
261 
262 struct cx23885_dmaqueue {
263  struct list_head active;
264  struct list_head queued;
265  struct timer_list timeout;
266  struct btcx_riscmem stopper;
267  u32 count;
268 };
269 
270 struct cx23885_tsport {
271  struct cx23885_dev *dev;
272 
273  int nr;
274  int sram_chno;
275 
276  struct videobuf_dvb_frontends frontends;
277 
278  /* dma queues */
279  struct cx23885_dmaqueue mpegq;
280  u32 ts_packet_size;
281  u32 ts_packet_count;
282 
283  int width;
284  int height;
285 
286  spinlock_t slock;
287 
288  /* registers */
289  u32 reg_gpcnt;
290  u32 reg_gpcnt_ctl;
291  u32 reg_dma_ctl;
292  u32 reg_lngth;
293  u32 reg_hw_sop_ctrl;
294  u32 reg_gen_ctrl;
295  u32 reg_bd_pkt_status;
296  u32 reg_sop_status;
297  u32 reg_fifo_ovfl_stat;
298  u32 reg_vld_misc;
299  u32 reg_ts_clk_en;
300  u32 reg_ts_int_msk;
301  u32 reg_ts_int_stat;
302  u32 reg_src_sel;
303 
304  /* Default register vals */
305  int pci_irqmask;
306  u32 dma_ctl_val;
307  u32 ts_int_msk_val;
308  u32 gen_ctrl_val;
309  u32 ts_clk_en_val;
310  u32 src_sel_val;
311  u32 vld_misc_val;
312  u32 hw_sop_ctrl_val;
313 
314  /* Allow a single tsport to have multiple frontends */
315  u32 num_frontends;
316  void (*gate_ctrl)(struct cx23885_tsport *port, int open);
317  void *port_priv;
318 
319  /* Workaround for a temp dvb_frontend that the tuner can attached to */
320  struct dvb_frontend analog_fe;
321 };
322 
323 struct cx23885_kernel_ir {
324  struct cx23885_dev *cx;
325  char *name;
326  char *phys;
327 
328  struct rc_dev *rc;
329 };
330 
331 struct cx23885_audio_buffer {
332  unsigned int bpl;
333  struct btcx_riscmem risc;
334  struct videobuf_dmabuf dma;
335 };
336 
337 struct cx23885_audio_dev {
338  struct cx23885_dev *dev;
339 
340  struct pci_dev *pci;
341 
342  struct snd_card *card;
343 
344  spinlock_t lock;
345 
346  atomic_t count;
347 
348  unsigned int dma_size;
349  unsigned int period_size;
350  unsigned int num_periods;
351 
352  struct videobuf_dmabuf *dma_risc;
353 
354  struct cx23885_audio_buffer *buf;
355 
356  struct snd_pcm_substream *substream;
357 };
358 
359 struct cx23885_dev {
360  atomic_t refcount;
361  struct v4l2_device v4l2_dev;
362 
363  /* pci stuff */
364  struct pci_dev *pci;
365  unsigned char pci_rev, pci_lat;
366  int pci_bus, pci_slot;
367  u32 __iomem *lmmio;
368  u8 __iomem *bmmio;
369  int pci_irqmask;
370  spinlock_t pci_irqmask_lock; /* protects mask reg too */
371  int hwrevision;
372 
373  /* This valud is board specific and is used to configure the
374  * AV core so we see nice clean and stable video and audio. */
375  u32 clk_freq;
376 
377  /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
378  struct cx23885_i2c i2c_bus[3];
379 
380  int nr;
381  struct mutex lock;
382  struct mutex gpio_lock;
383 
384  /* board details */
385  unsigned int board;
386  char name[32];
387 
388  struct cx23885_tsport ts1, ts2;
389 
390  /* sram configuration */
391  struct sram_channel *sram_channels;
392 
393  enum {
394  CX23885_BRIDGE_UNDEFINED = 0,
395  CX23885_BRIDGE_885 = 885,
396  CX23885_BRIDGE_887 = 887,
397  CX23885_BRIDGE_888 = 888,
398  } bridge;
399 
400  /* Analog video */
401  u32 resources;
402  unsigned int input;
403  unsigned int audinput; /* Selectable audio input */
404  u32 tvaudio;
405  v4l2_std_id tvnorm;
406  unsigned int tuner_type;
407  unsigned char tuner_addr;
408  unsigned int tuner_bus;
409  unsigned int radio_type;
410  unsigned char radio_addr;
411  unsigned int has_radio;
412  struct v4l2_subdev *sd_cx25840;
413  struct work_struct cx25840_work;
414 
415  /* Infrared */
416  struct v4l2_subdev *sd_ir;
417  struct work_struct ir_rx_work;
418  unsigned long ir_rx_notifications;
419  struct work_struct ir_tx_work;
420  unsigned long ir_tx_notifications;
421 
422  struct cx23885_kernel_ir *kernel_ir;
423  atomic_t ir_input_stopping;
424 
425  /* V4l */
426  u32 freq;
427  struct video_device *video_dev;
428  struct video_device *vbi_dev;
429  struct video_device *radio_dev;
430 
431  struct cx23885_dmaqueue vidq;
432  struct cx23885_dmaqueue vbiq;
433  spinlock_t slock;
434 
435  /* MPEG Encoder ONLY settings */
436  u32 cx23417_mailbox;
437  struct cx2341x_mpeg_params mpeg_params;
438  struct video_device *v4l_device;
439  atomic_t v4l_reader_count;
440  struct cx23885_tvnorm encodernorm;
441 
442  /* Analog raw audio */
443  struct cx23885_audio_dev *audio_dev;
444 
445 };
446 
447 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
448 {
449  return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
450 }
451 
452 #define call_all(dev, o, f, args...) \
453  v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
454 
455 #define CX23885_HW_888_IR (1 << 0)
456 #define CX23885_HW_AV_CORE (1 << 1)
457 
458 #define call_hw(dev, grpid, o, f, args...) \
459  v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
460 
461 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
462 
463 #define SRAM_CH01 0 /* Video A */
464 #define SRAM_CH02 1 /* VBI A */
465 #define SRAM_CH03 2 /* Video B */
466 #define SRAM_CH04 3 /* Transport via B */
467 #define SRAM_CH05 4 /* VBI B */
468 #define SRAM_CH06 5 /* Video C */
469 #define SRAM_CH07 6 /* Transport via C */
470 #define SRAM_CH08 7 /* Audio Internal A */
471 #define SRAM_CH09 8 /* Audio Internal B */
472 #define SRAM_CH10 9 /* Audio External */
473 #define SRAM_CH11 10 /* COMB_3D_N */
474 #define SRAM_CH12 11 /* Comb 3D N1 */
475 #define SRAM_CH13 12 /* Comb 3D N2 */
476 #define SRAM_CH14 13 /* MOE Vid */
477 #define SRAM_CH15 14 /* MOE RSLT */
478 
479 struct sram_channel {
480  char *name;
481  u32 cmds_start;
482  u32 ctrl_start;
483  u32 cdt;
484  u32 fifo_start;
485  u32 fifo_size;
486  u32 ptr1_reg;
487  u32 ptr2_reg;
488  u32 cnt1_reg;
489  u32 cnt2_reg;
490  u32 jumponly;
491 };
492 
493 /* ----------------------------------------------------------- */
494 
495 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
496 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
497 
498 #define cx_andor(reg, mask, value) \
499  writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
500  ((value) & (mask)), dev->lmmio+((reg)>>2))
501 
502 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
503 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
504 
505 /* ----------------------------------------------------------- */
506 /* cx23885-core.c */
507 
508 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
509  struct sram_channel *ch,
510  unsigned int bpl, u32 risc);
511 
512 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
513  struct sram_channel *ch);
514 
515 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
516  u32 reg, u32 mask, u32 value);
517 
518 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
519  struct scatterlist *sglist,
520  unsigned int top_offset, unsigned int bottom_offset,
521  unsigned int bpl, unsigned int padding, unsigned int lines);
522 
523 extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
524  struct btcx_riscmem *risc, struct scatterlist *sglist,
525  unsigned int top_offset, unsigned int bottom_offset,
526  unsigned int bpl, unsigned int padding, unsigned int lines);
527 
528 void cx23885_cancel_buffers(struct cx23885_tsport *port);
529 
530 extern int cx23885_restart_queue(struct cx23885_tsport *port,
531  struct cx23885_dmaqueue *q);
532 
533 extern void cx23885_wakeup(struct cx23885_tsport *port,
534  struct cx23885_dmaqueue *q, u32 count);
535 
536 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
537 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
538 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
539 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
540  int asoutput);
541 
542 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
543 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
544 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
545 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
546 
547 /* ----------------------------------------------------------- */
548 /* cx23885-cards.c */
549 extern struct cx23885_board cx23885_boards[];
550 extern const unsigned int cx23885_bcount;
551 
552 extern struct cx23885_subid cx23885_subids[];
553 extern const unsigned int cx23885_idcount;
554 
555 extern int cx23885_tuner_callback(void *priv, int component,
556  int command, int arg);
557 extern void cx23885_card_list(struct cx23885_dev *dev);
558 extern int cx23885_ir_init(struct cx23885_dev *dev);
559 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
560 extern void cx23885_ir_fini(struct cx23885_dev *dev);
561 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
562 extern void cx23885_card_setup(struct cx23885_dev *dev);
563 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
564 
565 extern int cx23885_dvb_register(struct cx23885_tsport *port);
566 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
567 
568 extern int cx23885_buf_prepare(struct videobuf_queue *q,
569  struct cx23885_tsport *port,
570  struct cx23885_buffer *buf,
571  enum v4l2_field field);
572 extern void cx23885_buf_queue(struct cx23885_tsport *port,
573  struct cx23885_buffer *buf);
574 extern void cx23885_free_buffer(struct videobuf_queue *q,
575  struct cx23885_buffer *buf);
576 
577 /* ----------------------------------------------------------- */
578 /* cx23885-video.c */
579 /* Video */
580 extern int cx23885_video_register(struct cx23885_dev *dev);
581 extern void cx23885_video_unregister(struct cx23885_dev *dev);
582 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
583 extern void cx23885_video_wakeup(struct cx23885_dev *dev,
584  struct cx23885_dmaqueue *q, u32 count);
585 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
586 int cx23885_set_input(struct file *file, void *priv, unsigned int i);
587 int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
588 int cx23885_set_frequency(struct file *file, void *priv, struct v4l2_frequency *f);
589 int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
590 int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
591 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
592 
593 /* ----------------------------------------------------------- */
594 /* cx23885-vbi.c */
595 extern int cx23885_vbi_fmt(struct file *file, void *priv,
596  struct v4l2_format *f);
597 extern void cx23885_vbi_timeout(unsigned long data);
598 extern struct videobuf_queue_ops cx23885_vbi_qops;
599 extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
600  struct cx23885_dmaqueue *q);
601 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
602 
603 /* cx23885-i2c.c */
604 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
605 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
606 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
607 
608 /* ----------------------------------------------------------- */
609 /* cx23885-417.c */
610 extern int cx23885_417_register(struct cx23885_dev *dev);
611 extern void cx23885_417_unregister(struct cx23885_dev *dev);
612 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
613 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
614 extern void cx23885_mc417_init(struct cx23885_dev *dev);
615 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
616 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
617 extern int mc417_register_read(struct cx23885_dev *dev,
618  u16 address, u32 *value);
619 extern int mc417_register_write(struct cx23885_dev *dev,
620  u16 address, u32 value);
621 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
622 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
623 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
624 
625 /* ----------------------------------------------------------- */
626 /* cx23885-alsa.c */
627 extern struct cx23885_audio_dev *cx23885_audio_register(
628  struct cx23885_dev *dev);
629 extern void cx23885_audio_unregister(struct cx23885_dev *dev);
630 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
631 extern int cx23885_risc_databuffer(struct pci_dev *pci,
632  struct btcx_riscmem *risc,
633  struct scatterlist *sglist,
634  unsigned int bpl,
635  unsigned int lines,
636  unsigned int lpi);
637 
638 /* ----------------------------------------------------------- */
639 /* tv norms */
640 
641 static inline unsigned int norm_maxw(v4l2_std_id norm)
642 {
643  return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
644 }
645 
646 static inline unsigned int norm_maxh(v4l2_std_id norm)
647 {
648  return (norm & V4L2_STD_625_50) ? 576 : 480;
649 }
650 
651 static inline unsigned int norm_swidth(v4l2_std_id norm)
652 {
653  return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
654 }
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