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pci.h File Reference
#include <linux/pci.h>

Go to the source code of this file.

Data Structures

struct  rtl_pci_capabilities_header
 
struct  rtl_rx_desc
 
struct  rtl_tx_desc
 
struct  rtl_tx_cmd_desc
 
struct  rtl8192_tx_ring
 
struct  rtl8192_rx_ring
 
struct  rtl_pci
 
struct  mp_adapter
 
struct  rtl_pci_priv
 

Macros

#define RTL_PCI_RX_MPDU_QUEUE   0
 
#define RTL_PCI_RX_CMD_QUEUE   1
 
#define RTL_PCI_MAX_RX_QUEUE   2
 
#define RTL_PCI_MAX_RX_COUNT   64
 
#define RTL_PCI_MAX_TX_QUEUE_COUNT   9
 
#define RT_TXDESC_NUM   128
 
#define RT_TXDESC_NUM_BE_QUEUE   256
 
#define BK_QUEUE   0
 
#define BE_QUEUE   1
 
#define VI_QUEUE   2
 
#define VO_QUEUE   3
 
#define BEACON_QUEUE   4
 
#define TXCMD_QUEUE   5
 
#define MGNT_QUEUE   6
 
#define HIGH_QUEUE   7
 
#define HCCA_QUEUE   8
 
#define RTL_PCI_DEVICE(vend, dev, cfg)
 
#define PCI_MAX_BRIDGE_NUMBER   255
 
#define PCI_MAX_DEVICES   32
 
#define PCI_MAX_FUNCTION   8
 
#define PCI_CONF_ADDRESS   0x0CF8 /*PCI Configuration Space Address */
 
#define PCI_CONF_DATA   0x0CFC /*PCI Configuration Space Data */
 
#define U1DONTCARE   0xFF
 
#define U2DONTCARE   0xFFFF
 
#define U4DONTCARE   0xFFFFFFFF
 
#define RTL_PCI_8192_DID   0x8192 /*8192 PCI-E */
 
#define RTL_PCI_8192SE_DID   0x8192 /*8192 SE */
 
#define RTL_PCI_8174_DID   0x8174 /*8192 SE */
 
#define RTL_PCI_8173_DID   0x8173 /*8191 SE Crab */
 
#define RTL_PCI_8172_DID   0x8172 /*8191 SE RE */
 
#define RTL_PCI_8171_DID   0x8171 /*8191 SE Unicron */
 
#define RTL_PCI_0045_DID   0x0045 /*8190 PCI for Ceraga */
 
#define RTL_PCI_0046_DID   0x0046 /*8190 Cardbus for Ceraga */
 
#define RTL_PCI_0044_DID   0x0044 /*8192e PCIE for Ceraga */
 
#define RTL_PCI_0047_DID   0x0047 /*8192e Express Card for Ceraga */
 
#define RTL_PCI_700F_DID   0x700F
 
#define RTL_PCI_701F_DID   0x701F
 
#define RTL_PCI_DLINK_DID   0x3304
 
#define RTL_PCI_8192CET_DID   0x8191 /*8192ce */
 
#define RTL_PCI_8192CE_DID   0x8178 /*8192ce */
 
#define RTL_PCI_8191CE_DID   0x8177 /*8192ce */
 
#define RTL_PCI_8188CE_DID   0x8176 /*8192ce */
 
#define RTL_PCI_8192CU_DID   0x8191 /*8192ce */
 
#define RTL_PCI_8192DE_DID   0x8193 /*8192de */
 
#define RTL_PCI_8192DE_DID2   0x002B /*92DE*/
 
#define RTL_MEM_MAPPED_IO_RANGE_8190PCI   0x1000
 
#define RTL_MEM_MAPPED_IO_RANGE_8192PCIE   0x4000
 
#define RTL_MEM_MAPPED_IO_RANGE_8192SE   0x4000
 
#define RTL_MEM_MAPPED_IO_RANGE_8192CE   0x4000
 
#define RTL_MEM_MAPPED_IO_RANGE_8192DE   0x4000
 
#define RTL_PCI_REVISION_ID_8190PCI   0x00
 
#define RTL_PCI_REVISION_ID_8192PCIE   0x01
 
#define RTL_PCI_REVISION_ID_8192SE   0x10
 
#define RTL_PCI_REVISION_ID_8192CE   0x1
 
#define RTL_PCI_REVISION_ID_8192DE   0x0
 
#define RTL_DEFAULT_HARDWARE_TYPE   HARDWARE_TYPE_RTL8192CE
 
#define rtl_pcipriv(hw)   (((struct rtl_pci_priv *)(rtl_priv(hw))->priv))
 
#define rtl_pcidev(pcipriv)   (&((pcipriv)->dev))
 

Enumerations

enum  pci_bridge_vendor {
  PCI_BRIDGE_VENDOR_INTEL = 0x0, PCI_BRIDGE_VENDOR_ATI, PCI_BRIDGE_VENDOR_AMD, PCI_BRIDGE_VENDOR_SIS,
  PCI_BRIDGE_VENDOR_UNKNOWN, PCI_BRIDGE_VENDOR_MAX, PCI_BRIDGE_VENDOR_INTEL = 0x0, PCI_BRIDGE_VENDOR_ATI,
  PCI_BRIDGE_VENDOR_AMD, PCI_BRIDGE_VENDOR_SIS, PCI_BRIDGE_VENDOR_UNKNOWN, PCI_BRIDGE_VENDOR_MAX
}
 

Functions

int rtl_pci_reset_trx_ring (struct ieee80211_hw *hw)
 
int __devinit rtl_pci_probe (struct pci_dev *pdev, const struct pci_device_id *id)
 
void rtl_pci_disconnect (struct pci_dev *pdev)
 
int rtl_pci_suspend (struct device *dev)
 
int rtl_pci_resume (struct device *dev)
 

Variables

struct rtl_rx_desc __packed
 
struct rtl_intf_ops rtl_pci_ops
 

Macro Definition Documentation

#define BE_QUEUE   1

Definition at line 49 of file pci.h.

#define BEACON_QUEUE   4

Definition at line 52 of file pci.h.

#define BK_QUEUE   0

Definition at line 48 of file pci.h.

#define HCCA_QUEUE   8

Definition at line 56 of file pci.h.

#define HIGH_QUEUE   7

Definition at line 55 of file pci.h.

#define MGNT_QUEUE   6

Definition at line 54 of file pci.h.

#define PCI_CONF_ADDRESS   0x0CF8 /*PCI Configuration Space Address */

Definition at line 69 of file pci.h.

#define PCI_CONF_DATA   0x0CFC /*PCI Configuration Space Data */

Definition at line 70 of file pci.h.

#define PCI_MAX_BRIDGE_NUMBER   255

Definition at line 65 of file pci.h.

#define PCI_MAX_DEVICES   32

Definition at line 66 of file pci.h.

#define PCI_MAX_FUNCTION   8

Definition at line 67 of file pci.h.

#define RT_TXDESC_NUM   128

Definition at line 45 of file pci.h.

#define RT_TXDESC_NUM_BE_QUEUE   256

Definition at line 46 of file pci.h.

#define RTL_DEFAULT_HARDWARE_TYPE   HARDWARE_TYPE_RTL8192CE

Definition at line 110 of file pci.h.

#define RTL_MEM_MAPPED_IO_RANGE_8190PCI   0x1000

Definition at line 98 of file pci.h.

#define RTL_MEM_MAPPED_IO_RANGE_8192CE   0x4000

Definition at line 101 of file pci.h.

#define RTL_MEM_MAPPED_IO_RANGE_8192DE   0x4000

Definition at line 102 of file pci.h.

#define RTL_MEM_MAPPED_IO_RANGE_8192PCIE   0x4000

Definition at line 99 of file pci.h.

#define RTL_MEM_MAPPED_IO_RANGE_8192SE   0x4000

Definition at line 100 of file pci.h.

#define RTL_PCI_0044_DID   0x0044 /*8192e PCIE for Ceraga */

Definition at line 84 of file pci.h.

#define RTL_PCI_0045_DID   0x0045 /*8190 PCI for Ceraga */

Definition at line 82 of file pci.h.

#define RTL_PCI_0046_DID   0x0046 /*8190 Cardbus for Ceraga */

Definition at line 83 of file pci.h.

#define RTL_PCI_0047_DID   0x0047 /*8192e Express Card for Ceraga */

Definition at line 85 of file pci.h.

#define RTL_PCI_700F_DID   0x700F

Definition at line 86 of file pci.h.

#define RTL_PCI_701F_DID   0x701F

Definition at line 87 of file pci.h.

#define RTL_PCI_8171_DID   0x8171 /*8191 SE Unicron */

Definition at line 81 of file pci.h.

#define RTL_PCI_8172_DID   0x8172 /*8191 SE RE */

Definition at line 80 of file pci.h.

#define RTL_PCI_8173_DID   0x8173 /*8191 SE Crab */

Definition at line 79 of file pci.h.

#define RTL_PCI_8174_DID   0x8174 /*8192 SE */

Definition at line 78 of file pci.h.

#define RTL_PCI_8188CE_DID   0x8176 /*8192ce */

Definition at line 92 of file pci.h.

#define RTL_PCI_8191CE_DID   0x8177 /*8192ce */

Definition at line 91 of file pci.h.

#define RTL_PCI_8192_DID   0x8192 /*8192 PCI-E */

Definition at line 76 of file pci.h.

#define RTL_PCI_8192CE_DID   0x8178 /*8192ce */

Definition at line 90 of file pci.h.

#define RTL_PCI_8192CET_DID   0x8191 /*8192ce */

Definition at line 89 of file pci.h.

#define RTL_PCI_8192CU_DID   0x8191 /*8192ce */

Definition at line 93 of file pci.h.

#define RTL_PCI_8192DE_DID   0x8193 /*8192de */

Definition at line 94 of file pci.h.

#define RTL_PCI_8192DE_DID2   0x002B /*92DE*/

Definition at line 95 of file pci.h.

#define RTL_PCI_8192SE_DID   0x8192 /*8192 SE */

Definition at line 77 of file pci.h.

#define RTL_PCI_DEVICE (   vend,
  dev,
  cfg 
)
Value:
.vendor = (vend), \
.device = (dev), \
.subvendor = PCI_ANY_ID, \
.subdevice = PCI_ANY_ID,\
.driver_data = (kernel_ulong_t)&(cfg)

Definition at line 58 of file pci.h.

#define RTL_PCI_DLINK_DID   0x3304

Definition at line 88 of file pci.h.

#define RTL_PCI_MAX_RX_COUNT   64

Definition at line 42 of file pci.h.

#define RTL_PCI_MAX_RX_QUEUE   2

Definition at line 40 of file pci.h.

#define RTL_PCI_MAX_TX_QUEUE_COUNT   9

Definition at line 43 of file pci.h.

#define RTL_PCI_REVISION_ID_8190PCI   0x00

Definition at line 104 of file pci.h.

#define RTL_PCI_REVISION_ID_8192CE   0x1

Definition at line 107 of file pci.h.

#define RTL_PCI_REVISION_ID_8192DE   0x0

Definition at line 108 of file pci.h.

#define RTL_PCI_REVISION_ID_8192PCIE   0x01

Definition at line 105 of file pci.h.

#define RTL_PCI_REVISION_ID_8192SE   0x10

Definition at line 106 of file pci.h.

#define RTL_PCI_RX_CMD_QUEUE   1

Definition at line 39 of file pci.h.

#define RTL_PCI_RX_MPDU_QUEUE   0

Definition at line 38 of file pci.h.

#define rtl_pcidev (   pcipriv)    (&((pcipriv)->dev))

Definition at line 231 of file pci.h.

#define rtl_pcipriv (   hw)    (((struct rtl_pci_priv *)(rtl_priv(hw))->priv))

Definition at line 230 of file pci.h.

#define TXCMD_QUEUE   5

Definition at line 53 of file pci.h.

#define U1DONTCARE   0xFF

Definition at line 72 of file pci.h.

#define U2DONTCARE   0xFFFF

Definition at line 73 of file pci.h.

#define U4DONTCARE   0xFFFFFFFF

Definition at line 74 of file pci.h.

#define VI_QUEUE   2

Definition at line 50 of file pci.h.

#define VO_QUEUE   3

Definition at line 51 of file pci.h.

Enumeration Type Documentation

Enumerator:
PCI_BRIDGE_VENDOR_INTEL 
PCI_BRIDGE_VENDOR_ATI 
PCI_BRIDGE_VENDOR_AMD 
PCI_BRIDGE_VENDOR_SIS 
PCI_BRIDGE_VENDOR_UNKNOWN 
PCI_BRIDGE_VENDOR_MAX 
PCI_BRIDGE_VENDOR_INTEL 
PCI_BRIDGE_VENDOR_ATI 
PCI_BRIDGE_VENDOR_AMD 
PCI_BRIDGE_VENDOR_SIS 
PCI_BRIDGE_VENDOR_UNKNOWN 
PCI_BRIDGE_VENDOR_MAX 

Definition at line 112 of file pci.h.

Function Documentation

void rtl_pci_disconnect ( struct pci_dev pdev)

Definition at line 1923 of file pci.c.

int __devinit rtl_pci_probe ( struct pci_dev pdev,
const struct pci_device_id id 
)

Definition at line 1749 of file pci.c.

int rtl_pci_reset_trx_ring ( struct ieee80211_hw hw)

Definition at line 1240 of file pci.c.

int rtl_pci_resume ( struct device dev)

Definition at line 2003 of file pci.c.

int rtl_pci_suspend ( struct device dev)

Definition at line 1990 of file pci.c.

Variable Documentation

struct rtl_intf_ops rtl_pci_ops

Definition at line 2015 of file pci.c.