#include <linux/etherdevice.h>
#include <linux/mlx4/cmd.h>
#include <linux/module.h>
#include <linux/cache.h>
#include "fw.h"
#include "icm.h"

Macros
#define	MLX4_GET(dest, source, offset)

#define	MLX4_PUT(dest, source, offset)

#define	MOD_STAT_CFG_IN_SIZE 0x100

#define	MOD_STAT_CFG_PG_SZ_M_OFFSET 0x002

#define	MOD_STAT_CFG_PG_SZ_OFFSET 0x003

#define	QUERY_FUNC_CAP_FLAGS_OFFSET 0x0

#define	QUERY_FUNC_CAP_NUM_PORTS_OFFSET 0x1

#define	QUERY_FUNC_CAP_PF_BHVR_OFFSET 0x4

#define	QUERY_FUNC_CAP_FMR_OFFSET 0x8

#define	QUERY_FUNC_CAP_QP_QUOTA_OFFSET 0x10

#define	QUERY_FUNC_CAP_CQ_QUOTA_OFFSET 0x14

#define	QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET 0x18

#define	QUERY_FUNC_CAP_MPT_QUOTA_OFFSET 0x20

#define	QUERY_FUNC_CAP_MTT_QUOTA_OFFSET 0x24

#define	QUERY_FUNC_CAP_MCG_QUOTA_OFFSET 0x28

#define	QUERY_FUNC_CAP_MAX_EQ_OFFSET 0x2c

#define	QUERY_FUNC_CAP_RESERVED_EQ_OFFSET 0x30

#define	QUERY_FUNC_CAP_FMR_FLAG 0x80

#define	QUERY_FUNC_CAP_FLAG_RDMA 0x40

#define	QUERY_FUNC_CAP_FLAG_ETH 0x80

#define	QUERY_FUNC_CAP_PHYS_PORT_OFFSET 0x3

#define	QUERY_FUNC_CAP_RDMA_PROPS_OFFSET 0x8

#define	QUERY_FUNC_CAP_ETH_PROPS_OFFSET 0xc

#define	QUERY_FUNC_CAP_QP0_TUNNEL 0x10

#define	QUERY_FUNC_CAP_QP0_PROXY 0x14

#define	QUERY_FUNC_CAP_QP1_TUNNEL 0x18

#define	QUERY_FUNC_CAP_QP1_PROXY 0x1c

#define	QUERY_FUNC_CAP_ETH_PROPS_FORCE_MAC 0x40

#define	QUERY_FUNC_CAP_ETH_PROPS_FORCE_VLAN 0x80

#define	QUERY_FUNC_CAP_RDMA_PROPS_FORCE_PHY_WQE_GID 0x80

#define	QUERY_DEV_CAP_OUT_SIZE 0x100

#define	QUERY_DEV_CAP_MAX_SRQ_SZ_OFFSET 0x10

#define	QUERY_DEV_CAP_MAX_QP_SZ_OFFSET 0x11

#define	QUERY_DEV_CAP_RSVD_QP_OFFSET 0x12

#define	QUERY_DEV_CAP_MAX_QP_OFFSET 0x13

#define	QUERY_DEV_CAP_RSVD_SRQ_OFFSET 0x14

#define	QUERY_DEV_CAP_MAX_SRQ_OFFSET 0x15

#define	QUERY_DEV_CAP_RSVD_EEC_OFFSET 0x16

#define	QUERY_DEV_CAP_MAX_EEC_OFFSET 0x17

#define	QUERY_DEV_CAP_MAX_CQ_SZ_OFFSET 0x19

#define	QUERY_DEV_CAP_RSVD_CQ_OFFSET 0x1a

#define	QUERY_DEV_CAP_MAX_CQ_OFFSET 0x1b

#define	QUERY_DEV_CAP_MAX_MPT_OFFSET 0x1d

#define	QUERY_DEV_CAP_RSVD_EQ_OFFSET 0x1e

#define	QUERY_DEV_CAP_MAX_EQ_OFFSET 0x1f

#define	QUERY_DEV_CAP_RSVD_MTT_OFFSET 0x20

#define	QUERY_DEV_CAP_MAX_MRW_SZ_OFFSET 0x21

#define	QUERY_DEV_CAP_RSVD_MRW_OFFSET 0x22

#define	QUERY_DEV_CAP_MAX_MTT_SEG_OFFSET 0x23

#define	QUERY_DEV_CAP_MAX_AV_OFFSET 0x27

#define	QUERY_DEV_CAP_MAX_REQ_QP_OFFSET 0x29

#define	QUERY_DEV_CAP_MAX_RES_QP_OFFSET 0x2b

#define	QUERY_DEV_CAP_MAX_GSO_OFFSET 0x2d

#define	QUERY_DEV_CAP_RSS_OFFSET 0x2e

#define	QUERY_DEV_CAP_MAX_RDMA_OFFSET 0x2f

#define	QUERY_DEV_CAP_RSZ_SRQ_OFFSET 0x33

#define	QUERY_DEV_CAP_ACK_DELAY_OFFSET 0x35

#define	QUERY_DEV_CAP_MTU_WIDTH_OFFSET 0x36

#define	QUERY_DEV_CAP_VL_PORT_OFFSET 0x37

#define	QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET 0x38

#define	QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b

#define	QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c

#define	QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f

#define	QUERY_DEV_CAP_EXT_FLAGS_OFFSET 0x40

#define	QUERY_DEV_CAP_FLAGS_OFFSET 0x44

#define	QUERY_DEV_CAP_RSVD_UAR_OFFSET 0x48

#define	QUERY_DEV_CAP_UAR_SZ_OFFSET 0x49

#define	QUERY_DEV_CAP_PAGE_SZ_OFFSET 0x4b

#define	QUERY_DEV_CAP_BF_OFFSET 0x4c

#define	QUERY_DEV_CAP_LOG_BF_REG_SZ_OFFSET 0x4d

#define	QUERY_DEV_CAP_LOG_MAX_BF_REGS_PER_PAGE_OFFSET 0x4e

#define	QUERY_DEV_CAP_LOG_MAX_BF_PAGES_OFFSET 0x4f

#define	QUERY_DEV_CAP_MAX_SG_SQ_OFFSET 0x51

#define	QUERY_DEV_CAP_MAX_DESC_SZ_SQ_OFFSET 0x52

#define	QUERY_DEV_CAP_MAX_SG_RQ_OFFSET 0x55

#define	QUERY_DEV_CAP_MAX_DESC_SZ_RQ_OFFSET 0x56

#define	QUERY_DEV_CAP_MAX_QP_MCG_OFFSET 0x61

#define	QUERY_DEV_CAP_RSVD_MCG_OFFSET 0x62

#define	QUERY_DEV_CAP_MAX_MCG_OFFSET 0x63

#define	QUERY_DEV_CAP_RSVD_PD_OFFSET 0x64

#define	QUERY_DEV_CAP_MAX_PD_OFFSET 0x65

#define	QUERY_DEV_CAP_RSVD_XRC_OFFSET 0x66

#define	QUERY_DEV_CAP_MAX_XRC_OFFSET 0x67

#define	QUERY_DEV_CAP_MAX_COUNTERS_OFFSET 0x68

#define	QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET 0x76

#define	QUERY_DEV_CAP_FLOW_STEERING_MAX_QP_OFFSET 0x77

#define	QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET 0x80

#define	QUERY_DEV_CAP_QPC_ENTRY_SZ_OFFSET 0x82

#define	QUERY_DEV_CAP_AUX_ENTRY_SZ_OFFSET 0x84

#define	QUERY_DEV_CAP_ALTC_ENTRY_SZ_OFFSET 0x86

#define	QUERY_DEV_CAP_EQC_ENTRY_SZ_OFFSET 0x88

#define	QUERY_DEV_CAP_CQC_ENTRY_SZ_OFFSET 0x8a

#define	QUERY_DEV_CAP_SRQ_ENTRY_SZ_OFFSET 0x8c

#define	QUERY_DEV_CAP_C_MPT_ENTRY_SZ_OFFSET 0x8e

#define	QUERY_DEV_CAP_MTT_ENTRY_SZ_OFFSET 0x90

#define	QUERY_DEV_CAP_D_MPT_ENTRY_SZ_OFFSET 0x92

#define	QUERY_DEV_CAP_BMME_FLAGS_OFFSET 0x94

#define	QUERY_DEV_CAP_RSVD_LKEY_OFFSET 0x98

#define	QUERY_DEV_CAP_MAX_ICM_SZ_OFFSET 0xa0

#define	QUERY_PORT_SUPPORTED_TYPE_OFFSET 0x00

#define	QUERY_PORT_MTU_OFFSET 0x01

#define	QUERY_PORT_ETH_MTU_OFFSET 0x02

#define	QUERY_PORT_WIDTH_OFFSET 0x06

#define	QUERY_PORT_MAX_GID_PKEY_OFFSET 0x07

#define	QUERY_PORT_MAX_MACVLAN_OFFSET 0x0a

#define	QUERY_PORT_MAX_VL_OFFSET 0x0b

#define	QUERY_PORT_MAC_OFFSET 0x10

#define	QUERY_PORT_TRANS_VENDOR_OFFSET 0x18

#define	QUERY_PORT_WAVELENGTH_OFFSET 0x1c

#define	QUERY_PORT_TRANS_CODE_OFFSET 0x20

#define	MLX4_VF_PORT_NO_LINK_SENSE_MASK 0xE0

#define	QUERY_PORT_CUR_MAX_PKEY_OFFSET 0x0c

#define	QUERY_PORT_CUR_MAX_GID_OFFSET 0x0e

#define	QUERY_FW_OUT_SIZE 0x100

#define	QUERY_FW_VER_OFFSET 0x00

#define	QUERY_FW_PPF_ID 0x09

#define	QUERY_FW_CMD_IF_REV_OFFSET 0x0a

#define	QUERY_FW_MAX_CMD_OFFSET 0x0f

#define	QUERY_FW_ERR_START_OFFSET 0x30

#define	QUERY_FW_ERR_SIZE_OFFSET 0x38

#define	QUERY_FW_ERR_BAR_OFFSET 0x3c

#define	QUERY_FW_SIZE_OFFSET 0x00

#define	QUERY_FW_CLR_INT_BASE_OFFSET 0x20

#define	QUERY_FW_CLR_INT_BAR_OFFSET 0x28

#define	QUERY_FW_COMM_BASE_OFFSET 0x40

#define	QUERY_FW_COMM_BAR_OFFSET 0x48

#define	VSD_OFFSET_SIG1 0x00

#define	VSD_OFFSET_SIG2 0xde

#define	VSD_OFFSET_MLX_BOARD_ID 0xd0

#define	VSD_OFFSET_TS_BOARD_ID 0x20

#define	VSD_SIGNATURE_TOPSPIN 0x5ad

#define	QUERY_ADAPTER_OUT_SIZE 0x100

#define	QUERY_ADAPTER_INTA_PIN_OFFSET 0x10

#define	QUERY_ADAPTER_VSD_OFFSET 0x20

#define	INIT_HCA_IN_SIZE 0x200

#define	INIT_HCA_VERSION_OFFSET 0x000

#define	INIT_HCA_VERSION 2

#define	INIT_HCA_CACHELINE_SZ_OFFSET 0x0e

#define	INIT_HCA_FLAGS_OFFSET 0x014

#define	INIT_HCA_QPC_OFFSET 0x020

#define	INIT_HCA_QPC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x10)

#define	INIT_HCA_LOG_QP_OFFSET (INIT_HCA_QPC_OFFSET + 0x17)

#define	INIT_HCA_SRQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x28)

#define	INIT_HCA_LOG_SRQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x2f)

#define	INIT_HCA_CQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x30)

#define	INIT_HCA_LOG_CQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x37)

#define	INIT_HCA_EQE_CQE_OFFSETS (INIT_HCA_QPC_OFFSET + 0x38)

#define	INIT_HCA_ALTC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x40)

#define	INIT_HCA_AUXC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x50)

#define	INIT_HCA_EQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x60)

#define	INIT_HCA_LOG_EQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x67)

#define	INIT_HCA_RDMARC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x70)

#define	INIT_HCA_LOG_RD_OFFSET (INIT_HCA_QPC_OFFSET + 0x77)

#define	INIT_HCA_MCAST_OFFSET 0x0c0

#define	INIT_HCA_MC_BASE_OFFSET (INIT_HCA_MCAST_OFFSET + 0x00)

#define	INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x12)

#define	INIT_HCA_LOG_MC_HASH_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x16)

#define	INIT_HCA_UC_STEERING_OFFSET (INIT_HCA_MCAST_OFFSET + 0x18)

#define	INIT_HCA_LOG_MC_TABLE_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x1b)

#define	INIT_HCA_DEVICE_MANAGED_FLOW_STEERING_EN 0x6

#define	INIT_HCA_FS_PARAM_OFFSET 0x1d0

#define	INIT_HCA_FS_BASE_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x00)

#define	INIT_HCA_FS_LOG_ENTRY_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x12)

#define	INIT_HCA_FS_LOG_TABLE_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x1b)

#define	INIT_HCA_FS_ETH_BITS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x21)

#define	INIT_HCA_FS_ETH_NUM_ADDRS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x22)

#define	INIT_HCA_FS_IB_BITS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x25)

#define	INIT_HCA_FS_IB_NUM_ADDRS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x26)

#define	INIT_HCA_TPT_OFFSET 0x0f0

#define	INIT_HCA_DMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x00)

#define	INIT_HCA_LOG_MPT_SZ_OFFSET (INIT_HCA_TPT_OFFSET + 0x0b)

#define	INIT_HCA_MTT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x10)

#define	INIT_HCA_CMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x18)

#define	INIT_HCA_UAR_OFFSET 0x120

#define	INIT_HCA_LOG_UAR_SZ_OFFSET (INIT_HCA_UAR_OFFSET + 0x0a)

#define	INIT_HCA_UAR_PAGE_SZ_OFFSET (INIT_HCA_UAR_OFFSET + 0x0b)

#define	QUERY_HCA_GLOBAL_CAPS_OFFSET 0x04

#define	INIT_PORT_IN_SIZE 256

#define	INIT_PORT_FLAGS_OFFSET 0x00

#define	INIT_PORT_FLAG_SIG (1 << 18)

#define	INIT_PORT_FLAG_NG (1 << 17)

#define	INIT_PORT_FLAG_G0 (1 << 16)

#define	INIT_PORT_VL_SHIFT 4

#define	INIT_PORT_PORT_WIDTH_SHIFT 8

#define	INIT_PORT_MTU_OFFSET 0x04

#define	INIT_PORT_MAX_GID_OFFSET 0x06

#define	INIT_PORT_MAX_PKEY_OFFSET 0x0a

#define	INIT_PORT_GUID0_OFFSET 0x10

#define	INIT_PORT_NODE_GUID_OFFSET 0x18

#define	INIT_PORT_SI_GUID_OFFSET 0x20

#define	MLX4_WOL_SETUP_MODE (5 << 28)

Enumerations
enum	{ MLX4_COMMAND_INTERFACE_MIN_REV = 2, MLX4_COMMAND_INTERFACE_MAX_REV = 3, MLX4_COMMAND_INTERFACE_NEW_PORT_CMDS = 3 }

Functions
void	__buggy_use_of_MLX4_GET (void)

void	__buggy_use_of_MLX4_PUT (void)

	module_param (enable_qos, bool, 0444)

	MODULE_PARM_DESC (enable_qos,"Enable Quality of Service support in the HCA (default: off)")

int	mlx4_MOD_STAT_CFG (struct mlx4_dev dev, struct mlx4_mod_stat_cfg cfg)

int	mlx4_QUERY_FUNC_CAP_wrapper (struct mlx4_dev dev, int slave, struct mlx4_vhcr vhcr, struct mlx4_cmd_mailbox inbox, struct mlx4_cmd_mailbox outbox, struct mlx4_cmd_info *cmd)

int	mlx4_QUERY_FUNC_CAP (struct mlx4_dev dev, u32 gen_or_port, struct mlx4_func_cap func_cap)

int	mlx4_QUERY_DEV_CAP (struct mlx4_dev dev, struct mlx4_dev_cap dev_cap)

int	mlx4_QUERY_DEV_CAP_wrapper (struct mlx4_dev dev, int slave, struct mlx4_vhcr vhcr, struct mlx4_cmd_mailbox inbox, struct mlx4_cmd_mailbox outbox, struct mlx4_cmd_info *cmd)

int	mlx4_QUERY_PORT_wrapper (struct mlx4_dev dev, int slave, struct mlx4_vhcr vhcr, struct mlx4_cmd_mailbox inbox, struct mlx4_cmd_mailbox outbox, struct mlx4_cmd_info *cmd)

int	mlx4_get_slave_pkey_gid_tbl_len (struct mlx4_dev dev, u8 port, int gid_tbl_len, int *pkey_tbl_len)

	EXPORT_SYMBOL (mlx4_get_slave_pkey_gid_tbl_len)

int	mlx4_map_cmd (struct mlx4_dev dev, u16 op, struct mlx4_icm icm, u64 virt)

int	mlx4_MAP_FA (struct mlx4_dev dev, struct mlx4_icm icm)

int	mlx4_UNMAP_FA (struct mlx4_dev *dev)

int	mlx4_RUN_FW (struct mlx4_dev *dev)

int	mlx4_QUERY_FW (struct mlx4_dev *dev)

int	mlx4_QUERY_FW_wrapper (struct mlx4_dev dev, int slave, struct mlx4_vhcr vhcr, struct mlx4_cmd_mailbox inbox, struct mlx4_cmd_mailbox outbox, struct mlx4_cmd_info *cmd)

int	mlx4_QUERY_ADAPTER (struct mlx4_dev dev, struct mlx4_adapter adapter)

int	mlx4_INIT_HCA (struct mlx4_dev dev, struct mlx4_init_hca_param param)

int	mlx4_QUERY_HCA (struct mlx4_dev dev, struct mlx4_init_hca_param param)

int	mlx4_INIT_PORT_wrapper (struct mlx4_dev dev, int slave, struct mlx4_vhcr vhcr, struct mlx4_cmd_mailbox inbox, struct mlx4_cmd_mailbox outbox, struct mlx4_cmd_info *cmd)

int	mlx4_INIT_PORT (struct mlx4_dev *dev, int port)

	EXPORT_SYMBOL_GPL (mlx4_INIT_PORT)

int	mlx4_CLOSE_PORT_wrapper (struct mlx4_dev dev, int slave, struct mlx4_vhcr vhcr, struct mlx4_cmd_mailbox inbox, struct mlx4_cmd_mailbox outbox, struct mlx4_cmd_info *cmd)

int	mlx4_CLOSE_PORT (struct mlx4_dev *dev, int port)

	EXPORT_SYMBOL_GPL (mlx4_CLOSE_PORT)

int	mlx4_CLOSE_HCA (struct mlx4_dev *dev, int panic)

int	mlx4_SET_ICM_SIZE (struct mlx4_dev dev, u64 icm_size, u64 aux_pages)

int	mlx4_NOP (struct mlx4_dev *dev)

int	mlx4_wol_read (struct mlx4_dev dev, u64 config, int port)

	EXPORT_SYMBOL_GPL (mlx4_wol_read)

int	mlx4_wol_write (struct mlx4_dev *dev, u64 config, int port)

	EXPORT_SYMBOL_GPL (mlx4_wol_write)

Macro Definition Documentation

#define INIT_HCA_ALTC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x40)

#define INIT_HCA_AUXC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x50)

#define INIT_HCA_CACHELINE_SZ_OFFSET 0x0e

#define INIT_HCA_CMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x18)

#define INIT_HCA_CQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x30)

#define INIT_HCA_DEVICE_MANAGED_FLOW_STEERING_EN 0x6

#define INIT_HCA_DMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x00)

#define INIT_HCA_EQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x60)

#define INIT_HCA_EQE_CQE_OFFSETS (INIT_HCA_QPC_OFFSET + 0x38)

#define INIT_HCA_FLAGS_OFFSET 0x014

#define INIT_HCA_FS_BASE_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x00)

#define INIT_HCA_FS_ETH_BITS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x21)

#define INIT_HCA_FS_ETH_NUM_ADDRS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x22)

#define INIT_HCA_FS_IB_BITS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x25)

#define INIT_HCA_FS_IB_NUM_ADDRS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x26)

#define INIT_HCA_FS_LOG_ENTRY_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x12)

#define INIT_HCA_FS_LOG_TABLE_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x1b)

#define INIT_HCA_FS_PARAM_OFFSET 0x1d0

#define INIT_HCA_IN_SIZE 0x200

#define INIT_HCA_LOG_CQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x37)

#define INIT_HCA_LOG_EQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x67)

#define INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x12)

#define INIT_HCA_LOG_MC_HASH_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x16)

#define INIT_HCA_LOG_MC_TABLE_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x1b)

#define INIT_HCA_LOG_MPT_SZ_OFFSET (INIT_HCA_TPT_OFFSET + 0x0b)

#define INIT_HCA_LOG_QP_OFFSET (INIT_HCA_QPC_OFFSET + 0x17)

#define INIT_HCA_LOG_RD_OFFSET (INIT_HCA_QPC_OFFSET + 0x77)

#define INIT_HCA_LOG_SRQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x2f)

#define INIT_HCA_LOG_UAR_SZ_OFFSET (INIT_HCA_UAR_OFFSET + 0x0a)

#define INIT_HCA_MC_BASE_OFFSET (INIT_HCA_MCAST_OFFSET + 0x00)

#define INIT_HCA_MCAST_OFFSET 0x0c0

#define INIT_HCA_MTT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x10)

#define INIT_HCA_QPC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x10)

#define INIT_HCA_QPC_OFFSET 0x020

#define INIT_HCA_RDMARC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x70)

#define INIT_HCA_SRQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x28)

#define INIT_HCA_TPT_OFFSET 0x0f0

#define INIT_HCA_UAR_OFFSET 0x120

#define INIT_HCA_UAR_PAGE_SZ_OFFSET (INIT_HCA_UAR_OFFSET + 0x0b)

#define INIT_HCA_UC_STEERING_OFFSET (INIT_HCA_MCAST_OFFSET + 0x18)

#define INIT_HCA_VERSION 2

#define INIT_HCA_VERSION_OFFSET 0x000

#define INIT_PORT_FLAG_G0 (1 << 16)

#define INIT_PORT_FLAG_NG (1 << 17)

#define INIT_PORT_FLAG_SIG (1 << 18)

#define INIT_PORT_FLAGS_OFFSET 0x00

#define INIT_PORT_GUID0_OFFSET 0x10

#define INIT_PORT_IN_SIZE 256

#define INIT_PORT_MAX_GID_OFFSET 0x06

#define INIT_PORT_MAX_PKEY_OFFSET 0x0a

#define INIT_PORT_MTU_OFFSET 0x04

#define INIT_PORT_NODE_GUID_OFFSET 0x18

#define INIT_PORT_PORT_WIDTH_SHIFT 8

#define INIT_PORT_SI_GUID_OFFSET 0x20

#define INIT_PORT_VL_SHIFT 4

#define MLX4_GET	(	dest,
		source,
		offset
	)

Value:

do {                                  \
        void *__p = (char *) (source) + (offset);         \
        switch (sizeof (dest)) {                  \
        case 1: (dest) = *(u8 *) __p;       break;        \
        case 2: (dest) = be16_to_cpup(__p); break;        \
        case 4: (dest) = be32_to_cpup(__p); break;        \
        case 8: (dest) = be64_to_cpup(__p); break;        \
        default: __buggy_use_of_MLX4_GET();           \
        }                             \
    } while (0)

Definition at line 56 of file fw.c.

#define MLX4_PUT	(	dest,
		source,
		offset
	)

Value:

do {                                  \
        void *__d = ((char *) (dest) + (offset));         \
        switch (sizeof(source)) {                 \
        case 1: *(u8 *) __d = (source);            break; \
        case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
        case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
        case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
        default: __buggy_use_of_MLX4_PUT();           \
        }                             \
    } while (0)

Definition at line 68 of file fw.c.

#define MLX4_VF_PORT_NO_LINK_SENSE_MASK 0xE0

#define MLX4_WOL_SETUP_MODE (5 << 28)

Definition at line 1576 of file fw.c.

#define MOD_STAT_CFG_IN_SIZE 0x100

#define MOD_STAT_CFG_PG_SZ_M_OFFSET 0x002

#define MOD_STAT_CFG_PG_SZ_OFFSET 0x003

#define QUERY_ADAPTER_INTA_PIN_OFFSET 0x10

#define QUERY_ADAPTER_OUT_SIZE 0x100

#define QUERY_ADAPTER_VSD_OFFSET 0x20

#define QUERY_DEV_CAP_ACK_DELAY_OFFSET 0x35

#define QUERY_DEV_CAP_ALTC_ENTRY_SZ_OFFSET 0x86

#define QUERY_DEV_CAP_AUX_ENTRY_SZ_OFFSET 0x84

#define QUERY_DEV_CAP_BF_OFFSET 0x4c

#define QUERY_DEV_CAP_BMME_FLAGS_OFFSET 0x94

#define QUERY_DEV_CAP_C_MPT_ENTRY_SZ_OFFSET 0x8e

#define QUERY_DEV_CAP_CQC_ENTRY_SZ_OFFSET 0x8a

#define QUERY_DEV_CAP_D_MPT_ENTRY_SZ_OFFSET 0x92

#define QUERY_DEV_CAP_EQC_ENTRY_SZ_OFFSET 0x88

#define QUERY_DEV_CAP_EXT_FLAGS_OFFSET 0x40

#define QUERY_DEV_CAP_FLAGS_OFFSET 0x44

#define QUERY_DEV_CAP_FLOW_STEERING_MAX_QP_OFFSET 0x77

#define QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET 0x76

#define QUERY_DEV_CAP_LOG_BF_REG_SZ_OFFSET 0x4d

#define QUERY_DEV_CAP_LOG_MAX_BF_PAGES_OFFSET 0x4f

#define QUERY_DEV_CAP_LOG_MAX_BF_REGS_PER_PAGE_OFFSET 0x4e

#define QUERY_DEV_CAP_MAX_AV_OFFSET 0x27

#define QUERY_DEV_CAP_MAX_COUNTERS_OFFSET 0x68

#define QUERY_DEV_CAP_MAX_CQ_OFFSET 0x1b

#define QUERY_DEV_CAP_MAX_CQ_SZ_OFFSET 0x19

#define QUERY_DEV_CAP_MAX_DESC_SZ_RQ_OFFSET 0x56

#define QUERY_DEV_CAP_MAX_DESC_SZ_SQ_OFFSET 0x52

#define QUERY_DEV_CAP_MAX_EEC_OFFSET 0x17

#define QUERY_DEV_CAP_MAX_EQ_OFFSET 0x1f

#define QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b

#define QUERY_DEV_CAP_MAX_GSO_OFFSET 0x2d

#define QUERY_DEV_CAP_MAX_ICM_SZ_OFFSET 0xa0

#define QUERY_DEV_CAP_MAX_MCG_OFFSET 0x63

#define QUERY_DEV_CAP_MAX_MPT_OFFSET 0x1d

#define QUERY_DEV_CAP_MAX_MRW_SZ_OFFSET 0x21

#define QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET 0x38

#define QUERY_DEV_CAP_MAX_MTT_SEG_OFFSET 0x23

#define QUERY_DEV_CAP_MAX_PD_OFFSET 0x65

#define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f

#define QUERY_DEV_CAP_MAX_QP_MCG_OFFSET 0x61

#define QUERY_DEV_CAP_MAX_QP_OFFSET 0x13

#define QUERY_DEV_CAP_MAX_QP_SZ_OFFSET 0x11

#define QUERY_DEV_CAP_MAX_RDMA_OFFSET 0x2f

#define QUERY_DEV_CAP_MAX_REQ_QP_OFFSET 0x29

#define QUERY_DEV_CAP_MAX_RES_QP_OFFSET 0x2b

#define QUERY_DEV_CAP_MAX_SG_RQ_OFFSET 0x55

#define QUERY_DEV_CAP_MAX_SG_SQ_OFFSET 0x51

#define QUERY_DEV_CAP_MAX_SRQ_OFFSET 0x15

#define QUERY_DEV_CAP_MAX_SRQ_SZ_OFFSET 0x10

#define QUERY_DEV_CAP_MAX_XRC_OFFSET 0x67

#define QUERY_DEV_CAP_MTT_ENTRY_SZ_OFFSET 0x90

#define QUERY_DEV_CAP_MTU_WIDTH_OFFSET 0x36

#define QUERY_DEV_CAP_OUT_SIZE 0x100

#define QUERY_DEV_CAP_PAGE_SZ_OFFSET 0x4b

#define QUERY_DEV_CAP_QPC_ENTRY_SZ_OFFSET 0x82

#define QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c

#define QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET 0x80

#define QUERY_DEV_CAP_RSS_OFFSET 0x2e

#define QUERY_DEV_CAP_RSVD_CQ_OFFSET 0x1a

#define QUERY_DEV_CAP_RSVD_EEC_OFFSET 0x16

#define QUERY_DEV_CAP_RSVD_EQ_OFFSET 0x1e

#define QUERY_DEV_CAP_RSVD_LKEY_OFFSET 0x98

#define QUERY_DEV_CAP_RSVD_MCG_OFFSET 0x62

#define QUERY_DEV_CAP_RSVD_MRW_OFFSET 0x22

#define QUERY_DEV_CAP_RSVD_MTT_OFFSET 0x20

#define QUERY_DEV_CAP_RSVD_PD_OFFSET 0x64

#define QUERY_DEV_CAP_RSVD_QP_OFFSET 0x12

#define QUERY_DEV_CAP_RSVD_SRQ_OFFSET 0x14

#define QUERY_DEV_CAP_RSVD_UAR_OFFSET 0x48

#define QUERY_DEV_CAP_RSVD_XRC_OFFSET 0x66

#define QUERY_DEV_CAP_RSZ_SRQ_OFFSET 0x33

#define QUERY_DEV_CAP_SRQ_ENTRY_SZ_OFFSET 0x8c

#define QUERY_DEV_CAP_UAR_SZ_OFFSET 0x49

#define QUERY_DEV_CAP_VL_PORT_OFFSET 0x37

#define QUERY_FUNC_CAP_CQ_QUOTA_OFFSET 0x14

#define QUERY_FUNC_CAP_ETH_PROPS_FORCE_MAC 0x40

#define QUERY_FUNC_CAP_ETH_PROPS_FORCE_VLAN 0x80

#define QUERY_FUNC_CAP_ETH_PROPS_OFFSET 0xc

#define QUERY_FUNC_CAP_FLAG_ETH 0x80

#define QUERY_FUNC_CAP_FLAG_RDMA 0x40

#define QUERY_FUNC_CAP_FLAGS_OFFSET 0x0

#define QUERY_FUNC_CAP_FMR_FLAG 0x80

#define QUERY_FUNC_CAP_FMR_OFFSET 0x8

#define QUERY_FUNC_CAP_MAX_EQ_OFFSET 0x2c

#define QUERY_FUNC_CAP_MCG_QUOTA_OFFSET 0x28

#define QUERY_FUNC_CAP_MPT_QUOTA_OFFSET 0x20

#define QUERY_FUNC_CAP_MTT_QUOTA_OFFSET 0x24

#define QUERY_FUNC_CAP_NUM_PORTS_OFFSET 0x1

#define QUERY_FUNC_CAP_PF_BHVR_OFFSET 0x4

#define QUERY_FUNC_CAP_PHYS_PORT_OFFSET 0x3

#define QUERY_FUNC_CAP_QP0_PROXY 0x14

#define QUERY_FUNC_CAP_QP0_TUNNEL 0x10

#define QUERY_FUNC_CAP_QP1_PROXY 0x1c

#define QUERY_FUNC_CAP_QP1_TUNNEL 0x18

#define QUERY_FUNC_CAP_QP_QUOTA_OFFSET 0x10

#define QUERY_FUNC_CAP_RDMA_PROPS_FORCE_PHY_WQE_GID 0x80

#define QUERY_FUNC_CAP_RDMA_PROPS_OFFSET 0x8

#define QUERY_FUNC_CAP_RESERVED_EQ_OFFSET 0x30

#define QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET 0x18

#define QUERY_FW_CLR_INT_BAR_OFFSET 0x28

#define QUERY_FW_CLR_INT_BASE_OFFSET 0x20

#define QUERY_FW_CMD_IF_REV_OFFSET 0x0a

#define QUERY_FW_COMM_BAR_OFFSET 0x48

#define QUERY_FW_COMM_BASE_OFFSET 0x40

#define QUERY_FW_ERR_BAR_OFFSET 0x3c

#define QUERY_FW_ERR_SIZE_OFFSET 0x38

#define QUERY_FW_ERR_START_OFFSET 0x30

#define QUERY_FW_MAX_CMD_OFFSET 0x0f

#define QUERY_FW_OUT_SIZE 0x100

#define QUERY_FW_PPF_ID 0x09

#define QUERY_FW_SIZE_OFFSET 0x00

#define QUERY_FW_VER_OFFSET 0x00

#define QUERY_HCA_GLOBAL_CAPS_OFFSET 0x04

#define QUERY_PORT_CUR_MAX_GID_OFFSET 0x0e

#define QUERY_PORT_CUR_MAX_PKEY_OFFSET 0x0c

#define QUERY_PORT_ETH_MTU_OFFSET 0x02

#define QUERY_PORT_MAC_OFFSET 0x10

#define QUERY_PORT_MAX_GID_PKEY_OFFSET 0x07

#define QUERY_PORT_MAX_MACVLAN_OFFSET 0x0a

#define QUERY_PORT_MAX_VL_OFFSET 0x0b

#define QUERY_PORT_MTU_OFFSET 0x01

#define QUERY_PORT_SUPPORTED_TYPE_OFFSET 0x00

#define QUERY_PORT_TRANS_CODE_OFFSET 0x20

#define QUERY_PORT_TRANS_VENDOR_OFFSET 0x18

#define QUERY_PORT_WAVELENGTH_OFFSET 0x1c

#define QUERY_PORT_WIDTH_OFFSET 0x06

#define VSD_OFFSET_MLX_BOARD_ID 0xd0

#define VSD_OFFSET_SIG1 0x00

#define VSD_OFFSET_SIG2 0xde

#define VSD_OFFSET_TS_BOARD_ID 0x20

#define VSD_SIGNATURE_TOPSPIN 0x5ad

Enumeration Type Documentation

anonymous enum

Enumerator:

MLX4_COMMAND_INTERFACE_MIN_REV
MLX4_COMMAND_INTERFACE_MAX_REV
MLX4_COMMAND_INTERFACE_NEW_PORT_CMDS

Definition at line 43 of file fw.c.

Function Documentation

void __buggy_use_of_MLX4_GET ( void )

void __buggy_use_of_MLX4_PUT ( void )

EXPORT_SYMBOL ( mlx4_get_slave_pkey_gid_tbl_len )

EXPORT_SYMBOL_GPL ( mlx4_INIT_PORT )

EXPORT_SYMBOL_GPL ( mlx4_CLOSE_PORT )

EXPORT_SYMBOL_GPL ( mlx4_wol_read )

EXPORT_SYMBOL_GPL ( mlx4_wol_write )

int mlx4_CLOSE_HCA	(	struct mlx4_dev *	dev,
		int	panic
	)

Definition at line 1546 of file fw.c.

int mlx4_CLOSE_PORT	(	struct mlx4_dev *	dev,
		int	port
	)

Definition at line 1539 of file fw.c.

int mlx4_CLOSE_PORT_wrapper	(	struct mlx4_dev *	dev,
		int	slave,
		struct mlx4_vhcr *	vhcr,
		struct mlx4_cmd_mailbox *	inbox,
		struct mlx4_cmd_mailbox *	outbox,
		struct mlx4_cmd_info *	cmd
	)

Definition at line 1498 of file fw.c.

int mlx4_get_slave_pkey_gid_tbl_len	(	struct mlx4_dev *	dev,
		u8	port,
		int *	gid_tbl_len,
		int *	pkey_tbl_len
	)

Definition at line 826 of file fw.c.

int mlx4_INIT_HCA	(	struct mlx4_dev *	dev,
		struct mlx4_init_hca_param *	param
	)

Definition at line 1157 of file fw.c.

int mlx4_INIT_PORT	(	struct mlx4_dev *	dev,
		int	port
	)

Definition at line 1444 of file fw.c.

int mlx4_INIT_PORT_wrapper	(	struct mlx4_dev *	dev,
		int	slave,
		struct mlx4_vhcr *	vhcr,
		struct mlx4_cmd_mailbox *	inbox,
		struct mlx4_cmd_mailbox *	outbox,
		struct mlx4_cmd_info *	cmd
	)

Definition at line 1404 of file fw.c.

int mlx4_map_cmd	(	struct mlx4_dev *	dev,
		u16	op,
		struct mlx4_icm *	icm,
		u64	virt
	)

Definition at line 858 of file fw.c.

int mlx4_MAP_FA	(	struct mlx4_dev *	dev,
		struct mlx4_icm *	icm
	)

Definition at line 940 of file fw.c.

int mlx4_MOD_STAT_CFG	(	struct mlx4_dev *	dev,
		struct mlx4_mod_stat_cfg *	cfg
	)

Definition at line 137 of file fw.c.

int mlx4_NOP ( struct mlx4_dev * dev )

Definition at line 1570 of file fw.c.

int mlx4_QUERY_ADAPTER	(	struct mlx4_dev *	dev,
		struct mlx4_adapter *	adapter
	)

Definition at line 1127 of file fw.c.

int mlx4_QUERY_DEV_CAP	(	struct mlx4_dev *	dev,
		struct mlx4_dev_cap *	dev_cap
	)

Definition at line 399 of file fw.c.

int mlx4_QUERY_DEV_CAP_wrapper	(	struct mlx4_dev *	dev,
		int	slave,
		struct mlx4_vhcr *	vhcr,
		struct mlx4_cmd_mailbox *	inbox,
		struct mlx4_cmd_mailbox *	outbox,
		struct mlx4_cmd_info *	cmd
	)

Definition at line 749 of file fw.c.

int mlx4_QUERY_FUNC_CAP	(	struct mlx4_dev *	dev,
		u32	gen_or_port,
		struct mlx4_func_cap *	func_cap
	)

Definition at line 274 of file fw.c.

int mlx4_QUERY_FUNC_CAP_wrapper	(	struct mlx4_dev *	dev,
		int	slave,
		struct mlx4_vhcr *	vhcr,
		struct mlx4_cmd_mailbox *	inbox,
		struct mlx4_cmd_mailbox *	outbox,
		struct mlx4_cmd_info *	cmd
	)

Definition at line 165 of file fw.c.

int mlx4_QUERY_FW ( struct mlx4_dev * dev )

Definition at line 958 of file fw.c.

int mlx4_QUERY_FW_wrapper	(	struct mlx4_dev *	dev,
		int	slave,
		struct mlx4_vhcr *	vhcr,
		struct mlx4_cmd_mailbox *	inbox,
		struct mlx4_cmd_mailbox *	outbox,
		struct mlx4_cmd_info *	cmd
	)

Definition at line 1075 of file fw.c.

int mlx4_QUERY_HCA	(	struct mlx4_dev *	dev,
		struct mlx4_init_hca_param *	param
	)

Definition at line 1316 of file fw.c.

int mlx4_QUERY_PORT_wrapper	(	struct mlx4_dev *	dev,
		int	slave,
		struct mlx4_vhcr *	vhcr,
		struct mlx4_cmd_mailbox *	inbox,
		struct mlx4_cmd_mailbox *	outbox,
		struct mlx4_cmd_info *	cmd
	)

Definition at line 777 of file fw.c.

int mlx4_RUN_FW ( struct mlx4_dev * dev )

Definition at line 952 of file fw.c.

int mlx4_SET_ICM_SIZE	(	struct mlx4_dev *	dev,
		u64	icm_size,
		u64 *	aux_pages
	)

Definition at line 1552 of file fw.c.

int mlx4_UNMAP_FA ( struct mlx4_dev * dev )

Definition at line 945 of file fw.c.

int mlx4_wol_read	(	struct mlx4_dev *	dev,
		u64 *	config,
		int	port
	)

Definition at line 1577 of file fw.c.

int mlx4_wol_write	(	struct mlx4_dev *	dev,
		u64	config,
		int	port
	)

Definition at line 1587 of file fw.c.

module_param	(	enable_qos	,
		bool	,
		0444
	)

MODULE_PARM_DESC	(	enable_qos	,
		"Enable Quality of Service support in the HCA (default: off)"
	)

Macros

Enumerations

Functions

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation