|
| #define | GFAR_DEV_WEIGHT 64 |
| |
| #define | GMAC_FCB_LEN 8 |
| |
| #define | GMAC_TXPAL_LEN 16 |
| |
| #define | DEFAULT_PADDING 2 |
| |
| #define | RXBUF_ALIGNMENT 64 |
| |
| #define | INCREMENTAL_BUFFER_SIZE 512 |
| |
| #define | PHY_INIT_TIMEOUT 100000 |
| |
| #define | DRV_NAME "gfar-enet" |
| |
| #define | MAX_TX_QS 0x8 |
| |
| #define | MAX_RX_QS 0x8 |
| |
| #define | MAXGROUPS 0x2 |
| |
| #define | DEFAULT_TX_RING_SIZE 256 |
| |
| #define | DEFAULT_RX_RING_SIZE 256 |
| |
| #define | GFAR_RX_MAX_RING_SIZE 256 |
| |
| #define | GFAR_TX_MAX_RING_SIZE 256 |
| |
| #define | GFAR_MAX_FIFO_THRESHOLD 511 |
| |
| #define | GFAR_MAX_FIFO_STARVE 511 |
| |
| #define | GFAR_MAX_FIFO_STARVE_OFF 511 |
| |
| #define | DEFAULT_RX_BUFFER_SIZE 1536 |
| |
| #define | TX_RING_MOD_MASK(size) (size-1) |
| |
| #define | RX_RING_MOD_MASK(size) (size-1) |
| |
| #define | JUMBO_BUFFER_SIZE 9728 |
| |
| #define | JUMBO_FRAME_SIZE 9600 |
| |
| #define | DEFAULT_FIFO_TX_THR 0x100 |
| |
| #define | DEFAULT_FIFO_TX_STARVE 0x40 |
| |
| #define | DEFAULT_FIFO_TX_STARVE_OFF 0x80 |
| |
| #define | DEFAULT_BD_STASH 1 |
| |
| #define | DEFAULT_STASH_LENGTH 96 |
| |
| #define | DEFAULT_STASH_INDEX 0 |
| |
| #define | GFAR_EM_NUM 15 |
| |
| #define | GFAR_GBIT_TIME 512 |
| |
| #define | GFAR_100_TIME 2560 |
| |
| #define | GFAR_10_TIME 25600 |
| |
| #define | DEFAULT_TX_COALESCE 1 |
| |
| #define | DEFAULT_TXCOUNT 16 |
| |
| #define | DEFAULT_TXTIME 21 |
| |
| #define | DEFAULT_RXTIME 21 |
| |
| #define | DEFAULT_RX_COALESCE 0 |
| |
| #define | DEFAULT_RXCOUNT 0 |
| |
| #define | GFAR_SUPPORTED |
| |
| #define | MII_TBICON 0x11 |
| |
| #define | TBICON_CLK_SELECT 0x0020 |
| |
| #define | MACCFG1_SOFT_RESET 0x80000000 |
| |
| #define | MACCFG1_RESET_RX_MC 0x00080000 |
| |
| #define | MACCFG1_RESET_TX_MC 0x00040000 |
| |
| #define | MACCFG1_RESET_RX_FUN 0x00020000 |
| |
| #define | MACCFG1_RESET_TX_FUN 0x00010000 |
| |
| #define | MACCFG1_LOOPBACK 0x00000100 |
| |
| #define | MACCFG1_RX_FLOW 0x00000020 |
| |
| #define | MACCFG1_TX_FLOW 0x00000010 |
| |
| #define | MACCFG1_SYNCD_RX_EN 0x00000008 |
| |
| #define | MACCFG1_RX_EN 0x00000004 |
| |
| #define | MACCFG1_SYNCD_TX_EN 0x00000002 |
| |
| #define | MACCFG1_TX_EN 0x00000001 |
| |
| #define | MACCFG2_INIT_SETTINGS 0x00007205 |
| |
| #define | MACCFG2_FULL_DUPLEX 0x00000001 |
| |
| #define | MACCFG2_IF 0x00000300 |
| |
| #define | MACCFG2_MII 0x00000100 |
| |
| #define | MACCFG2_GMII 0x00000200 |
| |
| #define | MACCFG2_HUGEFRAME 0x00000020 |
| |
| #define | MACCFG2_LENGTHCHECK 0x00000010 |
| |
| #define | MACCFG2_MPEN 0x00000008 |
| |
| #define | ECNTRL_FIFM 0x00008000 |
| |
| #define | ECNTRL_INIT_SETTINGS 0x00001000 |
| |
| #define | ECNTRL_TBI_MODE 0x00000020 |
| |
| #define | ECNTRL_REDUCED_MODE 0x00000010 |
| |
| #define | ECNTRL_R100 0x00000008 |
| |
| #define | ECNTRL_REDUCED_MII_MODE 0x00000004 |
| |
| #define | ECNTRL_SGMII_MODE 0x00000002 |
| |
| #define | MRBLR_INIT_SETTINGS DEFAULT_RX_BUFFER_SIZE |
| |
| #define | MINFLR_INIT_SETTINGS 0x00000040 |
| |
| #define | TQUEUE_EN0 0x00008000 |
| |
| #define | TQUEUE_EN1 0x00004000 |
| |
| #define | TQUEUE_EN2 0x00002000 |
| |
| #define | TQUEUE_EN3 0x00001000 |
| |
| #define | TQUEUE_EN4 0x00000800 |
| |
| #define | TQUEUE_EN5 0x00000400 |
| |
| #define | TQUEUE_EN6 0x00000200 |
| |
| #define | TQUEUE_EN7 0x00000100 |
| |
| #define | TQUEUE_EN_ALL 0x0000FF00 |
| |
| #define | TR03WT_WT0_MASK 0xFF000000 |
| |
| #define | TR03WT_WT1_MASK 0x00FF0000 |
| |
| #define | TR03WT_WT2_MASK 0x0000FF00 |
| |
| #define | TR03WT_WT3_MASK 0x000000FF |
| |
| #define | TR47WT_WT4_MASK 0xFF000000 |
| |
| #define | TR47WT_WT5_MASK 0x00FF0000 |
| |
| #define | TR47WT_WT6_MASK 0x0000FF00 |
| |
| #define | TR47WT_WT7_MASK 0x000000FF |
| |
| #define | RQUEUE_EX0 0x00800000 |
| |
| #define | RQUEUE_EX1 0x00400000 |
| |
| #define | RQUEUE_EX2 0x00200000 |
| |
| #define | RQUEUE_EX3 0x00100000 |
| |
| #define | RQUEUE_EX4 0x00080000 |
| |
| #define | RQUEUE_EX5 0x00040000 |
| |
| #define | RQUEUE_EX6 0x00020000 |
| |
| #define | RQUEUE_EX7 0x00010000 |
| |
| #define | RQUEUE_EX_ALL 0x00FF0000 |
| |
| #define | RQUEUE_EN0 0x00000080 |
| |
| #define | RQUEUE_EN1 0x00000040 |
| |
| #define | RQUEUE_EN2 0x00000020 |
| |
| #define | RQUEUE_EN3 0x00000010 |
| |
| #define | RQUEUE_EN4 0x00000008 |
| |
| #define | RQUEUE_EN5 0x00000004 |
| |
| #define | RQUEUE_EN6 0x00000002 |
| |
| #define | RQUEUE_EN7 0x00000001 |
| |
| #define | RQUEUE_EN_ALL 0x000000FF |
| |
| #define | DMACTRL_INIT_SETTINGS 0x000000c3 |
| |
| #define | DMACTRL_GRS 0x00000010 |
| |
| #define | DMACTRL_GTS 0x00000008 |
| |
| #define | TSTAT_CLEAR_THALT_ALL 0xFF000000 |
| |
| #define | TSTAT_CLEAR_THALT 0x80000000 |
| |
| #define | TSTAT_CLEAR_THALT0 0x80000000 |
| |
| #define | TSTAT_CLEAR_THALT1 0x40000000 |
| |
| #define | TSTAT_CLEAR_THALT2 0x20000000 |
| |
| #define | TSTAT_CLEAR_THALT3 0x10000000 |
| |
| #define | TSTAT_CLEAR_THALT4 0x08000000 |
| |
| #define | TSTAT_CLEAR_THALT5 0x04000000 |
| |
| #define | TSTAT_CLEAR_THALT6 0x02000000 |
| |
| #define | TSTAT_CLEAR_THALT7 0x01000000 |
| |
| #define | IC_ICEN 0x80000000 |
| |
| #define | IC_ICFT_MASK 0x1fe00000 |
| |
| #define | IC_ICFT_SHIFT 21 |
| |
| #define | mk_ic_icft(x) (((unsigned int)x << IC_ICFT_SHIFT)&IC_ICFT_MASK) |
| |
| #define | IC_ICTT_MASK 0x0000ffff |
| |
| #define | mk_ic_ictt(x) (x&IC_ICTT_MASK) |
| |
| #define | mk_ic_value(count, time) |
| |
| #define | get_icft_value(ic) |
| |
| #define | get_ictt_value(ic) ((unsigned long)ic & IC_ICTT_MASK) |
| |
| #define | DEFAULT_TXIC mk_ic_value(DEFAULT_TXCOUNT, DEFAULT_TXTIME) |
| |
| #define | DEFAULT_RXIC mk_ic_value(DEFAULT_RXCOUNT, DEFAULT_RXTIME) |
| |
| #define | skip_bd(bdp, stride, base, ring_size) |
| |
| #define | next_bd(bdp, base, ring_size) skip_bd(bdp, 1, base, ring_size) |
| |
| #define | RCTRL_TS_ENABLE 0x01000000 |
| |
| #define | RCTRL_PAL_MASK 0x001f0000 |
| |
| #define | RCTRL_VLEX 0x00002000 |
| |
| #define | RCTRL_FILREN 0x00001000 |
| |
| #define | RCTRL_GHTX 0x00000400 |
| |
| #define | RCTRL_IPCSEN 0x00000200 |
| |
| #define | RCTRL_TUCSEN 0x00000100 |
| |
| #define | RCTRL_PRSDEP_MASK 0x000000c0 |
| |
| #define | RCTRL_PRSDEP_INIT 0x000000c0 |
| |
| #define | RCTRL_PRSFM 0x00000020 |
| |
| #define | RCTRL_PROM 0x00000008 |
| |
| #define | RCTRL_EMEN 0x00000002 |
| |
| #define | RCTRL_REQ_PARSER |
| |
| #define | RCTRL_CHECKSUMMING |
| |
| #define | RCTRL_EXTHASH (RCTRL_GHTX) |
| |
| #define | RCTRL_VLAN (RCTRL_PRSDEP_INIT) |
| |
| #define | RCTRL_PADDING(x) ((x << 16) & RCTRL_PAL_MASK) |
| |
| #define | RSTAT_CLEAR_RHALT 0x00800000 |
| |
| #define | TCTRL_IPCSEN 0x00004000 |
| |
| #define | TCTRL_TUCSEN 0x00002000 |
| |
| #define | TCTRL_VLINS 0x00001000 |
| |
| #define | TCTRL_THDF 0x00000800 |
| |
| #define | TCTRL_RFCPAUSE 0x00000010 |
| |
| #define | TCTRL_TFCPAUSE 0x00000008 |
| |
| #define | TCTRL_TXSCHED_MASK 0x00000006 |
| |
| #define | TCTRL_TXSCHED_INIT 0x00000000 |
| |
| #define | TCTRL_TXSCHED_PRIO 0x00000002 |
| |
| #define | TCTRL_TXSCHED_WRRS 0x00000004 |
| |
| #define | DEFAULT_WRRS_WEIGHT 0x18181818 |
| |
| #define | TCTRL_INIT_CSUM (TCTRL_TUCSEN | TCTRL_IPCSEN) |
| |
| #define | IEVENT_INIT_CLEAR 0xffffffff |
| |
| #define | IEVENT_BABR 0x80000000 |
| |
| #define | IEVENT_RXC 0x40000000 |
| |
| #define | IEVENT_BSY 0x20000000 |
| |
| #define | IEVENT_EBERR 0x10000000 |
| |
| #define | IEVENT_MSRO 0x04000000 |
| |
| #define | IEVENT_GTSC 0x02000000 |
| |
| #define | IEVENT_BABT 0x01000000 |
| |
| #define | IEVENT_TXC 0x00800000 |
| |
| #define | IEVENT_TXE 0x00400000 |
| |
| #define | IEVENT_TXB 0x00200000 |
| |
| #define | IEVENT_TXF 0x00100000 |
| |
| #define | IEVENT_LC 0x00040000 |
| |
| #define | IEVENT_CRL 0x00020000 |
| |
| #define | IEVENT_XFUN 0x00010000 |
| |
| #define | IEVENT_RXB0 0x00008000 |
| |
| #define | IEVENT_MAG 0x00000800 |
| |
| #define | IEVENT_GRSC 0x00000100 |
| |
| #define | IEVENT_RXF0 0x00000080 |
| |
| #define | IEVENT_FIR 0x00000008 |
| |
| #define | IEVENT_FIQ 0x00000004 |
| |
| #define | IEVENT_DPE 0x00000002 |
| |
| #define | IEVENT_PERR 0x00000001 |
| |
| #define | IEVENT_RX_MASK (IEVENT_RXB0 | IEVENT_RXF0 | IEVENT_BSY) |
| |
| #define | IEVENT_TX_MASK (IEVENT_TXB | IEVENT_TXF) |
| |
| #define | IEVENT_RTX_MASK (IEVENT_RX_MASK | IEVENT_TX_MASK) |
| |
| #define | IEVENT_ERR_MASK |
| |
| #define | IMASK_INIT_CLEAR 0x00000000 |
| |
| #define | IMASK_BABR 0x80000000 |
| |
| #define | IMASK_RXC 0x40000000 |
| |
| #define | IMASK_BSY 0x20000000 |
| |
| #define | IMASK_EBERR 0x10000000 |
| |
| #define | IMASK_MSRO 0x04000000 |
| |
| #define | IMASK_GTSC 0x02000000 |
| |
| #define | IMASK_BABT 0x01000000 |
| |
| #define | IMASK_TXC 0x00800000 |
| |
| #define | IMASK_TXEEN 0x00400000 |
| |
| #define | IMASK_TXBEN 0x00200000 |
| |
| #define | IMASK_TXFEN 0x00100000 |
| |
| #define | IMASK_LC 0x00040000 |
| |
| #define | IMASK_CRL 0x00020000 |
| |
| #define | IMASK_XFUN 0x00010000 |
| |
| #define | IMASK_RXB0 0x00008000 |
| |
| #define | IMASK_MAG 0x00000800 |
| |
| #define | IMASK_GRSC 0x00000100 |
| |
| #define | IMASK_RXFEN0 0x00000080 |
| |
| #define | IMASK_FIR 0x00000008 |
| |
| #define | IMASK_FIQ 0x00000004 |
| |
| #define | IMASK_DPE 0x00000002 |
| |
| #define | IMASK_PERR 0x00000001 |
| |
| #define | IMASK_DEFAULT |
| |
| #define | IMASK_RTX_DISABLED |
| |
| #define | FIFO_TX_THR_MASK 0x01ff |
| |
| #define | FIFO_TX_STARVE_MASK 0x01ff |
| |
| #define | FIFO_TX_STARVE_OFF_MASK 0x01ff |
| |
| #define | ATTR_BDSTASH 0x00000800 |
| |
| #define | ATTR_BUFSTASH 0x00004000 |
| |
| #define | ATTR_SNOOPING 0x000000c0 |
| |
| #define | ATTR_INIT_SETTINGS ATTR_SNOOPING |
| |
| #define | ATTRELI_INIT_SETTINGS 0x0 |
| |
| #define | ATTRELI_EL_MASK 0x3fff0000 |
| |
| #define | ATTRELI_EL(x) (x << 16) |
| |
| #define | ATTRELI_EI_MASK 0x00003fff |
| |
| #define | ATTRELI_EI(x) (x) |
| |
| #define | BD_LFLAG(flags) ((flags) << 16) |
| |
| #define | BD_LENGTH_MASK 0x0000ffff |
| |
| #define | FPR_FILER_MASK 0xFFFFFFFF |
| |
| #define | MAX_FILER_IDX 0xFF |
| |
| #define | DEFAULT_RIR0 0x05397700 |
| |
| #define | RQFCR_GPI 0x80000000 |
| |
| #define | RQFCR_HASHTBL_Q 0x00000000 |
| |
| #define | RQFCR_HASHTBL_0 0x00020000 |
| |
| #define | RQFCR_HASHTBL_1 0x00040000 |
| |
| #define | RQFCR_HASHTBL_2 0x00060000 |
| |
| #define | RQFCR_HASHTBL_3 0x00080000 |
| |
| #define | RQFCR_HASH 0x00010000 |
| |
| #define | RQFCR_QUEUE 0x0000FC00 |
| |
| #define | RQFCR_CLE 0x00000200 |
| |
| #define | RQFCR_RJE 0x00000100 |
| |
| #define | RQFCR_AND 0x00000080 |
| |
| #define | RQFCR_CMP_EXACT 0x00000000 |
| |
| #define | RQFCR_CMP_MATCH 0x00000020 |
| |
| #define | RQFCR_CMP_NOEXACT 0x00000040 |
| |
| #define | RQFCR_CMP_NOMATCH 0x00000060 |
| |
| #define | RQFCR_PID_MASK 0x00000000 |
| |
| #define | RQFCR_PID_PARSE 0x00000001 |
| |
| #define | RQFCR_PID_ARB 0x00000002 |
| |
| #define | RQFCR_PID_DAH 0x00000003 |
| |
| #define | RQFCR_PID_DAL 0x00000004 |
| |
| #define | RQFCR_PID_SAH 0x00000005 |
| |
| #define | RQFCR_PID_SAL 0x00000006 |
| |
| #define | RQFCR_PID_ETY 0x00000007 |
| |
| #define | RQFCR_PID_VID 0x00000008 |
| |
| #define | RQFCR_PID_PRI 0x00000009 |
| |
| #define | RQFCR_PID_TOS 0x0000000A |
| |
| #define | RQFCR_PID_L4P 0x0000000B |
| |
| #define | RQFCR_PID_DIA 0x0000000C |
| |
| #define | RQFCR_PID_SIA 0x0000000D |
| |
| #define | RQFCR_PID_DPT 0x0000000E |
| |
| #define | RQFCR_PID_SPT 0x0000000F |
| |
| #define | RQFPR_HDR_GE_512 0x00200000 |
| |
| #define | RQFPR_LERR 0x00100000 |
| |
| #define | RQFPR_RAR 0x00080000 |
| |
| #define | RQFPR_RARQ 0x00040000 |
| |
| #define | RQFPR_AR 0x00020000 |
| |
| #define | RQFPR_ARQ 0x00010000 |
| |
| #define | RQFPR_EBC 0x00008000 |
| |
| #define | RQFPR_VLN 0x00004000 |
| |
| #define | RQFPR_CFI 0x00002000 |
| |
| #define | RQFPR_JUM 0x00001000 |
| |
| #define | RQFPR_IPF 0x00000800 |
| |
| #define | RQFPR_FIF 0x00000400 |
| |
| #define | RQFPR_IPV4 0x00000200 |
| |
| #define | RQFPR_IPV6 0x00000100 |
| |
| #define | RQFPR_ICC 0x00000080 |
| |
| #define | RQFPR_ICV 0x00000040 |
| |
| #define | RQFPR_TCP 0x00000020 |
| |
| #define | RQFPR_UDP 0x00000010 |
| |
| #define | RQFPR_TUC 0x00000008 |
| |
| #define | RQFPR_TUV 0x00000004 |
| |
| #define | RQFPR_PER 0x00000002 |
| |
| #define | RQFPR_EER 0x00000001 |
| |
| #define | TXBD_READY 0x8000 |
| |
| #define | TXBD_PADCRC 0x4000 |
| |
| #define | TXBD_WRAP 0x2000 |
| |
| #define | TXBD_INTERRUPT 0x1000 |
| |
| #define | TXBD_LAST 0x0800 |
| |
| #define | TXBD_CRC 0x0400 |
| |
| #define | TXBD_DEF 0x0200 |
| |
| #define | TXBD_HUGEFRAME 0x0080 |
| |
| #define | TXBD_LATECOLLISION 0x0080 |
| |
| #define | TXBD_RETRYLIMIT 0x0040 |
| |
| #define | TXBD_RETRYCOUNTMASK 0x003c |
| |
| #define | TXBD_UNDERRUN 0x0002 |
| |
| #define | TXBD_TOE 0x0002 |
| |
| #define | TXFCB_VLN 0x80 |
| |
| #define | TXFCB_IP 0x40 |
| |
| #define | TXFCB_IP6 0x20 |
| |
| #define | TXFCB_TUP 0x10 |
| |
| #define | TXFCB_UDP 0x08 |
| |
| #define | TXFCB_CIP 0x04 |
| |
| #define | TXFCB_CTU 0x02 |
| |
| #define | TXFCB_NPH 0x01 |
| |
| #define | TXFCB_DEFAULT (TXFCB_IP|TXFCB_TUP|TXFCB_CTU|TXFCB_NPH) |
| |
| #define | RXBD_EMPTY 0x8000 |
| |
| #define | RXBD_RO1 0x4000 |
| |
| #define | RXBD_WRAP 0x2000 |
| |
| #define | RXBD_INTERRUPT 0x1000 |
| |
| #define | RXBD_LAST 0x0800 |
| |
| #define | RXBD_FIRST 0x0400 |
| |
| #define | RXBD_MISS 0x0100 |
| |
| #define | RXBD_BROADCAST 0x0080 |
| |
| #define | RXBD_MULTICAST 0x0040 |
| |
| #define | RXBD_LARGE 0x0020 |
| |
| #define | RXBD_NONOCTET 0x0010 |
| |
| #define | RXBD_SHORT 0x0008 |
| |
| #define | RXBD_CRCERR 0x0004 |
| |
| #define | RXBD_OVERRUN 0x0002 |
| |
| #define | RXBD_TRUNCATED 0x0001 |
| |
| #define | RXBD_STATS 0x01ff |
| |
| #define | RXBD_ERR |
| |
| #define | RXFCB_VLN 0x8000 |
| |
| #define | RXFCB_IP 0x4000 |
| |
| #define | RXFCB_IP6 0x2000 |
| |
| #define | RXFCB_TUP 0x1000 |
| |
| #define | RXFCB_CIP 0x0800 |
| |
| #define | RXFCB_CTU 0x0400 |
| |
| #define | RXFCB_EIP 0x0200 |
| |
| #define | RXFCB_ETU 0x0100 |
| |
| #define | RXFCB_CSUM_MASK 0x0f00 |
| |
| #define | RXFCB_PERR_MASK 0x000c |
| |
| #define | RXFCB_PERR_BADL3 0x0008 |
| |
| #define | GFAR_INT_NAME_MAX (IFNAMSIZ + 6) /* '_g#_xx' */ |
| |
| #define | GFAR_CB(skb) ((struct gianfar_skb_cb *)((skb)->cb)) |
| |
| #define | GFAR_RMON_LEN ((sizeof(struct rmon_mib) - 16)/sizeof(u32)) |
| |
| #define | GFAR_EXTRA_STATS_LEN (sizeof(struct gfar_extra_stats)/sizeof(u64)) |
| |
| #define | GFAR_STATS_LEN (GFAR_RMON_LEN + GFAR_EXTRA_STATS_LEN) |
| |
| #define | GFAR_INFOSTR_LEN 32 |
| |
| #define | FSL_GIANFAR_DEV_HAS_GIGABIT 0x00000001 |
| |
| #define | FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002 |
| |
| #define | FSL_GIANFAR_DEV_HAS_RMON 0x00000004 |
| |
| #define | FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008 |
| |
| #define | FSL_GIANFAR_DEV_HAS_CSUM 0x00000010 |
| |
| #define | FSL_GIANFAR_DEV_HAS_VLAN 0x00000020 |
| |
| #define | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040 |
| |
| #define | FSL_GIANFAR_DEV_HAS_PADDING 0x00000080 |
| |
| #define | FSL_GIANFAR_DEV_HAS_MAGIC_PACKET 0x00000100 |
| |
| #define | FSL_GIANFAR_DEV_HAS_BD_STASHING 0x00000200 |
| |
| #define | FSL_GIANFAR_DEV_HAS_BUF_STASHING 0x00000400 |
| |
| #define | FSL_GIANFAR_DEV_HAS_TIMER 0x00000800 |
| |
| #define | DEFAULT_MAPPING 0xAA |
| |
| #define | ISRG_SHIFT_TX 0x10 |
| |
| #define | ISRG_SHIFT_RX 0x18 |
| |
| #define | MAX_FILER_CACHE_IDX (2*(MAX_FILER_IDX)) |
| |
| #define | RQFCR_PID_PRI_MASK 0xFFFFFFF8 |
| |
| #define | RQFCR_PID_L4P_MASK 0xFFFFFF00 |
| |
| #define | RQFCR_PID_VID_MASK 0xFFFFF000 |
| |
| #define | RQFCR_PID_PORT_MASK 0xFFFF0000 |
| |
| #define | RQFCR_PID_MAC_MASK 0xFF000000 |
| |
1.8.2