Linux Kernel
3.7.1
|
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/slab.h>
#include <linux/edac.h>
#include <asm/mmzone.h>
#include "edac_core.h"
Go to the source code of this file.
Data Structures | |
struct | i5000_dev_info |
struct | i5000_dimm_info |
struct | i5000_pvt |
struct | i5000_error_info |
Macros | |
#define | I5000_REVISION " Ver: 2.0.12" |
#define | EDAC_MOD_STR "i5000_edac" |
#define | i5000_printk(level, fmt, arg...) edac_printk(level, "i5000", fmt, ##arg) |
#define | i5000_mc_printk(mci, level, fmt, arg...) edac_mc_chipset_printk(mci, level, "i5000", fmt, ##arg) |
#define | PCI_DEVICE_ID_INTEL_FBD_0 0x25F5 |
#define | PCI_DEVICE_ID_INTEL_FBD_1 0x25F6 |
#define | PCI_DEVICE_ID_INTEL_I5000_DEV16 0x25F0 |
#define | AMBASE 0x48 |
#define | MAXCH 0x56 |
#define | MAXDIMMPERCH 0x57 |
#define | TOLM 0x6C |
#define | REDMEMB 0x7C |
#define | RED_ECC_LOCATOR(x) ((x) & 0x3FFFF) |
#define | REC_ECC_LOCATOR_EVEN(x) ((x) & 0x001FF) |
#define | REC_ECC_LOCATOR_ODD(x) ((x) & 0x3FE00) |
#define | MIR0 0x80 |
#define | MIR1 0x84 |
#define | MIR2 0x88 |
#define | AMIR0 0x8C |
#define | AMIR1 0x90 |
#define | AMIR2 0x94 |
#define | FERR_FAT_FBD 0x98 |
#define | NERR_FAT_FBD 0x9C |
#define | EXTRACT_FBDCHAN_INDX(x) (((x)>>28) & 0x3) |
#define | FERR_FAT_FBDCHAN 0x30000000 |
#define | FERR_FAT_M3ERR 0x00000004 |
#define | FERR_FAT_M2ERR 0x00000002 |
#define | FERR_FAT_M1ERR 0x00000001 |
#define | FERR_FAT_MASK |
#define | FERR_NF_FBD 0xA0 |
#define | FERR_NF_M28ERR 0x01000000 |
#define | FERR_NF_M27ERR 0x00800000 |
#define | FERR_NF_M26ERR 0x00400000 |
#define | FERR_NF_M25ERR 0x00200000 |
#define | FERR_NF_M24ERR 0x00100000 |
#define | FERR_NF_M23ERR 0x00080000 |
#define | FERR_NF_M22ERR 0x00040000 |
#define | FERR_NF_M21ERR 0x00020000 |
#define | FERR_NF_M20ERR 0x00010000 |
#define | FERR_NF_M19ERR 0x00008000 |
#define | FERR_NF_M18ERR 0x00004000 |
#define | FERR_NF_M17ERR 0x00002000 |
#define | FERR_NF_M16ERR 0x00001000 |
#define | FERR_NF_M15ERR 0x00000800 |
#define | FERR_NF_M14ERR 0x00000400 |
#define | FERR_NF_M13ERR 0x00000200 |
#define | FERR_NF_M12ERR 0x00000100 |
#define | FERR_NF_M11ERR 0x00000080 |
#define | FERR_NF_M10ERR 0x00000040 |
#define | FERR_NF_M9ERR 0x00000020 |
#define | FERR_NF_M8ERR 0x00000010 |
#define | FERR_NF_M7ERR 0x00000008 |
#define | FERR_NF_M6ERR 0x00000004 |
#define | FERR_NF_M5ERR 0x00000002 |
#define | FERR_NF_M4ERR 0x00000001 |
#define | FERR_NF_UNCORRECTABLE |
#define | FERR_NF_CORRECTABLE |
#define | FERR_NF_DIMM_SPARE |
#define | FERR_NF_THERMAL |
#define | FERR_NF_SPD_PROTOCOL (FERR_NF_M22ERR) |
#define | FERR_NF_NORTH_CRC (FERR_NF_M21ERR) |
#define | FERR_NF_NON_RETRY |
#define | NERR_NF_FBD 0xA4 |
#define | FERR_NF_MASK |
#define | EMASK_FBD 0xA8 |
#define | EMASK_FBD_M28ERR 0x08000000 |
#define | EMASK_FBD_M27ERR 0x04000000 |
#define | EMASK_FBD_M26ERR 0x02000000 |
#define | EMASK_FBD_M25ERR 0x01000000 |
#define | EMASK_FBD_M24ERR 0x00800000 |
#define | EMASK_FBD_M23ERR 0x00400000 |
#define | EMASK_FBD_M22ERR 0x00200000 |
#define | EMASK_FBD_M21ERR 0x00100000 |
#define | EMASK_FBD_M20ERR 0x00080000 |
#define | EMASK_FBD_M19ERR 0x00040000 |
#define | EMASK_FBD_M18ERR 0x00020000 |
#define | EMASK_FBD_M17ERR 0x00010000 |
#define | EMASK_FBD_M15ERR 0x00004000 |
#define | EMASK_FBD_M14ERR 0x00002000 |
#define | EMASK_FBD_M13ERR 0x00001000 |
#define | EMASK_FBD_M12ERR 0x00000800 |
#define | EMASK_FBD_M11ERR 0x00000400 |
#define | EMASK_FBD_M10ERR 0x00000200 |
#define | EMASK_FBD_M9ERR 0x00000100 |
#define | EMASK_FBD_M8ERR 0x00000080 |
#define | EMASK_FBD_M7ERR 0x00000040 |
#define | EMASK_FBD_M6ERR 0x00000020 |
#define | EMASK_FBD_M5ERR 0x00000010 |
#define | EMASK_FBD_M4ERR 0x00000008 |
#define | EMASK_FBD_M3ERR 0x00000004 |
#define | EMASK_FBD_M2ERR 0x00000002 |
#define | EMASK_FBD_M1ERR 0x00000001 |
#define | ENABLE_EMASK_FBD_FATAL_ERRORS |
#define | ENABLE_EMASK_FBD_UNCORRECTABLE |
#define | ENABLE_EMASK_FBD_CORRECTABLE |
#define | ENABLE_EMASK_FBD_DIMM_SPARE |
#define | ENABLE_EMASK_FBD_THERMALS |
#define | ENABLE_EMASK_FBD_SPD_PROTOCOL (EMASK_FBD_M22ERR) |
#define | ENABLE_EMASK_FBD_NORTH_CRC (EMASK_FBD_M21ERR) |
#define | ENABLE_EMASK_FBD_NON_RETRY |
#define | ENABLE_EMASK_ALL |
#define | ERR0_FBD 0xAC |
#define | ERR1_FBD 0xB0 |
#define | ERR2_FBD 0xB4 |
#define | MCERR_FBD 0xB8 |
#define | NRECMEMA 0xBE |
#define | NREC_BANK(x) (((x)>>12) & 0x7) |
#define | NREC_RDWR(x) (((x)>>11) & 1) |
#define | NREC_RANK(x) (((x)>>8) & 0x7) |
#define | NRECMEMB 0xC0 |
#define | NREC_CAS(x) (((x)>>16) & 0xFFFFFF) |
#define | NREC_RAS(x) ((x) & 0x7FFF) |
#define | NRECFGLOG 0xC4 |
#define | NREEECFBDA 0xC8 |
#define | NREEECFBDB 0xCC |
#define | NREEECFBDC 0xD0 |
#define | NREEECFBDD 0xD4 |
#define | NREEECFBDE 0xD8 |
#define | REDMEMA 0xDC |
#define | RECMEMA 0xE2 |
#define | REC_BANK(x) (((x)>>12) & 0x7) |
#define | REC_RDWR(x) (((x)>>11) & 1) |
#define | REC_RANK(x) (((x)>>8) & 0x7) |
#define | RECMEMB 0xE4 |
#define | REC_CAS(x) (((x)>>16) & 0xFFFFFF) |
#define | REC_RAS(x) ((x) & 0x7FFF) |
#define | RECFGLOG 0xE8 |
#define | RECFBDA 0xEC |
#define | RECFBDB 0xF0 |
#define | RECFBDC 0xF4 |
#define | RECFBDD 0xF8 |
#define | RECFBDE 0xFC |
#define | PCI_DEVICE_ID_I5000_BRANCH_0 0x25F5 |
#define | PCI_DEVICE_ID_I5000_BRANCH_1 0x25F6 |
#define | AMB_PRESENT_0 0x64 |
#define | AMB_PRESENT_1 0x66 |
#define | MTR0 0x80 |
#define | MTR1 0x84 |
#define | MTR2 0x88 |
#define | MTR3 0x8C |
#define | NUM_MTRS 4 |
#define | CHANNELS_PER_BRANCH 2 |
#define | MAX_BRANCHES 2 |
#define | MTR_DIMMS_PRESENT(mtr) ((mtr) & (0x1 << 8)) |
#define | MTR_DRAM_WIDTH(mtr) ((((mtr) >> 6) & 0x1) ? 8 : 4) |
#define | MTR_DRAM_BANKS(mtr) ((((mtr) >> 5) & 0x1) ? 8 : 4) |
#define | MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2) |
#define | MTR_DIMM_RANK(mtr) (((mtr) >> 4) & 0x1) |
#define | MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1) |
#define | MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) |
#define | MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) |
#define | MTR_DIMM_COLS(mtr) ((mtr) & 0x3) |
#define | MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) |
#define | MAX_CHANNELS 6 /* max possible channels */ |
#define | MAX_CSROWS (8*2) /* max possible csrows per channel */ |
Enumerations | |
enum | i5000_chips { I5000P = 0, I5000V = 1, I5000X = 2 } |
Functions | |
MODULE_DEVICE_TABLE (pci, i5000_pci_tbl) | |
module_init (i5000_init) | |
module_exit (i5000_exit) | |
MODULE_LICENSE ("GPL") | |
MODULE_AUTHOR ("Linux Networx (http://lnxi.com) Doug Thompson <[email protected]>") | |
MODULE_DESCRIPTION ("MC Driver for Intel I5000 memory controllers - "I5000_REVISION) | |
module_param (edac_op_state, int, 0444) | |
MODULE_PARM_DESC (edac_op_state,"EDAC Error Reporting state: 0=Poll,1=NMI") | |
module_param (misc_messages, int, 0444) | |
MODULE_PARM_DESC (misc_messages,"Log miscellaneous non fatal messages") | |
#define AMB_PRESENT_0 0x64 |
Definition at line 265 of file i5000_edac.c.
#define AMB_PRESENT_1 0x66 |
Definition at line 266 of file i5000_edac.c.
#define AMBASE 0x48 |
Definition at line 58 of file i5000_edac.c.
#define AMIR0 0x8C |
Definition at line 69 of file i5000_edac.c.
#define AMIR1 0x90 |
Definition at line 70 of file i5000_edac.c.
#define AMIR2 0x94 |
Definition at line 71 of file i5000_edac.c.
#define CHANNELS_PER_BRANCH 2 |
Definition at line 273 of file i5000_edac.c.
#define EDAC_MOD_STR "i5000_edac" |
Definition at line 31 of file i5000_edac.c.
#define EMASK_FBD 0xA8 |
Definition at line 153 of file i5000_edac.c.
#define EMASK_FBD_M10ERR 0x00000200 |
Definition at line 172 of file i5000_edac.c.
#define EMASK_FBD_M11ERR 0x00000400 |
Definition at line 171 of file i5000_edac.c.
#define EMASK_FBD_M12ERR 0x00000800 |
Definition at line 170 of file i5000_edac.c.
#define EMASK_FBD_M13ERR 0x00001000 |
Definition at line 169 of file i5000_edac.c.
#define EMASK_FBD_M14ERR 0x00002000 |
Definition at line 168 of file i5000_edac.c.
#define EMASK_FBD_M15ERR 0x00004000 |
Definition at line 167 of file i5000_edac.c.
#define EMASK_FBD_M17ERR 0x00010000 |
Definition at line 165 of file i5000_edac.c.
#define EMASK_FBD_M18ERR 0x00020000 |
Definition at line 164 of file i5000_edac.c.
#define EMASK_FBD_M19ERR 0x00040000 |
Definition at line 163 of file i5000_edac.c.
#define EMASK_FBD_M1ERR 0x00000001 |
Definition at line 181 of file i5000_edac.c.
#define EMASK_FBD_M20ERR 0x00080000 |
Definition at line 162 of file i5000_edac.c.
#define EMASK_FBD_M21ERR 0x00100000 |
Definition at line 161 of file i5000_edac.c.
#define EMASK_FBD_M22ERR 0x00200000 |
Definition at line 160 of file i5000_edac.c.
#define EMASK_FBD_M23ERR 0x00400000 |
Definition at line 159 of file i5000_edac.c.
#define EMASK_FBD_M24ERR 0x00800000 |
Definition at line 158 of file i5000_edac.c.
#define EMASK_FBD_M25ERR 0x01000000 |
Definition at line 157 of file i5000_edac.c.
#define EMASK_FBD_M26ERR 0x02000000 |
Definition at line 156 of file i5000_edac.c.
#define EMASK_FBD_M27ERR 0x04000000 |
Definition at line 155 of file i5000_edac.c.
#define EMASK_FBD_M28ERR 0x08000000 |
Definition at line 154 of file i5000_edac.c.
#define EMASK_FBD_M2ERR 0x00000002 |
Definition at line 180 of file i5000_edac.c.
#define EMASK_FBD_M3ERR 0x00000004 |
Definition at line 179 of file i5000_edac.c.
#define EMASK_FBD_M4ERR 0x00000008 |
Definition at line 178 of file i5000_edac.c.
#define EMASK_FBD_M5ERR 0x00000010 |
Definition at line 177 of file i5000_edac.c.
#define EMASK_FBD_M6ERR 0x00000020 |
Definition at line 176 of file i5000_edac.c.
#define EMASK_FBD_M7ERR 0x00000040 |
Definition at line 175 of file i5000_edac.c.
#define EMASK_FBD_M8ERR 0x00000080 |
Definition at line 174 of file i5000_edac.c.
#define EMASK_FBD_M9ERR 0x00000100 |
Definition at line 173 of file i5000_edac.c.
#define ENABLE_EMASK_ALL |
Definition at line 212 of file i5000_edac.c.
#define ENABLE_EMASK_FBD_CORRECTABLE |
Definition at line 196 of file i5000_edac.c.
#define ENABLE_EMASK_FBD_DIMM_SPARE |
Definition at line 200 of file i5000_edac.c.
#define ENABLE_EMASK_FBD_FATAL_ERRORS |
Definition at line 183 of file i5000_edac.c.
#define ENABLE_EMASK_FBD_NON_RETRY |
Definition at line 208 of file i5000_edac.c.
#define ENABLE_EMASK_FBD_NORTH_CRC (EMASK_FBD_M21ERR) |
Definition at line 207 of file i5000_edac.c.
#define ENABLE_EMASK_FBD_SPD_PROTOCOL (EMASK_FBD_M22ERR) |
Definition at line 206 of file i5000_edac.c.
#define ENABLE_EMASK_FBD_THERMALS |
Definition at line 202 of file i5000_edac.c.
#define ENABLE_EMASK_FBD_UNCORRECTABLE |
Definition at line 187 of file i5000_edac.c.
#define ERR0_FBD 0xAC |
Definition at line 221 of file i5000_edac.c.
#define ERR1_FBD 0xB0 |
Definition at line 222 of file i5000_edac.c.
#define ERR2_FBD 0xB4 |
Definition at line 223 of file i5000_edac.c.
Definition at line 75 of file i5000_edac.c.
#define FERR_FAT_FBD 0x98 |
Definition at line 73 of file i5000_edac.c.
#define FERR_FAT_FBDCHAN 0x30000000 |
Definition at line 76 of file i5000_edac.c.
#define FERR_FAT_M1ERR 0x00000001 |
Definition at line 79 of file i5000_edac.c.
#define FERR_FAT_M2ERR 0x00000002 |
Definition at line 78 of file i5000_edac.c.
#define FERR_FAT_M3ERR 0x00000004 |
Definition at line 77 of file i5000_edac.c.
#define FERR_FAT_MASK |
Definition at line 80 of file i5000_edac.c.
#define FERR_NF_CORRECTABLE |
Definition at line 128 of file i5000_edac.c.
#define FERR_NF_DIMM_SPARE |
Definition at line 132 of file i5000_edac.c.
#define FERR_NF_FBD 0xA0 |
Definition at line 84 of file i5000_edac.c.
#define FERR_NF_M10ERR 0x00000040 |
Definition at line 111 of file i5000_edac.c.
#define FERR_NF_M11ERR 0x00000080 |
Definition at line 110 of file i5000_edac.c.
#define FERR_NF_M12ERR 0x00000100 |
Definition at line 109 of file i5000_edac.c.
#define FERR_NF_M13ERR 0x00000200 |
Definition at line 106 of file i5000_edac.c.
#define FERR_NF_M14ERR 0x00000400 |
Definition at line 105 of file i5000_edac.c.
#define FERR_NF_M15ERR 0x00000800 |
Definition at line 104 of file i5000_edac.c.
#define FERR_NF_M16ERR 0x00001000 |
Definition at line 103 of file i5000_edac.c.
#define FERR_NF_M17ERR 0x00002000 |
Definition at line 100 of file i5000_edac.c.
#define FERR_NF_M18ERR 0x00004000 |
Definition at line 99 of file i5000_edac.c.
#define FERR_NF_M19ERR 0x00008000 |
Definition at line 98 of file i5000_edac.c.
#define FERR_NF_M20ERR 0x00010000 |
Definition at line 97 of file i5000_edac.c.
#define FERR_NF_M21ERR 0x00020000 |
Definition at line 94 of file i5000_edac.c.
#define FERR_NF_M22ERR 0x00040000 |
Definition at line 93 of file i5000_edac.c.
#define FERR_NF_M23ERR 0x00080000 |
Definition at line 92 of file i5000_edac.c.
#define FERR_NF_M24ERR 0x00100000 |
Definition at line 91 of file i5000_edac.c.
#define FERR_NF_M25ERR 0x00200000 |
Definition at line 90 of file i5000_edac.c.
#define FERR_NF_M26ERR 0x00400000 |
Definition at line 89 of file i5000_edac.c.
#define FERR_NF_M27ERR 0x00800000 |
Definition at line 88 of file i5000_edac.c.
#define FERR_NF_M28ERR 0x01000000 |
Definition at line 87 of file i5000_edac.c.
#define FERR_NF_M4ERR 0x00000001 |
Definition at line 117 of file i5000_edac.c.
#define FERR_NF_M5ERR 0x00000002 |
Definition at line 116 of file i5000_edac.c.
#define FERR_NF_M6ERR 0x00000004 |
Definition at line 115 of file i5000_edac.c.
#define FERR_NF_M7ERR 0x00000008 |
Definition at line 114 of file i5000_edac.c.
#define FERR_NF_M8ERR 0x00000010 |
Definition at line 113 of file i5000_edac.c.
#define FERR_NF_M9ERR 0x00000020 |
Definition at line 112 of file i5000_edac.c.
#define FERR_NF_MASK |
Definition at line 145 of file i5000_edac.c.
#define FERR_NF_NON_RETRY |
Definition at line 140 of file i5000_edac.c.
#define FERR_NF_NORTH_CRC (FERR_NF_M21ERR) |
Definition at line 139 of file i5000_edac.c.
#define FERR_NF_SPD_PROTOCOL (FERR_NF_M22ERR) |
Definition at line 138 of file i5000_edac.c.
#define FERR_NF_THERMAL |
Definition at line 134 of file i5000_edac.c.
#define FERR_NF_UNCORRECTABLE |
Definition at line 119 of file i5000_edac.c.
#define i5000_mc_printk | ( | mci, | |
level, | |||
fmt, | |||
arg... | |||
) | edac_mc_chipset_printk(mci, level, "i5000", fmt, ##arg) |
Definition at line 36 of file i5000_edac.c.
#define i5000_printk | ( | level, | |
fmt, | |||
arg... | |||
) | edac_printk(level, "i5000", fmt, ##arg) |
Definition at line 33 of file i5000_edac.c.
#define I5000_REVISION " Ver: 2.0.12" |
Definition at line 30 of file i5000_edac.c.
#define MAX_BRANCHES 2 |
Definition at line 274 of file i5000_edac.c.
Definition at line 319 of file i5000_edac.c.
Definition at line 320 of file i5000_edac.c.
#define MAXCH 0x56 |
Definition at line 59 of file i5000_edac.c.
#define MAXDIMMPERCH 0x57 |
Definition at line 60 of file i5000_edac.c.
#define MCERR_FBD 0xB8 |
Definition at line 224 of file i5000_edac.c.
#define MIR0 0x80 |
Definition at line 66 of file i5000_edac.c.
#define MIR1 0x84 |
Definition at line 67 of file i5000_edac.c.
#define MIR2 0x88 |
Definition at line 68 of file i5000_edac.c.
#define MTR0 0x80 |
Definition at line 267 of file i5000_edac.c.
#define MTR1 0x84 |
Definition at line 268 of file i5000_edac.c.
#define MTR2 0x88 |
Definition at line 269 of file i5000_edac.c.
#define MTR3 0x8C |
Definition at line 270 of file i5000_edac.c.
#define MTR_DIMM_COLS | ( | mtr | ) | ((mtr) & 0x3) |
Definition at line 287 of file i5000_edac.c.
#define MTR_DIMM_COLS_ADDR_BITS | ( | mtr | ) | (MTR_DIMM_COLS(mtr) + 10) |
Definition at line 288 of file i5000_edac.c.
#define MTR_DIMM_RANK | ( | mtr | ) | (((mtr) >> 4) & 0x1) |
Definition at line 283 of file i5000_edac.c.
#define MTR_DIMM_RANK_ADDR_BITS | ( | mtr | ) | (MTR_DIMM_RANK(mtr) ? 2 : 1) |
Definition at line 284 of file i5000_edac.c.
#define MTR_DIMM_ROWS | ( | mtr | ) | (((mtr) >> 2) & 0x3) |
Definition at line 285 of file i5000_edac.c.
#define MTR_DIMM_ROWS_ADDR_BITS | ( | mtr | ) | (MTR_DIMM_ROWS(mtr) + 13) |
Definition at line 286 of file i5000_edac.c.
#define MTR_DIMMS_PRESENT | ( | mtr | ) | ((mtr) & (0x1 << 8)) |
Definition at line 279 of file i5000_edac.c.
#define MTR_DRAM_BANKS | ( | mtr | ) | ((((mtr) >> 5) & 0x1) ? 8 : 4) |
Definition at line 281 of file i5000_edac.c.
#define MTR_DRAM_BANKS_ADDR_BITS | ( | mtr | ) | ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2) |
Definition at line 282 of file i5000_edac.c.
#define MTR_DRAM_WIDTH | ( | mtr | ) | ((((mtr) >> 6) & 0x1) ? 8 : 4) |
Definition at line 280 of file i5000_edac.c.
#define NERR_FAT_FBD 0x9C |
Definition at line 74 of file i5000_edac.c.
#define NERR_NF_FBD 0xA4 |
Definition at line 144 of file i5000_edac.c.
Definition at line 226 of file i5000_edac.c.
Definition at line 230 of file i5000_edac.c.
Definition at line 228 of file i5000_edac.c.
Definition at line 231 of file i5000_edac.c.
Definition at line 227 of file i5000_edac.c.
#define NRECFGLOG 0xC4 |
Definition at line 232 of file i5000_edac.c.
#define NRECMEMA 0xBE |
Definition at line 225 of file i5000_edac.c.
#define NRECMEMB 0xC0 |
Definition at line 229 of file i5000_edac.c.
#define NREEECFBDA 0xC8 |
Definition at line 233 of file i5000_edac.c.
#define NREEECFBDB 0xCC |
Definition at line 234 of file i5000_edac.c.
#define NREEECFBDC 0xD0 |
Definition at line 235 of file i5000_edac.c.
#define NREEECFBDD 0xD4 |
Definition at line 236 of file i5000_edac.c.
#define NREEECFBDE 0xD8 |
Definition at line 237 of file i5000_edac.c.
#define NUM_MTRS 4 |
Definition at line 272 of file i5000_edac.c.
#define PCI_DEVICE_ID_I5000_BRANCH_0 0x25F5 |
Definition at line 262 of file i5000_edac.c.
#define PCI_DEVICE_ID_I5000_BRANCH_1 0x25F6 |
Definition at line 263 of file i5000_edac.c.
#define PCI_DEVICE_ID_INTEL_FBD_0 0x25F5 |
Definition at line 40 of file i5000_edac.c.
#define PCI_DEVICE_ID_INTEL_FBD_1 0x25F6 |
Definition at line 43 of file i5000_edac.c.
#define PCI_DEVICE_ID_INTEL_I5000_DEV16 0x25F0 |
Definition at line 53 of file i5000_edac.c.
Definition at line 240 of file i5000_edac.c.
Definition at line 244 of file i5000_edac.c.
Definition at line 64 of file i5000_edac.c.
Definition at line 65 of file i5000_edac.c.
Definition at line 242 of file i5000_edac.c.
Definition at line 245 of file i5000_edac.c.
Definition at line 241 of file i5000_edac.c.
#define RECFBDA 0xEC |
Definition at line 247 of file i5000_edac.c.
#define RECFBDB 0xF0 |
Definition at line 248 of file i5000_edac.c.
#define RECFBDC 0xF4 |
Definition at line 249 of file i5000_edac.c.
#define RECFBDD 0xF8 |
Definition at line 250 of file i5000_edac.c.
#define RECFBDE 0xFC |
Definition at line 251 of file i5000_edac.c.
#define RECFGLOG 0xE8 |
Definition at line 246 of file i5000_edac.c.
#define RECMEMA 0xE2 |
Definition at line 239 of file i5000_edac.c.
#define RECMEMB 0xE4 |
Definition at line 243 of file i5000_edac.c.
Definition at line 63 of file i5000_edac.c.
#define REDMEMA 0xDC |
Definition at line 238 of file i5000_edac.c.
#define REDMEMB 0x7C |
Definition at line 62 of file i5000_edac.c.
#define TOLM 0x6C |
Definition at line 61 of file i5000_edac.c.
enum i5000_chips |
Definition at line 294 of file i5000_edac.c.
MODULE_AUTHOR | ( | "Linux Networx (http://lnxi.com) Doug Thompson <[email protected]>" | ) |
MODULE_DEVICE_TABLE | ( | pci | , |
i5000_pci_tbl | |||
) |
module_exit | ( | i5000_exit | ) |
module_init | ( | i5000_init | ) |
MODULE_LICENSE | ( | "GPL" | ) |
module_param | ( | edac_op_state | , |
int | , | ||
0444 | |||
) |
module_param | ( | misc_messages | , |
int | , | ||
0444 | |||
) |
MODULE_PARM_DESC | ( | edac_op_state | , |
"EDAC Error Reporting state: | 0 = Poll |
||
) |
MODULE_PARM_DESC | ( | misc_messages | , |
"Log miscellaneous non fatal messages" | |||
) |