#include <linux/device.h>
#include <drm/drmP.h>
#include <drm/i915_drm.h>
#include "i915_drv.h"
#include "i915_trace.h"
#include "intel_drv.h"
#include <linux/console.h>
#include <linux/module.h>
#include <drm/drm_crtc_helper.h>

Macros
#define	INTEL_VGA_DEVICE(id, info)

#define	INTEL_PCH_DEVICE_ID_MASK 0xff00

#define	INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00

#define	INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00

#define	INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00

#define	INTEL_PCH_LPT_DEVICE_ID_TYPE 0x8c00

#define	NEEDS_FORCE_WAKE(dev_priv, reg)

#define	__i915_read(x, y)

#define	__i915_write(x, y)

Functions
	module_param_named (modeset, i915_modeset, int, 0400)

	MODULE_PARM_DESC (modeset,"Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, ""1=on, -1=force vga console preference [default])")

	module_param_named (fbpercrtc, i915_fbpercrtc, int, 0400)

	module_param_named (panel_ignore_lid, i915_panel_ignore_lid, int, 0600)

	MODULE_PARM_DESC (panel_ignore_lid,"Override lid status (0=autodetect [default], 1=lid open, ""-1=lid closed)")

	module_param_named (powersave, i915_powersave, int, 0600)

	MODULE_PARM_DESC (powersave,"Enable powersavings, fbc, downclocking, etc. (default: true)")

	module_param_named (semaphores, i915_semaphores, int, 0600)

	MODULE_PARM_DESC (semaphores,"Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))")

	module_param_named (i915_enable_rc6, i915_enable_rc6, int, 0400)

	MODULE_PARM_DESC (i915_enable_rc6,"Enable power-saving render C-state 6. ""Different stages can be selected via bitmask values ""(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). ""For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. ""default: -1 (use per-chip default)")

	module_param_named (i915_enable_fbc, i915_enable_fbc, int, 0600)

	MODULE_PARM_DESC (i915_enable_fbc,"Enable frame buffer compression for power savings ""(default: -1 (use per-chip default))")

	module_param_named (lvds_downclock, i915_lvds_downclock, int, 0400)

	MODULE_PARM_DESC (lvds_downclock,"Use panel (LVDS/eDP) downclocking for power savings ""(default: false)")

	module_param_named (lvds_channel_mode, i915_lvds_channel_mode, int, 0600)

	MODULE_PARM_DESC (lvds_channel_mode,"Specify LVDS channel mode ""(0=probe BIOS [default], 1=single-channel, 2=dual-channel)")

	module_param_named (lvds_use_ssc, i915_panel_use_ssc, int, 0600)

	MODULE_PARM_DESC (lvds_use_ssc,"Use Spread Spectrum Clock with panels [LVDS/eDP] ""(default: auto from VBT)")

	module_param_named (vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600)

	MODULE_PARM_DESC (vbt_sdvo_panel_type,"Override/Ignore selection of SDVO panel mode in the VBT ""(-2=ignore, -1=auto [default], index in VBT BIOS table)")

	module_param_named (reset, i915_try_reset, bool, 0600)

	MODULE_PARM_DESC (reset,"Attempt GPU resets (default: true)")

	module_param_named (enable_hangcheck, i915_enable_hangcheck, bool, 0644)

	MODULE_PARM_DESC (enable_hangcheck,"Periodically check GPU activity for detecting hangs. ""WARNING: Disabling this can cause system wide hangs. ""(default: true)")

	module_param_named (i915_enable_ppgtt, i915_enable_ppgtt, int, 0600)

	MODULE_PARM_DESC (i915_enable_ppgtt,"Enable PPGTT (default: true)")

	module_param_named (preliminary_hw_support, i915_preliminary_hw_support, int, 0600)

	MODULE_PARM_DESC (preliminary_hw_support,"Enable preliminary hardware support. ""Enable Haswell and ValleyView Support. ""(default: false)")

void	intel_detect_pch (struct drm_device *dev)

bool	i915_semaphore_is_enabled (struct drm_device *dev)

int	i915_suspend (struct drm_device *dev, pm_message_t state)

int	i915_resume (struct drm_device *dev)

int	intel_gpu_reset (struct drm_device *dev)

int	i915_reset (struct drm_device *dev)

	module_init (i915_init)

	module_exit (i915_exit)

	MODULE_AUTHOR (DRIVER_AUTHOR)

	MODULE_DESCRIPTION (DRIVER_DESC)

	MODULE_LICENSE ("GPL and additional rights")

	__i915_read (8, b)

int	i915_reg_read_ioctl (struct drm_device dev, void data, struct drm_file *file)

Variables
unsigned int i915_fbpercrtc	__always_unused = 0

int	intel_agp_enabled

	whitelist []

Macro Definition Documentation

#define __i915_read	(	x,
		y
	)

Value:

u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
    u##x val = 0; \
    if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
        unsigned long irqflags; \
        spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
        if (dev_priv->forcewake_count == 0) \
			dev_priv->gt.force_wake_get(dev_priv); \
        val = read##y(dev_priv->regs + reg); \
        if (dev_priv->forcewake_count == 0) \
			dev_priv->gt.force_wake_put(dev_priv); \
        spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
    } else if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
        val = read##y(dev_priv->regs + reg + 0x180000);     \
    } else { \
        val = read##y(dev_priv->regs + reg); \
    } \
    trace_i915_reg_rw(false, reg, val, sizeof(val)); \
    return val; \
}

Definition at line 1146 of file i915_drv.c.

#define __i915_write	(	x,
		y
	)

Value:

void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
	u32 __fifo_ret = 0; \
    trace_i915_reg_rw(true, reg, val, sizeof(val)); \
    if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
        __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
    } \
    if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
        write##y(val, dev_priv->regs + reg + 0x180000);     \
    } else {                            \
        write##y(val, dev_priv->regs + reg);            \
    }                               \
    if (unlikely(__fifo_ret)) { \
        gen6_gt_check_fifodbg(dev_priv); \
    } \
    if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
        DRM_ERROR("Unclaimed write to %x\n", reg); \
        writel(ERR_INT_MMIO_UNCLAIMED, dev_priv->regs + GEN7_ERR_INT);  \
    } \
}

#define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00

Definition at line 401 of file i915_drv.c.

#define INTEL_PCH_DEVICE_ID_MASK 0xff00

Definition at line 399 of file i915_drv.c.

#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00

Definition at line 400 of file i915_drv.c.

#define INTEL_PCH_LPT_DEVICE_ID_TYPE 0x8c00

Definition at line 403 of file i915_drv.c.

#define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00

Definition at line 402 of file i915_drv.c.

#define INTEL_VGA_DEVICE	(	id,
		info
	)

Value:

{       \
    .class = PCI_BASE_CLASS_DISPLAY << 16,  \
    .class_mask = 0xff0000,         \
    .vendor = 0x8086,           \
    .device = id,               \
    .subvendor = PCI_ANY_ID,        \
    .subdevice = PCI_ANY_ID,        \
    .driver_data = (unsigned long) info }

Definition at line 131 of file i915_drv.c.

#define NEEDS_FORCE_WAKE	(	dev_priv,
		reg
	)

Value:

((HAS_FORCE_WAKE((dev_priv)->dev)) && \
     ((reg) < 0x40000) &&            \
     ((reg) != FORCEWAKE))

Definition at line 1063 of file i915_drv.c.

Function Documentation

__i915_read	(	8	,
		b
	)

Definition at line 1167 of file i915_drv.c.

int i915_reg_read_ioctl	(	struct drm_device *	dev,
		void *	data,
		struct drm_file *	file
	)

Definition at line 1207 of file i915_drv.c.

int i915_reset ( struct drm_device * dev )

i915_reset - reset chip after a hang : drm device to reset

Reset the chip. Useful if a hang is detected. Returns zero on successful reset or otherwise an error code.

Procedure is fairly simple:

reset the chip using the reset reg
re-init context state
re-init hardware status page
re-init ring buffer
re-init interrupt state
re-init display

Definition at line 759 of file i915_drv.c.

int i915_resume ( struct drm_device * dev )

Definition at line 570 of file i915_drv.c.

bool i915_semaphore_is_enabled ( struct drm_device * dev )

Definition at line 446 of file i915_drv.c.

int i915_suspend	(	struct drm_device *	dev,
		pm_message_t	state
	)

Definition at line 499 of file i915_drv.c.

void intel_detect_pch ( struct drm_device * dev )

Definition at line 405 of file i915_drv.c.

int intel_gpu_reset ( struct drm_device * dev )

Definition at line 709 of file i915_drv.c.

MODULE_AUTHOR ( DRIVER_AUTHOR )

MODULE_DESCRIPTION ( DRIVER_DESC )

module_exit ( i915_exit )

module_init ( i915_init )

MODULE_LICENSE ( "GPL and additional rights" )

module_param_named	(	modeset	,
		i915_modeset	,
		int	,
		0400
	)

module_param_named	(	fbpercrtc	,
		i915_fbpercrtc	,
		int	,
		0400
	)

module_param_named	(	panel_ignore_lid	,
		i915_panel_ignore_lid	,
		int	,
		0600
	)

module_param_named	(	powersave	,
		i915_powersave	,
		int	,
		0600
	)

module_param_named	(	semaphores	,
		i915_semaphores	,
		int	,
		0600
	)

module_param_named	(	i915_enable_rc6	,
		i915_enable_rc6	,
		int	,
		0400
	)

module_param_named	(	i915_enable_fbc	,
		i915_enable_fbc	,
		int	,
		0600
	)

module_param_named	(	lvds_downclock	,
		i915_lvds_downclock	,
		int	,
		0400
	)

module_param_named	(	lvds_channel_mode	,
		i915_lvds_channel_mode	,
		int	,
		0600
	)

module_param_named	(	lvds_use_ssc	,
		i915_panel_use_ssc	,
		int	,
		0600
	)

module_param_named	(	vbt_sdvo_panel_type	,
		i915_vbt_sdvo_panel_type	,
		int	,
		0600
	)

module_param_named	(	reset	,
		i915_try_reset	,
		bool	,
		0600
	)

module_param_named	(	enable_hangcheck	,
		i915_enable_hangcheck	,
		bool	,
		0644
	)

module_param_named	(	i915_enable_ppgtt	,
		i915_enable_ppgtt	,
		int	,
		0600
	)

module_param_named	(	preliminary_hw_support	,
		i915_preliminary_hw_support	,
		int	,
		0600
	)

MODULE_PARM_DESC	(	modeset	,
		"Use kernel modesetting (0=DRM_I915_KMS from .config, ""1=on, -1=force vga console preference [default])"	[KMS]
	)

MODULE_PARM_DESC	(	panel_ignore_lid	,
		"Override lid status (0=autodetect [default], 1=lid open, ""-1=lid closed)"
	)

MODULE_PARM_DESC	(	powersave	,
		"Enable	powersavings,
		fbc	,
		downclocking	,
		etc.(default:true)"
	)

MODULE_PARM_DESC	(	semaphores	,
		"Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))"
	)

MODULE_PARM_DESC	(	i915_enable_rc6	,
		"Enable power-saving render C-state 6. ""Different stages can be selected via bitmask values ""(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). ""For	example,
		3 would enable rc6 and deep	rc6,
		and 7 would enable everything.""default:-1(use per-chip default)"
	)

MODULE_PARM_DESC	(	i915_enable_fbc	,
		"Enable frame buffer compression for power savings ""(default: -1 (use per-chip default))"
	)

MODULE_PARM_DESC	(	lvds_downclock	,
		"Use panel (LVDS/eDP) downclocking for power savings ""(default: false)"
	)

MODULE_PARM_DESC	(	lvds_channel_mode	,
		"Specify LVDS channel mode ""(0=probe BIOS [default], 1=single-channel, 2=dual-channel)"
	)

MODULE_PARM_DESC	(	lvds_use_ssc	,
		"Use Spread Spectrum Clock with panels ""(default: auto from VBT)"	[LVDS/eDP]
	)

MODULE_PARM_DESC	(	vbt_sdvo_panel_type	,
		"Override/Ignore selection of SDVO panel mode in the VBT ""(-2=ignore, -1=auto [default], index in VBT BIOS table)"
	)

MODULE_PARM_DESC	(	reset	,
		"Attempt GPU resets (default: true)"
	)

MODULE_PARM_DESC	(	enable_hangcheck	,
		"Periodically check GPU activity for detecting hangs. ""WARNING: Disabling this can cause system wide hangs. ""(default: true)"
	)

MODULE_PARM_DESC	(	i915_enable_ppgtt	,
		"Enable PPGTT (default: true)"
	)

MODULE_PARM_DESC	(	preliminary_hw_support	,
		"Enable preliminary hardware support. ""Enable Haswell and ValleyView Support. ""(default: false)"
	)

Variable Documentation

unsigned int i915_fbpercrtc __always_unused = 0

Definition at line 47 of file i915_drv.c.

int intel_agp_enabled

Definition at line 17 of file intel-agp.c.

whitelist[]

Initial value:

= {
    { RING_TIMESTAMP(RENDER_RING_BASE), 8, 0xF0 },
}

Definition at line 1203 of file i915_drv.c.

Macros

Functions

Variables

Macro Definition Documentation

Function Documentation

Variable Documentation