|
| #define | NUM_VCI (1024) |
| |
| #define | DEBUG |
| |
| #define | FULL_MEMORY_TEST |
| |
| #define | SERVICE_ENTRIES (1024) |
| |
| #define | TX_FIFO_DEPTH (7) |
| |
| #define | LANAI_POLL_PERIOD (10*HZ) |
| |
| #define | AAL5_RX_MULTIPLIER (3) |
| |
| #define | AAL5_TX_MULTIPLIER (3) |
| |
| #define | AAL0_TX_MULTIPLIER (40) |
| |
| #define | AAL0_RX_BUFFER_SIZE (PAGE_SIZE) |
| |
| #define | DEV_LABEL "lanai" |
| |
| #define | DPRINTK(format, args...) printk(KERN_DEBUG DEV_LABEL ": " format, ##args) |
| |
| #define | APRINTK(truth, format, args...) |
| |
| #define | RWDEBUG(format, args...) |
| |
| #define | LANAI_MAPPING_SIZE (0x40000) |
| |
| #define | LANAI_EEPROM_SIZE (128) |
| |
| #define | LANAI_PAGE_SIZE ((PAGE_SIZE >= 1024) ? PAGE_SIZE : 1024) |
| |
| #define | RESET_GET_BOARD_REV(x) (((x)>> 0)&0x03) /* Board revision */ |
| |
| #define | RESET_GET_BOARD_ID(x) (((x)>> 2)&0x03) /* Board ID */ |
| |
| #define | BOARD_ID_LANAI256 (0) /* 25.6M adapter card */ |
| |
| #define | STATUS_PROMDATA (0x00000001) /* PROM_DATA pin */ |
| |
| #define | STATUS_WAITING (0x00000002) /* Interrupt being delayed */ |
| |
| #define | STATUS_SOOL (0x00000004) /* SOOL alarm */ |
| |
| #define | STATUS_LOCD (0x00000008) /* LOCD alarm */ |
| |
| #define | STATUS_LED (0x00000010) /* LED (HAPPI) output */ |
| |
| #define | STATUS_GPIN (0x00000020) /* GPIN pin */ |
| |
| #define | STATUS_BUTTBUSY (0x00000040) /* Butt register is pending */ |
| |
| #define | CONFIG1_PROMDATA (0x00000001) /* PROM_DATA pin */ |
| |
| #define | CONFIG1_PROMCLK (0x00000002) /* PROM_CLK pin */ |
| |
| #define | CONFIG1_SET_READMODE(x) ((x)*0x004) /* PCI BM reads; values: */ |
| |
| #define | READMODE_PLAIN (0) /* Plain memory read */ |
| |
| #define | READMODE_LINE (2) /* Memory read line */ |
| |
| #define | READMODE_MULTIPLE (3) /* Memory read multiple */ |
| |
| #define | CONFIG1_DMA_ENABLE (0x00000010) /* Turn on DMA */ |
| |
| #define | CONFIG1_POWERDOWN (0x00000020) /* Turn off clocks */ |
| |
| #define | CONFIG1_SET_LOOPMODE(x) ((x)*0x080) /* Clock&loop mode; values: */ |
| |
| #define | LOOPMODE_NORMAL (0) /* Normal - no loop */ |
| |
| #define | LOOPMODE_TIME (1) |
| |
| #define | LOOPMODE_DIAG (2) |
| |
| #define | LOOPMODE_LINE (3) |
| |
| #define | CONFIG1_MASK_LOOPMODE (0x00000180) |
| |
| #define | CONFIG1_SET_LEDMODE(x) ((x)*0x0200) /* Mode of LED; values: */ |
| |
| #define | LEDMODE_NOT_SOOL (0) /* !SOOL */ |
| |
| #define | LEDMODE_OFF (1) /* 0 */ |
| |
| #define | LEDMODE_ON (2) /* 1 */ |
| |
| #define | LEDMODE_NOT_LOCD (3) /* !LOCD */ |
| |
| #define | LEDMORE_GPIN (4) /* GPIN */ |
| |
| #define | LEDMODE_NOT_GPIN (7) /* !GPIN */ |
| |
| #define | CONFIG1_MASK_LEDMODE (0x00000E00) |
| |
| #define | CONFIG1_GPOUT1 (0x00001000) /* Toggle for reset */ |
| |
| #define | CONFIG1_GPOUT2 (0x00002000) /* Loopback PHY */ |
| |
| #define | CONFIG1_GPOUT3 (0x00004000) /* Loopback lanai */ |
| |
| #define | CONFIG2_HOWMANY (0x00000001) /* >512 VCIs? */ |
| |
| #define | CONFIG2_PTI7_MODE (0x00000002) /* Make PTI=7 RM, not OAM */ |
| |
| #define | CONFIG2_VPI_CHK_DIS (0x00000004) /* Ignore RX VPI value */ |
| |
| #define | CONFIG2_HEC_DROP (0x00000008) /* Drop cells w/ HEC errors */ |
| |
| #define | CONFIG2_VCI0_NORMAL (0x00000010) /* Treat VCI=0 normally */ |
| |
| #define | CONFIG2_CBR_ENABLE (0x00000020) /* Deal with CBR traffic */ |
| |
| #define | CONFIG2_TRASH_ALL (0x00000040) /* Trashing incoming cells */ |
| |
| #define | CONFIG2_TX_DISABLE (0x00000080) /* Trashing outgoing cells */ |
| |
| #define | CONFIG2_SET_TRASH (0x00000100) /* Turn trashing on */ |
| |
| #define | STATS_GET_FIFO_OVFL(x) (((x)>> 0)&0xFF) /* FIFO overflowed */ |
| |
| #define | STATS_GET_HEC_ERR(x) (((x)>> 8)&0xFF) /* HEC was bad */ |
| |
| #define | STATS_GET_BAD_VCI(x) (((x)>>16)&0xFF) /* VCI not open */ |
| |
| #define | STATS_GET_BUF_OVFL(x) (((x)>>24)&0xFF) /* VCC buffer full */ |
| |
| #define | SSTUFF_SET_SIZE(x) ((x)*0x20000000) /* size of service buffer */ |
| |
| #define | SSTUFF_SET_ADDR(x) ((x)>>8) /* set address of buffer */ |
| |
| #define | SRAM_START (0x20000) |
| |
| #define | SRAM_BYTES (0x20000) /* Again, half don't really exist */ |
| |
| #define | RXADDR1_SET_SIZE(x) ((x)*0x0000100) /* size of RX buffer */ |
| |
| #define | RXADDR1_SET_RMMODE(x) ((x)*0x00800) /* RM cell action; values: */ |
| |
| #define | RMMODE_TRASH (0) /* discard */ |
| |
| #define | RMMODE_PRESERVE (1) /* input as AAL0 */ |
| |
| #define | RMMODE_PIPE (2) /* pipe to coscheduler */ |
| |
| #define | RMMODE_PIPEALL (3) /* pipe non-RM too */ |
| |
| #define | RXADDR1_OAM_PRESERVE (0x00002000) /* Input OAM cells as AAL0 */ |
| |
| #define | RXADDR1_SET_MODE(x) ((x)*0x0004000) /* Reassembly mode */ |
| |
| #define | RXMODE_TRASH (0) /* discard */ |
| |
| #define | RXMODE_AAL0 (1) /* non-AAL5 mode */ |
| |
| #define | RXMODE_AAL5 (2) /* AAL5, intr. each PDU */ |
| |
| #define | RXMODE_AAL5_STREAM (3) /* AAL5 w/o per-PDU intr */ |
| |
| #define | RXWRITEPTR_LASTEFCI (0x00002000) /* Last PDU had EFCI bit */ |
| |
| #define | RXWRITEPTR_DROPPING (0x00004000) /* Had error, dropping */ |
| |
| #define | RXWRITEPTR_TRASHING (0x00008000) /* Trashing */ |
| |
| #define | RXBUFSTART_CLP (0x00004000) |
| |
| #define | RXBUFSTART_CI (0x00008000) |
| |
| #define | TXADDR1_SET_SIZE(x) ((x)*0x0000100) /* size of TX buffer */ |
| |
| #define | TXADDR1_ABR (0x00008000) /* use ABR (doesn't work) */ |
| |
| #define | TXREADPTR_GET_PTR(x) ((x)&0x01FFF) |
| |
| #define | TXREADPTR_MASK_DELTA (0x0000E000) /* ? */ |
| |
| #define | TXENDPTR_CLP (0x00002000) |
| |
| #define | TXENDPTR_MASK_PDUMODE (0x0000C000) /* PDU mode; values: */ |
| |
| #define | PDUMODE_AAL0 (0*0x04000) |
| |
| #define | PDUMODE_AAL5 (2*0x04000) |
| |
| #define | PDUMODE_AAL5STREAM (3*0x04000) |
| |
| #define | TXWRITEPTR_GET_PTR(x) ((x)&0x1FFF) |
| |
| #define | TXCBR_NEXT_BOZO (0x00008000) /* "bozo bit" */ |
| |
| #define | CARDVCC_SIZE (0x40) |
| |
| #define | EEPROM_COPYRIGHT (0) |
| |
| #define | EEPROM_COPYRIGHT_LEN (44) |
| |
| #define | EEPROM_CHECKSUM (62) |
| |
| #define | EEPROM_CHECKSUM_REV (63) |
| |
| #define | EEPROM_MAC (64) |
| |
| #define | EEPROM_MAC_REV (70) |
| |
| #define | EEPROM_SERIAL (112) |
| |
| #define | EEPROM_SERIAL_REV (116) |
| |
| #define | EEPROM_MAGIC (120) |
| |
| #define | EEPROM_MAGIC_REV (124) |
| |
| #define | EEPROM_MAGIC_VALUE (0x5AB478D2) |
| |
| #define | INT_STATS (0x00000002) /* Statistics counter overflow */ |
| |
| #define | INT_SOOL (0x00000004) /* SOOL changed state */ |
| |
| #define | INT_LOCD (0x00000008) /* LOCD changed state */ |
| |
| #define | INT_LED (0x00000010) /* LED (HAPPI) changed state */ |
| |
| #define | INT_GPIN (0x00000020) /* GPIN changed state */ |
| |
| #define | INT_PING (0x00000040) /* PING_COUNT fulfilled */ |
| |
| #define | INT_WAKE (0x00000080) /* Lanai wants bus */ |
| |
| #define | INT_CBR0 (0x00000100) /* CBR sched hit VCI 0 */ |
| |
| #define | INT_LOCK (0x00000200) /* Service list overflow */ |
| |
| #define | INT_MISMATCH (0x00000400) /* TX magic list mismatch */ |
| |
| #define | INT_AAL0_STR (0x00000800) /* Non-AAL5 buffer half filled */ |
| |
| #define | INT_AAL0 (0x00001000) /* Non-AAL5 data available */ |
| |
| #define | INT_SERVICE (0x00002000) /* Service list entries available */ |
| |
| #define | INT_TABORTSENT (0x00004000) /* Target abort sent by lanai */ |
| |
| #define | INT_TABORTBM (0x00008000) /* Abort rcv'd as bus master */ |
| |
| #define | INT_TIMEOUTBM (0x00010000) /* No response to bus master */ |
| |
| #define | INT_PCIPARITY (0x00020000) /* Parity error on PCI */ |
| |
| #define | INT_ALL (0x0003FFFE) /* All interrupts */ |
| |
| #define | INT_STATUS (0x0000003C) /* Some status pin changed */ |
| |
| #define | INT_DMASHUT (0x00038000) /* DMA engine got shut down */ |
| |
| #define | INT_SEGSHUT (0x00000700) /* Segmentation got shut down */ |
| |
| #define | e(flag, name) |
| |
| #define | e(flag, name, stat) |
| |
| #define | DESCRIPTOR_MAGIC (0xD0000000) |
| |
| #define | DESCRIPTOR_AAL5 (0x00008000) |
| |
| #define | DESCRIPTOR_AAL5_STREAM (0x00004000) |
| |
| #define | DESCRIPTOR_CLP (0x00002000) |
| |
| #define | VCCTABLE_GETFREEPAGE |
| |
| #define | SERVICE_TX (0x80000000) /* Was from transmission */ |
| |
| #define | SERVICE_TRASH (0x40000000) /* RXed PDU was trashed */ |
| |
| #define | SERVICE_CRCERR (0x20000000) /* RXed PDU had CRC error */ |
| |
| #define | SERVICE_CI (0x10000000) /* RXed PDU had CI set */ |
| |
| #define | SERVICE_CLP (0x08000000) /* RXed PDU had CLP set */ |
| |
| #define | SERVICE_STREAM (0x04000000) /* RX Stream mode */ |
| |
| #define | SERVICE_GET_VCI(x) (((x)>>16)&0x3FF) |
| |
| #define | SERVICE_GET_END(x) ((x)&0x1FFF) |
| |
| #define | CBRICG_FRAC_BITS (4) |
| |
| #define | CBRICG_MAX (2046 << CBRICG_FRAC_BITS) |
| |
| #define | lanai_proc_read NULL |
| |
1.8.2