|
| #define | P54_HDR_FLAG_CONTROL BIT(15) |
| |
| #define | P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0)) |
| |
| #define | P54_HDR_FLAG_DATA_ALIGN BIT(14) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_BURST BIT(4) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10) |
| |
| #define | P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11) |
| |
| #define | P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0) |
| |
| #define | P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1) |
| |
| #define | P54_HDR_FLAG_DATA_IN_MCBC BIT(2) |
| |
| #define | P54_HDR_FLAG_DATA_IN_BEACON BIT(3) |
| |
| #define | P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4) |
| |
| #define | P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5) |
| |
| #define | P54_HDR_FLAG_DATA_IN_DATA BIT(6) |
| |
| #define | P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7) |
| |
| #define | P54_HDR_FLAG_DATA_IN_BIT8 BIT(8) |
| |
| #define | P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9) |
| |
| #define | GET_REQ_ID(skb) (((struct p54_hdr *) ((struct sk_buff *) skb)->data)->req_id) \ |
| |
| #define | FREE_AFTER_TX(skb) |
| |
| #define | IS_DATA_FRAME(skb) |
| |
| #define | GET_HW_QUEUE(skb) |
| |
| #define | IF_ID_ISL36356A 0x0001 /* ISL36356A <-> Firmware */ |
| |
| #define | IF_ID_MVC 0x0003 /* MAC Virtual Coprocessor */ |
| |
| #define | IF_ID_DEBUG 0x0008 /* PolDebug Interface */ |
| |
| #define | IF_ID_PRODUCT 0x0009 |
| |
| #define | IF_ID_OEM 0x000a |
| |
| #define | IF_ID_PCI3877 0x000b /* 3877 <-> Host PCI */ |
| |
| #define | IF_ID_ISL37704C 0x000c /* ISL37704C <-> Fw */ |
| |
| #define | IF_ID_ISL39000 0x000f /* ISL39000 <-> Fw */ |
| |
| #define | IF_ID_ISL39300A 0x0010 /* ISL39300A <-> Fw */ |
| |
| #define | IF_ID_ISL37700_UAP 0x0016 /* ISL37700 uAP Fw <-> Fw */ |
| |
| #define | IF_ID_ISL39000_UAP 0x0017 /* ISL39000 uAP Fw <-> Fw */ |
| |
| #define | IF_ID_LMAC 0x001a /* Interface exposed by LMAC */ |
| |
| #define | IS_QOS_QUEUE(n) (n >= P54_QUEUE_DATA) |
| |
| #define | P54_TX_FRAME_LIFETIME 2000 |
| |
| #define | P54_TX_TIMEOUT 4000 |
| |
| #define | P54_STATISTICS_UPDATE 5000 |
| |
| #define | P54_FILTER_TYPE_NONE 0 |
| |
| #define | P54_FILTER_TYPE_STATION BIT(0) |
| |
| #define | P54_FILTER_TYPE_IBSS BIT(1) |
| |
| #define | P54_FILTER_TYPE_AP BIT(2) |
| |
| #define | P54_FILTER_TYPE_TRANSPARENT BIT(3) |
| |
| #define | P54_FILTER_TYPE_PROMISCUOUS BIT(4) |
| |
| #define | P54_FILTER_TYPE_HIBERNATE BIT(5) |
| |
| #define | P54_FILTER_TYPE_NOACK BIT(6) |
| |
| #define | P54_FILTER_TYPE_RX_DISABLED BIT(7) |
| |
| #define | P54_SETUP_V1_LEN 40 |
| |
| #define | P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac)) |
| |
| #define | P54_SCAN_EXIT BIT(0) |
| |
| #define | P54_SCAN_TRAP BIT(1) |
| |
| #define | P54_SCAN_ACTIVE BIT(2) |
| |
| #define | P54_SCAN_FILTER BIT(3) |
| |
| #define | P54_PSM_CAM 0 |
| |
| #define | P54_PSM BIT(0) |
| |
| #define | P54_PSM_DTIM BIT(1) |
| |
| #define | P54_PSM_MCBC BIT(2) |
| |
| #define | P54_PSM_CHECKSUM BIT(3) |
| |
| #define | P54_PSM_SKIP_MORE_DATA BIT(4) |
| |
| #define | P54_PSM_BEACON_TIMEOUT BIT(5) |
| |
| #define | P54_PSM_HFOSLEEP BIT(6) |
| |
| #define | P54_PSM_AUTOSWITCH_SLEEP BIT(7) |
| |
| #define | P54_PSM_LPIT BIT(8) |
| |
| #define | P54_PSM_BF_UCAST_SKIP BIT(9) |
| |
| #define | P54_PSM_BF_MCAST_SKIP BIT(10) |
| |
| #define | MC_FILTER_ADDRESS_NUM 4 |
| |
| #define | P54_TIM_CLEAR BIT(15) |
| |
1.8.2