12 static const char serial_name[] =
"MN10300 Serial driver";
13 static const char serial_version[] =
"mn10300_serial-1.0";
14 static const char serial_revdate[] =
"2007-11-06";
16 #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
20 #include <linux/module.h>
21 #include <linux/serial.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
28 #include <linux/tty.h>
31 #include <linux/string.h>
34 #include <linux/slab.h>
41 #include <asm/bitops.h>
42 #include <asm/serial-regs.h>
43 #include <unit/timex.h>
48 #define GxICR(X) CROSS_GxICR(X, 0)
51 #define kenter(FMT, ...) \
52 printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
53 #define _enter(FMT, ...) \
54 no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
55 #define kdebug(FMT, ...) \
56 printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
57 #define _debug(FMT, ...) \
58 no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
59 #define kproto(FMT, ...) \
60 printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
61 #define _proto(FMT, ...) \
62 no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
66 #define CODMSB 004000000000
71 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
72 static void mn10300_serial_console_write(
struct console *co,
73 const char *
s,
unsigned count);
74 static int __init mn10300_serial_console_setup(
struct console *co,
78 static struct console mn10300_serial_console = {
80 .write = mn10300_serial_console_write,
82 .setup = mn10300_serial_console_setup,
85 .data = &mn10300_serial_driver,
91 .driver_name =
"mn10300-serial",
96 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
97 .cons = &mn10300_serial_console,
101 static unsigned int mn10300_serial_tx_empty(
struct uart_port *);
102 static void mn10300_serial_set_mctrl(
struct uart_port *,
unsigned int mctrl);
103 static unsigned int mn10300_serial_get_mctrl(
struct uart_port *);
104 static void mn10300_serial_stop_tx(
struct uart_port *);
105 static void mn10300_serial_start_tx(
struct uart_port *);
106 static void mn10300_serial_send_xchar(
struct uart_port *,
char ch);
107 static void mn10300_serial_stop_rx(
struct uart_port *);
108 static void mn10300_serial_enable_ms(
struct uart_port *);
109 static void mn10300_serial_break_ctl(
struct uart_port *,
int ctl);
110 static int mn10300_serial_startup(
struct uart_port *);
111 static void mn10300_serial_shutdown(
struct uart_port *);
112 static void mn10300_serial_set_termios(
struct uart_port *,
115 static const char *mn10300_serial_type(
struct uart_port *);
116 static void mn10300_serial_release_port(
struct uart_port *);
117 static int mn10300_serial_request_port(
struct uart_port *);
118 static void mn10300_serial_config_port(
struct uart_port *,
int);
119 static int mn10300_serial_verify_port(
struct uart_port *,
121 #ifdef CONFIG_CONSOLE_POLL
122 static void mn10300_serial_poll_put_char(
struct uart_port *,
unsigned char);
123 static int mn10300_serial_poll_get_char(
struct uart_port *);
126 static const struct uart_ops mn10300_serial_ops = {
127 .tx_empty = mn10300_serial_tx_empty,
128 .set_mctrl = mn10300_serial_set_mctrl,
129 .get_mctrl = mn10300_serial_get_mctrl,
130 .stop_tx = mn10300_serial_stop_tx,
131 .start_tx = mn10300_serial_start_tx,
132 .send_xchar = mn10300_serial_send_xchar,
133 .stop_rx = mn10300_serial_stop_rx,
134 .enable_ms = mn10300_serial_enable_ms,
135 .break_ctl = mn10300_serial_break_ctl,
136 .startup = mn10300_serial_startup,
137 .shutdown = mn10300_serial_shutdown,
138 .set_termios = mn10300_serial_set_termios,
139 .type = mn10300_serial_type,
140 .release_port = mn10300_serial_release_port,
141 .request_port = mn10300_serial_request_port,
142 .config_port = mn10300_serial_config_port,
143 .verify_port = mn10300_serial_verify_port,
144 #ifdef CONFIG_CONSOLE_POLL
145 .poll_put_char = mn10300_serial_poll_put_char,
146 .poll_get_char = mn10300_serial_poll_get_char,
155 #ifdef CONFIG_MN10300_TTYSM0
157 .
uart.ops = &mn10300_serial_ops,
158 .uart.membase = (
void __iomem *) &SC0CTR,
159 .
uart.mapbase = (
unsigned long) &SC0CTR,
172 ._status = (
volatile u8 *)&SC0STR,
178 #
if defined(CONFIG_MN10300_TTYSM0_TIMER8)
179 .tm_name =
"ttySM0:Timer8",
185 #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
186 .tm_name =
"ttySM0:Timer0",
188 ._tmxbr = (
volatile u16 *)&TM0BR,
192 #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
193 .tm_name =
"ttySM0:Timer2",
195 ._tmxbr = (
volatile u16 *)&TM2BR,
200 #
error "Unknown config for ttySM0"
204 .
rx_icr = &GxICR(SC0RXIRQ),
205 .tx_icr = &GxICR(SC0TXIRQ),
208 #ifdef CONFIG_GDBSTUB_ON_TTYSM0
217 #ifdef CONFIG_MN10300_TTYSM1
219 .
uart.ops = &mn10300_serial_ops,
220 .uart.membase = (
void __iomem *) &SC1CTR,
221 .
uart.mapbase = (
unsigned long) &SC1CTR,
234 ._status = (
volatile u8 *)&SC1STR,
240 #
if defined(CONFIG_MN10300_TTYSM1_TIMER9)
241 .tm_name =
"ttySM1:Timer9",
247 #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
248 .tm_name =
"ttySM1:Timer3",
250 ._tmxbr = (
volatile u16 *)&TM3BR,
254 #elif defined(CONFIG_MN10300_TTYSM1_TIMER12)
255 .tm_name =
"ttySM1/Timer12",
262 #error "Unknown config for ttySM1"
266 .rx_icr = &GxICR(SC1RXIRQ),
267 .tx_icr = &GxICR(SC1TXIRQ),
270 #ifdef CONFIG_GDBSTUB_ON_TTYSM1
279 #ifdef CONFIG_MN10300_TTYSM2
281 .
uart.ops = &mn10300_serial_ops,
282 .uart.membase = (
void __iomem *) &SC2CTR,
283 .
uart.mapbase = (
unsigned long) &SC2CTR,
290 #ifdef CONFIG_MN10300_TTYSM2_CTS
300 ._status = (
volatile u8 *)&SC2STR,
306 #
if defined(CONFIG_MN10300_TTYSM2_TIMER10)
307 .tm_name =
"ttySM2/Timer10",
313 #elif defined(CONFIG_MN10300_TTYSM2_TIMER9)
314 .tm_name =
"ttySM2/Timer9",
320 #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
321 .tm_name =
"ttySM2/Timer1",
323 ._tmxbr = (
volatile u16 *)&TM1BR,
327 #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
328 .tm_name =
"ttySM2/Timer3",
330 ._tmxbr = (
volatile u16 *)&TM3BR,
335 #
error "Unknown config for ttySM2"
339 .
rx_icr = &GxICR(SC2RXIRQ),
340 .tx_icr = &GxICR(SC2TXIRQ),
342 #ifdef CONFIG_MN10300_TTYSM2_CTS
347 #ifdef CONFIG_GDBSTUB_ON_TTYSM2
358 #ifdef CONFIG_MN10300_TTYSM0
359 [0] = &mn10300_serial_port_sif0,
361 #ifdef CONFIG_MN10300_TTYSM1
362 [1] = &mn10300_serial_port_sif1,
364 #ifdef CONFIG_MN10300_TTYSM2
365 [2] = &mn10300_serial_port_sif2,
383 static void mn10300_serial_mask_ack(
unsigned int irq)
388 flags = arch_local_cli_save();
389 GxICR(irq) = GxICR_LEVEL_6;
394 static void mn10300_serial_chip_mask_ack(
struct irq_data *
d)
396 mn10300_serial_mask_ack(d->
irq);
399 static void mn10300_serial_nop(
struct irq_data *
d)
403 static struct irq_chip mn10300_serial_pic = {
405 .irq_ack = mn10300_serial_chip_mask_ack,
406 .irq_mask = mn10300_serial_chip_mask_ack,
407 .irq_mask_ack = mn10300_serial_chip_mask_ack,
408 .irq_unmask = mn10300_serial_nop,
422 flags = arch_local_cli_save();
423 *port->
tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
433 flags = arch_local_cli_save();
435 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) | GxICR_ENABLE;
445 flags = arch_local_cli_save();
446 *port->
rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
454 static int mask_test_and_clear(
volatile u8 *
ptr,
u8 mask)
457 asm volatile(
" bclr %1,(%2) \n"
459 :
"=d"(epsw) :
"d"(mask),
"a"(
ptr)
461 return !(epsw & EPSW_FLAG_Z);
501 port->
uart.icount.rx++;
503 st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
519 if (st & SC01STR_FEF && ch == 0) {
526 if (st & SC01STR_FEF && ch == 0) {
528 _proto(
"Rx Break Detected");
530 if (uart_handle_break(&port->
uart))
538 if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
561 if (st & SC01STR_FEF) {
568 _proto(
"Rx Framing Error");
574 if (st & SC01STR_PEF) {
575 _proto(
"Rx Parity Error");
588 if (st & SC01STR_OEF) {
592 _proto(
"Rx Overrun Error");
598 status &= port->
uart.read_status_mask;
600 if (!overrun && !(status & port->
uart.ignore_status_mask)) {
612 tty_insert_flip_char(tty, ch, flag);
646 if (!port->
uart.state || !port->
uart.state->port.tty) {
647 mn10300_serial_dis_tx_intr(port);
651 if (uart_tx_stopped(&port->
uart) ||
653 mn10300_serial_dis_tx_intr(port);
667 port->
uart.icount.cts++;
688 spin_lock(&port->
uart.lock);
694 mn10300_serial_receive_interrupt(port);
698 mn10300_serial_transmit_interrupt(port);
705 if ((port->
tx_cts ^ st) & SC2STR_CTS)
706 mn10300_serial_cts_changed(port, st);
709 spin_unlock(&port->
uart.lock);
717 static unsigned int mn10300_serial_tx_empty(
struct uart_port *_port)
724 return (*port->
_status & (SC01STR_TXF | SC01STR_TBF)) ?
731 static void mn10300_serial_set_mctrl(
struct uart_port *_port,
743 static unsigned int mn10300_serial_get_mctrl(
struct uart_port *_port)
759 static void mn10300_serial_stop_tx(
struct uart_port *_port)
767 mn10300_serial_dis_tx_intr(port);
776 static void mn10300_serial_start_tx(
struct uart_port *_port)
786 &port->
uart.state->xmit.tail,
794 if (*port->
_status & SC01STR_TBF)
795 x &= ~(GxICR_REQUEST | GxICR_DETECT);
797 x |= GxICR_REQUEST | GxICR_DETECT;
799 _debug(
"CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
814 static void mn10300_serial_send_xchar(
struct uart_port *_port,
char ch)
824 mn10300_serial_en_tx_intr(port);
832 static void mn10300_serial_stop_rx(
struct uart_port *_port)
845 mn10300_serial_dis_rx_intr(port);
851 static void mn10300_serial_enable_ms(
struct uart_port *_port)
866 cts = (port->
tx_cts & SC2STR_CTS) ?
867 SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
874 mn10300_serial_en_tx_intr(port);
881 static void mn10300_serial_break_ctl(
struct uart_port *_port,
int ctl)
891 mn10300_serial_en_tx_intr(port);
895 mn10300_serial_en_tx_intr(port);
902 static int mn10300_serial_startup(
struct uart_port *_port)
921 *port->
_intr = SC01ICR_TI;
922 *port->
_control |= SC01CTR_TXE | SC01CTR_RXE;
932 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
934 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
948 mn10300_serial_mask_ack(port->
tm_irq);
965 static void mn10300_serial_shutdown(
struct uart_port *_port)
975 *port->
_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
990 *port->
rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
992 *port->
tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
1005 unsigned long flags;
1016 cflag =
new->c_cflag;
1017 switch (cflag &
CSIZE) {
1018 case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9;
break;
1019 case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10;
break;
1020 default: scxctr = SC01CTR_CLN_8BIT; bits = 10;
break;
1024 scxctr |= SC01CTR_STB_2BIT;
1031 scxctr |= SC01CTR_PB_ODD;
1034 scxctr |= SC01CTR_PB_FIXED0;
1037 scxctr |= SC01CTR_PB_EVEN;
1043 switch (port->
uart.line) {
1044 #ifdef CONFIG_MN10300_TTYSM0
1046 #if defined(CONFIG_MN10300_TTYSM0_TIMER8)
1047 scxctr |= SC0CTR_CK_TM8UFLOW_8;
1048 #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
1049 scxctr |= SC0CTR_CK_TM0UFLOW_8;
1050 #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
1051 scxctr |= SC0CTR_CK_TM2UFLOW_8;
1053 #error "Unknown config for ttySM0"
1058 #ifdef CONFIG_MN10300_TTYSM1
1060 #if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
1061 #if defined(CONFIG_MN10300_TTYSM1_TIMER9)
1062 scxctr |= SC1CTR_CK_TM9UFLOW_8;
1063 #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
1064 scxctr |= SC1CTR_CK_TM3UFLOW_8;
1066 #error "Unknown config for ttySM1"
1069 #if defined(CONFIG_MN10300_TTYSM1_TIMER12)
1070 scxctr |= SC1CTR_CK_TM12UFLOW_8;
1072 #error "Unknown config for ttySM1"
1078 #ifdef CONFIG_MN10300_TTYSM2
1080 #if defined(CONFIG_AM33_2)
1081 #if defined(CONFIG_MN10300_TTYSM2_TIMER10)
1082 scxctr |= SC2CTR_CK_TM10UFLOW;
1084 #error "Unknown config for ttySM2"
1087 #if defined(CONFIG_MN10300_TTYSM2_TIMER9)
1088 scxctr |= SC2CTR_CK_TM9UFLOW_8;
1089 #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
1090 scxctr |= SC2CTR_CK_TM1UFLOW_8;
1091 #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
1092 scxctr |= SC2CTR_CK_TM3UFLOW_8;
1094 #error "Unknown config for ttySM2"
1108 _debug(
"ALT %d [baud %d]", battempt, baud);
1118 if (baud == 38400 &&
1121 _debug(
"CUSTOM %u", port->
uart.custom_divisor);
1124 if (port->
uart.custom_divisor <= 65535) {
1125 tmxmd = TM8MD_SRC_IOCLK;
1126 tmxbr = port->
uart.custom_divisor;
1130 if (port->
uart.custom_divisor / 8 <= 65535) {
1131 tmxmd = TM8MD_SRC_IOCLK_8;
1132 tmxbr = port->
uart.custom_divisor / 8;
1133 port->
uart.custom_divisor = tmxbr * 8;
1134 port->
uart.uartclk = ioclk / 8;
1137 if (port->
uart.custom_divisor / 32 <= 65535) {
1138 tmxmd = TM8MD_SRC_IOCLK_32;
1139 tmxbr = port->
uart.custom_divisor / 32;
1140 port->
uart.custom_divisor = tmxbr * 32;
1141 port->
uart.uartclk = ioclk / 32;
1146 if (port->
uart.custom_divisor <= 255) {
1147 tmxmd = TM2MD_SRC_IOCLK;
1148 tmxbr = port->
uart.custom_divisor;
1152 if (port->
uart.custom_divisor / 8 <= 255) {
1153 tmxmd = TM2MD_SRC_IOCLK_8;
1154 tmxbr = port->
uart.custom_divisor / 8;
1155 port->
uart.custom_divisor = tmxbr * 8;
1156 port->
uart.uartclk = ioclk / 8;
1159 if (port->
uart.custom_divisor / 32 <= 255) {
1160 tmxmd = TM2MD_SRC_IOCLK_32;
1161 tmxbr = port->
uart.custom_divisor / 32;
1162 port->
uart.custom_divisor = tmxbr * 32;
1163 port->
uart.uartclk = ioclk / 32;
1169 switch (div_timer) {
1172 tmxmd = TM8MD_SRC_IOCLK;
1173 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1174 if (tmp > 0 && tmp <= 65535)
1177 port->
uart.uartclk = ioclk / 8;
1178 tmxmd = TM8MD_SRC_IOCLK_8;
1179 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1180 if (tmp > 0 && tmp <= 65535)
1183 port->
uart.uartclk = ioclk / 32;
1184 tmxmd = TM8MD_SRC_IOCLK_32;
1185 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1186 if (tmp > 0 && tmp <= 65535)
1192 tmxmd = TM2MD_SRC_IOCLK;
1193 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1194 if (tmp > 0 && tmp <= 255)
1197 port->
uart.uartclk = ioclk / 8;
1198 tmxmd = TM2MD_SRC_IOCLK_8;
1199 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1200 if (tmp > 0 && tmp <= 255)
1203 port->
uart.uartclk = ioclk / 32;
1204 tmxmd = TM2MD_SRC_IOCLK_32;
1205 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1206 if (tmp > 0 && tmp <= 255)
1221 new->c_cflag &= ~
CBAUD;
1224 goto try_alternative;
1230 new->c_cflag &= ~
CBAUD;
1231 new->c_cflag |=
B9600;
1233 goto try_alternative;
1240 new->c_cflag &= ~
CBAUD;
1244 tmxmd = TM8MD_SRC_IOCLK_32;
1246 tmxmd = TM2MD_SRC_IOCLK_32;
1249 port->
uart.uartclk = ioclk / 32;
1254 _debug(
"UARTCLK: %u / %hu", port->
uart.uartclk, tmxbr);
1262 switch (div_timer) {
1266 *port->
_tmxmd = TM8MD_INIT_COUNTER;
1267 *port->
_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1273 *port->
_tmxmd = TM2MD_INIT_COUNTER;
1274 *port->
_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1279 scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
1287 if (port->
tx_cts & SC2STR_CTS)
1288 scxctr |= SC2CTR_TWE;
1290 scxctr |= SC2CTR_TWE | SC2CTR_TWS;
1295 if (new->c_iflag &
INPCK)
1296 port->
uart.read_status_mask |=
1302 port->
uart.ignore_status_mask = 0;
1303 if (new->c_iflag &
IGNPAR)
1304 port->
uart.ignore_status_mask |=
1306 if (new->c_iflag &
IGNBRK) {
1312 if (new->c_iflag &
IGNPAR)
1317 if ((new->c_cflag &
CREAD) == 0)
1320 scxctr |= *port->
_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
1323 spin_unlock_irqrestore(&port->
uart.lock, flags);
1329 static void mn10300_serial_set_termios(
struct uart_port *_port,
1338 mn10300_serial_change_speed(port,
new, old);
1341 if (!(new->c_cflag & CRTSCTS)) {
1348 if (new->c_cflag &
CODMSB)
1349 *port->
_control |= SC01CTR_OD_MSBFIRST;
1351 *port->
_control &= ~SC01CTR_OD_MSBFIRST;
1357 static const char *mn10300_serial_type(
struct uart_port *_port)
1363 return "MN10300 SIF_CTS";
1365 return "MN10300 SIF";
1371 static void mn10300_serial_release_port(
struct uart_port *_port)
1384 static int mn10300_serial_request_port(
struct uart_port *_port)
1398 static void mn10300_serial_config_port(
struct uart_port *_port,
int type)
1410 mn10300_serial_request_port(_port);
1416 static int mn10300_serial_verify_port(
struct uart_port *_port,
1421 void *mapbase = (
void *) (
unsigned long) port->
uart.mapbase;
1426 if (ss->
irq != port->
uart.irq ||
1451 static int __init mn10300_serial_init(
void)
1457 serial_name, serial_version, serial_revdate);
1459 #if defined(CONFIG_MN10300_TTYSM2) && defined(CONFIG_AM33_2)
1473 port = mn10300_serial_ports[
i];
1482 #ifdef MN10300_IOBCLK
1495 _debug(
"ERROR %d", -ret);
1510 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
1517 static void mn10300_serial_console_write(
struct console *co,
1518 const char *
s,
unsigned count)
1525 port = mn10300_serial_ports[co->
index];
1530 *port->
tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
1536 if (!(scxctr & SC01CTR_TXE)) {
1543 *port->
_tmxmd = TM8MD_INIT_COUNTER;
1544 *port->
_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1549 *port->
_tmxmd = TM2MD_INIT_COUNTER;
1550 *port->
_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1555 *port->
_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
1557 }
else if (scxctr & SC01CTR_BKE) {
1559 *port->
_control = (scxctr & ~SC01CTR_BKE);
1563 for (i = 0; i <
count; i++) {
1566 while (*port->
_status & SC01STR_TBF)
1571 while (*port->
_status & SC01STR_TBF)
1573 *(
u8 *) port->
_txb = 0xd;
1579 while (*port->
_status & (SC01STR_TXF | SC01STR_TBF))
1583 if (!(scxctr & SC01CTR_TXE))
1598 static int __init mn10300_serial_console_setup(
struct console *co,
1602 int i,
parity =
'n', baud = 9600, bits = 8, flow = 0;
1605 port = mn10300_serial_ports[
i];
1618 #ifdef MN10300_IOBCLK
1636 static int __init mn10300_serial_console_init(
void)
1645 #ifdef CONFIG_CONSOLE_POLL
1649 static int mn10300_serial_poll_get_char(
struct uart_port *_port)
1669 }
while (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF));
1678 static void mn10300_serial_poll_put_char(
struct uart_port *_port,
1687 while (*port->
_status & (SC01STR_TBF | SC01STR_TXF))
1691 intr = *port->
_intr;
1692 *port->
_intr = intr & ~SC01ICR_TI;
1696 *(
u8 *) port->
_txb = 0x0d;
1697 while (*port->
_status & SC01STR_TBF)
1702 while (*port->
_status & SC01STR_TBF)