52 if (node->
vma[0].node) {
57 if (node->
vma[1].node) {
69 nouveau_mem_node_cleanup(mem->
mm_node);
130 nouveau_vram_manager_init,
131 nouveau_vram_manager_fini,
132 nouveau_vram_manager_new,
133 nouveau_vram_manager_del,
134 nouveau_vram_manager_debug
153 nouveau_mem_node_cleanup(mem->
mm_node);
185 nouveau_gart_manager_init,
186 nouveau_gart_manager_fini,
187 nouveau_gart_manager_new,
188 nouveau_gart_manager_del,
189 nouveau_gart_manager_debug
218 if (node->
vma[0].node)
257 nv04_gart_manager_init,
258 nv04_gart_manager_fini,
259 nv04_gart_manager_new,
260 nv04_gart_manager_del,
261 nv04_gart_manager_debug
294 global_ref = &drm->
ttm.mem_global_ref;
297 global_ref->
init = &nouveau_ttm_mem_global_init;
298 global_ref->
release = &nouveau_ttm_mem_global_release;
302 DRM_ERROR(
"Failed setting up TTM memory accounting\n");
303 drm->
ttm.mem_global_ref.release =
NULL;
307 drm->
ttm.bo_global_ref.mem_glob = global_ref->
object;
308 global_ref = &drm->
ttm.bo_global_ref.ref;
316 DRM_ERROR(
"Failed setting up TTM BO subsystem\n");
318 drm->
ttm.mem_global_ref.release =
NULL;
328 if (drm->
ttm.mem_global_ref.release ==
NULL)
333 drm->
ttm.mem_global_ref.release =
NULL;
352 ret = pci_set_consistent_dma_mask(dev->pdev,
DMA_BIT_MASK(bits));
354 pci_set_consistent_dma_mask(dev->pdev,
DMA_BIT_MASK(32));
361 drm->
ttm.bo_global_ref.ref.object,
363 bits <= 32 ?
true :
false);
365 NV_ERROR(drm,
"error initialising bo driver, %d\n", ret);
376 NV_ERROR(drm,
"VRAM mm init failed, %d\n", ret);
387 if (drm->
gem.gart_available > 512 * 1024 * 1024)
388 drm->
gem.gart_available = 512 * 1024 * 1024;
390 drm->
gem.gart_available = drm->
agp.size;
396 NV_ERROR(drm,
"GART mm init failed, %d\n", ret);
400 NV_INFO(drm,
"VRAM: %d MiB\n", (
u32)(drm->
gem.vram_available >> 20));
401 NV_INFO(drm,
"GART: %d MiB\n", (
u32)(drm->
gem.gart_available >> 20));
417 if (drm->
ttm.mtrr >= 0) {
418 drm_mtrr_del(drm->
ttm.mtrr,