#include <linux/types.h>
#include <linux/kconfig.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/acpi.h>
#include <linux/dmi.h>
#include "pci-quirks.h"
#include "xhci-ext-caps.h"

Data Structures
struct	amd_chipset_info

Macros
#define	UHCI_USBLEGSUP 0xc0 /* legacy support */

#define	UHCI_USBCMD 0 /* command register */

#define	UHCI_USBINTR 4 /* interrupt register */

#define	UHCI_USBLEGSUP_RWC 0x8f00 /* the R/WC bits */

#define	UHCI_USBLEGSUP_RO 0x5040 /* R/O and reserved bits */

#define	UHCI_USBCMD_RUN 0x0001 /* RUN/STOP bit */

#define	UHCI_USBCMD_HCRESET 0x0002 /* Host Controller reset */

#define	UHCI_USBCMD_EGSM 0x0008 /* Global Suspend Mode */

#define	UHCI_USBCMD_CONFIGURE 0x0040 /* Config Flag */

#define	UHCI_USBINTR_RESUME 0x0002 /* Resume interrupt enable */

#define	OHCI_CONTROL 0x04

#define	OHCI_CMDSTATUS 0x08

#define	OHCI_INTRSTATUS 0x0c

#define	OHCI_INTRENABLE 0x10

#define	OHCI_INTRDISABLE 0x14

#define	OHCI_FMINTERVAL 0x34

#define	OHCI_HCFS (3 << 6) /* hc functional state */

#define	OHCI_HCR (1 << 0) /* host controller reset */

#define	OHCI_OCR (1 << 3) /* ownership change request */

#define	OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */

#define	OHCI_CTRL_IR (1 << 8) /* interrupt routing */

#define	OHCI_INTR_OC (1 << 30) /* ownership change */

#define	EHCI_HCC_PARAMS 0x08 /* extended capabilities */

#define	EHCI_USBCMD 0 /* command register */

#define	EHCI_USBCMD_RUN (1 << 0) /* RUN/STOP bit */

#define	EHCI_USBSTS 4 /* status register */

#define	EHCI_USBSTS_HALTED (1 << 12) /* HCHalted bit */

#define	EHCI_USBINTR 8 /* interrupt register */

#define	EHCI_CONFIGFLAG 0x40 /* configured flag register */

#define	EHCI_USBLEGSUP 0 /* legacy support register */

#define	EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */

#define	EHCI_USBLEGSUP_OS (1 << 24) /* OS semaphore */

#define	EHCI_USBLEGCTLSTS 4 /* legacy control/status */

#define	EHCI_USBLEGCTLSTS_SOOE (1 << 13) /* SMI on ownership change */

#define	AB_REG_BAR_LOW 0xe0

#define	AB_REG_BAR_HIGH 0xe1

#define	AB_REG_BAR_SB700 0xf0

#define	AB_INDX(addr) ((addr) + 0x00)

#define	AB_DATA(addr) ((addr) + 0x04)

#define	AX_INDXC 0x30

#define	AX_DATAC 0x34

#define	NB_PCIE_INDX_ADDR 0xe0

#define	NB_PCIE_INDX_DATA 0xe4

#define	PCIE_P_CNTL 0x10040

#define	BIF_NB 0x10002

#define	NB_PIF0_PWRDOWN_0 0x01100012

#define	NB_PIF0_PWRDOWN_1 0x01100013

#define	USB_INTEL_XUSB2PR 0xD0

#define	USB_INTEL_USB2PRM 0xD4

#define	USB_INTEL_USB3_PSSEN 0xD8

#define	USB_INTEL_USB3PRM 0xDC

#define	pio_enabled(dev) io_type_enabled(dev, PCI_COMMAND_IO)

#define	mmio_enabled(dev) io_type_enabled(dev, PCI_COMMAND_MEMORY)

#define	OHCI_CTRL_MASK OHCI_CTRL_RWC

#define	PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI 0x8C31

Functions
int	usb_amd_find_chipset_info (void)

	EXPORT_SYMBOL_GPL (usb_amd_find_chipset_info)

void	usb_amd_quirk_pll_disable (void)

	EXPORT_SYMBOL_GPL (usb_amd_quirk_pll_disable)

void	usb_amd_quirk_pll_enable (void)

	EXPORT_SYMBOL_GPL (usb_amd_quirk_pll_enable)

void	usb_amd_dev_put (void)

	EXPORT_SYMBOL_GPL (usb_amd_dev_put)

void	uhci_reset_hc (struct pci_dev *pdev, unsigned long base)

	EXPORT_SYMBOL_GPL (uhci_reset_hc)

int	uhci_check_and_reset_hc (struct pci_dev *pdev, unsigned long base)

	EXPORT_SYMBOL_GPL (uhci_check_and_reset_hc)

bool	usb_is_intel_ppt_switchable_xhci (struct pci_dev *pdev)

bool	usb_is_intel_lpt_switchable_xhci (struct pci_dev *pdev)

bool	usb_is_intel_switchable_xhci (struct pci_dev *pdev)

	EXPORT_SYMBOL_GPL (usb_is_intel_switchable_xhci)

void	usb_enable_xhci_ports (struct pci_dev *xhci_pdev)

	EXPORT_SYMBOL_GPL (usb_enable_xhci_ports)

void	usb_disable_xhci_ports (struct pci_dev *xhci_pdev)

	EXPORT_SYMBOL_GPL (usb_disable_xhci_ports)

	DECLARE_PCI_FIXUP_CLASS_FINAL (PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff)

Macro Definition Documentation

#define AB_DATA ( addr ) ((addr) + 0x04)

Definition at line 66 of file pci-quirks.c.

#define AB_INDX ( addr ) ((addr) + 0x00)

Definition at line 65 of file pci-quirks.c.

#define AB_REG_BAR_HIGH 0xe1

Definition at line 63 of file pci-quirks.c.

#define AB_REG_BAR_LOW 0xe0

Definition at line 62 of file pci-quirks.c.

#define AB_REG_BAR_SB700 0xf0

Definition at line 64 of file pci-quirks.c.

#define AX_DATAC 0x34

Definition at line 68 of file pci-quirks.c.

#define AX_INDXC 0x30

Definition at line 67 of file pci-quirks.c.

#define BIF_NB 0x10002

Definition at line 73 of file pci-quirks.c.

#define EHCI_CONFIGFLAG 0x40 /* configured flag register */

Definition at line 54 of file pci-quirks.c.

#define EHCI_HCC_PARAMS 0x08 /* extended capabilities */

Definition at line 48 of file pci-quirks.c.

#define EHCI_USBCMD 0 /* command register */

Definition at line 49 of file pci-quirks.c.

#define EHCI_USBCMD_RUN (1 << 0) /* RUN/STOP bit */

Definition at line 50 of file pci-quirks.c.

#define EHCI_USBINTR 8 /* interrupt register */

Definition at line 53 of file pci-quirks.c.

#define EHCI_USBLEGCTLSTS 4 /* legacy control/status */

Definition at line 58 of file pci-quirks.c.

#define EHCI_USBLEGCTLSTS_SOOE (1 << 13) /* SMI on ownership change */

Definition at line 59 of file pci-quirks.c.

#define EHCI_USBLEGSUP 0 /* legacy support register */

Definition at line 55 of file pci-quirks.c.

#define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */

Definition at line 56 of file pci-quirks.c.

#define EHCI_USBLEGSUP_OS (1 << 24) /* OS semaphore */

Definition at line 57 of file pci-quirks.c.

#define EHCI_USBSTS 4 /* status register */

Definition at line 51 of file pci-quirks.c.

#define EHCI_USBSTS_HALTED (1 << 12) /* HCHalted bit */

Definition at line 52 of file pci-quirks.c.

#define mmio_enabled ( dev ) io_type_enabled(dev, PCI_COMMAND_MEMORY)

Definition at line 444 of file pci-quirks.c.

#define NB_PCIE_INDX_ADDR 0xe0

Definition at line 70 of file pci-quirks.c.

#define NB_PCIE_INDX_DATA 0xe4

Definition at line 71 of file pci-quirks.c.

#define NB_PIF0_PWRDOWN_0 0x01100012

Definition at line 74 of file pci-quirks.c.

#define NB_PIF0_PWRDOWN_1 0x01100013

Definition at line 75 of file pci-quirks.c.

#define OHCI_CMDSTATUS 0x08

Definition at line 36 of file pci-quirks.c.

#define OHCI_CONTROL 0x04

Definition at line 35 of file pci-quirks.c.

#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */

Definition at line 45 of file pci-quirks.c.

#define OHCI_CTRL_MASK OHCI_CTRL_RWC

#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */

Definition at line 44 of file pci-quirks.c.

#define OHCI_FMINTERVAL 0x34

Definition at line 40 of file pci-quirks.c.

#define OHCI_HCFS (3 << 6) /* hc functional state */

Definition at line 41 of file pci-quirks.c.

#define OHCI_HCR (1 << 0) /* host controller reset */

Definition at line 42 of file pci-quirks.c.

#define OHCI_INTR_OC (1 << 30) /* ownership change */

Definition at line 46 of file pci-quirks.c.

#define OHCI_INTRDISABLE 0x14

Definition at line 39 of file pci-quirks.c.

#define OHCI_INTRENABLE 0x10

Definition at line 38 of file pci-quirks.c.

#define OHCI_INTRSTATUS 0x0c

Definition at line 37 of file pci-quirks.c.

#define OHCI_OCR (1 << 3) /* ownership change request */

Definition at line 43 of file pci-quirks.c.

#define PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI 0x8C31

Definition at line 725 of file pci-quirks.c.

#define PCIE_P_CNTL 0x10040

Definition at line 72 of file pci-quirks.c.

#define pio_enabled ( dev ) io_type_enabled(dev, PCI_COMMAND_IO)

Definition at line 443 of file pci-quirks.c.

#define UHCI_USBCMD 0 /* command register */

Definition at line 25 of file pci-quirks.c.

#define UHCI_USBCMD_CONFIGURE 0x0040 /* Config Flag */

Definition at line 32 of file pci-quirks.c.

#define UHCI_USBCMD_EGSM 0x0008 /* Global Suspend Mode */

Definition at line 31 of file pci-quirks.c.

#define UHCI_USBCMD_HCRESET 0x0002 /* Host Controller reset */

Definition at line 30 of file pci-quirks.c.

#define UHCI_USBCMD_RUN 0x0001 /* RUN/STOP bit */

Definition at line 29 of file pci-quirks.c.

#define UHCI_USBINTR 4 /* interrupt register */

Definition at line 26 of file pci-quirks.c.

#define UHCI_USBINTR_RESUME 0x0002 /* Resume interrupt enable */

Definition at line 33 of file pci-quirks.c.

#define UHCI_USBLEGSUP 0xc0 /* legacy support */

Definition at line 24 of file pci-quirks.c.

#define UHCI_USBLEGSUP_RO 0x5040 /* R/O and reserved bits */

Definition at line 28 of file pci-quirks.c.

#define UHCI_USBLEGSUP_RWC 0x8f00 /* the R/WC bits */

Definition at line 27 of file pci-quirks.c.

#define USB_INTEL_USB2PRM 0xD4

Definition at line 78 of file pci-quirks.c.

#define USB_INTEL_USB3_PSSEN 0xD8

Definition at line 79 of file pci-quirks.c.

#define USB_INTEL_USB3PRM 0xDC

Definition at line 80 of file pci-quirks.c.

#define USB_INTEL_XUSB2PR 0xD0

Definition at line 77 of file pci-quirks.c.

Function Documentation

DECLARE_PCI_FIXUP_CLASS_FINAL	(	PCI_ANY_ID	,
		PCI_ANY_ID	,
		PCI_CLASS_SERIAL_USB	,
		8	,
		quirk_usb_early_handoff
	)

EXPORT_SYMBOL_GPL ( usb_amd_find_chipset_info )

EXPORT_SYMBOL_GPL ( usb_amd_quirk_pll_disable )

EXPORT_SYMBOL_GPL ( usb_amd_quirk_pll_enable )

EXPORT_SYMBOL_GPL ( usb_amd_dev_put )

EXPORT_SYMBOL_GPL ( uhci_reset_hc )

EXPORT_SYMBOL_GPL ( uhci_check_and_reset_hc )

EXPORT_SYMBOL_GPL ( usb_is_intel_switchable_xhci )

EXPORT_SYMBOL_GPL ( usb_enable_xhci_ports )

EXPORT_SYMBOL_GPL ( usb_disable_xhci_ports )

int uhci_check_and_reset_hc	(	struct pci_dev *	pdev,
		unsigned long	base
	)

Definition at line 392 of file pci-quirks.c.

void uhci_reset_hc	(	struct pci_dev *	pdev,
		unsigned long	base
	)

Definition at line 360 of file pci-quirks.c.

void usb_amd_dev_put ( void )

Definition at line 323 of file pci-quirks.c.

int usb_amd_find_chipset_info ( void )

Definition at line 94 of file pci-quirks.c.

void usb_amd_quirk_pll_disable ( void )

Definition at line 311 of file pci-quirks.c.

void usb_amd_quirk_pll_enable ( void )

Definition at line 317 of file pci-quirks.c.

void usb_disable_xhci_ports ( struct pci_dev * xhci_pdev )

Definition at line 829 of file pci-quirks.c.

void usb_enable_xhci_ports ( struct pci_dev * xhci_pdev )

Definition at line 767 of file pci-quirks.c.

bool usb_is_intel_lpt_switchable_xhci ( struct pci_dev * pdev )

Definition at line 735 of file pci-quirks.c.

bool usb_is_intel_ppt_switchable_xhci ( struct pci_dev * pdev )

Definition at line 727 of file pci-quirks.c.

bool usb_is_intel_switchable_xhci ( struct pci_dev * pdev )

Definition at line 742 of file pci-quirks.c.

Data Structures

Macros

Functions

Macro Definition Documentation

Function Documentation