#include <linux/edac.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/of_platform.h>
#include <linux/types.h>
#include <asm/dcr.h>
#include "edac_core.h"
#include "ppc4xx_edac.h"
Go to the source code of this file.
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#define | EDAC_OPSTATE_INT_STR "interrupt" |
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#define | EDAC_OPSTATE_POLL_STR "polled" |
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#define | EDAC_OPSTATE_UNKNOWN_STR "unknown" |
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#define | PPC4XX_EDAC_MODULE_NAME "ppc4xx_edac" |
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#define | PPC4XX_EDAC_MODULE_REVISION "v1.0.0" |
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#define | PPC4XX_EDAC_MESSAGE_SIZE 256 |
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#define | ppc4xx_edac_printk(level, fmt, arg...) edac_printk(level, "PPC4xx MC", fmt, ##arg) |
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#define | ppc4xx_edac_mc_printk(level, mci, fmt, arg...) edac_mc_chipset_printk(mci, level, "PPC4xx", fmt, ##arg) |
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#define | SDRAM_MBCF_SZ_MiB_MIN 4 |
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#define | SDRAM_MBCF_SZ_TO_MiB(n) |
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#define | SDRAM_MBCF_SZ_TO_PAGES(n) |
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#define | SDRAM_DCR_RESOURCE_LEN 2 |
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#define | SDRAM_DCR_ADDR_OFFSET 0 |
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#define | SDRAM_DCR_DATA_OFFSET 1 |
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#define | INTMAP_ECCDED_INDEX 0 /* Double-bit Error Detect */ |
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#define | INTMAP_ECCSEC_INDEX 1 /* Single-bit Error Correct */ |
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#define EDAC_OPSTATE_INT_STR "interrupt" |
#define EDAC_OPSTATE_POLL_STR "polled" |
#define EDAC_OPSTATE_UNKNOWN_STR "unknown" |
#define INTMAP_ECCDED_INDEX 0 /* Double-bit Error Detect */ |
#define INTMAP_ECCSEC_INDEX 1 /* Single-bit Error Correct */ |
#define PPC4XX_EDAC_MESSAGE_SIZE 256 |
#define PPC4XX_EDAC_MODULE_NAME "ppc4xx_edac" |
#define PPC4XX_EDAC_MODULE_REVISION "v1.0.0" |
#define SDRAM_DCR_ADDR_OFFSET 0 |
#define SDRAM_DCR_DATA_OFFSET 1 |
#define SDRAM_DCR_RESOURCE_LEN 2 |
#define SDRAM_MBCF_SZ_MiB_MIN 4 |
#define SDRAM_MBCF_SZ_TO_MiB |
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n | ) |
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#define SDRAM_MBCF_SZ_TO_PAGES |
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n | ) |
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module_exit |
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ppc4xx_edac_exit |
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module_init |
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ppc4xx_edac_init |
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MODULE_LICENSE |
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"GPL v2" |
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MODULE_PARM_DESC |
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edac_op_state |
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"EDAC Error Reporting State: "" |
0 = "EDAC_OPSTATE_POLL_STR" |
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