#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/edac.h>
#include "edac_core.h"

Data Structures
struct	x38_dev_info

struct	x38_error_info

Macros
#define	X38_REVISION "1.1"

#define	EDAC_MOD_STR "x38_edac"

#define	PCI_DEVICE_ID_INTEL_X38_HB 0x29e0

#define	X38_RANKS 8

#define	X38_RANKS_PER_CHANNEL 4

#define	X38_CHANNELS 2

#define	X38_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */

#define	X38_MCHBAR_HIGH 0x4c

#define	X38_MCHBAR_MASK 0xfffffc000ULL /* bits 35:14 */

#define	X38_MMR_WINDOW_SIZE 16384

#define	X38_TOM

#define	X38_TOM_MASK 0x3ff /* bits 9:0 */

#define	X38_TOM_SHIFT 26 /* 64MiB grain */

#define	X38_ERRSTS

#define	X38_ERRSTS_UE 0x0002

#define	X38_ERRSTS_CE 0x0001

#define	X38_ERRSTS_BITS (X38_ERRSTS_UE \| X38_ERRSTS_CE)

#define	X38_C0DRB

#define	X38_C1DRB 0x600 /* Channel 1 DRAM Rank Boundary (16b x 4) */

#define	X38_DRB_MASK 0x3ff /* bits 9:0 */

#define	X38_DRB_SHIFT 26 /* 64MiB grain */

#define	X38_C0ECCERRLOG

#define	X38_C1ECCERRLOG 0x680 /* Channel 1 ECC Error Log (64b) */

#define	X38_ECCERRLOG_CE 0x1

#define	X38_ECCERRLOG_UE 0x2

#define	X38_ECCERRLOG_RANK_BITS 0x18000000

#define	X38_ECCERRLOG_SYNDROME_BITS 0xff0000

#define	X38_CAPID0 0xe0 /* see P.94 of spec for details */

Enumerations
enum	x38_chips { X38 = 0 }

Functions
void __iomem *	x38_map_mchbar (struct pci_dev *pdev)

	MODULE_DEVICE_TABLE (pci, x38_pci_tbl)

	module_init (x38_init)

	module_exit (x38_exit)

	MODULE_LICENSE ("GPL")

	MODULE_AUTHOR ("Cluster Computing, Inc. Hitoshi Mitake")

	MODULE_DESCRIPTION ("MC support for Intel X38 memory hub controllers")

	module_param (edac_op_state, int, 0444)

	MODULE_PARM_DESC (edac_op_state,"EDAC Error Reporting state: 0=Poll,1=NMI")

Macro Definition Documentation

#define EDAC_MOD_STR "x38_edac"

Definition at line 21 of file x38_edac.c.

#define PCI_DEVICE_ID_INTEL_X38_HB 0x29e0

Definition at line 23 of file x38_edac.c.

#define X38_C0DRB

Value:

0x200   /* Channel 0 DRAM Rank Boundary (16b x 4)
                 *
                 * 15:10 reserved
                 *  9:0  Channel 0 DRAM Rank Boundary Address
                 */

Definition at line 48 of file x38_edac.c.

#define X38_C0ECCERRLOG

Value:

0x280   /* Channel 0 ECC Error Log (64b)
                 *
                 * 63:48 Error Column Address (ERRCOL)
                 * 47:32 Error Row Address (ERRROW)
                 * 31:29 Error Bank Address (ERRBANK)
                 * 28:27 Error Rank Address (ERRRANK)
                 * 26:24 reserved
                 * 23:16 Error Syndrome (ERRSYND)
                 * 15: 2 reserved
                 *    1  Multiple Bit Error Status (MERRSTS)
                 *    0  Correctable Error Status (CERRSTS)
                 */

Definition at line 53 of file x38_edac.c.

#define X38_C1DRB 0x600 /* Channel 1 DRAM Rank Boundary (16b x 4) */

Definition at line 49 of file x38_edac.c.

#define X38_C1ECCERRLOG 0x680 /* Channel 1 ECC Error Log (64b) */

Definition at line 54 of file x38_edac.c.

#define X38_CAPID0 0xe0 /* see P.94 of spec for details */

Definition at line 60 of file x38_edac.c.

#define X38_CHANNELS 2

Definition at line 27 of file x38_edac.c.

#define X38_DRB_MASK 0x3ff /* bits 9:0 */

Definition at line 50 of file x38_edac.c.

#define X38_DRB_SHIFT 26 /* 64MiB grain */

Definition at line 51 of file x38_edac.c.

#define X38_ECCERRLOG_CE 0x1

Definition at line 55 of file x38_edac.c.

#define X38_ECCERRLOG_RANK_BITS 0x18000000

Definition at line 57 of file x38_edac.c.

#define X38_ECCERRLOG_SYNDROME_BITS 0xff0000

Definition at line 58 of file x38_edac.c.

#define X38_ECCERRLOG_UE 0x2

Definition at line 56 of file x38_edac.c.

#define X38_ERRSTS

Value:

0xc8    /* Error Status Register (16b)
                 *
                 * 15    reserved
                 * 14    Isochronous TBWRR Run Behind FIFO Full
                 *       (ITCV)
                 * 13    Isochronous TBWRR Run Behind FIFO Put
                 *       (ITSTV)
                 * 12    reserved
                 * 11    MCH Thermal Sensor Event
                 *       for SMI/SCI/SERR (GTSE)
                 * 10    reserved
                 *  9    LOCK to non-DRAM Memory Flag (LCKF)
                 *  8    reserved
                 *  7    DRAM Throttle Flag (DTF)
                 *  6:2  reserved
                 *  1    Multi-bit DRAM ECC Error Flag (DMERR)
                 *  0    Single-bit DRAM ECC Error Flag (DSERR)
                 */

Definition at line 40 of file x38_edac.c.

#define X38_ERRSTS_BITS (X38_ERRSTS_UE | X38_ERRSTS_CE)

Definition at line 43 of file x38_edac.c.

#define X38_ERRSTS_CE 0x0001

Definition at line 42 of file x38_edac.c.

#define X38_ERRSTS_UE 0x0002

Definition at line 41 of file x38_edac.c.

#define X38_MCHBAR_HIGH 0x4c

Definition at line 32 of file x38_edac.c.

#define X38_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */

Definition at line 31 of file x38_edac.c.

#define X38_MCHBAR_MASK 0xfffffc000ULL /* bits 35:14 */

Definition at line 33 of file x38_edac.c.

#define X38_MMR_WINDOW_SIZE 16384

Definition at line 34 of file x38_edac.c.

#define X38_RANKS 8

Definition at line 25 of file x38_edac.c.

#define X38_RANKS_PER_CHANNEL 4

Definition at line 26 of file x38_edac.c.

#define X38_REVISION "1.1"

Definition at line 19 of file x38_edac.c.

#define X38_TOM

Value:

0xa0    /* Top of Memory (16b)
                 *
                 * 15:10 reserved
                 *  9:0  total populated physical memory
                 */

Definition at line 36 of file x38_edac.c.

#define X38_TOM_MASK 0x3ff /* bits 9:0 */

Definition at line 37 of file x38_edac.c.

#define X38_TOM_SHIFT 26 /* 64MiB grain */

Definition at line 38 of file x38_edac.c.

Enumeration Type Documentation

enum x38_chips

Enumerator:

X38

Definition at line 91 of file x38_edac.c.

Function Documentation

MODULE_AUTHOR	(	"Cluster	Computing,
		Inc.Hitoshi Mitake"
	)

MODULE_DESCRIPTION ( "MC support for Intel X38 memory hub controllers" )

MODULE_DEVICE_TABLE	(	pci	,
		x38_pci_tbl
	)

module_exit ( x38_exit )

module_init ( x38_init )

MODULE_LICENSE ( "GPL" )

module_param	(	edac_op_state	,
		int	,
		0444
	)

MODULE_PARM_DESC	(	edac_op_state	,
		"EDAC Error Reporting state:	0 = `Poll`
	)

void __iomem* x38_map_mchbar ( struct pci_dev * pdev )

Definition at line 216 of file x38_edac.c.

Data Structures

Macros

Enumerations

Functions

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation