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xircom_cb.c
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1 /*
2  * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards
3  *
4  * This software is (C) by the respective authors, and licensed under the GPL
5  * License.
6  *
7  * Written by Arjan van de Ven for Red Hat, Inc.
8  * Based on work by Jeff Garzik, Doug Ledford and Donald Becker
9  *
10  * This software may be used and distributed according to the terms
11  * of the GNU General Public License, incorporated herein by reference.
12  *
13  *
14  * $Id: xircom_cb.c,v 1.33 2001/03/19 14:02:07 arjanv Exp $
15  */
16 
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18 
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/string.h>
22 #include <linux/errno.h>
23 #include <linux/ioport.h>
24 #include <linux/slab.h>
25 #include <linux/interrupt.h>
26 #include <linux/pci.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/bitops.h>
33 
34 #include <asm/uaccess.h>
35 #include <asm/io.h>
36 #ifdef CONFIG_NET_POLL_CONTROLLER
37 #include <asm/irq.h>
38 #endif
39 
40 MODULE_DESCRIPTION("Xircom Cardbus ethernet driver");
41 MODULE_AUTHOR("Arjan van de Ven <[email protected]>");
42 MODULE_LICENSE("GPL");
43 
44 #define xw32(reg, val) iowrite32(val, ioaddr + (reg))
45 #define xr32(reg) ioread32(ioaddr + (reg))
46 #define xr8(reg) ioread8(ioaddr + (reg))
47 
48 /* IO registers on the card, offsets */
49 #define CSR0 0x00
50 #define CSR1 0x08
51 #define CSR2 0x10
52 #define CSR3 0x18
53 #define CSR4 0x20
54 #define CSR5 0x28
55 #define CSR6 0x30
56 #define CSR7 0x38
57 #define CSR8 0x40
58 #define CSR9 0x48
59 #define CSR10 0x50
60 #define CSR11 0x58
61 #define CSR12 0x60
62 #define CSR13 0x68
63 #define CSR14 0x70
64 #define CSR15 0x78
65 #define CSR16 0x80
66 
67 /* PCI registers */
68 #define PCI_POWERMGMT 0x40
69 
70 /* Offsets of the buffers within the descriptor pages, in bytes */
71 
72 #define NUMDESCRIPTORS 4
73 
74 static int bufferoffsets[NUMDESCRIPTORS] = {128,2048,4096,6144};
75 
76 
78  /* Send and receive buffers, kernel-addressable and dma addressable forms */
79 
82 
85 
86  struct sk_buff *tx_skb[4];
87 
88  void __iomem *ioaddr;
89  int open;
90 
91  /* transmit_used is the rotating counter that indicates which transmit
92  descriptor has to be used next */
94 
95  /* Spinlock to serialize register operations.
96  It must be helt while manipulating the following registers:
97  CSR0, CSR6, CSR7, CSR9, CSR10, CSR15
98  */
100 
101  struct pci_dev *pdev;
102  struct net_device *dev;
103 };
104 
105 
106 /* Function prototypes */
107 static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id);
108 static void xircom_remove(struct pci_dev *pdev);
109 static irqreturn_t xircom_interrupt(int irq, void *dev_instance);
110 static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,
111  struct net_device *dev);
112 static int xircom_open(struct net_device *dev);
113 static int xircom_close(struct net_device *dev);
114 static void xircom_up(struct xircom_private *card);
115 #ifdef CONFIG_NET_POLL_CONTROLLER
116 static void xircom_poll_controller(struct net_device *dev);
117 #endif
118 
119 static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset);
120 static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset);
121 static void read_mac_address(struct xircom_private *card);
122 static void transceiver_voodoo(struct xircom_private *card);
123 static void initialize_card(struct xircom_private *card);
124 static void trigger_transmit(struct xircom_private *card);
125 static void trigger_receive(struct xircom_private *card);
126 static void setup_descriptors(struct xircom_private *card);
127 static void remove_descriptors(struct xircom_private *card);
128 static int link_status_changed(struct xircom_private *card);
129 static void activate_receiver(struct xircom_private *card);
130 static void deactivate_receiver(struct xircom_private *card);
131 static void activate_transmitter(struct xircom_private *card);
132 static void deactivate_transmitter(struct xircom_private *card);
133 static void enable_transmit_interrupt(struct xircom_private *card);
134 static void enable_receive_interrupt(struct xircom_private *card);
135 static void enable_link_interrupt(struct xircom_private *card);
136 static void disable_all_interrupts(struct xircom_private *card);
137 static int link_status(struct xircom_private *card);
138 
139 
140 
141 static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = {
142  { PCI_VDEVICE(XIRCOM, 0x0003), },
143  {0,},
144 };
145 MODULE_DEVICE_TABLE(pci, xircom_pci_table);
146 
147 static struct pci_driver xircom_ops = {
148  .name = "xircom_cb",
149  .id_table = xircom_pci_table,
150  .probe = xircom_probe,
151  .remove = __devexit_p(xircom_remove),
152 };
153 
154 
155 #if defined DEBUG && DEBUG > 1
156 static void print_binary(unsigned int number)
157 {
158  int i,i2;
159  char buffer[64];
160  memset(buffer,0,64);
161  i2=0;
162  for (i=31;i>=0;i--) {
163  if (number & (1<<i))
164  buffer[i2++]='1';
165  else
166  buffer[i2++]='0';
167  if ((i&3)==0)
168  buffer[i2++]=' ';
169  }
170  pr_debug("%s\n",buffer);
171 }
172 #endif
173 
174 static const struct net_device_ops netdev_ops = {
175  .ndo_open = xircom_open,
176  .ndo_stop = xircom_close,
177  .ndo_start_xmit = xircom_start_xmit,
178  .ndo_change_mtu = eth_change_mtu,
179  .ndo_set_mac_address = eth_mac_addr,
180  .ndo_validate_addr = eth_validate_addr,
181 #ifdef CONFIG_NET_POLL_CONTROLLER
182  .ndo_poll_controller = xircom_poll_controller,
183 #endif
184 };
185 
186 /* xircom_probe is the code that gets called on device insertion.
187  it sets up the hardware and registers the device to the networklayer.
188 
189  TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the
190  first two packets that get send, and pump hates that.
191 
192  */
193 static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id)
194 {
195  struct device *d = &pdev->dev;
196  struct net_device *dev = NULL;
197  struct xircom_private *private;
198  unsigned long flags;
199  unsigned short tmp16;
200  int rc;
201 
202  /* First do the PCI initialisation */
203 
204  rc = pci_enable_device(pdev);
205  if (rc < 0)
206  goto out;
207 
208  /* disable all powermanagement */
209  pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000);
210 
211  pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/
212 
213  /* clear PCI status, if any */
214  pci_read_config_word (pdev,PCI_STATUS, &tmp16);
215  pci_write_config_word (pdev, PCI_STATUS,tmp16);
216 
217  rc = pci_request_regions(pdev, "xircom_cb");
218  if (rc < 0) {
219  pr_err("%s: failed to allocate io-region\n", __func__);
220  goto err_disable;
221  }
222 
223  rc = -ENOMEM;
224  /*
225  Before changing the hardware, allocate the memory.
226  This way, we can fail gracefully if not enough memory
227  is available.
228  */
229  dev = alloc_etherdev(sizeof(struct xircom_private));
230  if (!dev)
231  goto err_release;
232 
233  private = netdev_priv(dev);
234 
235  /* Allocate the send/receive buffers */
236  private->rx_buffer = dma_alloc_coherent(d, 8192,
237  &private->rx_dma_handle,
238  GFP_KERNEL);
239  if (private->rx_buffer == NULL) {
240  pr_err("%s: no memory for rx buffer\n", __func__);
241  goto rx_buf_fail;
242  }
243  private->tx_buffer = dma_alloc_coherent(d, 8192,
244  &private->tx_dma_handle,
245  GFP_KERNEL);
246  if (private->tx_buffer == NULL) {
247  pr_err("%s: no memory for tx buffer\n", __func__);
248  goto tx_buf_fail;
249  }
250 
251  SET_NETDEV_DEV(dev, &pdev->dev);
252 
253 
254  private->dev = dev;
255  private->pdev = pdev;
256 
257  /* IO range. */
258  private->ioaddr = pci_iomap(pdev, 0, 0);
259  if (!private->ioaddr)
260  goto reg_fail;
261 
262  spin_lock_init(&private->lock);
263 
264  initialize_card(private);
265  read_mac_address(private);
266  setup_descriptors(private);
267 
268  dev->netdev_ops = &netdev_ops;
269  pci_set_drvdata(pdev, dev);
270 
271  rc = register_netdev(dev);
272  if (rc < 0) {
273  pr_err("%s: netdevice registration failed\n", __func__);
274  goto err_unmap;
275  }
276 
277  netdev_info(dev, "Xircom cardbus revision %i at irq %i\n",
278  pdev->revision, pdev->irq);
279  /* start the transmitter to get a heartbeat */
280  /* TODO: send 2 dummy packets here */
281  transceiver_voodoo(private);
282 
283  spin_lock_irqsave(&private->lock,flags);
284  activate_transmitter(private);
285  activate_receiver(private);
286  spin_unlock_irqrestore(&private->lock,flags);
287 
288  trigger_receive(private);
289 out:
290  return rc;
291 
292 err_unmap:
293  pci_iounmap(pdev, private->ioaddr);
294 reg_fail:
295  pci_set_drvdata(pdev, NULL);
296  dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle);
297 tx_buf_fail:
298  dma_free_coherent(d, 8192, private->rx_buffer, private->rx_dma_handle);
299 rx_buf_fail:
300  free_netdev(dev);
301 err_release:
302  pci_release_regions(pdev);
303 err_disable:
304  pci_disable_device(pdev);
305  goto out;
306 }
307 
308 
309 /*
310  xircom_remove is called on module-unload or on device-eject.
311  it unregisters the irq, io-region and network device.
312  Interrupts and such are already stopped in the "ifconfig ethX down"
313  code.
314  */
315 static void __devexit xircom_remove(struct pci_dev *pdev)
316 {
317  struct net_device *dev = pci_get_drvdata(pdev);
318  struct xircom_private *card = netdev_priv(dev);
319  struct device *d = &pdev->dev;
320 
321  unregister_netdev(dev);
322  pci_iounmap(pdev, card->ioaddr);
323  pci_set_drvdata(pdev, NULL);
324  dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle);
325  dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle);
326  free_netdev(dev);
327  pci_release_regions(pdev);
328  pci_disable_device(pdev);
329 }
330 
331 static irqreturn_t xircom_interrupt(int irq, void *dev_instance)
332 {
333  struct net_device *dev = (struct net_device *) dev_instance;
334  struct xircom_private *card = netdev_priv(dev);
335  void __iomem *ioaddr = card->ioaddr;
336  unsigned int status;
337  int i;
338 
339  spin_lock(&card->lock);
340  status = xr32(CSR5);
341 
342 #if defined DEBUG && DEBUG > 1
343  print_binary(status);
344  pr_debug("tx status 0x%08x 0x%08x\n",
345  card->tx_buffer[0], card->tx_buffer[4]);
346  pr_debug("rx status 0x%08x 0x%08x\n",
347  card->rx_buffer[0], card->rx_buffer[4]);
348 #endif
349  /* Handle shared irq and hotplug */
350  if (status == 0 || status == 0xffffffff) {
351  spin_unlock(&card->lock);
352  return IRQ_NONE;
353  }
354 
355  if (link_status_changed(card)) {
356  int newlink;
357  netdev_dbg(dev, "Link status has changed\n");
358  newlink = link_status(card);
359  netdev_info(dev, "Link is %d mbit\n", newlink);
360  if (newlink)
361  netif_carrier_on(dev);
362  else
363  netif_carrier_off(dev);
364 
365  }
366 
367  /* Clear all remaining interrupts */
368  status |= 0xffffffff; /* FIXME: make this clear only the
369  real existing bits */
370  xw32(CSR5, status);
371 
372 
373  for (i=0;i<NUMDESCRIPTORS;i++)
374  investigate_write_descriptor(dev,card,i,bufferoffsets[i]);
375  for (i=0;i<NUMDESCRIPTORS;i++)
376  investigate_read_descriptor(dev,card,i,bufferoffsets[i]);
377 
378  spin_unlock(&card->lock);
379  return IRQ_HANDLED;
380 }
381 
382 static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,
383  struct net_device *dev)
384 {
385  struct xircom_private *card;
386  unsigned long flags;
387  int nextdescriptor;
388  int desc;
389 
390  card = netdev_priv(dev);
391  spin_lock_irqsave(&card->lock,flags);
392 
393  /* First see if we can free some descriptors */
394  for (desc=0;desc<NUMDESCRIPTORS;desc++)
395  investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]);
396 
397 
398  nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS);
399  desc = card->transmit_used;
400 
401  /* only send the packet if the descriptor is free */
402  if (card->tx_buffer[4*desc]==0) {
403  /* Copy the packet data; zero the memory first as the card
404  sometimes sends more than you ask it to. */
405 
406  memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536);
407  skb_copy_from_linear_data(skb,
408  &(card->tx_buffer[bufferoffsets[desc] / 4]),
409  skb->len);
410  /* FIXME: The specification tells us that the length we send HAS to be a multiple of
411  4 bytes. */
412 
413  card->tx_buffer[4*desc+1] = cpu_to_le32(skb->len);
414  if (desc == NUMDESCRIPTORS - 1) /* bit 25: last descriptor of the ring */
415  card->tx_buffer[4*desc+1] |= cpu_to_le32(1<<25);
416 
417  card->tx_buffer[4*desc+1] |= cpu_to_le32(0xF0000000);
418  /* 0xF0... means want interrupts*/
419  card->tx_skb[desc] = skb;
420 
421  wmb();
422  /* This gives the descriptor to the card */
423  card->tx_buffer[4*desc] = cpu_to_le32(0x80000000);
424  trigger_transmit(card);
425  if (card->tx_buffer[nextdescriptor*4] & cpu_to_le32(0x8000000)) {
426  /* next descriptor is occupied... */
427  netif_stop_queue(dev);
428  }
429  card->transmit_used = nextdescriptor;
430  spin_unlock_irqrestore(&card->lock,flags);
431  return NETDEV_TX_OK;
432  }
433 
434  /* Uh oh... no free descriptor... drop the packet */
435  netif_stop_queue(dev);
436  spin_unlock_irqrestore(&card->lock,flags);
437  trigger_transmit(card);
438 
439  return NETDEV_TX_BUSY;
440 }
441 
442 
443 
444 
445 static int xircom_open(struct net_device *dev)
446 {
447  struct xircom_private *xp = netdev_priv(dev);
448  const int irq = xp->pdev->irq;
449  int retval;
450 
451  netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq);
452  retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev->name, dev);
453  if (retval)
454  return retval;
455 
456  xircom_up(xp);
457  xp->open = 1;
458 
459  return 0;
460 }
461 
462 static int xircom_close(struct net_device *dev)
463 {
464  struct xircom_private *card;
465  unsigned long flags;
466 
467  card = netdev_priv(dev);
468  netif_stop_queue(dev); /* we don't want new packets */
469 
470 
471  spin_lock_irqsave(&card->lock,flags);
472 
473  disable_all_interrupts(card);
474 #if 0
475  /* We can enable this again once we send dummy packets on ifconfig ethX up */
476  deactivate_receiver(card);
477  deactivate_transmitter(card);
478 #endif
479  remove_descriptors(card);
480 
481  spin_unlock_irqrestore(&card->lock,flags);
482 
483  card->open = 0;
484  free_irq(card->pdev->irq, dev);
485 
486  return 0;
487 
488 }
489 
490 
491 #ifdef CONFIG_NET_POLL_CONTROLLER
492 static void xircom_poll_controller(struct net_device *dev)
493 {
494  struct xircom_private *xp = netdev_priv(dev);
495  const int irq = xp->pdev->irq;
496 
497  disable_irq(irq);
498  xircom_interrupt(irq, dev);
499  enable_irq(irq);
500 }
501 #endif
502 
503 
504 static void initialize_card(struct xircom_private *card)
505 {
506  void __iomem *ioaddr = card->ioaddr;
507  unsigned long flags;
508  u32 val;
509 
510  spin_lock_irqsave(&card->lock, flags);
511 
512  /* First: reset the card */
513  val = xr32(CSR0);
514  val |= 0x01; /* Software reset */
515  xw32(CSR0, val);
516 
517  udelay(100); /* give the card some time to reset */
518 
519  val = xr32(CSR0);
520  val &= ~0x01; /* disable Software reset */
521  xw32(CSR0, val);
522 
523 
524  val = 0; /* Value 0x00 is a safe and conservative value
525  for the PCI configuration settings */
526  xw32(CSR0, val);
527 
528 
529  disable_all_interrupts(card);
530  deactivate_receiver(card);
531  deactivate_transmitter(card);
532 
533  spin_unlock_irqrestore(&card->lock, flags);
534 }
535 
536 /*
537 trigger_transmit causes the card to check for frames to be transmitted.
538 This is accomplished by writing to the CSR1 port. The documentation
539 claims that the act of writing is sufficient and that the value is
540 ignored; I chose zero.
541 */
542 static void trigger_transmit(struct xircom_private *card)
543 {
544  void __iomem *ioaddr = card->ioaddr;
545 
546  xw32(CSR1, 0);
547 }
548 
549 /*
550 trigger_receive causes the card to check for empty frames in the
551 descriptor list in which packets can be received.
552 This is accomplished by writing to the CSR2 port. The documentation
553 claims that the act of writing is sufficient and that the value is
554 ignored; I chose zero.
555 */
556 static void trigger_receive(struct xircom_private *card)
557 {
558  void __iomem *ioaddr = card->ioaddr;
559 
560  xw32(CSR2, 0);
561 }
562 
563 /*
564 setup_descriptors initializes the send and receive buffers to be valid
565 descriptors and programs the addresses into the card.
566 */
567 static void setup_descriptors(struct xircom_private *card)
568 {
569  void __iomem *ioaddr = card->ioaddr;
570  u32 address;
571  int i;
572 
573  BUG_ON(card->rx_buffer == NULL);
574  BUG_ON(card->tx_buffer == NULL);
575 
576  /* Receive descriptors */
577  memset(card->rx_buffer, 0, 128); /* clear the descriptors */
578  for (i=0;i<NUMDESCRIPTORS;i++ ) {
579 
580  /* Rx Descr0: It's empty, let the card own it, no errors -> 0x80000000 */
581  card->rx_buffer[i*4 + 0] = cpu_to_le32(0x80000000);
582  /* Rx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */
583  card->rx_buffer[i*4 + 1] = cpu_to_le32(1536);
584  if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */
585  card->rx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25);
586 
587  /* Rx Descr2: address of the buffer
588  we store the buffer at the 2nd half of the page */
589 
590  address = card->rx_dma_handle;
591  card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]);
592  /* Rx Desc3: address of 2nd buffer -> 0 */
593  card->rx_buffer[i*4 + 3] = 0;
594  }
595 
596  wmb();
597  /* Write the receive descriptor ring address to the card */
598  address = card->rx_dma_handle;
599  xw32(CSR3, address); /* Receive descr list address */
600 
601 
602  /* transmit descriptors */
603  memset(card->tx_buffer, 0, 128); /* clear the descriptors */
604 
605  for (i=0;i<NUMDESCRIPTORS;i++ ) {
606  /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */
607  card->tx_buffer[i*4 + 0] = 0x00000000;
608  /* Tx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */
609  card->tx_buffer[i*4 + 1] = cpu_to_le32(1536);
610  if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */
611  card->tx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25);
612 
613  /* Tx Descr2: address of the buffer
614  we store the buffer at the 2nd half of the page */
615  address = card->tx_dma_handle;
616  card->tx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]);
617  /* Tx Desc3: address of 2nd buffer -> 0 */
618  card->tx_buffer[i*4 + 3] = 0;
619  }
620 
621  wmb();
622  /* wite the transmit descriptor ring to the card */
623  address = card->tx_dma_handle;
624  xw32(CSR4, address); /* xmit descr list address */
625 }
626 
627 /*
628 remove_descriptors informs the card the descriptors are no longer
629 valid by setting the address in the card to 0x00.
630 */
631 static void remove_descriptors(struct xircom_private *card)
632 {
633  void __iomem *ioaddr = card->ioaddr;
634  unsigned int val;
635 
636  val = 0;
637  xw32(CSR3, val); /* Receive descriptor address */
638  xw32(CSR4, val); /* Send descriptor address */
639 }
640 
641 /*
642 link_status_changed returns 1 if the card has indicated that
643 the link status has changed. The new link status has to be read from CSR12.
644 
645 This function also clears the status-bit.
646 */
647 static int link_status_changed(struct xircom_private *card)
648 {
649  void __iomem *ioaddr = card->ioaddr;
650  unsigned int val;
651 
652  val = xr32(CSR5); /* Status register */
653  if (!(val & (1 << 27))) /* no change */
654  return 0;
655 
656  /* clear the event by writing a 1 to the bit in the
657  status register. */
658  val = (1 << 27);
659  xw32(CSR5, val);
660 
661  return 1;
662 }
663 
664 
665 /*
666 transmit_active returns 1 if the transmitter on the card is
667 in a non-stopped state.
668 */
669 static int transmit_active(struct xircom_private *card)
670 {
671  void __iomem *ioaddr = card->ioaddr;
672 
673  if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */
674  return 0;
675 
676  return 1;
677 }
678 
679 /*
680 receive_active returns 1 if the receiver on the card is
681 in a non-stopped state.
682 */
683 static int receive_active(struct xircom_private *card)
684 {
685  void __iomem *ioaddr = card->ioaddr;
686 
687  if (!(xr32(CSR5) & (7 << 17))) /* receiver disabled */
688  return 0;
689 
690  return 1;
691 }
692 
693 /*
694 activate_receiver enables the receiver on the card.
695 Before being allowed to active the receiver, the receiver
696 must be completely de-activated. To achieve this,
697 this code actually disables the receiver first; then it waits for the
698 receiver to become inactive, then it activates the receiver and then
699 it waits for the receiver to be active.
700 
701 must be called with the lock held and interrupts disabled.
702 */
703 static void activate_receiver(struct xircom_private *card)
704 {
705  void __iomem *ioaddr = card->ioaddr;
706  unsigned int val;
707  int counter;
708 
709  val = xr32(CSR6); /* Operation mode */
710 
711  /* If the "active" bit is set and the receiver is already
712  active, no need to do the expensive thing */
713  if ((val&2) && (receive_active(card)))
714  return;
715 
716 
717  val = val & ~2; /* disable the receiver */
718  xw32(CSR6, val);
719 
720  counter = 10;
721  while (counter > 0) {
722  if (!receive_active(card))
723  break;
724  /* wait a while */
725  udelay(50);
726  counter--;
727  if (counter <= 0)
728  netdev_err(card->dev, "Receiver failed to deactivate\n");
729  }
730 
731  /* enable the receiver */
732  val = xr32(CSR6); /* Operation mode */
733  val = val | 2; /* enable the receiver */
734  xw32(CSR6, val);
735 
736  /* now wait for the card to activate again */
737  counter = 10;
738  while (counter > 0) {
739  if (receive_active(card))
740  break;
741  /* wait a while */
742  udelay(50);
743  counter--;
744  if (counter <= 0)
745  netdev_err(card->dev,
746  "Receiver failed to re-activate\n");
747  }
748 }
749 
750 /*
751 deactivate_receiver disables the receiver on the card.
752 To achieve this this code disables the receiver first;
753 then it waits for the receiver to become inactive.
754 
755 must be called with the lock held and interrupts disabled.
756 */
757 static void deactivate_receiver(struct xircom_private *card)
758 {
759  void __iomem *ioaddr = card->ioaddr;
760  unsigned int val;
761  int counter;
762 
763  val = xr32(CSR6); /* Operation mode */
764  val = val & ~2; /* disable the receiver */
765  xw32(CSR6, val);
766 
767  counter = 10;
768  while (counter > 0) {
769  if (!receive_active(card))
770  break;
771  /* wait a while */
772  udelay(50);
773  counter--;
774  if (counter <= 0)
775  netdev_err(card->dev, "Receiver failed to deactivate\n");
776  }
777 }
778 
779 
780 /*
781 activate_transmitter enables the transmitter on the card.
782 Before being allowed to active the transmitter, the transmitter
783 must be completely de-activated. To achieve this,
784 this code actually disables the transmitter first; then it waits for the
785 transmitter to become inactive, then it activates the transmitter and then
786 it waits for the transmitter to be active again.
787 
788 must be called with the lock held and interrupts disabled.
789 */
790 static void activate_transmitter(struct xircom_private *card)
791 {
792  void __iomem *ioaddr = card->ioaddr;
793  unsigned int val;
794  int counter;
795 
796  val = xr32(CSR6); /* Operation mode */
797 
798  /* If the "active" bit is set and the receiver is already
799  active, no need to do the expensive thing */
800  if ((val&(1<<13)) && (transmit_active(card)))
801  return;
802 
803  val = val & ~(1 << 13); /* disable the transmitter */
804  xw32(CSR6, val);
805 
806  counter = 10;
807  while (counter > 0) {
808  if (!transmit_active(card))
809  break;
810  /* wait a while */
811  udelay(50);
812  counter--;
813  if (counter <= 0)
814  netdev_err(card->dev,
815  "Transmitter failed to deactivate\n");
816  }
817 
818  /* enable the transmitter */
819  val = xr32(CSR6); /* Operation mode */
820  val = val | (1 << 13); /* enable the transmitter */
821  xw32(CSR6, val);
822 
823  /* now wait for the card to activate again */
824  counter = 10;
825  while (counter > 0) {
826  if (transmit_active(card))
827  break;
828  /* wait a while */
829  udelay(50);
830  counter--;
831  if (counter <= 0)
832  netdev_err(card->dev,
833  "Transmitter failed to re-activate\n");
834  }
835 }
836 
837 /*
838 deactivate_transmitter disables the transmitter on the card.
839 To achieve this this code disables the transmitter first;
840 then it waits for the transmitter to become inactive.
841 
842 must be called with the lock held and interrupts disabled.
843 */
844 static void deactivate_transmitter(struct xircom_private *card)
845 {
846  void __iomem *ioaddr = card->ioaddr;
847  unsigned int val;
848  int counter;
849 
850  val = xr32(CSR6); /* Operation mode */
851  val = val & ~2; /* disable the transmitter */
852  xw32(CSR6, val);
853 
854  counter = 20;
855  while (counter > 0) {
856  if (!transmit_active(card))
857  break;
858  /* wait a while */
859  udelay(50);
860  counter--;
861  if (counter <= 0)
862  netdev_err(card->dev,
863  "Transmitter failed to deactivate\n");
864  }
865 }
866 
867 
868 /*
869 enable_transmit_interrupt enables the transmit interrupt
870 
871 must be called with the lock held and interrupts disabled.
872 */
873 static void enable_transmit_interrupt(struct xircom_private *card)
874 {
875  void __iomem *ioaddr = card->ioaddr;
876  unsigned int val;
877 
878  val = xr32(CSR7); /* Interrupt enable register */
879  val |= 1; /* enable the transmit interrupt */
880  xw32(CSR7, val);
881 }
882 
883 
884 /*
885 enable_receive_interrupt enables the receive interrupt
886 
887 must be called with the lock held and interrupts disabled.
888 */
889 static void enable_receive_interrupt(struct xircom_private *card)
890 {
891  void __iomem *ioaddr = card->ioaddr;
892  unsigned int val;
893 
894  val = xr32(CSR7); /* Interrupt enable register */
895  val = val | (1 << 6); /* enable the receive interrupt */
896  xw32(CSR7, val);
897 }
898 
899 /*
900 enable_link_interrupt enables the link status change interrupt
901 
902 must be called with the lock held and interrupts disabled.
903 */
904 static void enable_link_interrupt(struct xircom_private *card)
905 {
906  void __iomem *ioaddr = card->ioaddr;
907  unsigned int val;
908 
909  val = xr32(CSR7); /* Interrupt enable register */
910  val = val | (1 << 27); /* enable the link status chage interrupt */
911  xw32(CSR7, val);
912 }
913 
914 
915 
916 /*
917 disable_all_interrupts disables all interrupts
918 
919 must be called with the lock held and interrupts disabled.
920 */
921 static void disable_all_interrupts(struct xircom_private *card)
922 {
923  void __iomem *ioaddr = card->ioaddr;
924 
925  xw32(CSR7, 0);
926 }
927 
928 /*
929 enable_common_interrupts enables several weird interrupts
930 
931 must be called with the lock held and interrupts disabled.
932 */
933 static void enable_common_interrupts(struct xircom_private *card)
934 {
935  void __iomem *ioaddr = card->ioaddr;
936  unsigned int val;
937 
938  val = xr32(CSR7); /* Interrupt enable register */
939  val |= (1<<16); /* Normal Interrupt Summary */
940  val |= (1<<15); /* Abnormal Interrupt Summary */
941  val |= (1<<13); /* Fatal bus error */
942  val |= (1<<8); /* Receive Process Stopped */
943  val |= (1<<7); /* Receive Buffer Unavailable */
944  val |= (1<<5); /* Transmit Underflow */
945  val |= (1<<2); /* Transmit Buffer Unavailable */
946  val |= (1<<1); /* Transmit Process Stopped */
947  xw32(CSR7, val);
948 }
949 
950 /*
951 enable_promisc starts promisc mode
952 
953 must be called with the lock held and interrupts disabled.
954 */
955 static int enable_promisc(struct xircom_private *card)
956 {
957  void __iomem *ioaddr = card->ioaddr;
958  unsigned int val;
959 
960  val = xr32(CSR6);
961  val = val | (1 << 6);
962  xw32(CSR6, val);
963 
964  return 1;
965 }
966 
967 
968 
969 
970 /*
971 link_status() checks the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what.
972 
973 Must be called in locked state with interrupts disabled
974 */
975 static int link_status(struct xircom_private *card)
976 {
977  void __iomem *ioaddr = card->ioaddr;
978  u8 val;
979 
980  val = xr8(CSR12);
981 
982  /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */
983  if (!(val & (1 << 2)))
984  return 10;
985  /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */
986  if (!(val & (1 << 1)))
987  return 100;
988 
989  /* If we get here -> no link at all */
990 
991  return 0;
992 }
993 
994 
995 
996 
997 
998 /*
999  read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure.
1000 
1001  This function will take the spinlock itself and can, as a result, not be called with the lock helt.
1002  */
1003 static void read_mac_address(struct xircom_private *card)
1004 {
1005  void __iomem *ioaddr = card->ioaddr;
1006  unsigned long flags;
1007  u8 link;
1008  int i;
1009 
1010  spin_lock_irqsave(&card->lock, flags);
1011 
1012  xw32(CSR9, 1 << 12); /* enable boot rom access */
1013  for (i = 0x100; i < 0x1f7; i += link + 2) {
1014  u8 tuple, data_id, data_count;
1015 
1016  xw32(CSR10, i);
1017  tuple = xr32(CSR9);
1018  xw32(CSR10, i + 1);
1019  link = xr32(CSR9);
1020  xw32(CSR10, i + 2);
1021  data_id = xr32(CSR9);
1022  xw32(CSR10, i + 3);
1023  data_count = xr32(CSR9);
1024  if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) {
1025  int j;
1026 
1027  for (j = 0; j < 6; j++) {
1028  xw32(CSR10, i + j + 4);
1029  card->dev->dev_addr[j] = xr32(CSR9) & 0xff;
1030  }
1031  break;
1032  } else if (link == 0) {
1033  break;
1034  }
1035  }
1036  spin_unlock_irqrestore(&card->lock, flags);
1037  pr_debug(" %pM\n", card->dev->dev_addr);
1038 }
1039 
1040 
1041 /*
1042  transceiver_voodoo() enables the external UTP plug thingy.
1043  it's called voodoo as I stole this code and cannot cross-reference
1044  it with the specification.
1045  */
1046 static void transceiver_voodoo(struct xircom_private *card)
1047 {
1048  void __iomem *ioaddr = card->ioaddr;
1049  unsigned long flags;
1050 
1051  /* disable all powermanagement */
1052  pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000);
1053 
1054  setup_descriptors(card);
1055 
1056  spin_lock_irqsave(&card->lock, flags);
1057 
1058  xw32(CSR15, 0x0008);
1059  udelay(25);
1060  xw32(CSR15, 0xa8050000);
1061  udelay(25);
1062  xw32(CSR15, 0xa00f0000);
1063  udelay(25);
1064 
1065  spin_unlock_irqrestore(&card->lock, flags);
1066 
1067  netif_start_queue(card->dev);
1068 }
1069 
1070 
1071 static void xircom_up(struct xircom_private *card)
1072 {
1073  unsigned long flags;
1074  int i;
1075 
1076  /* disable all powermanagement */
1077  pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000);
1078 
1079  setup_descriptors(card);
1080 
1081  spin_lock_irqsave(&card->lock, flags);
1082 
1083 
1084  enable_link_interrupt(card);
1085  enable_transmit_interrupt(card);
1086  enable_receive_interrupt(card);
1087  enable_common_interrupts(card);
1088  enable_promisc(card);
1089 
1090  /* The card can have received packets already, read them away now */
1091  for (i=0;i<NUMDESCRIPTORS;i++)
1092  investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]);
1093 
1094 
1095  spin_unlock_irqrestore(&card->lock, flags);
1096  trigger_receive(card);
1097  trigger_transmit(card);
1098  netif_start_queue(card->dev);
1099 }
1100 
1101 /* Bufferoffset is in BYTES */
1102 static void
1103 investigate_read_descriptor(struct net_device *dev, struct xircom_private *card,
1104  int descnr, unsigned int bufferoffset)
1105 {
1106  int status;
1107 
1108  status = le32_to_cpu(card->rx_buffer[4*descnr]);
1109 
1110  if (status > 0) { /* packet received */
1111 
1112  /* TODO: discard error packets */
1113 
1114  short pkt_len = ((status >> 16) & 0x7ff) - 4;
1115  /* minus 4, we don't want the CRC */
1116  struct sk_buff *skb;
1117 
1118  if (pkt_len > 1518) {
1119  netdev_err(dev, "Packet length %i is bogus\n", pkt_len);
1120  pkt_len = 1518;
1121  }
1122 
1123  skb = netdev_alloc_skb(dev, pkt_len + 2);
1124  if (skb == NULL) {
1125  dev->stats.rx_dropped++;
1126  goto out;
1127  }
1128  skb_reserve(skb, 2);
1129  skb_copy_to_linear_data(skb,
1130  &card->rx_buffer[bufferoffset / 4],
1131  pkt_len);
1132  skb_put(skb, pkt_len);
1133  skb->protocol = eth_type_trans(skb, dev);
1134  netif_rx(skb);
1135  dev->stats.rx_packets++;
1136  dev->stats.rx_bytes += pkt_len;
1137 
1138 out:
1139  /* give the buffer back to the card */
1140  card->rx_buffer[4*descnr] = cpu_to_le32(0x80000000);
1141  trigger_receive(card);
1142  }
1143 }
1144 
1145 
1146 /* Bufferoffset is in BYTES */
1147 static void
1148 investigate_write_descriptor(struct net_device *dev,
1149  struct xircom_private *card,
1150  int descnr, unsigned int bufferoffset)
1151 {
1152  int status;
1153 
1154  status = le32_to_cpu(card->tx_buffer[4*descnr]);
1155 #if 0
1156  if (status & 0x8000) { /* Major error */
1157  pr_err("Major transmit error status %x\n", status);
1158  card->tx_buffer[4*descnr] = 0;
1159  netif_wake_queue (dev);
1160  }
1161 #endif
1162  if (status > 0) { /* bit 31 is 0 when done */
1163  if (card->tx_skb[descnr]!=NULL) {
1164  dev->stats.tx_bytes += card->tx_skb[descnr]->len;
1165  dev_kfree_skb_irq(card->tx_skb[descnr]);
1166  }
1167  card->tx_skb[descnr] = NULL;
1168  /* Bit 8 in the status field is 1 if there was a collision */
1169  if (status & (1 << 8))
1170  dev->stats.collisions++;
1171  card->tx_buffer[4*descnr] = 0; /* descriptor is free again */
1172  netif_wake_queue (dev);
1173  dev->stats.tx_packets++;
1174  }
1175 }
1176 
1177 static int __init xircom_init(void)
1178 {
1179  return pci_register_driver(&xircom_ops);
1180 }
1181 
1182 static void __exit xircom_exit(void)
1183 {
1184  pci_unregister_driver(&xircom_ops);
1185 }
1186 
1187 module_init(xircom_init)
1188 module_exit(xircom_exit)
1189